CN110190149B - Deep-groove semiconductor optical detection gain structure - Google Patents
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Abstract
The invention discloses a deep-groove semiconductor photodetection gain structure, wherein the deep-groove semiconductor photodetection gain structure comprises a semiconductor material, the semiconductor material is of a first conductive impurity type, a plurality of deep grooves are formed in the upper surface of the semiconductor material downwards, the deep grooves are diffused outwards from the groove walls to form deep-groove diffusion regions of a second conductive impurity type, the deep-groove diffusion regions form PN junctions in the semiconductor material, deep-groove filling regions of the second conductive impurity type are formed in the positions of the deep grooves, one of the deep grooves serves as a photodetection electrode A, and the other deep groove serves as a photodetection electrode B. Through the technical scheme, the technical problems that the traditional structure needs high working voltage, a corresponding complex driving circuit and a very thick extremely-low doped epitaxial layer or single crystal material, and is inconvenient to be compatible and integrated with low-voltage electric signal processing are solved.
Description
Technical Field
The invention belongs to the technical field of semiconductor devices and integrated circuits, and particularly relates to a deep-groove semiconductor optical detection gain structure with optical current amplification gain.
Background
With the development of the integrated circuit with the scaling-down Moore's law to the nm-scale size, the development of the most important planar process for the realization of the integrated circuit is gradually slowed down, at this time, the industry proposes another technical development direction of the integrated circuit which does not particularly depend on the Moore's law, one of which is that the device structure is developed towards three dimensions in addition to the planar graph structure, and a technical direction which is characterized by the modern deep trench process is developed in the development process of the integrated circuit and the device towards three dimensions, so that the integrated circuit and the device are applied to devices such as an MEMS (micro electro mechanical system), a super junction device, a trench gate VDMOS (vertical double diffused metal-oxide semiconductor field effect transistor), a memory and the like, in the development direction, for a silicon photodetection device, especially a photodetection or photoreceiving device with a wavelength from 800nm to a silicon cut-off wavelength, such a device needs a wider depletion layer parallel to incident light and an electric field thereof to, the traditional solutions are all based on planar semiconductor process technology, and the main structure of the wide depletion layer photodetector with gain is an avalanche multiplication diode (APD), which requires very high working voltage, a correspondingly complex driving circuit and a very thick extremely low doped epitaxial layer or single crystal material, and is not convenient for compatible integration with low-voltage electrical signal processing.
Disclosure of Invention
The embodiment of the invention provides a deep-trench semiconductor photodetection gain structure and a manufacturing method thereof, which are used for at least solving the technical problems that the traditional structure needs very high working voltage, a corresponding relatively complex driving circuit and very thick extremely-low doped epitaxial layer or single crystal material, and is inconvenient to be compatible and integrated with low-voltage electric signal processing.
In one aspect, an embodiment of the present invention provides a deep trench semiconductor photodetection gain structure, including a semiconductor material, the semiconductor material being of a first conductive impurity type, a plurality of deep trenches being formed in an upper surface of the semiconductor material, the deep trenches being diffused outward of sidewalls of the deep trenches to form deep trench diffusion regions of a second conductive impurity type, the second conductive impurity type of the deep trench diffusion regions being of an opposite conductive impurity type to the first conductive impurity type of the semiconductor material, the deep trench diffusion regions forming PN junctions in the semiconductor material, deep trench filling regions of the second conductive impurity type being formed at positions of the deep trenches, the deep trench filling regions and the deep trench diffusion regions of two adjacent deep trenches, one of the deep trench filling regions and the deep trench diffusion regions serving as a photodetection electrode a, and the other of the deep trench filling regions and the deep trench diffusion regions serving as a photodetection electrode B, and the electrode A and the electrode B apply working voltage to form a lateral depletion layer for light detection and amplification.
Optionally, the deep groove is a narrow deep groove with an aspect ratio greater than 1.
Optionally, the deep trench diffusion region is doped with a second conductiveThe total impurity amount surface density is greater than or equal to 5 multiplied by 1012/cm2。
Preferably, the direction of the detected light is parallel to the length direction of the deep groove diffusion region and the deep groove filling region and is vertical to the upper surface of the semiconductor material.
Optionally, the semiconductor material is a wafer.
In another aspect, an embodiment of the present invention provides a method for manufacturing a deep trench semiconductor photodetection gain structure, including:
forming a plurality of deep grooves on the upper surface of a semiconductor material downwards, wherein the semiconductor material is of a first conductive impurity type;
carrying out second conductive impurity doping on the deep groove, and diffusing the second conductive impurities to the semiconductor material outside the wall of the deep groove to form a PN junction and a deep groove diffusion region, wherein the second conductive impurity type of the deep groove diffusion region is opposite to the first conductive impurity type of the semiconductor material;
and filling the deep groove with second conductive impurities to form a deep groove filling area.
Optionally, the doping the deep trench with the second conductive impurity specifically includes:
and performing second conductive impurity inclined ion implantation doping on the side wall of the deep groove.
Optionally, before the doping of the second conductive impurity to the deep trench, the method further includes:
and cleaning the deep groove, and corroding the natural oxidation layer of the deep groove.
Optionally, the doping the deep trench with the second conductive impurity specifically includes:
and (3) indirectly doping the deep groove by adopting in-situ doping second conductive impurity polysilicon deposition or in-situ doping second conductive impurity silicon epitaxy.
Has the advantages that:
the deep groove semiconductor optical detection gain structure and the manufacturing method thereof provided by the embodiment of the invention adopt the technical scheme, and have the following beneficial effects:
1) compared with the traditional scheme of non-deep grooves, the scheme does not need special extremely-low-doped semiconductor materials which often need hundreds of or even thousands of ohm/cm semiconductor material sheets, and common 10 omega/cm-level common semiconductor materials can be used after the scheme is adopted, so that the manufacturing cost of the materials is reduced, and the material selectivity and the accessibility are increased;
2) the scheme reduces the reverse bias voltage required by detecting a sensitive wide depletion layer in the light incidence direction, the reverse bias voltage required by a common wide depletion layer often needs hundreds of volts of reverse bias voltage, the scheme obtains the thickness of a wide depletion layer in the light incidence direction of a semiconductor material with relatively high doping concentration, and is different from the traditional structure, the light incidence direction of the scheme is approximately vertical to the direction of a transverse depletion layer electric field generated between deep grooves, the required reverse bias voltage can be reduced to 10V-30V, the requirement of a light detection system on a high-voltage power supply system is reduced, and a triode base open-circuit working mode is used, so that the triode base open-circuit working mode has an amplification gain effect on photocurrent response, and is more suitable for being used in certain occasions needing larger photocurrent response;
3) for silicon semiconductor materials, the scheme is more suitable for silicon to absorb a long wavelength band of light wavelength, such as the wavelength is larger than 800nm, because light with relatively larger wavelength needs thicker semiconductor materials to more fully absorb and utilize light energy, the absorption coefficient is lower, and thicker semiconductor depletion regions are needed to better absorb light energy;
4) the modern 2.5-dimensional stereo processing technology based on deep groove etching is adopted in the technology, and is More suitable for the development direction of More than mole of the modern integrated semiconductor device More than mole.
The foregoing description is only an overview of the technical solutions of the present invention, and the embodiments of the present invention are described below in order to make the technical means of the present invention more clearly understood and to make the above and other objects, features, and advantages of the present invention more clearly understandable.
Drawings
Various other advantages and benefits will become apparent to those of ordinary skill in the art upon reading the following detailed description of the preferred embodiments. The drawings are only for purposes of illustrating the preferred embodiments and are not to be construed as limiting the invention. Also, like reference numerals are used to refer to like parts throughout the drawings. In the drawings:
FIG. 1 is a schematic cross-sectional view of an overall technical solution of a deep trench semiconductor optical detection gain structure according to the present invention;
FIG. 2 is a schematic cross-sectional view of the structure after etching a deep trench according to an embodiment of the present invention;
FIG. 3 is a schematic cross-sectional view of the deep trench diffusion region 2 according to embodiment 1 of the present invention;
FIG. 4 is a schematic cross-sectional view of example 1 after the completion of the process steps of poly-filling, surface planarization, and dielectric capping;
FIG. 5 is a schematic cross-sectional view of a contact hole, metallization and photolithography completed in example 1 of the present invention;
FIG. 6 is a schematic cross-sectional view of example 2 after completing the in-situ poly or single crystal doping and filling, surface planarization, and dielectric capping process steps;
FIG. 7 is a schematic cross-sectional view of a contact hole, metallization and photolithography completed in example 2 of the present invention;
in the figure: 1. a semiconductor material; 2. a deep trench diffusion region; 3. a deep trench fill region; 4. and oxidizing the layer.
Detailed Description
Exemplary embodiments of the present disclosure will be described in more detail below with reference to the accompanying drawings. While exemplary embodiments of the present disclosure are shown in the drawings, it should be understood that the present disclosure may be embodied in various forms and should not be limited to the embodiments set forth herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete, and will fully convey the scope of the disclosure to those skilled in the art.
As shown in fig. 1, in one aspect, an embodiment of the present invention provides a deep trench semiconductor photodetection gain structure, which includes a semiconductor material 1, the semiconductor material 1 being of a first conductive impurity type, a plurality of deep trenches being formed on an upper surface of the semiconductor material 1, the deep trenches being diffused outward of walls of the deep trenches to form deep trench diffusion regions 2 of a second conductive impurity type, the second conductive impurity type of the deep trench diffusion regions 2 being of an opposite conductive impurity type to the first conductive impurity type of the semiconductor material 1, the deep trench diffusion regions 2 forming PN junctions in the semiconductor material 1, the deep trench filling regions 3 of the second conductive impurity type being formed at positions of the deep trenches, the deep trench filling region 3 and the deep trench diffusion region 2 of one of the deep trenches serving as a photodetection electrode a, the deep trench filling region 3 and the deep trench diffusion region 2 of the other deep trench serving as a photodetection electrode B, and the electrode A and the electrode B apply working voltage to form a lateral depletion layer for light detection and amplification.
In the embodiment of the invention, the deep groove filling region 3 and the deep groove diffusion region 2 of two adjacent deep grooves are used, wherein the deep groove filling region 3 and the deep groove diffusion region 2 of one deep groove are used as a light detection electrode A, the deep groove filling region 3 and the deep groove diffusion region 2 of the other deep groove are used as a light detection electrode B, and the electrode A and the electrode B apply working voltage to form a transverse depletion layer for light detection and amplification. Preferably, the direction of the detected light is parallel to the length direction of the deep groove diffusion region 2 and the deep groove filling region 3, and is perpendicular to the surface of the semiconductor material 1 wafer, and the incident direction of the light is approximately perpendicular to the direction of the transverse depletion layer electric field. In other embodiments, the detected light direction may not be perpendicular to the wafer surface of the semiconductor material 1, and the detected light direction may be detected and amplified to a different degree than the light direction perpendicular to the wafer surface of the semiconductor material 1.
The embodiment of the invention uses the principle of base open triode photocurrent amplification action, and the proposed structure adopts a mode that incident light is approximately vertical to a depletion layer electric field, thereby avoiding the defects that the traditional silicon optical long wave detection needs higher reverse bias depletion voltage and very thick extremely low doped epitaxial layer or single crystal material and is inconvenient for compatible integration with low-voltage electric signal processing, reducing the material and process requirements, increasing the process integration selectivity which is more flexible and convenient with electronic devices, and at least solving the technical problems that the traditional structure needs very high working voltage, a corresponding relatively complex driving circuit and very thick extremely low doped epitaxial layer or single crystal material and is inconvenient for compatible integration with low-voltage electric signal processing.
The slot walls include the side walls and bottom wall of the deep slot.
As shown in fig. 1, the deep groove is a narrow deep groove with an aspect ratio greater than 1.
As a specific embodiment, the total quantity surface density of the second conductive impurities doped in the deep groove diffusion region 2 is more than or equal to 5 multiplied by 1012/cm2。
As shown in fig. 1, the direction of the detected light is parallel to the length direction of the deep trench diffusion region 2 and the deep trench filling region 3, and is perpendicular to the surface of the semiconductor material 1.
As shown in fig. 1, the semiconductor material 1 is a wafer.
On the other hand, the embodiment of the invention provides a manufacturing method of a deep-groove semiconductor photodetection gain structure, which comprises the following steps:
s101, a plurality of deep grooves are formed in the upper surface of a semiconductor material 1 downwards, and the semiconductor material 1 is of a first conductive impurity type;
s102, conducting second conductive impurity doping on the deep groove, and diffusing the second conductive impurities to the semiconductor material 1 outside the wall of the deep groove to form a PN junction and a deep groove diffusion region 2, wherein the second conductive impurity type of the deep groove diffusion region 2 is opposite to the first conductive impurity type of the semiconductor material 1;
and S103, filling the second conductive impurities into the deep groove to form a deep groove filling region 3.
As a specific embodiment, before step S101, designing a specific structure parameter of deep trench semiconductor optical detection according to the requirements of the deep trench semiconductor optical detection device on the static and dynamic response parameters of light and the process implementation capability, and determining the parameters of the deep trench, including the number of the deep trenches, the depth and width of the deep trench, and the optimal area required for optical detection; using a wafer of semiconductor material 1 having a first conductivity type of impurities, an oxide layer is formed on its surface by oxidation techniques.
As a specific embodiment, the doping the deep trench with the second conductive impurity specifically includes:
and performing second conductive impurity inclined ion implantation doping on the side wall of the deep groove.
As a specific embodiment, before the doping of the second conductive impurity to the deep trench, the method further includes:
and cleaning the deep groove, and corroding the natural oxidation layer of the deep groove.
As a specific embodiment, the doping the deep trench with the second conductive impurity specifically includes:
and (3) indirectly doping the deep groove by adopting in-situ doping second conductive impurity polysilicon deposition or in-situ doping second conductive impurity silicon epitaxy.
The implementation of the scheme is illustrated below in 2 implementation examples, and other ways of implementing the inventive content should not be considered as different schemes from the scheme. The main difference between embodiment 1 and embodiment 2 is that the deep trench doping region 2 and the deep trench filling region 3, i.e. the deep trench sidewall or the deep trench doping and filling molding manner is different.
It is understood that the first conductive impurities are opposite in conductivity type to the second conductive impurities, which means that when the first conductive impurities are P-type impurities, the second conductive impurities are N-type impurities; similarly, when the first conductive impurity is an N-type impurity, the second conductive impurity is a P-type impurity; the N-type impurity and the P-type impurity are well known technical terms to those skilled in the art, and the present invention will not be explained.
Example 1
The core structure of the laser detection gain device in the wavelength range of 800nm to 1060nm is taken as an example to illustrate the following embodiment 1:
1. referring to the fact that the thickness (simultaneously, the maximum depletion layer thickness) of an active layer of a traditional extremely-low-doped planar 1060nm wavelength laser detector which is convenient to manufacture and use is generally 30-50 mu m, a deep groove to be processed is designed to be equivalent to the thickness and is 40 mu m, and the width of the deep groove is 2 mu m considering that the depth-to-width ratio of the existing deep groove is limited by the level of technological capability; the distance between the adjacent deep grooves is 9 mu m; the doping concentration of the semiconductor material 1 is converted into resistivity, which is taken as 6 omega cm, and the N type is less than 100 and is larger than a substrate silicon wafer;
2. forming photoetching alignment marks on the silicon chip by adopting an industry passing method;
3. in the step 2, a 40nm oxidation layer is formed by using thermal oxidation common in the industry, then a 700nm oxidation layer is deposited by using LPCVD (low pressure chemical vapor deposition method) and used as a hard mask for etching a deep groove, a pattern of the deep groove to be etched is exposed and developed by using a common photoetching method, a 40nm +700nm oxidation layer 4 is etched by using a high-anisotropy dry etching machine, and a rectangular deep groove with the depth of 40 mu m and the width of 2 mu m is etched by using the high-anisotropy dry etching machine, as shown in FIG. 2;
4. after the step 3 is finished, cleaning the silicon wafer by adopting an industry general cleaning program, and injecting BF2 ions into the silicon wafer by using an industry popular ion injection technology and inclining the direction vertical to the surface of the silicon wafer by 2.8 degrees, wherein the energy is 80KeV, and the dosage is 3 multiplied by 1015cm-2The implantation of BF2 ion energy and dose is not particularly sensitive, but is carried out by forming a sufficient amount of impurity on the side wall of the deep trench so that the surface density of the boron impurity doped in the diffusion region 2 of the deep trench is at least 5X 1012/cm2So as to reduce the series resistance of the doped deep trench diffusion region 2 and prevent the P-type impurity of the deep trench diffusion region 2 from being exhausted under normal operating voltage, as shown in fig. 3;
5. after the deep groove ion implantation in the step 4 is completed, activating and diffusing the implanted ions by adopting a diffusion process which is commonly used in the industry, specifically, nitrogen diffusion is performed for 30 minutes at 1000 ℃ so as to meet the requirement of forming a good PN between the deep groove diffusion region 2 and the semiconductor material 1;
6. after the step 5 is completed, cleaning the silicon wafer by adopting an industry general cleaning program, corroding a possible natural oxide layer on the side wall of the deep groove by a wet method, depositing a polycrystalline silicon layer in an industry general LPCVD (low pressure chemical vapor deposition) mode, wherein the thickness of the polycrystalline silicon layer can fill the deep groove, the specific value is 1.75 mu m, the deep groove is closed or filled after the deposition of the polycrystalline silicon layer is completed, if a filling gap exists, the cell structure is slightly influenced but not serious, and then removing the redundant polycrystalline silicon on the surface of the silicon wafer by using an industry general CMP (chemical mechanical polishing) or dry etching mode to flatten the surface of the silicon wafer, so that the subsequent microelectronic processing technology can be conveniently implemented, and the common oxide layer or silicon nitride layer is thermally oxidized or low-precipitated, as shown in;
7. after the step 6 is completed, a contact hole is subsequently opened on the deep groove filling region 3, metal is deposited and is etched, a core structure of the optical detection booster is finally formed, electrodes connected with two adjacent deep groove filling regions 3 are an electrode A and an electrode B respectively, and when the optical detection booster works, the electrode A and the electrode B are connected with 15V working voltage, as shown in fig. 5.
The thickness of the oxide layer to be preserved in the process steps can be designed for the anti-reflective film according to the photo-detection wavelength required by the application, which is well known to those skilled in the art and will not be described in detail herein.
Example 2
Example 2 is still illustrated by taking the core structure of a laser detection booster in the wavelength range of 800nm to 1060nm as an example:
1. referring to the fact that the thickness (simultaneously, the maximum depletion layer thickness) of an active layer of a traditional extremely-low-doped planar 1060nm wavelength laser detector which is convenient to manufacture and use is generally 30-50 mu m, a deep groove to be processed is designed to be equivalent to the thickness and is 40 mu m, and the width of the deep groove is 2 mu m considering that the depth-to-width ratio of the existing deep groove is limited by the level of technological capability; the distance between the adjacent deep grooves is 9 mu m; the doping concentration of the semiconductor material 1 is converted into resistivity, which is taken as 6 omega cm, and the N type is less than 100 and is larger than a substrate silicon wafer;
2. forming photoetching alignment marks on the silicon chip by adopting an industry passing method;
3. in the step 2, forming a 40nm oxidation layer by using industrial general thermal oxidation, depositing a 700nm oxidation layer by using LPCVD (low pressure chemical vapor deposition) as a hard mask for deep groove etching, exposing and developing a pattern of a deep groove to be etched by adopting a general photoetching method, etching the oxidation layer 4 with the thickness of 40nm and the thickness of 700nm by using a high-anisotropy dry etching machine, and etching a rectangular deep groove with the depth of 40 mu m and the width of 2 mu m by using the high-anisotropy dry etching machine, wherein the rectangular deep groove is shown in figure 2;
4. after the step 3 is finished, cleaning the silicon wafer by adopting an industry general cleaning program, corroding a possible natural oxide layer on the side wall of the deep groove by a wet method, using industry-passed selective or non-selective boron-doped silicon epitaxy, epitaxially growing a silicon epitaxial layer with the thickness of 1.75 mu m, wherein the doping concentration is more than 1 multiplied by 1018/cm3Filling the deep groove, if filling gaps exist, slightly affecting the cellular structure, but not seriously, and removing the redundant outer part of the surface of the silicon wafer by using a CMP (chemical mechanical polishing) or dry etching mode commonly used in the industrySilicon is extended to enable the surface of the silicon wafer to be flat, so that the subsequent microelectronic processing technology can be conveniently implemented, and a common oxide layer or silicon nitride layer is thermally oxidized or precipitated, as shown in fig. 6; for non-selective epitaxy, a layer of polysilicon layer with the thickness of 50nm-100nm can be deposited by an industrial general LPCVD (low pressure chemical vapor deposition) mode, and then boron-doped silicon epitaxy is carried out;
the deep groove filling in the step can also directly adopt an industrial general LPCVD mode to deposit an in-situ boron-doped polycrystalline silicon layer with the thickness of 1.75 mu m to replace a boron-doped silicon epitaxial layer;
5. and after the step 4 is completed, subsequently opening a contact hole on the deep groove filling region 3, depositing metal, photoetching the metal, and finally forming a core structure of the optical detection booster, wherein electrodes connected with two adjacent deep groove filling regions 3 are an electrode A and an electrode B respectively, and when the optical detection booster works, the electrode A and the electrode B are connected with 15V working voltage, as shown in fig. 7.
The thickness of the oxide layer to be preserved in the process steps can be designed for the anti-reflective film according to the photo-detection wavelength required by the application, which is well known to those skilled in the art and will not be described in detail herein.
The steps of the 2 embodiments described above omit simple procedures and conditions known and obvious to those skilled in the art, such as general industrial cleaning, which are well known and will not be described in detail herein.
It should be noted that, in this document, the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or apparatus. Without further limitation, an element defined by the phrase "comprising an … …" does not exclude the presence of other like elements in a process, method, article, or apparatus that comprises the element.
The above-mentioned serial numbers of the embodiments of the present invention are merely for description and do not represent the merits of the embodiments.
While the present invention has been described with reference to the embodiments shown in the drawings, the present invention is not limited to the embodiments, which are illustrative and not restrictive, and it will be apparent to those skilled in the art that various changes and modifications can be made therein without departing from the spirit and scope of the invention as defined in the appended claims.
Claims (5)
1. A deep groove semiconductor optical detection gain structure is characterized by comprising a semiconductor material, wherein the semiconductor material is of a first conductive impurity type, a plurality of deep grooves are formed in the upper surface of the semiconductor material in a downward mode, the deep grooves are diffused outwards from the groove walls of the deep grooves to form deep groove diffusion regions of a second conductive impurity type, the second conductive impurity type of the deep groove diffusion regions is opposite to the first conductive impurity type of the semiconductor material, PN junctions are formed in the semiconductor material by the deep groove diffusion regions, deep groove filling regions of the second conductive impurity type are formed at the deep groove positions, in the deep groove filling regions and the deep groove diffusion regions of two adjacent deep grooves, the deep groove filling region and the deep groove diffusion region of one deep groove serve as an optical detection electrode A, the deep groove filling region and the deep groove diffusion region of the other deep groove serve as an optical detection electrode B, a working voltage is applied to the electrodes A and B to form a transverse depletion layer for optical detection and amplification, the deep-groove semiconductor photodetection gain structure adopts a triode base open-circuit working mode.
2. The deep trench semiconductor photo-detection gain structure as claimed in claim 1, wherein the deep trench is a narrow deep trench having an aspect ratio greater than 1.
3. The deep trench semiconductor photodetector gain structure of claim 1, wherein said deep trench diffusion region is doped with a second conductive impurity at a total fluence of greater than or equal to 5 x 1012/cm2。
4. The deep trench semiconductor photo-detection gain structure as claimed in claim 1, wherein the direction of the detected light is parallel to the length direction of the deep trench diffusion region and the deep trench filling region, and perpendicular to the upper surface of the semiconductor material.
5. The deep trench semiconductor photo detection gain structure as in claim 1, wherein said semiconductor material is a wafer.
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