CN110189719B - Built-in LTPS display panel pixel point monitoring system - Google Patents
Built-in LTPS display panel pixel point monitoring system Download PDFInfo
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- CN110189719B CN110189719B CN201910463435.2A CN201910463435A CN110189719B CN 110189719 B CN110189719 B CN 110189719B CN 201910463435 A CN201910463435 A CN 201910463435A CN 110189719 B CN110189719 B CN 110189719B
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/006—Electronic inspection or testing of displays and display drivers, e.g. of LED or LCD displays
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
- G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G2330/00—Aspects of power supply; Aspects of display protection and defect management
- G09G2330/10—Dealing with defective pixels
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G2330/00—Aspects of power supply; Aspects of display protection and defect management
- G09G2330/12—Test circuits or failure detection circuits included in a display system, as permanent part thereof
Abstract
The invention discloses a built-in LTPS display panel pixel point monitoring system which comprises a display panel, wherein the display panel sequentially comprises a panel substrate, a liquid crystal layer and a polarizing layer from inside to outside, a pixel point array of m multiplied by n pixel points is etched on the panel substrate, a detection and acquisition module is also arranged on the panel substrate, the detection and acquisition module comprises a pixel monitoring array and a time sequence sampling circuit, the pixel monitoring array comprises m multiplied by n monitoring units, and the monitoring units are in one-to-one correspondence with the pixel points. Has the advantages that: the method is characterized in that whether the pixel points of each possible dead pixel are normal or not is microscopically detected, the monitoring effect is necessarily direct and accurate, monitoring signals of a monitoring unit are compiled and converted into time sequence signal streams by a time sequence sampling circuit, and a self-checking analysis module analyzes the time sequence signal streams to obtain a pixel dead pixel result, so that the position of the dead pixel can be rapidly obtained.
Description
Technical Field
The invention relates to the technical field of LTPS display panel bad point detection, in particular to a built-in LTPS display panel pixel point monitoring system.
Background
Thin film transistor liquid crystal display (TFT-LCD) is a display technology of electronic display panels, and the light transmission of a liquid crystal layer is controlled by a TFT pixel lattice on a substrate, specifically including two TFT technologies of amorphous silicon (a-Si) and Low Temperature Polysilicon (LTPS). The LTPS panel comprises a bottom light source, wherein a TFT substrate, a liquid crystal layer, a polarizing layer and a glass protective layer are sequentially arranged on the bottom light source from inside to outside, as shown in figure 1, the TFT substrate is a glass substrate, a layer of polycrystalline silicon film is covered on the surface of the TFT substrate, a Field Effect Transistor (FET) lattice is etched on the polycrystalline silicon film, as shown in figure 2, a pixel electrode is made of crystalline silicon of a non-FET lattice, the pixel electrode and a common electrode on the upper part of the liquid crystal layer form a storage capacitor, each storage capacitor is provided with a liquid crystal unit, as shown in figure 3, the FET lattice is scanned and supplied with power, and the storage capacitor obtains a certain voltage to enable the liquid crystal unit to transmit light, so that a pattern is formed.
In the use of display screen, whether normal printing opacity of pixel can become the main reason that the display screen normally shows, but at the unable normal printing opacity of few part pixel, when dead pixel promptly, produce the flower screen phenomenon easily, whole display screen can also continue to show partial content this moment, but some information can't be complete demonstrate, and abandon whole display screen and cause very big waste again, if can accurately know which pixel trouble, then can restore these dead pixels to normal work uses once more.
In the prior art, the specific position or more specific position of a dead pixel in a pixel point array cannot be determined.
Disclosure of Invention
Aiming at the defects, the invention provides a built-in LTPS display panel pixel point monitoring system, which can quickly acquire the position of a dead pixel by arranging a monitoring unit at a pixel point and collecting the light transmission condition of the pixel point in real time and analyzing the light transmission condition by a detection and analysis module, thereby being convenient for repairing the pixel point of the dead pixel, reusing the display screen of the dead pixel without the need of whole abandonment and saving resources and cost.
In order to achieve the purpose, the invention adopts the following specific technical scheme:
a built-in LTPS display panel pixel point monitoring system comprises a display panel, wherein the display panel sequentially comprises a panel substrate, a liquid crystal layer and a polarizing layer from inside to outside, a pixel point array of m multiplied by n pixel points is etched on the panel substrate, wherein n is the number of lines, m is the number of columns, a detection and acquisition module is further arranged on the panel substrate and comprises a pixel monitoring array and a time sequence sampling circuit, the pixel monitoring array comprises m multiplied by n monitoring units, the monitoring units correspond to the pixel points one by one, a sampling end group of the time sequence sampling circuit is connected with a monitoring output end group of the pixel monitoring array, and a time sequence signal flow output end group of the time sequence sampling circuit is connected with a signal receiving end group of a self-checking analysis module;
and the self-checking analysis module is used for analyzing and processing the time sequence signal flow to obtain a pixel dead pixel result.
Through the design, whether the pixel point of each possible dead pixel is normal or not is microscopically detected, the monitoring effect is necessarily direct and accurate, the monitoring signal of the monitoring unit is compiled and converted into a time sequence signal flow by a time sequence sampling circuit, and the time sequence signal flow is analyzed by the self-checking analysis module to obtain a pixel dead pixel result, so that the position of the dead pixel can be rapidly known.
The self-checking analysis module can be arranged in the display panel, the obtained analysis result can be output to the result display through an external serial port, and a pixel dead pixel display processing unit which is a single chip microcomputer or a processor is arranged on the display panel and displays the pixel dead pixel result on the display panel;
the self-checking analysis module can also be external analysis equipment, a time sequence signal flow output end group of the time sequence sampling circuit is an external serial port, and the analysis equipment can receive the time sequence signal flow for analysis only by plugging the external serial port.
The pixel point comprises an MOSFET and a pixel electrode, wherein the source electrode S of the MOSFET is connected with a pixel point data driving line, the grid electrode G is connected with a pixel point scanning driving line, and the drain electrode D is connected with the pixel electrode;
the MOSFET is a metal oxide semiconductor field effect transistor, belongs to a common FET, when a pixel scanning driving line sends a scanning level signal to a grid G of the MOSFET, a source S is conducted with a drain D, a pixel data driving line supplies power and charges energy for a pixel electrode, a liquid crystal unit is clamped between the pixel electrode and the common electrode, and the liquid crystal unit guides light after being electrified to finally form a light guide surface controlled by a dot matrix.
Furthermore, the monitoring unit is provided with at least one photovoltaic PN junction, the photovoltaic PN junction is attached to the pixel electrode, and the photovoltaic PN junction is connected to the sampling end group of the time sequence sampling circuit.
The photovoltaic effect PN junction can form electric charge flow when being illuminated so as to generate potential difference, the cathode of the photovoltaic effect PN junction generates high potential, the anode of the photovoltaic effect PN junction corresponds to low potential, therefore, when a pixel point is normally transparent, light rays are illuminated on the photovoltaic effect PN junction, the two ends of the corresponding PN junction have potential difference, otherwise, when the light rays of the backlight source cannot be illuminated on the PN junction, the potential difference of the two ends can be suddenly reduced, and whether the pixel point is normally transparent or not is identified by the rise and fall of the potential.
The photovoltaic PN junction is formed by doping V group elements into silicon to form an N-type semiconductor, and doping III group elements into silicon to form a P-type semiconductor, and can be directly processed on a polycrystalline silicon film.
Further, one side of the pixel electrode is provided with a PN position, and the PN position is internally provided with the photovoltaic effect PN junction.
The PN junction is arranged in the PN position and is adjacent to the light-transmitting pixel electrode, so that the monitoring can be more accurate, the PN position is preferably the hollow position at the upper part of the pixel electrode, the hollow position at the upper part cannot obtain illumination when the pixel electrode is not light-transmitting, and only when the pixel electrode is light-transmitting, the light of the backlight source passes through the pixel electrode, and part of the light enters the PN position to enable the PN junction to generate a potential difference.
The PN junction can only be set one, and the potential difference change of each PN junction is acquired one by one, so that the analysis result can be quickly obtained, but when the PN junction is actually arranged, each PN junction is respectively wired, the wire circuit can occupy a large amount of space, and the normal work of the pixel point is influenced, so that the following scheme is selected and used in the design:
each monitoring unit is provided with 2 photovoltaic effect PN junctions, wherein one PN junction is a row PN junction and the other PN junction is a column PN junction;
the row-measuring PN junctions of each row in the pixel monitoring array are sequentially connected, the cathode of the ith row-measuring PN junction is connected with the anode of the (i + 1) th row-measuring PN junction, i is more than or equal to 1 and less than or equal to m, the anode of the 1 st row-measuring PN junction is grounded, and the cathode of the mth row-measuring PN junction is connected with the row sampling unit of the time sequence sampling circuit;
the column PN junctions of each column in the pixel monitoring array are sequentially connected, the cathode of the jth column PN junction is connected with the anode of the (j + 1) th column PN junction, j is not less than 1 and not more than n, the anode grounding wire of the 1 st column PN junction is connected with the cathode of the nth column PN junction and is connected with the column sampling unit of the time sequence sampling circuit.
And (3) performing simultaneous testing on rows and columns of the pixel points respectively, and when analyzing, only needing to know which row of the pixel points has a dead pixel, and meanwhile, if the row of the pixel points also has a dead pixel, the point where the row and the column intersect is the maximum possible dead pixel. Wherein, a plurality of PN knot of arbitrary row or row form syntropy and establish ties, and when the pixel that every PN knot corresponds all normally transmits light, the total potential difference of establishing ties is the biggest, and in case there is the dead pixel among them, then 2 kinds of situations appear: firstly, when the PN junction cannot transmit electric energy in the absence of illumination, the total potential difference of the series connection is suddenly reduced to 0, and if a plurality of dead spots exist, the dead spots possibly existing in a plurality of intersection points of the row and column can only be analyzed; secondly, the PN junction has no potential difference when no light is irradiated, but can transmit electric energy, the total potential difference in series is gradually reduced along with the number of the dead points, and the analysis result at the moment can be used for accurately determining the specific position of each dead point.
In a further design, the column sampling unit is provided with a time sequence circuit a, the time sequence circuit a comprises m register units, and the input ends of the m register units are respectively connected with the cathode of the nth column PN junction in each column of the pixel monitoring array;
the row sampling unit is provided with a time sequence circuit b, the time sequence circuit b comprises n register units, and the input ends of the n register units are respectively connected with the cathode of the mth row PN junction in each row in the pixel monitoring array.
The potential difference of each row or column is an amplitude analog signal, m amplitude analog signals of m columns and n amplitude analog signals of n rows are set as time sequence signals respectively, and transmission and analysis are more convenient and faster.
The photovoltaic PN junction is etched on the surface of the panel substrate.
The self-checking analysis module is installed on the panel substrate, the panel substrate is further provided with a pixel dead pixel display processing unit, a signal receiving end of the pixel dead pixel display processing unit is connected with an output end of the self-checking analysis module, and a display output end of the pixel dead pixel display processing unit is connected with a display driving end of the LTPS display panel.
The whole monitoring system is arranged in the display panel in the design, and although the size of the monitoring system is increased to a certain degree, a user can visually see the quality of the pixel points, so that whether the monitoring system needs to be repaired or scrapped is determined.
The invention has the beneficial effects that: the method is characterized in that whether the pixel points of each possible dead pixel are normal or not is microscopically detected, the monitoring effect is necessarily direct and accurate, monitoring signals of a monitoring unit are compiled and converted into time sequence signal streams by a time sequence sampling circuit, and a self-checking analysis module analyzes the time sequence signal streams to obtain a pixel dead pixel result, so that the position of the dead pixel can be rapidly obtained.
Drawings
FIG. 1 is a schematic cross-sectional view of a display panel;
FIG. 2 is a schematic diagram of a prior art pixel spot array;
FIG. 3 is a diagram illustrating each pixel of the prior art;
FIG. 4 is a schematic structural diagram of an embodiment of a detection and acquisition module;
FIG. 5 is a schematic diagram of an embodiment pixel spot array;
FIG. 6 is a diagram illustrating each pixel of an embodiment;
FIG. 7 is a diagram of an embodiment of a timing circuit a;
FIG. 8 is a diagram of an embodiment of a timing signal flow.
Detailed Description
The invention is described in further detail below with reference to the figures and the embodiments.
A built-in LTPS display panel pixel point monitoring system comprises a display panel A, wherein the display panel A sequentially comprises a panel substrate A1, a liquid crystal layer A2 and a polarizing layer A3 from inside to outside as shown in fig. 1, a pixel point array B of m multiplied by n pixel points B1 is etched on the panel substrate A1, wherein n is the number of rows and m is the number of columns as shown in fig. 2 and 3, the pixel points B1 comprise a MOSFET B11 and a pixel electrode B12, a source electrode S of the MOSFET B11 is connected with a pixel point data driving line A01, a gate electrode G is connected with a pixel point scanning driving line A02, and a drain electrode D is connected with the pixel electrode B12, wherein a storage capacitor B13 is further arranged beside each pixel electrode B12, the function of the storage capacitor B13 is similar to that of the pixel electrode B12, and the purpose of increasing the voltage value of the pixel points;
as shown in fig. 4, a detection and acquisition module C is further disposed on the panel substrate a1, the detection and acquisition module C includes a pixel monitoring array C1 and a time sequence sampling circuit C2, the pixel monitoring array C1 includes m × n monitoring units C11, the monitoring units C11 correspond to the pixels B1 one by one, as shown in fig. 5, a sampling terminal group of the time sequence sampling circuit C2 is connected to a monitoring output terminal group of the pixel monitoring array C1, and a time sequence signal stream output terminal group of the time sequence sampling circuit C2 is connected to a signal receiving terminal group of a self-checking analysis module D;
the monitoring unit C11 is provided with at least one photovoltaic PN junction, as shown in fig. 6, one side of the pixel electrode B12 is provided with a PN bit, the photovoltaic PN junction is arranged in the PN bit, and the photovoltaic PN junction is connected to the sampling terminal group of the timing sampling circuit C2.
In this embodiment, each monitoring unit C11 is preferably provided with 2 photovoltaic PN junctions, where one is a row PN junction and the other is a column PN junction;
the example is laid out with the column distributions shown in FIGS. 5-7:
the column PN junctions of each column in the pixel monitoring array C1 are sequentially connected, the cathode of the jth column PN junction is connected with the anode of the (j + 1) th column PN junction, j is more than or equal to 1 and less than or equal to n, the anode ground wire of the 1 st column PN junction is connected, and the cathode of the nth column PN junction is connected with the column sampling unit C2a of the time sequence sampling circuit C2;
the column sampling unit C2a is provided with a timing circuit a, the timing circuit a includes m register units, and input ends of the m register units are respectively connected to cathodes of nth column PN junctions in each column of the pixel monitoring array C1.
The row distribution layout is similar to the column distribution layout described above:
the row-measuring PN junctions of each row in the pixel monitoring array C1 are sequentially connected, the cathode of the ith row-measuring PN junction is connected with the anode of the (i + 1) th row-measuring PN junction, i is more than or equal to 1 and less than or equal to m, the anode of the 1 st row-measuring PN junction is grounded, and the cathode of the mth row-measuring PN junction is connected with the row sampling unit C2b of the time sequence sampling circuit C2;
the row sampling unit C2b is provided with a timing circuit b, the timing circuit b includes n register units, and input ends of the n register units are respectively connected to cathodes of mth row PN junctions in each row of the pixel monitoring array C1.
As shown in fig. 8, the timing signal output of any timing circuit a or b, where signal 1 indicates that all pixels are normally transparent, and signals 2 and 3 indicate that there is a dead pixel in several rows/columns, respectively, for example, signal 2 indicates that there is a dead pixel in row 6, and signal 3 indicates that there is a dead pixel in both column 10 and column 19, the result of the dead pixel analysis is the pixel in column 10 in row 6 and the pixel in column 19 in row 6, and the result is the maximum possible dead pixel position.
The photovoltaic PN junction is etched on the surface of the panel substrate A1.
The self-checking analysis module D is installed on the panel substrate A1, the panel substrate A1 is further provided with a pixel dead pixel display processing unit, a signal receiving end of the pixel dead pixel display processing unit is connected with an output end of the self-checking analysis module D, and a display output end of the pixel dead pixel display processing unit is connected with a display driving end of the LTPS display panel.
Finally, it should be noted that the above-mentioned description is only a preferred embodiment of the present invention, and those skilled in the art can make various similar representations without departing from the spirit and scope of the present invention.
Claims (5)
1. The utility model provides a built-in LTPS display panel pixel monitoring system, includes display panel (A), and this display panel (A) includes panel base plate (A1), liquid crystal layer (A2), polarisation layer (A3) from interior to exterior in proper order, it has pixel array (B) of mxn pixel (B1) to etch on panel base plate (A1), and wherein, n is the line number, and m is the column number, characterized in that: the panel substrate (A1) is further provided with a detection acquisition module (C), the detection acquisition module (C) comprises a pixel monitoring array (C1) and a time sequence sampling circuit (C2), the pixel monitoring array (C1) comprises m × n monitoring units (C11), the monitoring units (C11) correspond to the pixel points (B1) one by one, a sampling end group of the time sequence sampling circuit (C2) is connected with a monitoring output end group of the pixel monitoring array (C1), and a time sequence signal flow output end group of the time sequence sampling circuit (C2) is connected with a signal receiving end group of a self-detection analysis module (D);
the self-checking analysis module (D) is used for analyzing and processing the time sequence signal flow to obtain a pixel dead pixel result;
the pixel point (B1) comprises a MOSFET (B11) and a pixel electrode (B12), wherein the source electrode S of the MOSFET (B11) is connected with the pixel point data driving line (A01), the grid electrode G is connected with the pixel point scanning driving line (A02), and the drain electrode D is connected with the pixel electrode (B12);
the monitoring unit (C11) is provided with at least one photovoltaic PN junction, the photovoltaic PN junction is attached to the pixel electrode (B12), the photovoltaic PN junction is adjacent to the pixel electrode (B12), or the photovoltaic PN junction is connected to a sampling end group of the time sequence sampling circuit (C2) at a hollow position of the upper part of the pixel electrode (B12);
each monitoring unit (C11) is provided with 2 photovoltaic effect PN junctions, wherein one PN junction is a row PN junction and the other PN junction is a column PN junction;
the row PN junctions of each row in the pixel monitoring array (C1) are sequentially connected, the cathode of the ith row PN junction is connected with the anode of the (i + 1) th row PN junction, i is more than or equal to 1 and less than or equal to m, the anode of the 1 st row PN junction is grounded, and the cathode of the mth row PN junction is connected with the row sampling unit (C2b) of the time sequence sampling circuit (C2);
the PN junctions are sequentially connected in each column of the pixel monitoring array (C1), the cathode of the PN junction is connected with the anode of the PN junction is measured in the j +1 th column, j is not less than 1 and not more than n, the anode of the PN junction is measured in the 1 st column is connected with the ground wire, and the cathode of the PN junction is measured in the n th column is connected with the column sampling unit (C2a) of the time sequence sampling circuit (C2).
2. The built-in LTPS display panel pixel point monitoring system of claim 1, characterized in that: one side of the pixel electrode (B12) is provided with a PN position, and the photovoltaic effect PN junction is arranged in the PN position.
3. The built-in LTPS display panel pixel point monitoring system of claim 1, characterized in that: the column sampling unit (C2a) is provided with a sequential circuit a, the sequential circuit a comprises m register units, and the input ends of the m register units are respectively connected with the cathode of the nth column PN junction in each column of the pixel monitoring array (C1);
the row sampling unit (C2b) is provided with a time sequence circuit b, the time sequence circuit b comprises n register units, and the input ends of the n register units are respectively connected with the cathode of the mth row PN junction in each row of the pixel monitoring array (C1).
4. The built-in LTPS display panel pixel point monitoring system of claim 1, characterized in that: the photovoltaic PN junction is etched on the surface of the panel substrate (A1).
5. The built-in LTPS display panel pixel point monitoring system of claim 1, characterized in that: the self-checking analysis module (D) is installed on the panel substrate (A1), the panel substrate (A1) is further provided with a pixel dead pixel display processing unit, a signal receiving end of the pixel dead pixel display processing unit is connected with an output end of the self-checking analysis module (D), and a display output end of the pixel dead pixel display processing unit is connected with a display driving end of the LTPS display panel.
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Citations (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN201413624Y (en) * | 2009-04-17 | 2010-02-24 | 晶能光电(江西)有限公司 | LED backlight LCD display system available for point-to-point alignment and display thereof |
CN201556005U (en) * | 2009-09-27 | 2010-08-18 | 西门子威迪欧汽车电子(惠州)有限公司 | Automatic detecting device for LCD fault point |
CN101911159A (en) * | 2008-03-03 | 2010-12-08 | 夏普株式会社 | Display device with light sensors |
CN101937291A (en) * | 2009-06-25 | 2011-01-05 | 株式会社半导体能源研究所 | Touch panel and driving method of the same |
CN201772992U (en) * | 2010-05-20 | 2011-03-23 | 江西省通用半导体照明检测有限公司 | Handheld detector capable of conducting point-by-point detection to light-emitting diode (LED) backlighting liquid crystal display (LCD) |
-
2019
- 2019-05-30 CN CN201910463435.2A patent/CN110189719B/en active Active
Patent Citations (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN101911159A (en) * | 2008-03-03 | 2010-12-08 | 夏普株式会社 | Display device with light sensors |
CN201413624Y (en) * | 2009-04-17 | 2010-02-24 | 晶能光电(江西)有限公司 | LED backlight LCD display system available for point-to-point alignment and display thereof |
CN101937291A (en) * | 2009-06-25 | 2011-01-05 | 株式会社半导体能源研究所 | Touch panel and driving method of the same |
CN201556005U (en) * | 2009-09-27 | 2010-08-18 | 西门子威迪欧汽车电子(惠州)有限公司 | Automatic detecting device for LCD fault point |
CN201772992U (en) * | 2010-05-20 | 2011-03-23 | 江西省通用半导体照明检测有限公司 | Handheld detector capable of conducting point-by-point detection to light-emitting diode (LED) backlighting liquid crystal display (LCD) |
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