CN110164351A - Driving circuit, driving device, display equipment and driving method - Google Patents
Driving circuit, driving device, display equipment and driving method Download PDFInfo
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- CN110164351A CN110164351A CN201910325100.4A CN201910325100A CN110164351A CN 110164351 A CN110164351 A CN 110164351A CN 201910325100 A CN201910325100 A CN 201910325100A CN 110164351 A CN110164351 A CN 110164351A
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/2007—Display of intermediate tones
- G09G3/2074—Display of intermediate tones using sub-pixels
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- General Physics & Mathematics (AREA)
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Abstract
The invention discloses a kind of driving circuits, comprising: gate driving circuit, source electrode drive circuit, data signal driver, channel switching circuit, sequential control circuit and selected on-off circuit.The input terminal of selected on-off circuit is connected with the output end of the output end of sequential control circuit and channel switching circuit, selects one of multiple gate drive signals and multiple switch signal to transmit via any outflow line for timesharing.The invention also discloses a kind of driving device, display equipment and driving methods.Optimize the wiring of display panel, avoid the existing wiring cross-cutting issue in the display panel wiring of small size, the flexibility that driver (IC) exports each driving signal is improved, adapts to the display panel that various wirings require convenient for driver (IC).
Description
Technical field
The present invention relates to field of display technology, and in particular to a kind of driving circuit, driving device, display equipment and driving
Method.
Background technique
The development of display in recent years presents high integration, inexpensive development trend.One of them are very heavy
The technology wanted is exactly the realization of the technology mass production of GOA (Gate Driver on Array, the driving of array substrate row).It utilizes
GOA technology by gate switch circuit integration in the array substrate of display panel, so as to save grid-driving integrated circuit
Part, to reduce product cost in terms of material cost and manufacture craft two.
It is main to utilize the one sub-pixel list of controlling grid scan line and data line definition being arranged in a mutually vertical manner in display panel
Member, multiple data lines and a plurality of controlling grid scan line define the pixel battle array constituted including multiple sub-pixel units in matrix-style
Column, controlling grid scan line provide gated sweep signal for pixel unit, and controlling grid scan line is corresponding when gated sweep signal is high level
Pixel unit conducting, and be written data line offer data-signal.
In the driving circuit, gated sweep signal is to be driven by gate driving circuit according to the grid that sequential control circuit exports
Dynamic signal generates；And data-signal by the switching signal that channel switching circuit exports control its to data line transmission path it is logical
It is disconnected.
In the prior art, can only by sequential control circuit output pin CGOUT export include GCK (Gate Clock,
Gate clock) (Start Enabling enables to open by signal, STV (Start Vortical, frame unbalanced pulse) signal and STE
Open) gate drive signal of signal, and channel switching circuit output pin can only be passed through and export SW (Switch, switch) signal.
There are many signal for needing to transmit in display panel, when display panel very little (especially smartwatch), due to knot
Structure size limits, plurality of transmission lines needed for multiple gate drive signals and multiple switch signal etc., in limited display
It is intersected with each other or the case where can not be routed just to be easy to will appear wiring in panel space when being routed, influences entirely to drive electricity
The normal work on road.
Summary of the invention
In order to solve the above-mentioned technical problems, the present invention provides a kind of driving circuit, driving device, display equipment and drives
Dynamic method, can effectively reduce when being routed in the display panel of very little it is possible that wiring intersect or can not cloth
The case where line, improves the flexibility of driving IC output drive signal.
A kind of driving circuit provided according to the present invention, for driving pixel array, the pixel array includes multiple sons
Pixel characterized by comprising sequential control circuit, for providing multiple gate drive signals；Source electrode drive circuit is used for
Multiple data-signals are provided, the data-signal is used to characterize the luma data of the sub-pixel；Channel switching circuit, for mentioning
For multiple switch signal, the switching signal be used for control the data-signal to pixel array transmission path on-off；Choosing
Switching circuit is selected, is connected with the sequential control circuit and the channel switching circuit, selects the multiple grid for timesharing
One of driving signal and the multiple switching signal are via any transmission line.
Preferably, the gate drive signal includes clock signal, enabled open signal and frame unbalanced pulse signal.
Preferably, the driving circuit further include: gate driving circuit, it is defeated with multiple the first of the selected on-off circuit
Outlet is connected, and for generating gated sweep signal according to multiple gate drive signals, and the gated sweep signal is transmitted to
Pixel array.
Preferably, the driving circuit further include: data signal driver is connected with the source electrode drive circuit, is used for
According to different timing by data signal transmission to pixel array.
Preferably, the data signal driver is also connect with multiple second output terminals of the selected on-off circuit, is used
In receiving the multiple switching signal, be connected to or disconnect the data-signal to the pixel array transmission path.
Preferably, the data signal driver includes multiple switch pipe, wherein the source electrode and drain electrode of each switching tube point
It is not connected with source electrode drive circuit and pixel array, grid is connect with multiple second output terminals of the selected on-off circuit.
Preferably, the selected on-off circuit include multiselect one selection switch, for export any gate drive signal and
Switching signal.
A kind of driving device provided according to the present invention, which is characterized in that the driving device includes: claim 1-7
Any one of described in driving circuit, the driving circuit provides multiple gated sweep signals and multiple data-signals.
A kind of display equipment provided according to the present invention characterized by comprising display panel, the display panel packet
Multiple grid lines, multiple data lines and multiple pixels are included, the multiple pixel is respectively connected to the multiple grid line and divides
It is not connected to the multiple data line；And driving device according to any one of claims 8, the driving device are used for the display
Panel provides multiple gated sweep signals and multiple data-signals.
Preferably, the display panel includes: CRT Displays panel, digital light processing display panel, liquid crystal
Show that panel, LED display panel, organic LED display panel, quantum dot display panel, Mirco-LED are shown
Panel, Mini-LED display panel, field emission display panel, electric slurry display panel, electrophoretic display panel or electrowetting display surface
Plate.
A kind of driving method provided according to the present invention characterized by comprising by multiple gate drive signals and multiple
Switching signal carries out timesharing selection output；When exporting the multiple gate drive signal, gate driving circuit is according to described more
A gate drive signal generates gated sweep signal；When exporting the multiple switching signal, according to the multiple switching signal
The data-signal that source electrode drive circuit exports is exported to pixel array.
Preferably, the driving method further include: under the control of the gated sweep signal, the pixel array neutron
The switching transistor of pixel is connected one by one；When switching transistor conducting, the data signal transmission is brilliant to the switch
In sub-pixel where body pipe.
Preferably, the multiple gate drive signal includes clock signal, enabled open signal and frame unbalanced pulse letter
Number.
The beneficial effects of the present invention are: the invention discloses a kind of driving circuit, driving device, display equipment and drivings
Method, by replacing one selected on-off circuit of multiple multiple selector in circuit, so that timing control in driving circuit
Each output signal of circuit and channel switching circuit processed can carry out timesharing by any output end of the selected on-off circuit
Selection output, optimize the wiring of display panel, avoid the existing wiring in the display panel wiring of small size
Cross-cutting issue improves the flexibility that driver (IC) exports each driving signal, adapts to various wirings convenient for driver (IC) and wants
The display panel asked.
Detailed description of the invention
By referring to the drawings to the description of the embodiment of the present invention, above-mentioned and other purposes of the invention, feature and
Advantage will be apparent from.
Fig. 1 shows a kind of structural schematic diagram of driving circuit in the prior art；
Fig. 2 shows the internal structure charts of gate driving circuit in Fig. 1 driving circuit；
Fig. 3 (a), Fig. 3 (b) and Fig. 3 (c) show the output and connection schematic diagram of each signal in Fig. 1；
Fig. 4 shows the structural schematic diagram of driving circuit provided by the embodiment of the present invention；
Fig. 5 (a) and Fig. 5 (b) shows the output and connection schematic diagram of each signal provided by the embodiment of the present invention；
Fig. 6 shows the flow chart of driving method provided by the embodiment of the present invention.
Specific embodiment
To facilitate the understanding of the present invention, a more comprehensive description of the invention is given in the following sections with reference to the relevant attached drawings.In attached drawing
Give presently preferred embodiments of the present invention.But the present invention can be realized by different forms, however it is not limited to be retouched herein
The embodiment stated.Opposite, purpose of providing these embodiments is keeps the understanding to the disclosure more thorough complete
Face.
Unless otherwise defined, all technical and scientific terms used herein and belong to technical field of the invention
The normally understood meaning of technical staff is identical.Used term is intended merely to description specifically in the description of the invention herein
Embodiment purpose, it is not intended that in limitation the present invention.
The embodiment of the present invention is specifically described with reference to the accompanying drawing.
Fig. 1 shows a kind of structural schematic diagram of driving circuit in the prior art.
Fig. 2 shows the internal structure charts of gate driving circuit in Fig. 1 driving circuit.
In conjunction with Fig. 1 and Fig. 2, as shown in Figure 1, driving circuit 100 is for driving pixel array 110.Driving circuit 100 includes
Sequential control circuit 120, source electrode drive circuit 130, channel switching circuit 140, multiple data signal drivers 150 and grid
Pole driving circuit 160.
Wherein, pixel array 110 has multirow sub-pixel 111, and every row sub-pixel 111 includes multiple sub-pixel PX
(Pixel), and these sub-pixels PX is, for example, to be arranged with array.Pixel array 110 has a plurality of grid line and a plurality of data
Line.
Gate driving circuit 160 is connect with a plurality of grid line of pixel array 110, for more into pixel array 110
Row sub-pixel provides gated sweep signal (such as G1~Gn).Wherein, n is positive integer.
As shown in Fig. 2, gate driving circuit 160 is for example including multiple shift registers (such as 161_1~161_x) and multiple
Multiplexer (such as 163_1~163_x), wherein x is a positive integer, and the multiple (being herein 4 times) that m is x.And each shifting
Bit register (such as 161_1~161_x) and the multiplexer (such as 163_1~163_x) of coupling can be considered that the grid of level-one is swept
Retouch signal generation unit.Wherein, x is positive integer.
Shift register 161_1~161_x distinguishes receiving frame unbalanced pulse signal STV or upper level gated sweep signal produces
The gated sweep signal (such as G1~Gn, corresponding first grid scanning signal) and clock signal GCK1 that raw unit finally provides~
One of in GCK7 (corresponding first clock signal), with provide respectively first control signal (such as SC11, SC21, SC31) and
Second control signal (such as SC12, SC22, SC32), wherein clock signal GCK1~GCK7 can be transmitted distinctly by route, or
Person is transmitted by a bus, and the embodiment of the present invention is not limited.Also, clock signal GCK1~GCK7 is successively to enable,
Namely the enabled period of clock signal GCK1~GCK7 does not overlap each other, and frame unbalanced pulse signal STV can be considered reserved grid
Pole scanning signal.
Multiplexer 163_1~163_x distinguishes clock signal GCK1~GCK7 (corresponding second clock letter of receiving portion
Number), and couple corresponding shift register (such as 161_1~161_x) with receive corresponding first control signal (such as SC11,
SC21, SC31) and the second control letter (such as SC12, SC22, SC32) number, wherein each multiplexer 163_1~163_x foundation
Corresponding first control signal (such as SC11, SC21, SC31) and be connected, with according to received clock signal (such as GCK1~GCK7)
It provides gated sweep signal (such as G1~Gn), and each multiplexer 163_1~163_x is according to corresponding second control letter
Number (such as SC12, SC22, SC32) and end.
Wherein, the received clock signal (such as GCK1~GCK7) of each shift register (such as 161_1~161_x) institute is different
In the received clock signal (such as GCK1~GCK7) of multiplexer (such as 163_1~163_x) institute coupled.
In Fig. 1, sequential control circuit 120 for provide multiple gate drive signals (including multiple clock signal GCK,
Frame unbalanced pulse signal STV and enabled open signal STE), to drive gate driving circuit 160 to generate for driving pixel array
The gated sweep signal of the sub-pixel of corresponding line in 110.Wherein, sequential control circuit 120 by the first multiple selector 121 with
Gate driving circuit 160 connects.First multiple selector 121 is used for the multiple gate drivings for exporting sequential control circuit 120
Signal carries out selection output.
Source electrode drive circuit 130 is for providing multiple data-signals (such as 1~Data m of Data), to characterize pixel array
The luma data of 110 sub-pixels.Wherein, m is positive integer.
Data signal driver 150 is between the source electrode drive circuit 130 and pixel array 110, for receiving source
The data-signal that pole driving circuit 130 exports, and be delivered to received data signal by data line according to different timing
In the sub-pixel of pixel array 110.
Data signal driver 150 has an input terminal and multiple output ends, and input terminal passes through source electrode line and source electrode
The output end of driving circuit 130 connects, and output end is correspondingly connected with by multiple sub-pixels of data line and pixel array 110.
Data signal driver 150 respectively corresponds data signal driver 150 including the source electrode and drain electrode of multiple switch pipe and switching tube
Input terminal and an output end, a control terminal of the grid corresponding data signal driver 150 of switching tube.When switching tube is led
When logical, the data-signal that source electrode drive circuit 130 exports can be transferred to corresponding data line by the switching tube.
Channel switching circuit 140 is connected by the second multiple selector 141 and the control terminal of multiple data signal drivers 150
Connect, for data signal driver 150 provide multiple switch signal SW, with control data-signal to pixel array 110 biography
The on-off in defeated path.The multiple switch signal that the input terminal receiving channel switching circuit 140 of second multiple selector 141 exports
SW, and its timesharing is conveyed to data signal driver 150.
Fig. 3 (a), Fig. 3 (b) and Fig. 3 (c) show the output and connection schematic diagram of each signal in Fig. 1.
As shown in Fig. 3 (a), in driving circuit 100, multiple gate drive signal packets of the output of sequential control circuit 120
It includes multiple clock signal GCK (such as GCK1, GCK2 ... GCK (n-1) and GCK (n)) and frame unbalanced pulse signal STV and enables
Open signal STE.Its multiple gate drive signal carries out letter via the output pin CGOUT (n) of the first multiple selector 121
Number transmission its output multiple gate drive signals each other will not intersect.Wherein, n is the natural number greater than 2.
As shown in Fig. 3 (b), the output signal of channel switching circuit 140 include multiple switch signal SW (such as SW1,
SW2 ... SW (n-1) and SW (n)), multiple switch signal SW is also the output pin via the second multiple selector 141
MUX (n) carries out signal transmission and the multiple switch signal of its output will not intersect each other.Wherein, n is the nature greater than 2
Number.
As shown in Fig. 3 (c), when above-mentioned each signal is carried out on limited display panel using driving circuit shown in FIG. 1
Connecting wiring when, since desired signal is large number of and the limitation of structure size, the output end of the first multiple selector 121
The multiple switch of output end MUX (n) output of multiple gate drive signals and the second multiple selector 141 of CGOUT (n) output
Signal may will cause situation intersected with each other in wiring, influence the display effect of entire display panel.
Fig. 4 shows the structural schematic diagram of driving circuit provided by the embodiment of the present invention.
Fig. 5 (a) and Fig. 5 (b) shows the output and connection schematic diagram of each signal provided by the embodiment of the present invention.
As shown in Fig. 4 and Fig. 5 (a), in the present embodiment, driving circuit 200 is for driving pixel array 210, the driving
Circuit 200 includes sequential control circuit 220, source electrode drive circuit 230, channel switching circuit 240, multiple data signal drivers
250, gate driving circuit 260 and selected on-off circuit 270.
Wherein, pixel array 210 has multirow sub-pixel 211, and every row sub-pixel 211 includes multiple sub-pixel PX, and
These sub-pixels PX is, for example, to be arranged with array.Pixel array 210 has a plurality of grid line and multiple data lines simultaneously.
The input terminal of gate driving circuit 260 is connect with multiple first output ends of selected on-off circuit 270, output end
It is connect with a plurality of grid line of pixel array 210, for receiving multiple gate drive signals of the output of selected on-off circuit 270,
Gated sweep signal (such as G1~Gn) is generated according to the received multiple gate drive signals of institute simultaneously, and gated sweep signal is passed
Transport to pixel array 210.
Multiple gate drive signal is conveyed to by sequential control circuit 220 for providing multiple gate drive signals
Gate driving circuit 260, to generate the gated sweep signal for selecting the sub-pixel of corresponding line in pixel array 210.
In the present embodiment, multiple gate drive signal includes multiple clock signal GCK (such as GCK1, GCK2 ... GCK
(n-1) and GCK (n)) and frame unbalanced pulse signal STV and enabled open signal STE.
Source electrode drive circuit 230 is for providing multiple data-signals (such as 1~Data m of Data), to characterize pixel array
The luma data of 210 sub-pixels.
Data signal driver 250 drives between source electrode drive circuit 230 and pixel array 210 for receiving source electrode
Multiple data-signals that dynamic circuit 230 exports, and pixel array 210 is transported to by corresponding data line according to different timing
In sub-pixel.
In the present embodiment, there is data signal driver 250 input terminal and multiple output ends, input terminal to pass through source
Polar curve is connect with the output end of source electrode drive circuit 230 and the output end of data signal driver 250 passes through corresponding data line
It connects one to one with multiple sub-pixels of pixel array 210.The data signal driver 250 is passed through more using a root polar curve
Root data line transmits data-signal, for driving multiple sub-pixels of display area.Meanwhile data signal driver 250 also has
There are multiple control terminals, multiple control terminal is for receiving switching signal, to be connected to or disconnect the phase of the output of source electrode drive circuit 230
Answer the transmission path of data-signal.
In the present embodiment, data signal driver 250 also includes multiple switch pipe, the source electrode and drain electrode of each switching tube
Respectively correspond the input terminal of data signal driver 250 and the grid corresponding data signal of an output end and each switching tube
One control terminal of driver 250.When switching tube conducting, the data-signal that source electrode drive circuit 230 exports can be by this
Switching tube is transferred in corresponding sub-pixel.
Channel switching circuit 240 is for providing multiple switch signal SW, and multiple switching signal SW is for controlling data letter
Multiple switch pipe is turned on or off in number driver 250, and then controls multiple data-signals to the transmission road of pixel array 210
The on-off of diameter.
In the present embodiment, the quantity of switching signal SW provided by channel switching circuit 240 drives with a data-signal
The quantity of switching tube is equal in device 250 and pixel array 210 possessed by data line quantity be switching signal SW quantity
Integral multiple.One switching signal SW can control multiple switch pipe, and (same position is multiple in multiple data signal drivers 250
Switching tube) on or off.
Selected on-off circuit 270 is connected with sequential control circuit 220 and channel switching circuit 240, selects for timesharing
One of multiple gate drive signals and multiple source signals are transmitted via any output line.
In the present embodiment, selected on-off circuit 270 has multiple input terminals and multiple output ends, multiple first input ends
It is connect with the output end of sequential control circuit 220, multiple second input terminals are connect with the output end of channel switching circuit 240, are used
It is exported in the multiple gate drive signals for receiving the output of sequential control circuit 220 and channel switching circuit 240 of timesharing multiple
Switching signal.
Multiple first output ends of selected on-off circuit 270 are connect with the control terminal of data signal driver 250, Duo Ge
Two output ends are connect with the input terminal of gate driving circuit 260, for being inputted the received multiple gate drive signals of end institute
With multiple source signal timesharing via any transmission line to data signal driver (IC) 250 and gate driving circuit
(IC)260。
Preferably, selected on-off circuit 270 includes the selection switch of multiselect one, for exporting any gate drive signal and opening
OFF signal.The multiselect one select switch input terminal and sequential control circuit 220 output end and channel switching circuit 240 it is defeated
The control of the input terminal and gate driving circuit (IC) 260 of outlet connection and its output end and data signal driver (IC) 250
End connection.
In the present embodiment, any one output end VSR (n) of the selected on-off circuit 270 can export its input terminal
Institute received any one gate drive signal and switching signal, can occur to avoid when being routed on the display panel of small size
The problem of cabling intersects or can not be routed.
In one embodiment of the invention, by the way that corresponding selection signal or selection is arranged to selected on-off circuit 270
Instruction, so that it may by its output pin VSR (n) output any one needed for driving control signal (including gate clock believe
Number GCK (n), frame unbalanced pulse signal STV, enabled open signal STE and switching signal SW (n)).As shown in Fig. 5 (b), setting
Its another output end VSR (n+1) is arranged in one of output end VSR (n) output switching signal SW of selected on-off circuit 270
Gate drive signal GCK is exported, in this way, wiring can be avoided the occurrence of when carrying out connecting wiring on the display panel of small size
The problem of intersecting or can not being routed.
The flexibility that driver (IC) exports each driving signal can be improved, just in driving circuit 200 provided by the present invention
The display panel that various wirings require is adapted in driver (IC).
The invention also discloses a kind of driving device, which includes driving circuit described in Fig. 4 and Fig. 5.
In the present embodiment, driving circuit is used for multiple gated sweep signals and multiple data-signals in the driving device.
In the present embodiment, driving device output drive signal is flexible, can also hand over to avoid occurring wiring when being routed
The problem of pitching or can not being routed.
The invention also discloses a kind of display equipment, which includes display panel and above-mentioned driving device.Its
In, display panel includes multiple grid lines, multiple data lines and multiple pixels, and multiple pixel is respectively connected to multiple grid lines
And multiple data lines are respectively connected to, to receive each driving signal by grid line and data line.
Driving device is connect with display panel, for providing multiple gated sweep signals and multiple data letter to display panel
Number.
Further, display panel includes: that CRT Displays panel, digital light processing are shown in the embodiment of the present invention
Panel, liquid crystal display panel, LED display panel, organic LED display panel, quantum dot display panel,
Mirco-LED display panel, Mini-LED display panel, field emission display panel, electric slurry display panel, electrophoretic display panel or
Any one of Electrowetting display panel.
Fig. 6 shows the flow chart of driving method provided by the embodiment of the present invention.
As shown in fig. 6, in embodiments of the present invention, driving method includes executing step to driving circuit 200 described in Fig. 4
Rapid S01~step S03:
In step S01, multiple gate drive signals and multiple switch signal are subjected to selection output.
In the present embodiment, multiple gate drive signals are generated by sequential control circuit 220, and multiple switch signal is opened by channel
Powered-down road 240 generates and multiple gate drive signals and multiple switch signal export it is multiple to selected on-off circuit 270
Input terminal, and the selection by the selected on-off circuit 270 to multiple gate drive signal and the progress timesharing of multiple switch signal
Output.
Preferably, which has multiple input terminals and multiple output ends, and multiple first input ends are used
In receiving multiple gate drive signals, multiple second input terminals are used to receive multiple switch signal and its any output end is equal
Any one received gate drive signal of institute and multiple switch signal can be exported.
Preferably, multiple gate drive signal includes that clock signal GCK, enabled open signal STV and frame open arteries and veins
Rush signal STE.
In step S02, when exporting multiple gate drive signals, gate driving circuit is according to multiple gate drive signals
Generate gated sweep signal.
In the present embodiment, gate driving circuit 260 receives multiple gate drive signals that selected on-off circuit 270 exports,
And export gated sweep signal to a plurality of grid line of pixel array, with drive the switching transistor of pixel array sub-pixel by
A conducting.
In step S03, when exporting multiple switch signal, source electrode drive circuit is exported according to multiple switch signal
Data-signal is exported to pixel array.
In the present embodiment, the output of source electrode drive circuit 230 has multiple data-signals, while data signal driver reception is more
A switching signal, and according to switching signal on or off corresponding switching tube in it, so be connected to or turn-off data signal extremely
The on-off of the transmission path of the multiple data lines of pixel array.
Further, in the switching transistor conducting of pixel array sub-pixel, multiple data-signal is via a plurality of
Data line is transmitted in the sub-pixel where switching transistor.
Driving method provided by the present invention, can be by selected on-off circuit to multiple gate drive signals and multiple switch
Signal carries out timesharing selection output, avoids the cabling that occurs when being routed on the panel of small size and intersects or can not be routed etc. and asks
Topic.
It should be noted that herein, contained the terms "include", "comprise" or its any other variant are intended to
Non-exclusive inclusion, so that the process, method, article or equipment including a series of elements is not only wanted including those
Element, but also including other elements that are not explicitly listed, or further include for this process, method, article or equipment
Intrinsic element.In the absence of more restrictions, the element limited by sentence "including a ...", it is not excluded that
There is also other identical elements in process, method, article or equipment including the element.
Finally, it should be noted that obviously, the above embodiment is merely an example for clearly illustrating the present invention, and simultaneously
The non-restriction to embodiment.For those of ordinary skill in the art, it can also do on the basis of the above description
Other various forms of variations or variation out.There is no necessity and possibility to exhaust all the enbodiments.And thus drawn
The obvious changes or variations that Shen goes out are still in the protection scope of this invention.
Claims (14)
1. a kind of driving circuit, for driving pixel array, the pixel array includes multiple sub-pixels, which is characterized in that packet
It includes:
Sequential control circuit, for providing multiple gate drive signals；
Source electrode drive circuit, for providing multiple data-signals, the data-signal is used to characterize the gray number of the sub-pixel
According to；
Channel switching circuit, for providing multiple switch signal, the switching signal is for controlling the data-signal to pixel
The on-off of the transmission path of array；
Selected on-off circuit is connected with the sequential control circuit and the channel switching circuit, selects for timesharing described more
One of a gate drive signal and the multiple switching signal are via any transmission line.
2. driving circuit according to claim 1, which is characterized in that the gate drive signal includes clock signal, makes
It can open signal and frame unbalanced pulse signal.
3. driving circuit according to claim 1, which is characterized in that further include:
Gate driving circuit is connected with multiple first output ends of the selected on-off circuit, for according to multiple gate drivings
Signal generates gated sweep signal, and the gated sweep signal is transmitted to pixel array.
4. driving circuit according to claim 3, which is characterized in that further include:
Data signal driver is connected with the source electrode drive circuit, for according to different timing by data signal transmission to picture
Pixel array.
5. driving circuit according to claim 4, which is characterized in that the data signal driver is also opened with the selection
Multiple second output terminals on powered-down road connect, for receiving the multiple switching signal, to be connected to or disconnect the data-signal
To the transmission path of the pixel array.
6. driving circuit according to claim 5, which is characterized in that the data signal driver includes multiple switch
Pipe, wherein the source electrode and drain electrode of each switching tube is connected with source electrode drive circuit and pixel array respectively, grid and the choosing
Select multiple second output terminals connection of switching circuit.
7. driving circuit according to claim 1, which is characterized in that the selected on-off circuit includes that the selection of multiselect one is opened
It closes, for exporting any gate drive signal and switching signal.
8. a kind of driving device, which is characterized in that the driving device includes: driving of any of claims 1-7
Circuit, the driving circuit provide multiple gated sweep signals and multiple data-signals.
9. a kind of display equipment characterized by comprising
Display panel, the display panel include multiple grid lines, multiple data lines and multiple pixels, the multiple pixel difference
It is connected to the multiple grid line and is respectively connected to the multiple data line；And
Driving device according to any one of claims 8, the driving device are used to provide multiple gated sweep letters to the display panel
Number and multiple data-signals.
10. display equipment according to claim 9, which is characterized in that the display panel includes: CRT Displays
Panel, digital light processing display panel, liquid crystal display panel, LED display panel, organic light-emitting diode display face
Plate, quantum dot display panel, Mirco-LED display panel, Mini-LED display panel, field emission display panel, plasma-based are shown
Panel, electrophoretic display panel or Electrowetting display panel.
11. a kind of driving method characterized by comprising
Multiple gate drive signals and multiple switch signal are subjected to selection output；
When exporting the multiple gate drive signal, gate driving circuit generates grid according to the multiple gate drive signal
Scanning signal；
When exporting the multiple switching signal, the data-signal that is exported source electrode drive circuit according to the multiple switching signal
It exports to pixel array.
12. driving method according to claim 11, which is characterized in that the multiple gate drive signal and the multiple
Switching signal is timesharing output.
13. driving method according to claim 11, which is characterized in that further include:
Under the control of the gated sweep signal, the switching transistor of the pixel array sub-pixel is connected one by one；
When switching transistor conducting, in the sub-pixel where the data signal transmission to the switching transistor.
14. driving method according to claim 11 or 12, which is characterized in that when the multiple gate drive signal includes
Clock signal, enabled open signal and frame unbalanced pulse signal.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201910325100.4A CN110164351A (en) | 2019-04-22 | 2019-04-22 | Driving circuit, driving device, display equipment and driving method |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201910325100.4A CN110164351A (en) | 2019-04-22 | 2019-04-22 | Driving circuit, driving device, display equipment and driving method |
Publications (1)
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| CN110930923A (en) * | 2019-11-27 | 2020-03-27 | Tcl华星光电技术有限公司 | Display panel driving circuit |
| CN111445867A (en) * | 2020-04-22 | 2020-07-24 | Tcl华星光电技术有限公司 | Backlight partition driving module, backlight device and display device |
| CN111710275A (en) * | 2020-06-12 | 2020-09-25 | 上海天马有机发光显示技术有限公司 | Display panel and display device |
| CN112509529A (en) * | 2020-11-04 | 2021-03-16 | 重庆惠科金渝光电科技有限公司 | Display panel and display device |
| CN112927661A (en) * | 2021-03-02 | 2021-06-08 | 重庆先进光电显示技术研究院 | Display drive board and display device |
| WO2022057065A1 (en) * | 2020-09-15 | 2022-03-24 | 武汉华星光电半导体显示技术有限公司 | Display panel and driving method thereof, and display apparatus |
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Application publication date: 20190823 |