CN110136617A - Probe and preparation method thereof - Google Patents
Probe and preparation method thereof Download PDFInfo
- Publication number
- CN110136617A CN110136617A CN201910402486.4A CN201910402486A CN110136617A CN 110136617 A CN110136617 A CN 110136617A CN 201910402486 A CN201910402486 A CN 201910402486A CN 110136617 A CN110136617 A CN 110136617A
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- layer
- conductive
- probe
- substrate
- conductive region
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R1/00—Details of instruments or arrangements of the types included in groups G01R5/00 - G01R13/00 and G01R31/00
- G01R1/02—General constructional details
- G01R1/06—Measuring leads; Measuring probes
- G01R1/067—Measuring probes
- G01R1/06711—Probe needles; Cantilever beams; "Bump" contacts; Replaceable probe pins
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R1/00—Details of instruments or arrangements of the types included in groups G01R5/00 - G01R13/00 and G01R31/00
- G01R1/02—General constructional details
- G01R1/06—Measuring leads; Measuring probes
- G01R1/067—Measuring probes
- G01R1/06711—Probe needles; Cantilever beams; "Bump" contacts; Replaceable probe pins
- G01R1/06733—Geometry aspects
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R1/00—Details of instruments or arrangements of the types included in groups G01R5/00 - G01R13/00 and G01R31/00
- G01R1/02—General constructional details
- G01R1/06—Measuring leads; Measuring probes
- G01R1/067—Measuring probes
- G01R1/06711—Probe needles; Cantilever beams; "Bump" contacts; Replaceable probe pins
- G01R1/06755—Material aspects
- G01R1/06761—Material aspects related to layers
-
- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/006—Electronic inspection or testing of displays and display drivers, e.g. of LED or LCD displays
Abstract
The present invention relates to a kind of probe and preparation method thereof, which includes conductive region and insulating regions, and conductive region includes the first conductive region and the second conductive region；Insulating regions include the first insulating regions, and the first insulating regions are set between the first conductive region and the second conductive region.First conductive region and the second conductive region of the invention can be padded with two neighboring measurement respectively to be electrically connected, and by the first intermediate insulating regions the first conductive region and the second conductive region are insulated, under the premise of the size of the size of probe of the present invention and prior art probe is essentially identical, if the size of display panel is reduced, the present invention can touch mutually and occur compared with the existing technology the risk of short-circuit failure to avoid two probes.
Description
Technical field
The present invention relates to display panel the field of test technology, more particularly to a kind of probe and preparation method thereof.
Background technique
In display panel (such as TFT-LCD panel) art production process, after TFT glass completes all processing procedures at array end
It will do it electricity inspection, at this moment need a probe signals loading device to load signal to the measurement pad of TFT glass, measure pad benefit
Signal is transmitted with conductor wire, display panel can realize that required color is shown by measuring the unlike signal that pad obtains, thus
Detect display panel with the presence or absence of bad.
However, the measurement electrical areas of display panel can be limited therewith when the reduction of the size of display panel, measure
The size of pad will become smaller therewith and more crypto set of arranging, if probe size is constant, measures two neighboring two for measuring pad
Probe will become smaller due to measuring the size padded and touch mutually, so that the risk of short-circuit failure occurs in probe.In order to avoid surveying
Measure it is two neighboring measure pad two probes touching, the size of probe can carry out it is miniature, if probe size carry out it is miniature, visit
Needle and the contact area for measuring pad will reduce and cause stress raisers, so that probe and the pressure measured between pad rise,
Probe easily drills through measurement pad.
Summary of the invention
Based on this, it is necessary to for after the reduction of the size of display panel, measure two neighboring two probes for measuring pad
Easily touching short circuit or probe easily drill through the problem of measurement pad, provide a kind of probe and preparation method thereof.
A kind of probe, comprising:
Conductive region, including the first conductive region and the second conductive region；And
Insulating regions, including the first insulating regions, first insulating regions are set to first conductive region and described
Between second conductive region.
Probe of the invention can be applied to display panel electricity inspection processing procedure, due to probe include the first conductive region,
Second conductive region and the insulating regions between the first conductive region and the second conductive region, so that first
Conductive region and the second conductive region are padded with two neighboring measurement respectively to be electrically connected, and is made by the first intermediate insulating regions
Obtain the first conductive region and the insulation of the second conductive region.In the size and the basic phase of size of prior art probe of probe of the present invention
With under the premise of, if the size of display panel is reduced, the present invention can mutually touch compared with the existing technology to avoid two probes
Touch and occur the risk of short-circuit failure.In addition, when size of display panels reduction, since probe size of the present invention is without reducing,
It is drilled through due to stress raisers by probe so as to prevent from measuring pad.
The conduction of the conductive area of first conductive region and second conductive region in one of the embodiments,
Area equation.
First conductive region, first insulating regions and second conduction in one of the embodiments,
It arranges along first direction sequence in region.
The probe includes the first surface being oppositely arranged in said first direction and in one of the embodiments,
Two surfaces and the third surface and the 4th surface being oppositely arranged in a second direction, the first direction and the second party
To vertical, the first surface is different with the shape on the third surface.
Be projected as rectangle of the probe in datum plane in one of the embodiments, the normal of the datum plane
Extending direction is vertical with the first direction and the second direction respectively.
The length extending direction of the probe is parallel with the first direction in one of the embodiments, the probe
Width extending direction it is parallel with the second direction.
The probe includes substrate, conductive layer and insulating layer in one of the embodiments, and the conductive layer is set to institute
Substrate is stated to form the conductive region, the insulating layer is set to the substrate to form the insulating regions.
The quantity of second conductive region is multiple in one of the embodiments, and the insulating regions include second
Insulating regions, second insulating regions are set between two neighboring second conductive region.
A kind of production method of probe, includes the following steps:
Substrate is provided；And
Conductive layer and insulating layer is formed on the substrate, the conductive layer includes the first conductive layer and the second conductive layer,
The insulating layer includes insulating intermediate layer, the insulating intermediate layer be located at first conductive layer and second conductive layer it
Between.
In one of the embodiments, described the step of forming conductive layer and insulating layer on the substrate, specifically include:
The film plating layer for covering the substrate is formed on the substrate；
The film plating layer is etched to form spaced the first filming layer and the second film plating layer；
The film plating layer formed far from the side of the substrate cover the first filming layer, second film plating layer with
And the first separation layer of the substrate；
It etches first separation layer and forms the first groove that is connected to the first filming layer and with described second
The second groove of film plating layer connection；
Conducting medium is filled in the first groove and the second groove and to extend to first separation layer separate
The side of the substrate, to form routing layer；
The routing layer is etched to form spaced first routing layer and the second routing layer, and makes first cabling
Layer is connect with the first filming layer, and second routing layer is connect with second film plating layer；
The routing layer formed far from the side of the substrate cover first routing layer, second routing layer with
And the second separation layer of first separation layer；
It etches second separation layer and forms the third groove that is connected to first routing layer and with described second
4th groove of routing layer connection；
Conducting medium is filled in the third groove and forms first conductive layer, is filled in the 4th groove
Conducting medium simultaneously forms second conductive layer；
Second separation layer is etched, with the insulation formed between first conductive layer and second conductive layer
Middle layer.
Detailed description of the invention
Fig. 1 is the connection schematic diagram of prior art middle probe and display panel；
Fig. 2 is the connection schematic diagram of the display panel after Fig. 1 middle probe and size reduction；
Fig. 3 is the connection schematic diagram of the display panel of size reduction in one embodiment of the invention probe and Fig. 2；
Fig. 4 is the connection schematic diagram of the display panel of size reduction in another embodiment of the present invention probe and Fig. 2；
Fig. 5 is the structural schematic diagram of 3 middle probe of an implementation example figure；
Fig. 6 is the schematic diagram that an embodiment forms film plating layer on substrate；
Fig. 7 is that the film plating layer of an embodiment etch figures(s) 6 forms the schematic diagram of the first filming layer and the second film plating layer；
Fig. 8 is the schematic diagram that an embodiment forms the first separation layer on the film plating layer and substrate of Fig. 7；
Fig. 9 is that the first separation layer of an embodiment etch figures(s) 8 forms the schematic diagram of first groove and second groove；
Figure 10 is that first groove and second groove of the embodiment in Fig. 9 fill the signal that conducting medium forms routing layer
Figure；
Figure 11 is the schematic diagram of routing layer formation the first routing layer and the second routing layer in an embodiment etch figures(s) 10；
Figure 12 is the schematic diagram that an embodiment forms the second separation layer on the routing layer and the first separation layer of Figure 11；
Figure 13 is the schematic diagram of the second separation layer formation the third groove and the 4th groove in an embodiment etch figures(s) 12；
Figure 14 is that third groove and fourth trench fill conducting medium of the embodiment in Figure 13 form the first conductive layer
With the schematic diagram of the second conductive layer.
Specific embodiment
In order to make the foregoing objectives, features and advantages of the present invention clearer and more comprehensible, with reference to the accompanying drawing to the present invention
Specific embodiment be described in detail.Many details are explained in the following description in order to fully understand this hair
It is bright.But the invention can be embodied in many other ways as described herein, those skilled in the art can be not
Similar improvement is done in the case where violating intension of the present invention, therefore the present invention is not limited to the specific embodiments disclosed below.
It should be noted that it can directly on the other element when element is referred to as " being fixed on " another element
Or there may also be elements placed in the middle.When an element is considered as " connection " another element, it, which can be, is directly connected to
To another element or it may be simultaneously present centering elements.
Unless otherwise defined, all technical and scientific terms used herein and belong to technical field of the invention
The normally understood meaning of technical staff is identical.Term as used herein in the specification of the present invention is intended merely to description tool
Body embodiment purpose, it is not intended that in limitation the present invention.Term " and or " used herein includes one or more phases
Any and all combinations of the listed item of pass.
As shown in Figure 1, the display panel 10 (being illustrated by taking TFT-LCD panel as an example below) of the prior art includes substrate
11 (such as TFT glass namely thin film transistor (TFT)s) and interval are set to multiple measurement pads 12 on substrate 11, measure pad 12 and are used for
It contacts and is electrically connected with the probe 20 (shown in dashed circle) in signal loading device, so that probe can be passed through by measuring pad 12
20 load the signal in signal loading device and are transmitted, and display panel 10, which can get, passes through 20 amount of being loaded into of probe
The unlike signal surveyed on pad 12 realizes that required color show, so that it is bad to detect that display panel 10 whether there is.
Fig. 1 and Fig. 2 are please referred to, when the size of display panel 10 is reduced to Fig. 2 by Fig. 1, the measurement electricity of display panel 10
Property region will will receive and limit, measure pad 12 size will reduce therewith and arrange it is excessively intensive, in 20 size constancy of probe
Under the premise of, measuring two neighboring two probes 20 for measuring pad 12 will mutually touch due to measuring the change in size of pad 12
It touches, so that the risk of short-circuit failure occurs in probe 20.In order to avoid measuring two neighboring two probes 20 touching for measuring pad 12,
The size of probe 20 can carry out it is miniature, if 20 size of probe carry out it is miniature, probe 20 and measure pad 12 contact area will
The stress raisers of pad 12 can be reduced and cause to measure, so that probe 20 and the pressure measured between pad 12 rise, probe 20 is easy
It drills through and measures pad 12 and make the appearance detection of display panel 10 bad.
As depicted in figs. 1 and 2, the conductive contact surfaces of probe 20 and measurement pad 12 are circle, in order to guarantee two neighboring spy
Needle 20 is not interfere with each other, and the edge of probe 20 should be arranged close to the edge for measuring pad 12 as far as possible.For ease of description, it is assumed that diagram
X-axis is first direction, and Y-axis is second direction, and first direction is vertical with second direction.If the diameter of probe 20 is Φ (unit
Mm), as shown in Figure 1, its length in a second direction is H1 before the reduction of 11 size of substrate, the length for measuring pad 12 is L1, adjacent
Two centers measured between pads 12 are away from for C1 (unit mm).As shown in Fig. 2, it is in a second direction after the reduction of substrate 11 size
Length is H2, and the length for measuring pad 12 is L2, and the two neighboring center measured between pad 12 is away from for C2 (unit mm), wherein C2 <
C1 (due to 11 size reduction of substrate, the two neighboring arrangement of measurement pad 12 more crypto set).In one embodiment, as shown in Figure 1, base
Before the reduction of 11 size of plate, diameter of phi=0.25mm of probe 20, the length H1=1.4mm of substrate 11 in a second direction measure pad
12 length L1=0.8mm, the two neighboring center measured between pad 12 is existed away from C1=0.2mm by the way that probe 20 is rationally arranged
The position on pad is measured, can not interfereing with each other for measuring two neighboring two probes 20 for measuring pad 12.When substrate 11
After size reduction, as shown in Fig. 2, diameter of phi=0.25mm of probe 20 is remained unchanged, H2=1mm, L2=0.4mm, C2 <
0.2mm.At this time, it is assumed that the center of circle of two neighboring probe 20 is S1, the center of circle of two neighboring probe 20 along the distance of first direction
Distance in a second direction is S2, and the straight line connection distance in the center of circle of two neighboring probe 20 is S3, due to S1=C2 < 0.2mm,
S2=L2- Φ=0.4mm-0.25mm=0.15mm, according to geometrical relationship S3 < 0.25mm namely S3 < Φ, it is meant that phase
Adjacent two probes 20 will be touched, at this point, two probes 20 will short circuit and detection occur bad.
After the size reduction of above-mentioned display panel 10, two neighboring two probes 20 hair for measuring pad 12 is measured
Raw touching is short-circuit and occurs detecting bad problem, as shown in figure 3, one embodiment of the invention provides a kind of probe 200, the spy
Needle 200 is used to carry out electrical detection to display panel 100, specially to the multiple measurement pads 120 being arranged at intervals on substrate 110
Electrical detection is carried out, measures pad 120 for contacting and being electrically connected with the probe 200 in signal loading device, to measure pad
120 can be loaded the signal in signal loading device and be transmitted by probe 200, and display panel 100 can pass through
The unlike signal that pad 120 obtains is measured to realize that required color is shown, to detect display panel 100 with the presence or absence of not
It is good.Wherein, display panel 100 to be detected can be TFT-LCD panel, oled panel, QD panel.
In one embodiment, with continued reference to FIG. 3, probe 200 includes conductive region 210 and insulating regions 220.Conduction region
Domain 210 include the first conductive region 211 and the second conductive region 212, insulating regions 220 include the first insulating regions 221, first
Insulating regions 221 are set between the first conductive region 211 and the second conductive region 212.Wherein, the first conductive region 211 and
Two conductive regions 212 are electrically connected with two neighboring measurement pad 120 respectively, and are made by the first intermediate insulating regions 221
212 insulation gap of first conductive region 211 and the second conductive region, namely there are two independent circuits for the tool of probe 200 at this time, it can
To carry out electrical detection to two adjacent measurement pads 120 simultaneously, the use number of probe 200 is reduced.
In one embodiment, the conductive area phase of the conductive area of the first conductive region 211 and the second conductive region 212
Deng measuring the position on pad 120 to facilitate and adjust probe 200, avoiding the occurrence of probe 200 and one of measure pad 120
Conductive contact area it is excessive, and the conductive contact area that probe 200 and adjacent another measure pad 120 is too small.
In one embodiment, the first conductive region 211, the first insulating regions 221 and the second conductive region 212 are along
One direction sequence is arranged.In one embodiment, probe 200 includes the first surface 2001 that is oppositely arranged in a first direction and the
Two surfaces 2002 and the third surface 2003 and the 4th surface 2004 being oppositely arranged in a second direction, first surface 2001
Different with the shape on third surface 2003 (such as: the difference including size).In this way, passing through first surface 2001 and third surface
The difference of 2003 shapes can establish probe 200 and measure the correct overlap joint of pad 120, improves probe 200 when detecting and measures
The overlap joint efficiency of pad 120.For example, taking what is shown in fig. 3 as an example, when probe 200 and measurement pad 120 overlap, due to first surface
2001 and third surface 2003 can distinguish because of the difference of shape, in order to guarantee that probe 200 can be with two neighboring measurement pad 120
It is electrically connected, so the direction of first surface 2001 along a first direction can be arranged (namely the extension of first surface 2001
It is oriented parallel to second direction), and make third surface 2003 along direction setting (namely the third surface 2003 of second direction
Extending direction be parallel to first direction).In one embodiment, be projected as rectangle of the probe 200 in datum plane, datum plane
Normal extending direction it is vertical with first direction and second direction respectively.The length direction of probe 200 can extend in a first direction,
The width direction of probe 200 can extend in a second direction.It is appreciated that in other embodiments, probe 200 is in datum plane
Projection can also be other figures, such as polygon, irregular figure etc..
Probe 200 of the invention can be applied to the electricity inspection processing procedure of display panel 100, since probe 200 includes first
Conductive region 211, the second conductive region 212 and between the first conductive region 211 and the second conductive region 212 first
Insulating regions 221, so that the first conductive region 211 and the second conductive region 212 are padded with two neighboring measurement respectively
120 are electrically connected, and make the first conductive region 211 and the second conductive region 212 absolutely by the first intermediate insulating regions 221
Edge.(for example, the present invention visits under the premise of the size of the size of probe 200 of the present invention and prior art probe 20 is essentially identical
The length value of needle 200 along a first direction is equal to the diameter value of prior art probe 20), if the size of display panel 100 is reduced,
Then the present invention (shown in Fig. 3) is compared with the existing technology (shown in Fig. 2) when detecting the display panel under same size reduction, this hair
The bright contact position by adjusting probe 200 and measuring pad 120 can be touched mutually to avoid two probes 200 and short circuit occurs
The risk of failure.In addition, when the reduction of 100 size of display panel, since 200 size of probe of the present invention is without reducing, so as to
It is drilled through due to stress raisers by probe 200 with preventing from measuring pad 120.
In one embodiment, as shown in figure 4, probe 200 can also be include multiple galvanic circles (be more than or equal to three),
To complete the electrical detection of adjacent multiple measurement pads 120 by a probe 200.In one embodiment, the second conductive region
212 quantity be it is multiple, insulating regions 220 include the second insulating regions 222, and the second insulating regions 222 are set to two neighboring the
Between two conductive regions 212.Second conductive region 212, the second insulating regions 222 are along first direction cross arrangement.
In one embodiment, as shown in figure 5, probe 200 includes substrate 201, conductive layer 202 and insulating layer 203, conduction
Layer 202 is set to substrate 201 to form above-mentioned conductive region 210, and insulating layer 203 is set to substrate 201 to form above-mentioned insulating regions
220.In one embodiment, substrate 201 can be silicon substrate, and the material of conductive layer 202 can be silver, copper, gold, aluminium, tungsten, titanium etc.
Conductive metal, the material of insulating layer 203 include bakelite, macromolecule resin, acrylic, polyarylsulfone (PAS) (polyarylsulfone, letter
Claim PAS) one of or multiple combinations.
The present invention also provides a kind of methods for making above-mentioned probe 200 comprising following steps:
Step S310: substrate 110 is provided.In one embodiment, substrate 110 is silicon substrate.
Step S320: as shown in figure 5, forming conductive layer 202 and insulating layer 203 on substrate 110.Conductive layer 202 includes
First conductive layer 202a and the second conductive layer 202b, insulating layer 203 include insulating intermediate layer 203a, and insulating intermediate layer 203a is located at
Between first conductive layer 202a and the second conductive layer 202b.Wherein, first is formed by the region that the first conductive layer 202a is covered to lead
Electric region 211 forms the second conductive region 212 by the region that the second conductive layer 202b is covered, is covered by insulating intermediate layer 203a
Region formed the first insulating regions 221.
In one embodiment, it the step of forming conductive layer 202 and insulating layer 203 on substrate 201, specifically includes:
Step S321: as shown in fig. 6, forming the film plating layer 204 of covering substrate 201 on substrate 201.In an embodiment
In, the material of film plating layer 204 is the conductive metals such as silver, copper, gold, aluminium, tungsten, titanium.In one embodiment, it is penetrated on substrate 201
Physical vapor deposition deposits to form film plating layer 204.
Step S322: as shown in fig. 7, etching film plating layer 204 is to form spaced the first filming layer 204a and second
Film plating layer 204b.In one embodiment, using yellow light lithography film plating layer 204.
Step S323: as shown in figure 8, forming covering the first filming layer far from the side of substrate 201 in film plating layer 204
The first separation layer 205 of 204a, the second film plating layer 204b and substrate 201.In one embodiment, CVD deposition titanium dioxide is utilized
First separation layer 205 of the silicon as insulation.In other embodiments, the first separation layer 205 is formed using wet coating processing procedure.
Step S324: as shown in figure 9, etching the first separation layer 205 and forming first be connected to the first filming layer 204a
Groove 2051 and the second groove 2052 being connected to the second film plating layer 204b.In one embodiment, it is lost through ionic reaction
Dig out first groove 2051 and second groove 2052 quarter.
Step S325: as shown in Figure 10, conducting medium is filled in first groove 2051 and second groove 2052 and is extended
To the first side of the separation layer 205 far from substrate 201, to form routing layer 206.Wherein, the material of conducting medium be silver, copper,
The conductive metals such as gold, aluminium, tungsten, titanium.
Step S326: as shown in figure 11, routing layer 206 is etched to form spaced first routing layer 206a and second
Routing layer 206b connect the first routing layer 206a with the first filming layer 204a, and makes the second routing layer 206b and the second plated film
Layer 204b connection.In one embodiment, using yellow light lithography routing layer 206.
Step S327: as shown in figure 12, the first routing layer of covering is formed far from the side of substrate 201 in routing layer 206
The second separation layer 207 of 206a, the second routing layer 206b and the first separation layer 205.In one embodiment, CVD deposition is utilized
Second separation layer 205 of the silica as insulation.In other embodiments, the second separation layer is formed using wet coating processing procedure
205。
Step S328: it as shown in figure 13, etches the second separation layer 207 and forms the third being connected to the first routing layer 206a
Groove 2071 and the 4th groove 2072 being connected to the second routing layer 206b.In one embodiment, it is lost through ionic reaction
Dig out third groove 2071 and the 4th groove 2072 quarter.
Step S329: as shown in figure 14, conducting medium is filled in third groove 2071 and forms the first conductive layer 202a,
Conducting medium is filled in the 4th groove 2072 and forms the second conductive layer 202b.Wherein, the material of conducting medium be silver, copper,
The conductive metals such as gold, aluminium, tungsten, titanium.
Step S3291: as shown in figure 5, the second separation layer 207 of etching, is located at the first conductive layer 202a and second to be formed
Insulating intermediate layer 203a between conductive layer 202b.In one embodiment, the second separation layer 207 is etched through ionic reaction.
Each technical characteristic of embodiment described above can be combined arbitrarily, for simplicity of description, not to above-mentioned reality
It applies all possible combination of each technical characteristic in example to be all described, as long as however, the combination of these technical characteristics is not deposited
In contradiction, all should be considered as described in this specification.
The embodiments described above only express several embodiments of the present invention, and the description thereof is more specific and detailed, but simultaneously
It cannot therefore be construed as limiting the scope of the patent.It should be pointed out that coming for those of ordinary skill in the art
It says, without departing from the inventive concept of the premise, various modifications and improvements can be made, these belong to protection of the invention
Range.Therefore, the scope of protection of the patent of the invention shall be subject to the appended claims.
Claims (10)
1. a kind of probe characterized by comprising
Conductive region, including the first conductive region and the second conductive region；And
Insulating regions, including the first insulating regions, first insulating regions are set to first conductive region and described second
Between conductive region.
2. probe according to claim 1, which is characterized in that the conductive area of first conductive region and described second
The conductive area of conductive region is equal.
3. probe according to claim 1, which is characterized in that first conductive region, first insulating regions, with
And second conductive region is arranged along first direction sequence.
4. probe according to claim 3, which is characterized in that the probe includes being oppositely arranged in said first direction
First surface and second surface and the third surface and the 4th surface that are oppositely arranged in a second direction, the first party
To vertical with the second direction, the first surface is different with the shape on the third surface.
5. probe according to claim 4, which is characterized in that the probe datum plane the rectangle that is projected as, it is described
The normal extending direction of datum plane is vertical with the first direction and the second direction respectively.
6. probe according to claim 5, which is characterized in that the length extending direction and the first direction of the probe
In parallel, the width extending direction of the probe is parallel with the second direction.
7. probe as claimed in any of claims 1 to 6, which is characterized in that the probe includes substrate, conductive layer
And insulating layer, the conductive layer are set to the substrate to form the conductive region, the insulating layer be set to the substrate with
Form the insulating regions.
8. probe as claimed in any of claims 1 to 6, which is characterized in that the quantity of second conductive region
To be multiple, the insulating regions include the second insulating regions, and it is conductive that second insulating regions are set to two neighboring described second
Between region.
9. a kind of production method of probe, which comprises the steps of:
Substrate is provided；And
Conductive layer and insulating layer is formed on the substrate, and the conductive layer includes the first conductive layer and the second conductive layer, described
Insulating layer includes insulating intermediate layer, and the insulating intermediate layer is between first conductive layer and second conductive layer.
10. the production method of probe according to claim 9, which is characterized in that described to form conduction on the substrate
It the step of layer and insulating layer, specifically includes:
The film plating layer for covering the substrate is formed on the substrate；
The film plating layer is etched to form spaced the first filming layer and the second film plating layer；
It is formed in the film plating layer far from the side of the substrate and covers the first filming layer, second film plating layer and institute
State the first separation layer of substrate；
Etch first separation layer and formed the first groove that is connected to the first filming layer and with second plated film
The second groove of layer connection；
Conducting medium is filled in the first groove and the second groove and extends to first separation layer far from described
The side of substrate, to form routing layer；
The routing layer is etched to form spaced first routing layer and the second routing layer, and make first routing layer with
The first filming layer connection, second routing layer are connect with second film plating layer；
It is formed in the routing layer far from the side of the substrate and covers first routing layer, second routing layer and institute
State the second separation layer of the first separation layer；
Etch second separation layer and formed the third groove that is connected to first routing layer and with second cabling
4th groove of layer connection；
Conducting medium is filled in the third groove and forms first conductive layer, is filled in the 4th groove conductive
Medium simultaneously forms second conductive layer；
Second separation layer is etched, with formation among the insulation between first conductive layer and second conductive layer
Layer.
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| CN201910402486.4A CN110136617B (en) | 2019-05-15 | 2019-05-15 | Probe and manufacturing method thereof |
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|---|---|---|---|
| CN201910402486.4A CN110136617B (en) | 2019-05-15 | 2019-05-15 | Probe and manufacturing method thereof |
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Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN112710877A (en) * | 2019-10-25 | 2021-04-27 | 巨擘科技股份有限公司 | Metal probe structure and manufacturing method thereof |
| CN112908229A (en) * | 2021-01-28 | 2021-06-04 | 京东方科技集团股份有限公司 | Driving backboard, detection method thereof and display device |
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| EP3812775A1 (en) * | 2019-10-25 | 2021-04-28 | Princo Corp. | Metal probe structure and method for fabricating the same |
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| JP6999730B2 (en) | 2019-10-25 | 2022-01-19 | 巨擘科技股▲ふん▼有限公司 | Metal probe structure and its manufacturing method |
| US11474128B2 (en) | 2019-10-25 | 2022-10-18 | Princo Corp. | Metal probe structure and method for fabricating the same |
| CN112908229A (en) * | 2021-01-28 | 2021-06-04 | 京东方科技集团股份有限公司 | Driving backboard, detection method thereof and display device |
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| CN110136617B (en) | 2022-11-11 |
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