CN110135000B - Chip age judging method and device, IP module and chip - Google Patents
Chip age judging method and device, IP module and chip Download PDFInfo
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- CN110135000B CN110135000B CN201910297596.9A CN201910297596A CN110135000B CN 110135000 B CN110135000 B CN 110135000B CN 201910297596 A CN201910297596 A CN 201910297596A CN 110135000 B CN110135000 B CN 110135000B
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- G06—COMPUTING; CALCULATING OR COUNTING
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- G06F30/30—Circuit design
- G06F30/39—Circuit design at the physical level
Abstract
The embodiment of the invention relates to a chip age judging method and device, an IP module and a chip. The method comprises the following steps: exciting a physical unclonable function entropy source in the chip; extracting the physical unclonable function feedback value of the entropy source for a plurality of times; calculating the error rate of the feedback value of the physical unclonable function; and judging the using time of the chip according to the error rate of the feedback value of the physical unclonable function. The embodiment of the invention can accurately judge the age of the chip and has strong safety.
Description
Technical Field
The invention relates to the field of chip detection, in particular to a chip age judging method and device, a I P module and a chip.
Background
Because of the global supply chain of chips, sources of use for buying chips by government, corporate, and other units are widely varied. Chip recycling, refurbishment, and resale to related units have been a common black yielding benefit. The use of retrofit chip products by companies has a significant impact on their product stability by the relevant government. The current approach is to judge whether the internal structure is aged only by the chip appearance judgment or by physically invading the chip. The judging method is time-consuming and labor-consuming, and often cannot achieve the checking effect due to the alternation of the renovation technology, and meanwhile, the service life of the chip cannot be accurately judged. How to accurately judge the age of a chip is a big problem to be solved in the field.
Disclosure of Invention
The embodiment of the invention provides a method and a device for judging the age of a chip, an IP module and the chip, which can accurately judge the age of the chip.
In one aspect, an embodiment of the present invention provides a method for determining a chip age, including: exciting a physical unclonable function entropy source in the chip; extracting the physical unclonable function feedback value of the entropy source for a plurality of times; calculating the error rate of the feedback value of the physical unclonable function; and judging the age of the chip according to the error rate of the feedback value of the physical unclonable function.
Optionally, calculating the error rate of the feedback value of the physical unclonable function specifically includes: calculating the error rate of the unclonable function value according to the comparison of the feedback value of the physical unclonable function of the multi-time extracted entropy source and a standard feedback value;
the standard feedback value is specified as a comparison standard, wherein the one-time extracted physical unclonable function feedback value of the entropy source.
Alternatively, the excitation mode is: repeatedly exciting the physical unclonable function entropy source at a preset frequency within a preset time period to obtain a feedback value of the physical unclonable function, wherein the excitation comprises any one of reset, power-on and power-off and fixed data input.
Optionally, determining the age of the chip according to the error rate of the feedback value of the physical unclonable function specifically includes: and comparing the error rate with a pre-stored corresponding relation between the error rate and the age of the chip to obtain the age of the chip.
In a second aspect, an embodiment of the present invention provides a device for determining a chip age, including a first error rate extraction module, configured to excite a physical unclonable function entropy source in a chip, extract a physical unclonable function feedback value of the entropy source multiple times, and calculate an error rate of the physical unclonable function feedback value; the first age judging module is used for judging the age of the chip according to the calculation result of the error rate of the feedback value of the physical unclonable function by the error rate extracting module.
Optionally, the first error rate extraction module includes: a first error rate calculation sub-module, configured to calculate an error rate of the unclonable function value according to a comparison between the feedback value of the physical unclonable function of the entropy source extracted multiple times and a standard feedback value; the standard feedback value is specified as a comparison standard, wherein the one-time extracted physical unclonable function feedback value of the entropy source.
Optionally, the first error rate extraction module further includes: and the first excitation submodule is used for repeatedly exciting the physical unclonable function entropy source at a preset frequency within a preset time period to obtain a feedback physical unclonable function feedback value, and the excitation comprises any one of reset, power-on and power-off and fixed data input.
Optionally, the first age determination module stores a correspondence between an error rate and a chip age, and the first age determination module is specifically configured to compare the error rate with a pre-stored correspondence between an error rate and a chip age, so as to obtain the age of the chip.
In a third aspect, an embodiment of the present invention further provides an IP module for determining an age of a chip, including:
an IP module entropy source, wherein the chip circuit has a time sensitive physical unclonable function; the second error rate extraction module is used for exciting a physical unclonable function entropy source in the chip, extracting a physical unclonable function feedback value of the entropy source for a plurality of times, and calculating the error rate of the physical unclonable function feedback value;
and the second age judging module is used for judging the age of the chip according to the calculation result of the first error rate extracting module on the feedback value error rate of the physical unclonable function.
Optionally, the second error rate extraction module includes: the second error rate calculation sub-module is used for calculating the error rate of the physical unclonable function feedback value according to the comparison of the physical unclonable function feedback value of the entropy source extracted for multiple times and a standard feedback value; the standard feedback value is specified as a comparison standard, wherein the one-time extracted physical unclonable function feedback value of the entropy source.
Optionally, the second error rate extraction module further includes: and the second excitation submodule is used for repeatedly exciting the physical unclonable function entropy source at a preset frequency within a preset time period to obtain a feedback value of the feedback physical unclonable function, wherein the excitation comprises any one of reset, power-on and power-off and fixed data input.
Optionally, the second age determination module stores a correspondence between an error rate and a chip age, and the first age determination module is specifically configured to compare the error rate with a pre-stored correspondence between an error rate and a chip age, so as to obtain the age of the chip.
In a fourth aspect, an embodiment of the present invention provides a chip, including an integrated circuit for achieving the function of the chip and an IP module as described in any one of the above.
The chip age judging method, the chip age judging device, the IP module and the chip provided by the embodiment of the invention excite the physical unclonable function entropy source in the chip; extracting the physical unclonable function feedback value of the entropy source for a plurality of times; calculating the error rate of the feedback value of the physical unclonable function; and judging the age of the chip according to the error rate of the feedback value of the physical unclonable function. By implementing the embodiment of the invention, the age of the chip can be accurately judged.
Drawings
In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the drawings that are needed in the embodiments will be briefly described below, and it is obvious that the drawings in the following description are some embodiments of the present invention, and other drawings may be obtained according to these drawings without inventive effort for a person skilled in the art.
Fig. 1 is a flowchart of a method for determining a chip age according to an embodiment of the present invention;
fig. 2 is a schematic diagram of a device for determining a chip age according to an embodiment of the present invention;
FIG. 3 is a schematic diagram showing interaction between the chip age determination device shown in FIG. 2 and the entropy sources of the physical unclonable functions in the chip;
fig. 4 is a schematic diagram of an IP module for determining the age of a chip according to an embodiment of the present invention;
Detailed Description
For the purpose of making the objects, technical solutions and advantages of the embodiments of the present invention more apparent, the technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings in the embodiments of the present invention, and it is apparent that the described embodiments are some embodiments of the present invention, but not all embodiments of the present invention. All other embodiments, which can be made by those skilled in the art based on the embodiments of the invention without making any inventive effort, are intended to be within the scope of the invention.
For the convenience of writing and reading, the chip in the embodiment of the present invention includes any chip on which a hardware module can generate a physical unclonable function (for the convenience of writing and reading, the physical unclonable function is replaced with a "PUF", and it is understood that both are equivalent concepts). For example, a digital chip having a ring oscillator PUF, an arbiter PUF, a glitch PUF, a flip-flop PUF, a static random access memory PUF, or the like, may be an analog chip including a coating-based PUF, a threshold voltage-based PUF, or a resistance-based PUF.
For the purpose of facilitating an understanding of the embodiments of the present invention, reference will now be made to the following description of specific embodiments, taken in conjunction with the accompanying drawings, which are not intended to limit the invention.
FIG. 1 is a flowchart of a method for determining the age of a chip according to an embodiment of the present invention; referring to fig. 1, the embodiment includes:
s101, exciting a physical unclonable function entropy source in a chip;
the excitation mode of the entropy source of the physical unclonable function in the chip comprises resetting, powering up and down, fixed data input and the like. For example, for a static random access memory PUF (SRAM PUF), the excitation may be powered up and down, for a ring oscillator PUF (RO PUF), the excitation may be powered up and down, or a string of fixed data may be input. Of course, different other excitation methods for different entropy sources of the physical unclonable function are also possible, and all are within the scope of the embodiments of the present invention.
In the specific implementation, the excitation mode is to repeatedly excite the physical unclonable function entropy source within a preset duration with a preset frequency or period.
S102, extracting the feedback value of the physical unclonable function of the entropy source for a plurality of times;
specifically, for different types of entropy sources, by repeatedly exciting, such as repeatedly powering on and powering off, repeatedly inputting a certain string of fixed data, and the like, each excitation can obtain a physical unclonable function feedback value fed back by the entropy source, and by repeatedly exciting for multiple times, the physical unclonable function feedback value fed back by the entropy source is obtained.
S103, calculating the error rate of the feedback value of the physical unclonable function;
and calculating the error rate of the multiple-extraction physical unclonable function feedback value according to the comparison of the multiple-extraction physical unclonable function feedback value and the standard feedback value. The standard feedback value is specified as a comparison standard, wherein the physical unclonable function feedback value of the entropy source is extracted at a time. For example, the standard feedback value may be the physical unclonable function feedback value extracted for the first time from among the physical unclonable function feedback values of the entropy source in the detection process, or may be any other physical unclonable function feedback value extracted for any time, and when the physical unclonable function feedback value extracted for many times is compared with the value, a deviation occurs, the overall error rate may be represented, and the error rate represents the deviation degree of the physical unclonable function feedback value. That is, the feedback value of the physical unclonable function of the same chip has a certain error rate, and the error rate gradually increases with the age of the chip. Calculating the error rate is critical to determining the age of the chip.
S104, judging the age of the chip according to the error rate of the feedback value of the physical unclonable function;
the physical unclonable function has an important characteristic, namely an aging effect, and as the age of a chip increases, the error rate of the feedback value of the physical unclonable function also increases correspondingly. Thus, the higher the error rate, the higher the age of the corresponding chip. For example, the chip is used for one year, the error rate of the feedback value of the physical unclonable function is 2.5%, but the chip is used for half a year, and the error rate of the feedback value of the physical unclonable function exceeds 3.5%. And (3) comparing the error rate obtained in the step (S103) with the corresponding relation between the pre-stored error rate and the age of the chip to obtain the age of the chip.
It should be noted that, the age of the chip in the embodiment of the present invention does not refer to the age of the chip, but refers to the time period of the chip. According to the different working environments of the chip, the judgment of several months or even days can be obtained. For example, a chip operating in a high temperature environment ages faster and can yield a shorter time unit of calculation result.
According to the embodiment of the invention, the age of the chip can be accurately judged. In addition, because of the unclonable nature of the physical unclonable function feedback value, an attacker cannot conduct a large-scale attack; the physical unclonable function circuit also has the anti-copying characteristic, so that an attacker can hardly change the behavior characteristics of the physical unclonable function circuit, and the safety is greatly improved.
Fig. 2 is a schematic diagram of a device for determining the age of a chip according to an embodiment of the present invention;
the chip age judgment device 20 includes: a first error rate extraction module 201 and a first age determination module 202.
A first error rate extraction module 201, configured to excite a physical unclonable function entropy source in a chip, extract a physical unclonable function feedback value of the entropy source multiple times, and calculate an error rate of the physical unclonable function feedback value;
in a specific implementation, the first error rate extraction module 201 may further include a first error rate calculation sub-module (not shown in the figure) for calculating an error rate of the feedback value of the physical unclonable function; specifically, calculating the error rate of the unclonable function value according to the comparison of the feedback value of the physical unclonable function of the multi-time extracted entropy source and a standard feedback value; the standard feedback value is specified as a comparison standard, wherein the one-time extracted physical unclonable function feedback value of the entropy source. And a first excitation submodule (not shown in the figure) is configured to repeatedly excite the entropy source of the physical unclonable function at a preset frequency within a preset duration, for example, repeatedly powering on and powering off, repeatedly inputting a certain string of fixed data, etc., where each excitation may obtain a feedback value of the physical unclonable function fed back by the entropy source, and repeatedly exciting for multiple times to obtain a feedback value of the physical unclonable function fed back by the entropy source.
It should be noted that, the splitting or naming of the above modules may be adjusted according to specific needs, and the first error rate extracting module 201 may perform the above functions in this embodiment, or may also perform the above functions through the first excitation submodule and the first error rate calculating submodule; various splitting and combining shall fall within the scope of embodiments of the present invention.
A first age determination module 202, configured to determine an age of the chip according to a result of the error rate extraction module calculating the error rate of the feedback value of the physical unclonable function;
specifically, the first age determination module 202 stores a correspondence between the error rate and the age of the chip, and compares the error rate with a pre-stored correspondence between the error rate and the age of the chip, thereby obtaining the age of the chip.
Please refer to fig. 3 again, which is a schematic diagram showing interaction between the chip age determining device and the entropy source of the physical unclonable function in the chip shown in fig. 2;
as shown in the figure, and it is understood that the chip age determination apparatus 20 may further include a corresponding excitation circuit and a necessary feedback receiving communication interface, and the first error rate extraction module 201 sends feedback for exciting and receiving the entropy source through the corresponding excitation circuit and the communication interface, respectively. The communication interface may receive the feedback via a wired or wireless communication of the circuit.
Further, the chip age determination device 20 may further include a corresponding information output component, such as a display component, an audio output component, etc., for outputting the age of the chip obtained by the first age determination module 202 to the user.
The device provided by the embodiment of the invention can accurately judge the age of the chip. In addition, because of the unclonable nature of the physical unclonable function feedback value, an attacker cannot conduct a large-scale attack; the physical unclonable function circuit also has the anti-copying characteristic, so that an attacker can hardly change the behavior characteristics of the physical unclonable function circuit, and the safety is greatly improved.
Referring to fig. 4, a schematic diagram of an IP module for determining the age of a chip according to an embodiment of the present invention is shown;
the chip age judgment IP block 40 includes: an IP block entropy source 401, a second error rate extraction block 402 and a second age determination block 403.
The IP module entropy source 401 specifically refers to a physically unclonable function entropy source in a chip, and the entropy source type is described in the foregoing embodiments and is not described herein again.
A second error rate extracting module 402, configured to excite the IP module entropy source 401, extract the feedback value of the physical unclonable function for multiple times, and calculate an error rate of the feedback value of the physical unclonable function;
in a specific implementation, the second error rate extraction module 402 may further include a second error rate calculation sub-module (not shown in the figure) for calculating an error rate of the feedback value of the physical unclonable function; calculating the error rate of the unclonable function value according to the comparison of the physical unclonable function feedback value of the IP module entropy source 401 extracted for multiple times and a standard feedback value; the standard feedback value is specified as a comparison standard, wherein the one-time extracted physical unclonable function feedback value of the entropy source. And a second excitation sub-module (not shown in the figure) for repeatedly exciting the IP block entropy source 401 at a preset frequency for a preset period of time.
It should be noted that, the splitting or naming of the above modules may be adjusted according to specific needs, and the second error rate extraction module 402 may perform the above functions in this embodiment, or may also perform the above functions through the second excitation submodule and the second error rate calculation submodule; various splitting and combining shall fall within the scope of embodiments of the present invention.
A second age determination module 403, configured to determine an age of the chip according to a result of the error rate extraction module calculating the feedback value error rate of the physical unclonable function;
specifically, the second age determination module 403 stores a correspondence between the error rate and the age of the chip, and compares the error rate with a pre-stored correspondence between the error rate and the age of the chip, thereby obtaining the age of the chip.
The chip age judgment IP module provided by the embodiment of the invention can accurately judge the chip age. Because of the unclonable nature of the physical unclonable function feedback values, an attacker cannot conduct a large-scale attack; the physical unclonable function circuit also has the anti-copying characteristic, so that an attacker can hardly change the behavior characteristics of the physical unclonable function circuit, and the safety is greatly improved; in addition, the IP module of the embodiment of the invention can be directly applied to chip design, exists in mass production chips in the form of a general IP module, and has strong universality.
In addition, the embodiment of the invention also provides a chip, which can be, for example, a fingerprint identification chip, an AI chip, an LCD driving chip, a TP driving chip and the like, and is not limited herein; the chip comprises a functional integrated circuit which achieves the function of the chip, and the chip age judgment IP module is described in the embodiment of the invention.
The age judgment IP module in the embodiment of the invention is integrated in the chip, so that the accuracy of the age judgment of the chip and the universality of the chip design can be effectively enhanced, and the black product benefit channel of recycling, renovating and selling the chip is avoided.
The first and second embodiments of the present invention are to distinguish between different embodiments in terms of nomenclature. The sequence is not represented, and the difference of module functions is not absolutely indicated; for example, in different embodiments of the present invention, there are a first error rate extraction module and a second error rate extraction module, which may be used to perform the same function in practical applications; one for describing the device embodiments and the other for describing the IP module embodiments, so that the nomenclature is differentiated according to the different embodiments for reading.
Those of ordinary skill in the art will appreciate that all or part of the steps in the various methods of the above embodiments may be implemented by a program to instruct related hardware, the program may be stored in a computer readable storage medium in an apparatus, terminal or device, and the storage medium may include: flash disk, read-Only Memory (ROM), random-access Memory (Random Access Memory, RAM), magnetic or optical disk, and the like.
The sequence of steps of the method of the embodiment of the present invention may be adjusted, combined or deleted according to actual needs, and the sequence is not limited, and the adjustment of the sequence of steps, the combination of steps or the deletion of steps in the method embodiment of the present invention and the system embodiment of the present invention should all fall within the protection scope of the present invention.
It can be understood that, in the device of the embodiment of the present invention, the description of the modules in the IP module is taken as an example, but specific implementation manners may be integrated, further divided or pruned according to actual needs, and any integration, division or pruned should belong to the protection scope of the present invention.
The method, the device, the IP module and the chip for determining the age of the chip disclosed in the embodiments of the present invention are described in detail, and specific examples are applied to illustrate the principles and the implementation of the present invention, and the description of the above embodiments is only for helping to understand the method and the core idea of the present invention, but not limit the scope of the present invention. Also, it is within the scope of the present invention to provide those skilled in the art with modifications in the detailed description and the application range of the invention.
Claims (7)
1. The method for judging the age of the chip is characterized by comprising the following steps of:
exciting a physical unclonable function entropy source in the chip;
extracting the physical unclonable function feedback value of the entropy source for a plurality of times;
calculating the error rate of the feedback value of the physical unclonable function;
judging the age of the chip according to the error rate of the feedback value of the physical unclonable function;
the error rate of the feedback value of the physical unclonable function is calculated, specifically:
calculating the error rate of the physical unclonable function feedback value according to the comparison of the physical unclonable function feedback value of the multi-time extracted entropy source and a standard feedback value;
the standard feedback value is specified as a comparison standard, wherein the one-time extracted physical unclonable function feedback value of the entropy source;
a physically unclonable function entropy source in the stimulus chip, comprising:
repeatedly exciting the physical unclonable function entropy source at a preset frequency within a preset time period to obtain a physical unclonable function feedback value, wherein the excitation comprises any one of reset, power-on and power-off and fixed data input.
2. The method according to claim 1, wherein said determining the age of the chip according to the error rate of the feedback value of the physical unclonable function comprises:
and comparing the error rate with a pre-stored corresponding relation between the error rate and the age of the chip to obtain the age of the chip.
3. A device for determining the age of a chip, comprising:
the first error rate extraction module is used for exciting a physical unclonable function entropy source in the chip, extracting a physical unclonable function feedback value of the entropy source for a plurality of times, and calculating the error rate of the physical unclonable function feedback value;
the first age judging module is used for judging the age of the chip according to the calculation result of the error rate of the feedback value of the physical unclonable function by the error rate extracting module;
the error rate extraction module comprises:
a first error rate calculation sub-module, configured to calculate an error rate of the physical unclonable function feedback value according to a comparison between the multiple extracted physical unclonable function feedback value of the entropy source and a standard feedback value;
the standard feedback value is specified as a comparison standard, wherein the one-time extracted physical unclonable function feedback value of the entropy source;
the error rate extraction module comprises:
and the first excitation submodule is used for repeatedly exciting the physical unclonable function entropy source at a preset frequency within a preset time period to obtain a feedback physical unclonable function feedback value, and the excitation comprises any one of reset, power-on and power-off and fixed data input.
4. The apparatus of claim 3, wherein the first age determination module stores a correspondence between an error rate and a chip age, and the first age determination module is specifically configured to compare the error rate with a pre-stored correspondence between an error rate and a chip age to obtain the chip age.
5. An IP block for determining a chip age, comprising:
an IP module entropy source, a physical unclonable function with time sensitivity in a chip circuit;
the second error rate extraction module is used for exciting an IP module entropy source in the chip, extracting a physical unclonable function feedback value of the entropy source for a plurality of times, and calculating the error rate of the physical unclonable function feedback value;
the second age judging module is used for judging the age of the chip according to the calculation result of the feedback value error rate of the physical unclonable function by the second error rate extracting module;
the second error rate extraction module includes:
the second error rate calculation sub-module is used for calculating the error rate of the physical unclonable function feedback value according to the comparison of the physical unclonable function feedback value of the IP module entropy source extracted for multiple times and the standard feedback value;
the standard feedback value is specified as a comparison standard, wherein the one-time extracted physical unclonable function feedback value of the entropy source;
the second error rate extraction module includes:
and the second excitation submodule is used for repeatedly exciting the IP module entropy source at a preset frequency within a preset time period to obtain a physical unclonable function feedback value, and the excitation comprises any one of reset, power-on and power-off and fixed data input.
6. The IP module of claim 5, wherein the second age determination module stores a correspondence between an error rate and a chip age, and the second age determination module is specifically configured to compare the error rate with a pre-stored correspondence between an error rate and a chip age to obtain the chip age.
7. A chip comprising a functional integrated circuit for performing the chip function and an IP module as claimed in any one of claims 5 to 6.
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| CN104969468A (en) * | 2013-02-11 | 2015-10-07 | 高通股份有限公司 | Integrated circuit identification and dependability verification using ring oscillator based physical unclonable function and age detection circuitry |
| CN105978694A (en) * | 2016-04-29 | 2016-09-28 | 中国科学院计算技术研究所 | Anti-modeling attack strong physical-uncloneable function device and realization method thereof |
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| Publication number | Priority date | Publication date | Assignee | Title |
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| CN104969468A (en) * | 2013-02-11 | 2015-10-07 | 高通股份有限公司 | Integrated circuit identification and dependability verification using ring oscillator based physical unclonable function and age detection circuitry |
| JP2018082483A (en) * | 2013-02-11 | 2018-05-24 | クアルコム，インコーポレイテッド | Integrated circuit identification and dependability verification using ring oscillator based physical unclonable function and age detection circuitry |
| CN105978694A (en) * | 2016-04-29 | 2016-09-28 | 中国科学院计算技术研究所 | Anti-modeling attack strong physical-uncloneable function device and realization method thereof |
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