CN110120431A - Silicon wafer and its application with V-groove flannelette - Google Patents
Silicon wafer and its application with V-groove flannelette Download PDFInfo
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- CN110120431A CN110120431A CN201910451470.2A CN201910451470A CN110120431A CN 110120431 A CN110120431 A CN 110120431A CN 201910451470 A CN201910451470 A CN 201910451470A CN 110120431 A CN110120431 A CN 110120431A
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- Prior art keywords
- groove
- silicon wafer
- light
- shady face
- flannelette
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- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 title claims abstract description 139
- 229910052710 silicon Inorganic materials 0.000 title claims abstract description 139
- 239000010703 silicon Substances 0.000 title claims abstract description 139
- 229910052751 metal Inorganic materials 0.000 claims description 7
- 239000002184 metal Substances 0.000 claims description 7
- 238000002161 passivation Methods 0.000 claims description 6
- 239000000758 substrate Substances 0.000 claims description 4
- 230000003287 optical effect Effects 0.000 abstract description 11
- 238000005498 polishing Methods 0.000 abstract description 4
- 238000012546 transfer Methods 0.000 abstract description 4
- KRHYYFGTRYWZRS-UHFFFAOYSA-N Fluorane Chemical compound F KRHYYFGTRYWZRS-UHFFFAOYSA-N 0.000 description 20
- 238000000034 method Methods 0.000 description 16
- PNEYBMLMFCGWSK-UHFFFAOYSA-N Alumina Chemical compound [O-2].[O-2].[O-2].[Al+3].[Al+3] PNEYBMLMFCGWSK-UHFFFAOYSA-N 0.000 description 15
- 238000000623 plasma-assisted chemical vapour deposition Methods 0.000 description 15
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 12
- 238000005530 etching Methods 0.000 description 12
- 229920002120 photoresistant polymer Polymers 0.000 description 12
- 238000000231 atomic layer deposition Methods 0.000 description 10
- 235000008216 herbs Nutrition 0.000 description 9
- 238000001259 photo etching Methods 0.000 description 9
- 238000012545 processing Methods 0.000 description 9
- 210000002268 wool Anatomy 0.000 description 9
- CSCPPACGZOOCGX-UHFFFAOYSA-N Acetone Chemical compound CC(C)=O CSCPPACGZOOCGX-UHFFFAOYSA-N 0.000 description 8
- IJGRMHOSHXDMSA-UHFFFAOYSA-N Atomic nitrogen Chemical compound N#N IJGRMHOSHXDMSA-UHFFFAOYSA-N 0.000 description 8
- WGTYBPLFGIVFAS-UHFFFAOYSA-M tetramethylammonium hydroxide Chemical compound [OH-].C[N+](C)(C)C WGTYBPLFGIVFAS-UHFFFAOYSA-M 0.000 description 8
- 230000000052 comparative effect Effects 0.000 description 7
- 229910052581 Si3N4 Inorganic materials 0.000 description 6
- 238000004140 cleaning Methods 0.000 description 6
- 238000010586 diagram Methods 0.000 description 6
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 description 6
- GRYLNZFGIOXLOG-UHFFFAOYSA-N Nitric acid Chemical compound O[N+]([O-])=O GRYLNZFGIOXLOG-UHFFFAOYSA-N 0.000 description 5
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 5
- 239000007864 aqueous solution Substances 0.000 description 5
- 239000005001 laminate film Substances 0.000 description 5
- 238000003475 lamination Methods 0.000 description 5
- 229910017604 nitric acid Inorganic materials 0.000 description 5
- 238000011056 performance test Methods 0.000 description 5
- 238000007650 screen-printing Methods 0.000 description 5
- 229910003978 SiClx Inorganic materials 0.000 description 4
- 239000004411 aluminium Substances 0.000 description 4
- 229910052782 aluminium Inorganic materials 0.000 description 4
- 239000003292 glue Substances 0.000 description 4
- 239000012528 membrane Substances 0.000 description 4
- 229910052757 nitrogen Inorganic materials 0.000 description 4
- 239000000377 silicon dioxide Substances 0.000 description 4
- 229910052814 silicon oxide Inorganic materials 0.000 description 4
- 230000000694 effects Effects 0.000 description 3
- 230000005611 electricity Effects 0.000 description 3
- 230000031700 light absorption Effects 0.000 description 3
- MHAJPDPJQMAIIY-UHFFFAOYSA-N Hydrogen peroxide Chemical compound OO MHAJPDPJQMAIIY-UHFFFAOYSA-N 0.000 description 2
- 239000002253 acid Substances 0.000 description 2
- 238000013461 design Methods 0.000 description 2
- 210000004209 hair Anatomy 0.000 description 2
- 239000007788 liquid Substances 0.000 description 2
- 238000002360 preparation method Methods 0.000 description 2
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 1
- 238000010521 absorption reaction Methods 0.000 description 1
- 230000003667 anti-reflective effect Effects 0.000 description 1
- 238000013459 approach Methods 0.000 description 1
- 230000009286 beneficial effect Effects 0.000 description 1
- 238000005422 blasting Methods 0.000 description 1
- 238000006555 catalytic reaction Methods 0.000 description 1
- 229910052802 copper Inorganic materials 0.000 description 1
- 239000010949 copper Substances 0.000 description 1
- XTVVROIMIGLXTD-UHFFFAOYSA-N copper(II) nitrate Chemical compound [Cu+2].[O-][N+]([O-])=O.[O-][N+]([O-])=O XTVVROIMIGLXTD-UHFFFAOYSA-N 0.000 description 1
- 238000005520 cutting process Methods 0.000 description 1
- 230000007547 defect Effects 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 238000002474 experimental method Methods 0.000 description 1
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 description 1
- 239000010931 gold Substances 0.000 description 1
- 229910052737 gold Inorganic materials 0.000 description 1
- 238000005286 illumination Methods 0.000 description 1
- 230000000415 inactivating effect Effects 0.000 description 1
- 230000001795 light effect Effects 0.000 description 1
- 229910021421 monocrystalline silicon Inorganic materials 0.000 description 1
- 239000002070 nanowire Substances 0.000 description 1
- 230000002035 prolonged effect Effects 0.000 description 1
- 238000002310 reflectometry Methods 0.000 description 1
- 238000011160 research Methods 0.000 description 1
- 239000004065 semiconductor Substances 0.000 description 1
- 238000004088 simulation Methods 0.000 description 1
- 238000001039 wet etching Methods 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L31/02—Details
- H01L31/0236—Special surface textures
- H01L31/02363—Special surface textures of the semiconductor body itself, e.g. textured active layers
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L31/04—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices
- H01L31/06—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices characterised by at least one potential-jump barrier or surface barrier
- H01L31/068—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices characterised by at least one potential-jump barrier or surface barrier the potential barriers being only of the PN homojunction type, e.g. bulk silicon PN homojunction solar cells or thin film polycrystalline silicon PN homojunction solar cells
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L31/18—Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof
- H01L31/1804—Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof comprising only elements of Group IV of the Periodic System
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02E—REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
- Y02E10/00—Energy generation through renewable energy sources
- Y02E10/50—Photovoltaic [PV] energy
- Y02E10/547—Monocrystalline silicon PV cells
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02P—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
- Y02P70/00—Climate change mitigation technologies in the production process for final industrial or consumer products
- Y02P70/50—Manufacturing or production processes characterised by the final manufactured product
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- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- Electromagnetism (AREA)
- General Physics & Mathematics (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Crystallography & Structural Chemistry (AREA)
- Sustainable Development (AREA)
- Chemical & Material Sciences (AREA)
- Life Sciences & Earth Sciences (AREA)
- Manufacturing & Machinery (AREA)
- Photovoltaic Devices (AREA)
Abstract
The present invention provides a kind of silicon wafer with V-groove flannelette, and the silicon wafer has side to light and shady face, wherein the side to light and the shady face all have the V-groove shape pit of parallel arrangement;The extending direction of the extending direction and the V-groove of the shady face of the side to light V-groove is mutually perpendicular to;The angle of the plane of the side wall of the V-groove of the side to light and the silicon wafer macro surface is 50-75 °;The angle of the plane of the side wall of the V-groove of the shady face and the silicon wafer macro surface is 20-55 °.The present invention also provides the application of the silicon wafer with V-groove flannelette of the invention in solar cells.Compared with conventional backlit face is the structure of polishing, or the structure combined with pyramid flannelette is compared, and the battery with silicon wafer of the invention has higher short circuit current and transfer efficiency.It is not only restricted to any theory, this mainly has benefited from the promotion of entirety optical property brought by the matching of side to light and shady face structure of the invention.
Description
Technical field
The invention belongs to semiconductor photovoltaic fields.In particular it relates to which there is the silicon wafer of V-groove flannelette and its answer
With.
Background technique
With the continuous improvement of fossil energy gradually used up with the mankind for energy demand, develop sustainable cleaning energy
Source is extremely urgent.Solar battery is the device that sunlight is directly translated into electric energy using photovoltaic effect, is that we obtain clearly
One of the promising approach of the clean energy.
The goal in research that effect drop is originally solar battery is proposed, increasing solar battery is that solar battery mentions to the absorption of light
Efficient key.
In order to increase absorption of the solar battery to light, need to carry out making herbs into wool processing on cell piece surface.Suede structure
It can there are many design, such as nano wire, positive pyramid, inverted pyramids, V-groove.Wherein V-groove structure has some unique
Property, for example the variation of incident light angle is smaller on the influence of its reflectivity on along V-groove extending direction, that is, has so-called
The characteristics of omni-directional.And the variation of incident light angle, exactly corresponding to fixed cell piece, from morning to night different time sections receive
Sun angular variation, therefore can be higher to the gross absorption of light whole day with the structure of omni-directional.Based on V-groove knot
This omni-directional feature of structure, it may be the following solar battery that developing, which has the solar battery of V-groove suede structure,
One of developing direction.
The considerations of for intensity of illumination and inactivating performance, present cell piece surface optical structure design are substantially all concentration
In front side to light, and silicon wafer shady face is processed by shot blasting.The smooth cell piece back side is more easily done well after polishing
Back passivation, to obtain preferable electric property.But this way has ignored the surface texture at the back side to cell piece entirety
The influence of optical property.
Summary of the invention
Therefore, in order to overcome the defects of the prior art described above, the present invention has comprehensively considered the V-groove of shady face and side to light
Structure combines the influence to cell piece entirety optical property and electric property, provides a kind of silicon wafer with V-groove flannelette, the tool
There is higher short circuit current and transfer efficiency when having the silicon wafer of V-groove flannelette for battery.The present invention also provides of the invention
The application of silicon wafer with V-groove flannelette in solar cells.
In the context of the present invention, term " opening width of V-groove " refers between the vertex of ridged striped of V-groove
Distance.
In a first aspect, the present invention provides a kind of silicon wafer with V-groove flannelette, the silicon wafer has side to light and backlight
Face, wherein the side to light and the shady face all have the V-groove shape pit of parallel arrangement;The V-groove of the side to light
The extending direction of extending direction and the V-groove of the shady face is mutually perpendicular to;The side wall of the V-groove of the side to light and the silicon
The angle of the plane of piece macro surface is 50-75 °;The side wall of the V-groove of the shady face is flat with the silicon wafer macro surface
The angle in face is 20-55 °.
Preferably, in the silicon wafer of the present invention with V-groove flannelette, the opening width of the V-groove is 0.5-
5.0μm。
Preferably, in the silicon wafer of the present invention with V-groove flannelette, the opening width of the V-groove is 1.0-
3.5μm;It is highly preferred that the opening width of the V-groove is 1.5-3 μm.
Preferably, in the silicon wafer of the present invention with V-groove flannelette, the V-groove structure of the side to light is at it
The projected area of the macro surface in place face is not less than the 60% of the side to light gross area, the V-groove structure of the shady face
Projected area of macro surface in face is not less than the 60% of the shady face gross area where it.
Preferably, in the silicon wafer of the present invention with V-groove flannelette, the side wall of the V-groove of the side to light with
The angle of the plane of the silicon wafer macro surface is 55-70 °;It is highly preferred that the side wall of the V-groove of the side to light and the silicon
The angle of the plane of piece macro surface is 60-70 °.
Preferably, in the silicon wafer of the present invention with V-groove flannelette, the side wall of the V-groove of the shady face with
The angle of the plane of the silicon wafer macro surface is 25-50 °;It is highly preferred that the side wall of the V-groove of the shady face and the silicon
The angle of the plane of piece macro surface is 30-45 °;It is highly preferred that the side wall of the V-groove of the shady face and silicon wafer macroscopic view
The angle of the plane on surface is 35-40 °.
The present invention provides the preparation present invention, and there is the method for the silicon wafer of V-groove flannelette to be not particularly limited, and can use
A variety of method preparations.Such as wet etching method, first so that its surface is formed layer of oxide layer by the method for thermal oxide silicon wafer, so
The strip exposure mask for making parallel arrangement on silicon wafer with the method for photoetching afterwards, etches V-groove structure finally by etching liquid;Or
Person is, by accurate numerically-controlled machine tool, to directly cut out V-groove structure using CNC cutting method.
Second aspect, the present invention provide the application of the silicon wafer with V-groove flannelette of the invention in solar cells;It is excellent
Selection of land, when by the silicon wafer application provided by the invention with V-groove flannelette in solar cells, the silicon wafer side to light and battery
Piece side to light is in the same direction.
The third aspect, the present invention provide a kind of solar battery, including grid line, antireflection layer, silicon substrate layer, passivation layer and
Metal layer, wherein the silicon substrate layer is formed by the silicon wafer with V-groove flannelette of the invention;Preferably, the silicon wafer meets light
Face and cell piece side to light are in the same direction.
The invention has the following beneficial effects:
Compared with conventional backlit face is the structure of polishing, or the structure combined with pyramid flannelette is compared, and has this hair
The battery of bright silicon wafer has higher short circuit current and transfer efficiency.It is not only restricted to any theory, this mainly has benefited from this hair
The promotion of entirety optical property brought by the matching of bright side to light and shady face structure.
Detailed description of the invention
Embodiments of the present invention is further illustrated referring to the drawings, in which:
Fig. 1 is the silicon wafer structural schematic diagram provided by the present invention with V-groove flannelette;
When Fig. 2 is mutually perpendicular to for the V-groove extending direction of side to light and shady face, the structure of different sides to light and shady face
The trend chart of photogenerated current density under angle combinations;
The silicon wafer structural schematic diagram that Fig. 3 is parallel to each other for the V-groove extending direction of side to light and shady face;
When Fig. 4 is parallel to each other for the V-groove extending direction of side to light and shady face, the structure of different sides to light and shady face
The trend chart of photogenerated current density under angle combinations;
Fig. 5 is the variation for just setting the photogenerated current density under pyramid structure angle combinations of different sides to light and shady face
Tendency chart;
Fig. 6 is the variation of the photogenerated current density under the inverted pyramid structural point combination of different sides to light and shady face
Tendency chart;
Fig. 7 is the structural schematic diagram of the simulated battery comprising silicon wafer according to one embodiment of the present invention;
Fig. 8 is the silicon wafer side to light SEM figure with V-groove flannelette of the embodiment of the present invention 1;
Fig. 9 is the silicon wafer side to light section SEM figure with V-groove flannelette of the embodiment of the present invention 1;
Figure 10 is the silicon wafer shady face section SEM figure with V-groove flannelette of the embodiment of the present invention 1
Figure 11 is the structural schematic diagram of the battery with silicon wafer of the invention of the embodiment of the present invention.
Specific embodiment
The present invention is further described in detail With reference to embodiment, and the embodiment provided is only for explaining
The bright present invention, the range being not intended to be limiting of the invention.
In order to enhance light absorption, silicon wafer front surface needs to carry out making herbs into wool processing, and the V-groove structure of single side has and single side
Just setting or be inverted the comparable sunken light effect of golden word structure.Light into silicon wafer also has internal reflection after reaching silicon wafer bottom,
The matching problem it is necessary to consider shady face structure Yu side to light structure is utilized to this partial internal reflection light in order to increase.It is logical
The optical property simulation statistics to different angle V-groove flannelette and the verifying analysis of experiment are crossed, the present inventor is unexpectedly
It was found that: for the solar battery of V-groove suede structure, firstly, the V-groove structure extending direction of side to light and shady face is mutual
The case where whole optical property when vertical will be substantially better than when V-groove structure extending direction is parallel to each other;Furthermore the backlight
Face does not use fully finished face, but use the extending direction low-angle vertical with side to light V-groove extending direction (shady face
The angle of the plane of the side wall and silicon wafer macro surface of V-groove is 20-55 °) V-groove when, it is available than shady face polish
Or the better whole optical property of pyramid structure combination;Meanwhile the V-groove structure of shady face will not make back passivation effect
Cheng Tai great influences.In conclusion the two-sided V-groove suede structure silicon wafer for using the present invention to provide is silicon base, it is final obtained
Cell piece overall performance is more excellent, and the cell piece combined with conventional suede structure is compared, and the cell piece of the structure can have higher
Short circuit current and the open-circuit voltage that is not much different, obtained battery efficiency it is also higher.
Fig. 1 is the silicon wafer structural schematic diagram provided by the present invention with V-groove flannelette.The silicon wafer side to light and shady face
V-groove extending direction be mutually perpendicular to.When Fig. 2 is mutually perpendicular to for the V-groove extending direction of side to light and shady face, difference meets light
The trend chart of photogenerated current density under the combination of the structural point of face and shady face.Fig. 2 shows in a length of 300- of light wave
1200nm, under different side to light V-groove angles and shady face V-groove angle combinations, using the structure silicon wafer as silicon base
The photogenerated current density circle of equal altitudes of cell piece.Battery structure is as shown in Figure 7.
It can be apparent from according to fig. 2, be 50-75 ° and shady face V-groove angle model in side to light V-groove angular range
It encloses when being 20-55 °, available higher photogenerated current density, i.e., has by the solar battery of silicon base of the structure silicon wafer
There is better optical property.When wherein shady face V-groove angle is 0, that is, correspond to the fully finished situation of shady face, Fig. 4 shows
Go out that shady face is fully finished can not to realize higher photogenerated current density.
The silicon wafer structural schematic diagram that Fig. 3 is parallel to each other for the V-groove extending direction of side to light and shady face.Fig. 3 is shown
The silicon wafer of two-sided V-groove suede structure, and the V-groove extending direction of the silicon wafer side to light and shady face is parallel to each other.Fig. 4 is to meet
Light when the V-groove extending direction of smooth surface and shady face is parallel to each other, under the structural point combination of different sides to light and shady face
The trend chart of raw current density.Fig. 4 is shown in a length of 300-1200nm of light wave, in different side to light V-groove angles
Under shady face V-groove angle combinations, using the structure silicon wafer as the photogenerated current density circle of equal altitudes of the cell piece of silicon base.Battery
Structure is as shown in Figure 7.
Fig. 5 is the variation for just setting the photogenerated current density under pyramid structure angle combinations of different sides to light and shady face
Tendency chart.Fig. 5 is shown in a length of 300-1200nm of light wave, using two-sided pyramid suede structure silicon wafer of just setting as the electricity of silicon base
Pond piece, different side to light and shady face just set pyramid angle combinations under, obtained photogenerated current density circle of equal altitudes.
Battery structure is as shown in Figure 7.
Fig. 6 is the variation of the photogenerated current density under the inverted pyramid structural point combination of different sides to light and shady face
Tendency chart.Fig. 6 shows the battery in a length of 300-1200nm of light wave, based on two-sided inverted pyramid suede structure silicon wafer
Piece, under the inverted pyramid angle combinations of different side to light and shady face, obtained photogenerated current density circle of equal altitudes.Electricity
Pool structure is as shown in Figure 7.
By Fig. 2 compared with Fig. 4, Fig. 5, Fig. 6 it can be concluded that, under respectively optimal angle combinations, Fig. 2 institute is getable
Maximum photogenerated current density is greater than the attainable maximum value of Fig. 4, Fig. 5, Fig. 6 institute.So provided by the invention have V-groove suede
The silicon wafer in face is better than existing technology, is whether just setting pyramid suede structure or inverted pyramid suede structure.
Embodiment 1
Specific battery making step is as follows:
(1) silicon oxide layer of 1 μ m-thick is generated in (100) silicon chip surface using the method for thermal oxide;
(2) the strip photoresist exposure mask of parallel arrangement, the photoetching of front and back sides are made in silicon chip surface by the method for photoetching
Glue exposure mask extending direction is mutually perpendicular to;
(3) oxide etch of photoresist uncovered area is fallen with hydrofluoric acid, then photoresist is removed with acetone, is stayed
Exposure mask of the strip silica of lower parallel arrangement as next step etching;
(4) V-groove structure is etched in silicon wafer tow sides at 80 DEG C with the TMAH of 5wt.%, to the silicon wafer after making herbs into wool
Cleaning doping is carried out, pn-junction is made;
(5) mixed aqueous solution of 2.2M hydrofluoric acid and 4.75M nitric acid, the shady face of single side etching silicon wafer at 20 DEG C are used
6min;
(6) 80nm nitrogen is prepared in the side to light of above-mentioned gained silicon wafer with plasma enhanced chemical vapor deposition (PECVD)
SiClx passivated reflection reducing membrane;
(7) to the shady face of gained silicon wafer, it is blunt that aluminium oxide/silicon nitride successively is prepared with atomic layer deposition (ALD) and PECVD
Change lamination;
(8) to the shady face of gained silicon wafer, windowing processing is carried out to back laminate film with laser, so that outer layer metal aluminium
Layer can be by forming good Ohmic contact with silicon wafer at windowing.It prints electrode finally by the mode of silk-screen printing.
Battery structure made from the present embodiment is as shown in figure 11.The performance test results of the battery are as shown in table 1.Fig. 8, figure
9 scheme for the silicon wafer side to light SEM with V-groove flannelette of the present embodiment.As shown in figure 9, the side wall and silicon of the V-groove of side to light
The angle of the plane of piece macro surface is about 63 °, and the opening width of the V-groove of side to light is about 1.2 μm.Figure 10 is the present embodiment
The silicon wafer shady face section with V-groove flannelette SEM figure.As shown in Figure 10, the side wall of the V-groove of shady face and silicon wafer are macro
The angle for seeing the plane on surface is about 46 °, and the opening width of the V-groove of shady face is about 1.6 μm.The V-groove structure of side to light
Projected area of macro surface in face where it accounts for about the 80% of the side to light gross area, and the V-groove structure of shady face exists
Projected area of macro surface in face accounts for about the 80% of the shady face gross area where it.
Embodiment 2
Specific battery making step is as follows:
(1) silicon oxide layer of 1 μ m-thick is generated in (100) silicon chip surface using the method for thermal oxide;
(2) the strip photoresist exposure mask of parallel arrangement, the photoetching of front and back sides are made in silicon chip surface by the method for photoetching
Glue exposure mask extending direction is mutually perpendicular to;
(3) oxide etch of photoresist uncovered area is fallen with hydrofluoric acid, then photoresist is removed with acetone, is stayed
Exposure mask of the strip silica of lower parallel arrangement as next step etching;
(4) V-groove structure is etched in silicon wafer tow sides at 80 DEG C with the TMAH of 5wt.%, to the silicon wafer after making herbs into wool
Cleaning doping is carried out, pn-junction is made;
(5) mixed aqueous solution of 2.2M hydrofluoric acid and 4.75M nitric acid, the shady face of single side etching silicon wafer at 20 DEG C are used
10min;
(6) 80nm nitrogen is prepared in the side to light of above-mentioned gained silicon wafer with plasma enhanced chemical vapor deposition (PECVD)
SiClx passivated reflection reducing membrane;
(7) to the shady face of gained silicon wafer, it is blunt that aluminium oxide/silicon nitride successively is prepared with atomic layer deposition (ALD) and PECVD
Change lamination;
(8) to the shady face of gained silicon wafer, windowing processing is carried out to back laminate film with laser, so that outer layer metal aluminium
Layer can be by forming good Ohmic contact with silicon wafer at windowing.It prints electrode finally by the mode of silk-screen printing.
Battery structure made from the present embodiment is as shown in figure 11.The performance test results of the battery are as shown in table 1.Side to light
The side wall of V-groove and the angle of plane of silicon wafer macro surface be about 63 °, the opening width of the V-groove of side to light is about 1.2
μm.The angle of the plane of the side wall and silicon wafer macro surface of the V-groove of shady face is about 30 °, and the opening of the V-groove of shady face is wide
Degree is about 1.7 μm.The V-groove structure of side to light projected area of the macro surface in face where it accounts for about the total face of the side to light
Long-pending 60%, the V-groove structure of shady face projected area of the macro surface in face where it account for about the shady face gross area
60%.
Embodiment 3
Specific battery making step is as follows:
(1) silicon oxide layer of 1 μ m-thick is generated in (100) silicon chip surface using the method for thermal oxide;
(2) the strip photoresist exposure mask of parallel arrangement, the photoetching of front and back sides are made in silicon chip surface by the method for photoetching
Glue exposure mask extending direction is mutually perpendicular to;
(3) oxide etch of photoresist uncovered area is fallen with hydrofluoric acid, then photoresist is removed with acetone, is stayed
Exposure mask of the strip silica of lower parallel arrangement as next step etching;
(4) V-groove structure is etched in silicon wafer tow sides at 80 DEG C with the TMAH of 5wt.%, to the silicon wafer after making herbs into wool
Cleaning doping is carried out, pn-junction is made;
(5) mixed aqueous solution of 2.2M hydrofluoric acid and 4.75M nitric acid, the shady face of single side etching silicon wafer at 20 DEG C are used
12min;
(6) 80nm nitrogen is prepared in the side to light of above-mentioned gained silicon wafer with plasma enhanced chemical vapor deposition (PECVD)
SiClx passivated reflection reducing membrane;
(7) to the shady face of gained silicon wafer, it is blunt that aluminium oxide/silicon nitride successively is prepared with atomic layer deposition (ALD) and PECVD
Change lamination;
(8) to the shady face of gained silicon wafer, windowing processing is carried out to back laminate film with laser, so that outer layer metal aluminium
Layer can be by forming good Ohmic contact with silicon wafer at windowing.It prints electrode finally by the mode of silk-screen printing.
Battery structure made from the present embodiment is as shown in figure 11.The performance test results of the battery are as shown in table 1.Side to light
The side wall of V-groove and the angle of plane of silicon wafer macro surface be about 63 °, the opening width of the V-groove of side to light is about 1.2
μm.The angle of the plane of the side wall and silicon wafer macro surface of the V-groove of shady face is about 20 °, and the opening of the V-groove of shady face is wide
Degree is about 1.8 μm.The V-groove structure of side to light projected area of the macro surface in face where it accounts for about the total face of the side to light
Long-pending 90%, the V-groove structure of shady face projected area of the macro surface in face where it account for about the shady face gross area
90%.
Comparative example 1
Specific battery making step is as follows:
(1) silicon oxide layer of 1 μ m-thick is generated in (100) silicon chip surface using the method for thermal oxide;
(2) the strip photoresist exposure mask of parallel arrangement, the photoetching of front and back sides are made in silicon chip surface by the method for photoetching
Glue exposure mask extending direction is mutually perpendicular to;
(3) oxide etch of photoresist uncovered area is fallen with hydrofluoric acid, then photoresist is removed with acetone, is stayed
Exposure mask of the strip silica of lower parallel arrangement as next step etching;
(4) V-groove structure is etched in silicon wafer tow sides at 80 DEG C with the TMAH of 5wt.%, to the silicon wafer after making herbs into wool
Cleaning doping is carried out, pn-junction is made;
(5) mixed aqueous solution of 2.2M hydrofluoric acid and 4.75M nitric acid, the shady face of single side etching silicon wafer at 20 DEG C are used
18min;
(6) 80nm nitrogen is prepared in the side to light of above-mentioned gained silicon wafer with plasma enhanced chemical vapor deposition (PECVD)
SiClx passivated reflection reducing membrane;
(7) to the shady face of gained silicon wafer, it is blunt that aluminium oxide/silicon nitride successively is prepared with atomic layer deposition (ALD) and PECVD
Change lamination;
(8) to the shady face of gained silicon wafer, windowing processing is carried out to back laminate film with laser, so that outer layer metal aluminium
Layer can be by forming good Ohmic contact with silicon wafer at windowing.It prints electrode finally by the mode of silk-screen printing.
Battery structure made from this comparative example is as shown in Figure 10.The performance test results of the battery are as shown in table 1.Side to light
The side wall of V-groove and the angle of plane of silicon wafer macro surface be about 63 °, the opening width of the V-groove of side to light is about 1.2
μm.The V-groove of shady face is almost thrown flat.The projected area of V-groove structure macro surface in face where it of side to light is about
Account for the 80% of the side to light gross area.
Comparative example 2
Specific cell piece making step is as follows:
(1) two-sided making herbs into wool is carried out to the monocrystalline silicon piece of (100) with the method for copper metal catalysis etching, wherein copper nitrate is dense
Degree is 40mM, hydrofluoric acid concentration 5M, hydrogen peroxide concentration 0.8M, handles 5min at 30 DEG C, obtains the inversion gold of side to light
The angle of the plane of the side wall and silicon wafer macro surface of word tower is about 55 °, then carries out cleaning doping to the silicon wafer after making herbs into wool, system
Obtain pn-junction;
(2) single side etching processing is carried out to the shady face of the silicon wafer after step (1) making herbs into wool doping;The single side etching
Processing is carried out by acid etch;The acid etch liquid concentration is the mixed aqueous solution of 2.3M hydrofluoric acid and 4.7M nitric acid;?
5min is handled at 20 DEG C;
(3) 80nm is prepared with the light-receiving surface of plasma enhanced chemical vapor deposition (PECVD) silicon wafer obtained by step (2)
Silicon nitride passivation antireflective film;
(4) to the shady face of silicon wafer obtained by step (3), successively with atomic layer deposition (ALD) and PECVD prepare aluminium oxide/
Silicon nitride passivation lamination;
(5) to the shady face of silicon wafer obtained by step (4), windowing processing is carried out to back laminate film with laser, so that outside
Layer metallic aluminum can be by forming good Ohmic contact with silicon wafer at windowing.Electricity is printed finally by the mode of silk-screen printing
Pole.
Battery structure made from this comparative example is as shown in figure 11.The performance test results of the battery are as shown in table 1.This comparison
Battery made from example has two-sided inverted pyramid suede structure, and shady face inverted pyramid structural point is about 18 °, bottom
About 2-3 μm of side length, side to light inverted pyramid structural point is about 55 °, and bottom sides are about 2-3 μm.The bottom of the pit of side to light
Portion's gross area accounts for about the 80% of the gross area of the light-receiving surface;The bottom gross area of the pit of shady face accounts for the total of the shady face
About the 80% of area.
Table 1
Embodiment 1 | Embodiment 2 | Embodiment 3 | Comparative example 1 | Comparative example 2 | |
Uoc/V | 0.674 | 0.675 | 0.679 | 0.681 | 0.678 |
Isc/A | 9.949 | 9.950 | 9.934 | 9.930 | 9.935 |
FF/% | 81.83 | 81.88 | 81.51 | 80.93 | 81.43 |
Eta/% | 22.49 | 22.54 | 22.53 | 22.43 | 22.48 |
Uoc: open-circuit voltage;Isc: short circuit current;FF: fill factor;Eta: efficiency.
It can be seen that according to the battery performance result in upper table and parallel arrangement all had for side to light and the shady face
V-groove shape pit battery (the V-groove extending direction of front and back sides is mutually perpendicular to), when the angle of its shady face V-groove structure
When within the scope of 20-55 °, that is, embodiment 1,2,3, their short circuit current and efficiency pair fully finished compared to the back side
Ratio 1 all improves a lot, and final efficiency is also higher.In conjunction with comparative example 2 as can be seen that in optical property, front and back sides are prolonged
Stretch the structure that the orthogonal two-sided V-groove structure in direction will also be better than two-sided inverted pyramid.In conclusion with conventional back
Smooth surface is that the structure of polishing is compared, or the structure combined with pyramid flannelette is compared, and the battery with silicon wafer of the invention has
There are higher short circuit current and transfer efficiency, this has benefited from the case where V-groove structure in front and back sides of the present invention combines, cell piece
Whole optical property and electric property is in more preferably equalization point.
Claims (10)
1. a kind of silicon wafer with V-groove flannelette, the silicon wafer has side to light and shady face, wherein the side to light and institute
State the V-groove shape pit that shady face all has parallel arrangement;The extending direction of the V-groove of the side to light and the shady face
The extending direction of V-groove is mutually perpendicular to;The angle of the plane of the side wall of the V-groove of the side to light and the silicon wafer macro surface
It is 50-75 °;The angle of the plane of the side wall of the V-groove of the shady face and the silicon wafer macro surface is 20-55 °.
2. the silicon wafer according to claim 1 with V-groove flannelette, wherein the opening width of the V-groove is 0.5-
5.0μm。
3. the silicon wafer according to claim 2 with V-groove flannelette, wherein the opening width of the V-groove is 1.0-
3.5μm;Preferably, the opening width of the V-groove is 1.5-3 μm.
4. the silicon wafer according to claim 1 with V-groove flannelette, wherein the V-groove structure of the side to light is in its institute
It is not less than the 60% of the side to light gross area in the projected area of the macro surface in face, the V-groove structure of the shady face exists
Projected area of macro surface in face is not less than the 60% of the shady face gross area where it.
5. the silicon wafer according to claim 1 with V-groove flannelette, wherein the side wall of the V-groove of the side to light and institute
The angle for stating the plane of silicon wafer macro surface is 55-70 °.
6. the silicon wafer according to claim 5 with V-groove flannelette, wherein the side wall of the V-groove of the side to light and institute
The angle for stating the plane of silicon wafer macro surface is 60-70 °.
7. the silicon wafer according to claim 1 with V-groove flannelette, wherein the side wall of the V-groove of the shady face and institute
The angle for stating the plane of silicon wafer macro surface is 25-50 °.
8. the silicon wafer according to claim 7 with V-groove flannelette, wherein the side wall of the V-groove of the shady face and institute
The angle for stating the plane of silicon wafer macro surface is 30-45 °;
It is highly preferred that the angle of the plane of the side wall of the V-groove of the shady face and the silicon wafer macro surface is 35-40 °.
9. the application of the silicon wafer according to claim 1 to 8 with V-groove flannelette in solar cells.
10. a kind of solar battery, including grid line, antireflection layer, silicon substrate layer, passivation layer and metal layer, wherein the silicon substrate
Bottom is formed by the silicon wafer of any of claims 1-8 with V-groove flannelette.
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Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4608451A (en) * | 1984-06-11 | 1986-08-26 | Spire Corporation | Cross-grooved solar cell |
US20120273036A1 (en) * | 2011-04-29 | 2012-11-01 | Semiconductor Energy Laboratory Co., Ltd. | Photoelectric conversion device and manufacturing method thereof |
TW201312779A (en) * | 2011-07-29 | 2013-03-16 | Schott Solar Ag | Method for producing a solar cell and solar cell |
CN106684173A (en) * | 2015-11-10 | 2017-05-17 | 财团法人工业技术研究院 | Double-sided photoelectric conversion element |
-
2019
- 2019-05-28 CN CN201910451470.2A patent/CN110120431A/en active Pending
Patent Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4608451A (en) * | 1984-06-11 | 1986-08-26 | Spire Corporation | Cross-grooved solar cell |
US20120273036A1 (en) * | 2011-04-29 | 2012-11-01 | Semiconductor Energy Laboratory Co., Ltd. | Photoelectric conversion device and manufacturing method thereof |
TW201312779A (en) * | 2011-07-29 | 2013-03-16 | Schott Solar Ag | Method for producing a solar cell and solar cell |
CN106684173A (en) * | 2015-11-10 | 2017-05-17 | 财团法人工业技术研究院 | Double-sided photoelectric conversion element |
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