CN110085613A - Imaging sensor and forming method thereof - Google Patents
Imaging sensor and forming method thereof Download PDFInfo
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- CN110085613A CN110085613A CN201910362387.8A CN201910362387A CN110085613A CN 110085613 A CN110085613 A CN 110085613A CN 201910362387 A CN201910362387 A CN 201910362387A CN 110085613 A CN110085613 A CN 110085613A
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- 238000000034 method Methods 0.000 title claims abstract description 62
- 238000003384 imaging method Methods 0.000 title claims abstract description 45
- 239000000758 substrate Substances 0.000 claims abstract description 157
- 230000005622 photoelectricity Effects 0.000 claims abstract description 91
- 230000004888 barrier function Effects 0.000 claims abstract description 33
- 239000000463 material Substances 0.000 claims description 43
- 238000002955 isolation Methods 0.000 claims description 42
- 230000008569 process Effects 0.000 claims description 15
- 238000005530 etching Methods 0.000 claims description 10
- PXHVJJICTQNCMI-UHFFFAOYSA-N Nickel Chemical compound [Ni] PXHVJJICTQNCMI-UHFFFAOYSA-N 0.000 claims description 6
- 239000007769 metal material Substances 0.000 claims description 5
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 claims description 4
- RTAQQCXQSZGOHL-UHFFFAOYSA-N Titanium Chemical compound [Ti] RTAQQCXQSZGOHL-UHFFFAOYSA-N 0.000 claims description 4
- 229910052802 copper Inorganic materials 0.000 claims description 4
- 239000010949 copper Substances 0.000 claims description 4
- 239000010936 titanium Substances 0.000 claims description 4
- WFKWXMTUELFFGS-UHFFFAOYSA-N tungsten Chemical compound [W] WFKWXMTUELFFGS-UHFFFAOYSA-N 0.000 claims description 4
- 229910052721 tungsten Inorganic materials 0.000 claims description 4
- 239000010937 tungsten Substances 0.000 claims description 4
- VYZAMTAEIAYCRO-UHFFFAOYSA-N Chromium Chemical compound [Cr] VYZAMTAEIAYCRO-UHFFFAOYSA-N 0.000 claims description 3
- 239000004411 aluminium Substances 0.000 claims description 3
- 229910052782 aluminium Inorganic materials 0.000 claims description 3
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 claims description 3
- 229910052804 chromium Inorganic materials 0.000 claims description 3
- 239000011651 chromium Substances 0.000 claims description 3
- 229910052759 nickel Inorganic materials 0.000 claims description 3
- 229910052715 tantalum Inorganic materials 0.000 claims description 3
- GUVRBAGPIYLISA-UHFFFAOYSA-N tantalum atom Chemical compound [Ta] GUVRBAGPIYLISA-UHFFFAOYSA-N 0.000 claims description 3
- 229910052719 titanium Inorganic materials 0.000 claims description 3
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical group [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 claims 1
- 239000010931 gold Substances 0.000 claims 1
- 229910052737 gold Inorganic materials 0.000 claims 1
- 239000010410 layer Substances 0.000 description 194
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 23
- 150000002500 ions Chemical class 0.000 description 15
- 239000011241 protective layer Substances 0.000 description 15
- 239000000377 silicon dioxide Substances 0.000 description 11
- 230000003287 optical effect Effects 0.000 description 7
- 238000010586 diagram Methods 0.000 description 4
- 238000005516 engineering process Methods 0.000 description 4
- 239000004065 semiconductor Substances 0.000 description 4
- PNEYBMLMFCGWSK-UHFFFAOYSA-N Alumina Chemical compound [O-2].[O-2].[O-2].[Al+3].[Al+3] PNEYBMLMFCGWSK-UHFFFAOYSA-N 0.000 description 3
- 229910052581 Si3N4 Inorganic materials 0.000 description 3
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 3
- 230000003667 anti-reflective effect Effects 0.000 description 3
- 230000015572 biosynthetic process Effects 0.000 description 3
- 239000011248 coating agent Substances 0.000 description 3
- 238000000576 coating method Methods 0.000 description 3
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- -1 phosphonium ion Chemical class 0.000 description 3
- 239000000049 pigment Substances 0.000 description 3
- 238000000926 separation method Methods 0.000 description 3
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 description 3
- 238000000347 anisotropic wet etching Methods 0.000 description 2
- HAYXDMNJJFVXCI-UHFFFAOYSA-N arsenic(5+) Chemical compound [As+5] HAYXDMNJJFVXCI-UHFFFAOYSA-N 0.000 description 2
- 230000000903 blocking effect Effects 0.000 description 2
- 229910052796 boron Inorganic materials 0.000 description 2
- 238000011161 development Methods 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
- 229910052732 germanium Inorganic materials 0.000 description 2
- GNPVGFCGXDBREM-UHFFFAOYSA-N germanium atom Chemical compound [Ge] GNPVGFCGXDBREM-UHFFFAOYSA-N 0.000 description 2
- 239000012212 insulator Substances 0.000 description 2
- MRELNEQAGSRDBK-UHFFFAOYSA-N lanthanum(3+);oxygen(2-) Chemical compound [O-2].[O-2].[O-2].[La+3].[La+3] MRELNEQAGSRDBK-UHFFFAOYSA-N 0.000 description 2
- 229910052751 metal Inorganic materials 0.000 description 2
- 239000002184 metal Substances 0.000 description 2
- 239000011368 organic material Substances 0.000 description 2
- 229920002120 photoresistant polymer Polymers 0.000 description 2
- 238000012545 processing Methods 0.000 description 2
- 229910052710 silicon Inorganic materials 0.000 description 2
- 239000010703 silicon Substances 0.000 description 2
- 238000004528 spin coating Methods 0.000 description 2
- IATRAKWUXMZMIY-UHFFFAOYSA-N strontium oxide Chemical compound [O-2].[Sr+2] IATRAKWUXMZMIY-UHFFFAOYSA-N 0.000 description 2
- OGIDPMRJRNCKJF-UHFFFAOYSA-N titanium oxide Inorganic materials [Ti]=O OGIDPMRJRNCKJF-UHFFFAOYSA-N 0.000 description 2
- ZOXJGFHDIHLPTG-UHFFFAOYSA-N Boron Chemical compound [B] ZOXJGFHDIHLPTG-UHFFFAOYSA-N 0.000 description 1
- 229910001218 Gallium arsenide Inorganic materials 0.000 description 1
- 229910000577 Silicon-germanium Inorganic materials 0.000 description 1
- GWEVSGVZZGPLCZ-UHFFFAOYSA-N Titan oxide Chemical compound O=[Ti]=O GWEVSGVZZGPLCZ-UHFFFAOYSA-N 0.000 description 1
- CKUAXEQHGKSLHN-UHFFFAOYSA-N [C].[N] Chemical compound [C].[N] CKUAXEQHGKSLHN-UHFFFAOYSA-N 0.000 description 1
- WUNIMIODOAGQAW-UHFFFAOYSA-N [O-2].[Ba+2].[Ti+4] Chemical compound [O-2].[Ba+2].[Ti+4] WUNIMIODOAGQAW-UHFFFAOYSA-N 0.000 description 1
- ILCYGSITMBHYNK-UHFFFAOYSA-N [Si]=O.[Hf] Chemical compound [Si]=O.[Hf] ILCYGSITMBHYNK-UHFFFAOYSA-N 0.000 description 1
- 229910021417 amorphous silicon Inorganic materials 0.000 description 1
- 125000002915 carbonyl group Chemical group [*:2]C([*:1])=O 0.000 description 1
- 230000008859 change Effects 0.000 description 1
- 238000006243 chemical reaction Methods 0.000 description 1
- 238000005229 chemical vapour deposition Methods 0.000 description 1
- 239000004020 conductor Substances 0.000 description 1
- 238000010276 construction Methods 0.000 description 1
- 238000000151 deposition Methods 0.000 description 1
- 230000008021 deposition Effects 0.000 description 1
- 238000009713 electroplating Methods 0.000 description 1
- 239000011521 glass Substances 0.000 description 1
- 229910000449 hafnium oxide Inorganic materials 0.000 description 1
- WIHZLLGSGQNAGK-UHFFFAOYSA-N hafnium(4+);oxygen(2-) Chemical compound [O-2].[O-2].[Hf+4] WIHZLLGSGQNAGK-UHFFFAOYSA-N 0.000 description 1
- 238000005286 illumination Methods 0.000 description 1
- 238000005468 ion implantation Methods 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- 238000005259 measurement Methods 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 229910021421 monocrystalline silicon Inorganic materials 0.000 description 1
- BPUBBGLMJRNUCC-UHFFFAOYSA-N oxygen(2-);tantalum(5+) Chemical compound [O-2].[O-2].[O-2].[O-2].[O-2].[Ta+5].[Ta+5] BPUBBGLMJRNUCC-UHFFFAOYSA-N 0.000 description 1
- RVTZCBVAJQQJTK-UHFFFAOYSA-N oxygen(2-);zirconium(4+) Chemical compound [O-2].[O-2].[Zr+4] RVTZCBVAJQQJTK-UHFFFAOYSA-N 0.000 description 1
- 229910021420 polycrystalline silicon Inorganic materials 0.000 description 1
- 229920005591 polysilicon Polymers 0.000 description 1
- 230000005855 radiation Effects 0.000 description 1
- 238000012216 screening Methods 0.000 description 1
- 229910052814 silicon oxide Inorganic materials 0.000 description 1
- 230000003068 static effect Effects 0.000 description 1
- CZXRMHUWVGPWRM-UHFFFAOYSA-N strontium;barium(2+);oxygen(2-);titanium(4+) Chemical compound [O-2].[O-2].[O-2].[O-2].[Ti+4].[Sr+2].[Ba+2] CZXRMHUWVGPWRM-UHFFFAOYSA-N 0.000 description 1
- 229910001936 tantalum oxide Inorganic materials 0.000 description 1
- 238000002834 transmittance Methods 0.000 description 1
- 239000012780 transparent material Substances 0.000 description 1
- 239000002699 waste material Substances 0.000 description 1
- 229910001928 zirconium oxide Inorganic materials 0.000 description 1
- GFQYVLUOOAAOGM-UHFFFAOYSA-N zirconium(iv) silicate Chemical compound [Zr+4].[O-][Si]([O-])([O-])[O-] GFQYVLUOOAAOGM-UHFFFAOYSA-N 0.000 description 1
Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
- H01L27/144—Devices controlled by radiation
- H01L27/146—Imager structures
- H01L27/14601—Structural or functional details thereof
- H01L27/1462—Coatings
- H01L27/14623—Optical shielding
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
- H01L27/144—Devices controlled by radiation
- H01L27/146—Imager structures
- H01L27/14601—Structural or functional details thereof
- H01L27/14625—Optical elements or arrangements associated with the device
- H01L27/14629—Reflectors
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
- H01L27/144—Devices controlled by radiation
- H01L27/146—Imager structures
- H01L27/14601—Structural or functional details thereof
- H01L27/1463—Pixel isolation structures
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
- H01L27/144—Devices controlled by radiation
- H01L27/146—Imager structures
- H01L27/14643—Photodiode arrays; MOS imagers
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
- H01L27/144—Devices controlled by radiation
- H01L27/146—Imager structures
- H01L27/14683—Processes or apparatus peculiar to the manufacture or treatment of these devices or parts thereof
- H01L27/14685—Process for coatings or optical elements
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
- H01L27/144—Devices controlled by radiation
- H01L27/146—Imager structures
- H01L27/14683—Processes or apparatus peculiar to the manufacture or treatment of these devices or parts thereof
- H01L27/14689—MOS based technologies
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- Physics & Mathematics (AREA)
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Electromagnetism (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Solid State Image Pick-Up Elements (AREA)
Abstract
A kind of imaging sensor and forming method thereof, method includes: offer substrate, and the substrate includes the first pixel region, the second pixel region and the isolated area between the first pixel region and the second pixel region；The first photoelectricity doped region is formed in first pixel region of substrate；Multiple the second mutually discrete photoelectricity doped regions are formed in second pixel region of substrate；Groove is formed in the substrate isolated area；Conductive layer is formed on the bottom portion of groove surface and sidewall surfaces；Barrier bed is formed on substrate the first pixel region surface.The method improves the performance of imaging sensor.
Description
Technical field
The present invention relates to field of semiconductor manufacture more particularly to a kind of imaging sensor and forming method thereof.
Background technique
Imaging sensor is a kind of semiconductor devices for converting optical signal into electric signal.Currently, cmos image sensor
Have been widely used for static digital camera, DV, medical photographic device and automobile-used photographic device etc..
In the image sensor, dark current is inevitable, and is a Specifeca tion speeification.Preferably to monitor
The pixel unit of shading and the light receiving unit of color pixel cells, the wherein shading is arranged in dark current in the image sensor
Pixel unit be referred to as black picture element unit (also referred to as optical black unit).Black picture element unit is used in dark state
Generate picture element signal a reference value, to prevent due to temperature change etc. caused by signal level variation.
However, in the prior art, the light receiving unit of black picture element unit will receive the outside from imaging sensor
Stray radiation influence, to bring interference to dark current measurement.
Summary of the invention
The technical problem to be solved by the present invention is to provide a kind of imaging sensors and forming method thereof, to improve imaging sensor
Performance.
In order to solve the above technical problems, the present invention provides a kind of forming method of imaging sensor, comprising: substrate is provided,
The substrate includes the first pixel region, the second pixel region and the isolated area between the first pixel region and the second pixel region；
The first photoelectricity doped region is formed in first pixel region of substrate；Multiple mutual points are formed in second pixel region of substrate
The second vertical photoelectricity doped region；Groove is formed in the substrate isolated area；In the bottom portion of groove surface and sidewall surfaces shape
At conductive layer；Barrier bed is formed on substrate the first pixel region surface.
Optionally, the thickness range of the conductive layer is 2100 angstroms~2400 angstroms.
Optionally, the material of the conductive layer is metal material；The metal material includes: copper, tungsten, nickel, chromium, titanium, tantalum
With one of aluminium or multiple combinations.
Optionally, the material of the barrier bed is identical with the material of the conductive layer.
Optionally, during forming the conductive layer, the barrier bed is formed.
Optionally, the forming method of the barrier bed and conductive layer includes: on the first pixel region of substrate and isolated area surface
Form initial conductive layer, the initial conductive layer covering bottom portion of groove surface and sidewall surfaces；Positioned at substrate the first pixel region table
The initial conductive layer in face is barrier bed, is conductive layer positioned at the initial conductive layer of bottom portion of groove surface and sidewall surfaces.
Optionally, the forming method of the groove includes: in first pixel region of substrate, the second pixel region and isolated area
Surface forms the first patterned layer, and first patterned layer exposes substrate isolated area；It is to cover with first patterned layer
Film etched substrate forms the groove in substrate isolated area.
Optionally, further includes: form grid layer on substrate the second pixel region surface, the grid layer is located at adjacent the
The second pixel region of substrate surface between two photoelectricity doped regions；The grid layer is connect with conductive layer.
Optionally, the material of the grid layer is identical with the material of the conductive layer.
Optionally, it the grid layer and conductive layer forming method: is formed just in the first pixel region of substrate and isolated area surface
Beginning conductive layer, the initial conductive layer are also located at the second pixel region of substrate surface；Second is formed in the initial conduction layer surface
Patterned layer, the initial conductive layer of the covering of second graphical layer first pixel region and isolated area, the second graphical layer
Interior to have opening, described be open exposes the initial conduction layer surface of the second pixel region of part；It is with the second graphical layer
Exposure mask, the initial conductive layer of etching removal second pixel region exposed that is open, forms on the second pixel region of substrate surface
Grid layer has grid groove between adjacent gate compartment.
Optionally, the substrate has opposite the first face and the second face；The substrate further include: be located at the second picture of substrate
It is described shallow with the shallow groove isolation layer in substrate isolated area and the deep trench isolation floor in the second pixel region of substrate in plain area
Trench isolation layer is between adjacent second photoelectricity doped region and isolated area and the first pixel region and isolated area and the second pixel
The intersection in area, the first face of substrate surface expose the shallow groove isolation layer；The substrate further include: be located at the second picture of substrate
Deep trench isolation floor in plain area, the deep trench isolation layer between adjacent second photoelectricity doped region and isolated area with
The intersection of second pixel region, the second face of substrate expose the deep trench isolation layer；The groove top and the second face of substrate
Surface flushes.
Optionally, the bottom portion of groove exposes shallow groove isolation layer.
Optionally, the depth bounds of the groove are 1.5um~2.5um.
Being formed by imaging sensor the present invention also provides a kind of use any one of the above method includes: substrate, described
Substrate includes the first pixel region, the second pixel region and the isolated area between the first pixel region and the second pixel region；It is located at
The first photoelectricity doped region in first pixel region of substrate；It is multiple mutually discrete in second pixel region of substrate
Second photoelectricity doped region；Groove in the substrate isolated area；Positioned at leading for the bottom portion of groove surface and sidewall surfaces
Electric layer；Barrier bed is formed positioned at substrate the first pixel region surface.
Compared with prior art, the technical solution of the embodiment of the present invention has the advantages that
In the forming method for the imaging sensor that technical solution of the present invention provides, the groove is located at the first photoelectricity doped region
Between the second photoelectricity doped region, then conductive layer is between the first photoelectricity doped region and the second photoelectricity doped region.When light into
When entering to the second pixel region, some light is reflected in conductive layer surface, therefore the conductive layer can stop from substrate second
The light of pixel region enters the first photoelectricity doped region, so that the light for reducing the second pixel region of substrate adulterates the first photoelectricity
The influence in area, so that the accuracy of the dark current signals of the first pixel region improves.On the other hand, the conductive layer connects with substrate
Touching, can export the dark current in substrate.Since the conductive layer has the function of stopping light, it is avoided that and additionally re-forms resistance
Structure is kept off, area has been saved.To sum up, the performance of imaging sensor is improved.
Further, the depth of groove is deeper, blocks neighbouring light and enters the first photoelectricity doped region, avoids pair
The crosstalk of first photoelectricity doped region, so that the accuracy of the first pixel region dark current signals obtained improves.Also, it is described recessed
Groove depth is deeper, and the contact area of conductive layer and substrate is larger, is conducive to the export of dark current, to improve imaging sensor
Performance.
Detailed description of the invention
Fig. 1 to Fig. 2 is a kind of structural schematic diagram of imaging sensor forming process；
Fig. 3 to Fig. 9 is the structural schematic diagram of imaging sensor forming process in one embodiment of the invention.
Specific embodiment
As described in background, the performance of the imaging sensor of the prior art is poor.
Fig. 1 to Fig. 2 is a kind of structural schematic diagram of imaging sensor forming process.
With reference to Fig. 1, substrate 100 is provided, the substrate 100 includes the first pixel region A, the second pixel region B and logic area C,
For the first pixel region A between the second pixel region B and logic area C, the first pixel region A is adjacent with the second pixel region B,
And the first pixel region A is adjacent with logic area C, the substrate 100 has opposite the first face and the second face；In the substrate
The first photoelectricity doped region 110 is formed in 100 first pixel region A；The second photoelectricity is formed in the 100 second pixel region B of substrate
Doped region 120；Fleet plough groove isolation structure 130 is formed in the substrate 100, and the first face of the substrate 100 exposes shallowly
Groove isolation construction 130；Interconnection layer 140 is formed in 100 first face of substrate；After forming interconnection layer 140, in the substrate
Deep trench isolation structure 150 is formed in 100, and the second face of the substrate 100 exposes deep trench isolation structure 150, it is described
Deep trench isolation structure 150 is between adjacent second pixel region B and the first pixel region A and the second pixel region B；Form institute
After stating deep trench isolation structure 150, groove 101 is formed in the 100 first pixel region A of substrate, the groove 101 is close to the
One photoelectricity doped region 110, the first photoelectricity doped region 110 is between groove 101 and the second photoelectricity doped region 120.
With reference to Fig. 2, articulamentum 102 is formed in 101 bottom surface of groove and sidewall surfaces；Form articulamentum process
In, barrier bed 103 is formed in the substrate surface of the first pixel region A.
In the forming method of above-mentioned imaging sensor, the first pixel region A is black picture element area (black pixel),
The second pixel region B is Colored pixels area, and articulamentum 102 is located at the first pixel region A for exporting the dark electricity of the second pixel region B
Stream avoids the device performance for influencing logic area C.The groove 101 is between the first photoelectricity doped region 110 and logic area, energy
Dark current in first pixel region A is also exported, avoids the influence of the device performance to logic area C, the groove 101 is located at the
Between one photoelectricity doped region 110 and the second logic area B, it is difficult to export the dark current in the first pixel region A.The doping of first photoelectricity
Area 110 is the photosensitive area in black picture element area, and barrier bed 103 can stop the light at the top of the first pixel region of substrate A to enter first
Photoelectricity doped region 110.
The above method is formed by imaging sensor, and deep trench isolation structure 150 is used to be isolated between adjacent pixel area
Electrical crosstalk, material used by the deep trench isolation structure 150 is silica, and silica is transparent material, cannot be prevented
Optical crosstalk between adjacent pixel area.Optical crosstalk between adjacent pixel area in order to prevent, the deep trench isolation structure 150 are adopted
With the mixed structure of high K medium material and silica, high K is non-high transmittance material, can stop the light of the second pixel region B into
Enter to the first photoelectricity doped region 110.
However, still having some light from fleet plough groove isolation structure even if improving the material of deep trench isolation structure 150
Gap between 130 and deep trench isolation structure 150 enters the first photoelectricity doped region 110, so that the first photoelectricity adulterates
The dark current that area 110 is excited increases, and causes the dark current data deviation obtained of the first photoelectricity doped region 110 larger, influences
The performance of imaging sensor.
In the present invention, substrate is provided, the substrate includes the first pixel region and the second pixel region；In the first pixel region of substrate
The first photoelectricity doped region of interior formation；The first photoelectricity doped region is formed in first pixel region of substrate；In the substrate second
The second photoelectricity doped region is formed in pixel region；Conductive layer is formed between the second photoelectricity doped region and the first photoelectricity doped region.Institute
Stating conductive layer can stop the light from the second pixel region of substrate to enter the first photoelectricity doped region, to reduce the second picture of substrate
Influence of the light in plain area to the first photoelectricity doped region, so that the accuracy of the dark current signals of the first pixel region improves, thus
Improve the performance of imaging sensor.
To make the above purposes, features and advantages of the invention more obvious and understandable, with reference to the accompanying drawing to the present invention
Specific embodiment be described in detail.
" surface " in this specification is not limited to directly contact for describing the relative positional relationship in space.
Fig. 3 to Fig. 9 is the structural schematic diagram of imaging sensor forming process in one embodiment of the invention.
Referring to FIG. 3, providing substrate 200, the substrate 200 includes the first pixel region I, the second pixel region II and is located at
Isolated area III between first pixel region I and the second pixel region II.
In the present embodiment, the material of the substrate 200 is monocrystalline silicon.The substrate 200 can also be polysilicon or amorphous
Silicon.The material of the substrate 200 can also be the semiconductor materials such as germanium, SiGe, GaAs.The substrate 200 can be with
For other kinds of substrates such as the silicon substrate on insulator, the germanium substrate on insulator or glass substrates.
The substrate 200 is used to provide Process ba- sis for the formation of imaging sensor.
In the present embodiment, imaging sensor to be formed is back-illuminated cmos image sensors.In other embodiments,
Imaging sensor is positive illuminated cmos image sensor.
There is well region in the substrate 200, there are the first Doped ions in the well region.In the present embodiment, described
One Doped ions are P-type ion.In other embodiments, first Doped ions are N-type ion.P-type ion include boron from
Son, the N-type ion include phosphonium ion or arsenic ion.
The first photoelectricity doped region 211 is formed in the first pixel region I of the substrate 200.
Multiple the second mutually discrete photoelectricity doped regions 212 are formed in the second pixel region II of the substrate 200.
The first photoelectricity doped region 211 and the second photoelectricity doped region 212 are for absorbing light and carrying out photoelectric conversion.
In the present embodiment, have in the first photoelectricity doped region 211 and the second photoelectricity doped region 212 second adulterate from
The conduction type of son, second Doped ions is opposite with the conduction type of the first Doped ions.
In the present embodiment, second Doped ions are N-type ion, such as: phosphonium ion or arsenic ion.In other implementations
In example, second Doped ions are P-type ion, such as: boron ion.
Due in the second Doped ions and well region in the first photoelectricity doped region 211 and the second photoelectricity doped region 212
The first Doped ions conduction type on the contrary, therefore, constitute photodiode.The photodiode is used for will be in incident light
Converting photons be electronics.
In the present embodiment, the formation process of the first photoelectricity doped region 211 and the second photoelectricity doped region 212 includes:
Ion implantation technology.
The substrate 200 has opposite the first face and the second face.
In the present embodiment, further includes: form shallow groove isolation layer 220, the shallow groove isolation layer in the substrate 200
220 between the second adjacent photoelectricity doped region 212 and the first photoelectricity doped region 211 and the second photoelectricity doped region 212 it
Between.
The substrate further include: the shallow trench in 200 second pixel region II of substrate and in 200 isolated area III of substrate
Separation layer 220, the shallow groove isolation layer 220 is between adjacent second photoelectricity doped region 212, isolated area III and the first picture
Between plain area I and between isolated area III and the second pixel region II, the first face of the substrate 200 exposes the shallow trench
Separation layer 220.
The shallow groove isolation layer 220 is realized between the second adjacent photoelectricity doped region 212 and the first photoelectricity doped region
Isolation between 211 and the second adjacent photoelectricity doped region 212, prevents from leaking electricity between adjacent photo doped region.
In the present embodiment, the material of the shallow groove isolation layer 220 includes silica.
The substrate further include: the deep trench isolation layer 240 in 200 second pixel region II of substrate, the deep trench
Separation layer 240 is between adjacent second photoelectricity doped region 212 and between isolated area III and the second pixel region II, the lining
Second face at bottom 200 exposes the deep trench isolation layer 240.
The deep trench isolation layer 240 is realized between the second adjacent photoelectricity doped region 212 and the first photoelectricity doped region
Isolation between 211 and the second adjacent photoelectricity doped region 212, prevents the optical crosstalk between adjacent photo doped region.
In the present embodiment, the deep trench isolation layer 240 includes first layer and the second layer positioned at the first layer surface；It is described
The material of first layer is high K medium material (dielectric coefficient is greater than 3.9)；The high K medium material include hafnium oxide, zirconium oxide,
Hafnium silicon oxide, lanthana, zirconium silicon oxide, titanium oxide, tantalum oxide, strontium barium oxide titanium, barium monoxide titanium, strontium oxide strontia titanium or aluminium oxide；
The material of the second layer is silica.
In one embodiment, the material of the deep trench isolation layer 240 includes silica.
In the present embodiment, described image sensor is back side illumination image sensor, the forming method of described image sensor
Further include: interconnection layer 230 is formed on the 200 first face surface of substrate.
The interconnection layer 230 is for being handled and being transmitted the information of the second photoelectricity doped region 212.
The interconnection layer 230 includes plug and multiple layer metal conductor layer, and the material of the metal carbonyl conducting layer is copper.
Referring to FIG. 4, forming the on the 200 first pixel region I of substrate, the second pixel region II and the surface isolated area III
One patterned layer 202, first patterned layer 202 expose 200 isolated area III of substrate.
Specifically, forming the first patterned layer 202 on the 200 second face surface of substrate.
In the present embodiment, the material of first patterned layer 202 is photoresist.
The process for forming first patterned layer 202 includes: to form initial first in 200 second face surface spin coating of substrate
Figure layer (not shown)；Processing is exposed to initial first figure layer；Initial first figure layer after exposure is carried out at development
Reason removes initial first figure layer of part isolated area III, exposes 200 surface of substrate of isolated area III, forms described first
Patterned layer 202.
In one embodiment, first patterned layer is hard mask layer, and the material of the hard mask layer includes: silicon nitride
Or silica.
It in the present embodiment, is formed before the first patterned layer 202, further includes: in the 200 first pixel region I of substrate, the
Two pixel region II and the second face surface isolated area III form protective layer 201, and first patterned layer 202 is located at protective layer 201
Surface.
The protective layer 201 is for isolation liner bottom 200 and the barrier bed being subsequently formed.
The material of the protective layer 201 includes silica, silicon nitride, silicon oxynitride, silicon oxide carbide, carbonitride of silicium or carbon nitrogen
Silica.
In the present embodiment, the material of the protective layer 201 is silica.
The protective layer 201 with a thickness of 300 angstroms~500 angstroms.
The thickness of the protective layer 201 protects the effect of substrate 200 limited less than 300 angstroms；201 thickness of protective layer
Greater than 500 angstroms, translucency dies down, and influence to enter the second photoelectricity doped region 212 enters light quantity.
In other embodiments, protective layer is not formed.
It in the present embodiment, is formed before protective layer 201, further includes: form dielectric on 200 second face surface of semiconductor substrate
Antireflection layer, the dielectric antireflective layer are used to increase the transmitance of light.
In other embodiments, dielectric antireflective layer is not formed.
In the present embodiment, further includes: form anti-reflection coating in the dielectric antireflective layer surface, the anti-reflection coating is used
In the reflection for reducing light.
In other embodiments, anti-reflection coating is not formed.
Referring to FIG. 5, with first patterned layer 202 for mask etching substrate 200, in 200 isolated area III of substrate
Form the groove 203.
The groove 203 is between the first photoelectricity doped region 211 and the second photoelectricity doped region 212.
The top of the groove 203 is located at the second face of the substrate 200.
Technique with the substrate 200 that first patterned layer 202 is mask etching isolated area III includes anisotropic
Dry etch process or anisotropic wet-etching technology.
In the present embodiment, the technique for the substrate 200 for being mask etching isolated area III with first patterned layer 202 is
Anisotropic dry etch process.
In the present embodiment, after forming the groove 203, further includes: removal first patterned layer 202, described in removal
The technique of first patterned layer 202 is cineration technics.
The groove 203 is then subsequently formed between the first photoelectricity doped region 211 and the second photoelectricity doped region 212
Conductive layer in groove 203 is between the first photoelectricity doped region 211 and the second photoelectricity doped region 212.The position of the groove 203
Position and the depth that conductive layer is determined with depth are set, the position of conductive layer and depth are determined to 200 second pixel region of substrate
The blocking effect of the light of II.
The depth bounds of the groove are 1.5um~2.5um.
In the present embodiment, 203 bottom-exposed of groove goes out shallow groove isolation layer 220.
203 bottom-exposed of groove goes out shallow groove isolation layer 220, then 203 depth of groove is deeper, blocks neighbouring light
Line enters the first photoelectricity doped region 211, avoids the crosstalk to the first photoelectricity doped region 211, so that the first pixel region I is obtained
The accuracy of the dark current signals obtained improves.Also, 203 depth of groove is deeper, the conductive layer being subsequently formed and substrate 200
Contact area it is larger, be conducive to the export of dark current, to improve the performance of imaging sensor.
Then, conductive layer is formed in 203 bottom and side wall of groove.
In the present embodiment, the forming method of described image sensor further include: in the 200 first pixel region I table of substrate
Face forms barrier bed.
In the present embodiment, the barrier bed is also connect with the conductive layer.In other embodiments, the barrier bed with it is described
Conductive layer is not connected to.
In the present embodiment, the material of the barrier bed is identical with the material of the conductive layer.In other embodiments, the screening
The material of barrier is different with the material of the conductive layer.
In the present embodiment, during forming the conductive layer, the barrier bed is formed.It is described to lead in other embodiments
Electric layer and barrier bed are not formed simultaneously.
In the present embodiment, the forming method of described image sensor further include: in the 200 second pixel region II table of substrate
Face forms grid layer, and the grid layer is connect with conductive layer.
In the present embodiment, the material of the grid layer is identical with the material of the conductive layer.In other embodiments, the grid
The material of compartment is different with the material of the conductive layer.
The forming method of the conductive layer, barrier bed and grid layer please refers to Fig. 6 to Fig. 8.
Referring to FIG. 6, initial conductive layer 204 is formed in 200 first pixel region I of substrate and the surface isolated area III, it is described first
Beginning conductive layer 204 covers 203 bottom surface of groove and sidewall surfaces.
In the present embodiment, the initial conductive layer 204 also covers 200 second surface pixel region II of substrate.
In the present embodiment, in the protective layer of the 200 first pixel region I of substrate, the second pixel region II and isolated area III
Initial conductive layer 204 is formed in 201 surfaces and groove 203.
In one embodiment, the initial conductive layer 204 fills the full groove.
The initial conductive layer 204 provides material layer to be subsequently formed conductive layer, barrier bed and grid layer.
The material of the initial conductive layer 204 is metal material, and the metal material includes: copper, tungsten, nickel, chromium, titanium, tantalum
With one of aluminium or multiple combinations.
In the present embodiment, the material of the initial conductive layer 204 is tungsten.
Formed the initial conductive layer 204 technique include: physical gas-phase deposition, chemical vapor deposition process or
Electroplating technology.
The thickness range of the initial conductive layer 204 is 2100 angstroms~2400 angstroms.
The thickness of the initial conductive layer 204 determines the thickness for the conductive layer being subsequently formed.The conductive layer thickness mistake
Thin, the blocking effect of conductive layer is bad；The conductive layer thickness is blocked up, and technique is be easy to cause to waste.
Referring to FIG. 7, forming second graphical layer 205, the second graphical layer on 204 surface of initial conductive layer
The initial conductive layer 204 of 205 covering the first pixel region I and isolated area III, the second graphical layer 205 is interior to have opening
206, the opening 206 exposes 204 surface of initial conductive layer of part the second pixel region II.
The second graphical layer 205 provides exposure mask to form grid layer.
The opening 206 exposes the initial conductive layer 204 on 212 surface of the second photoelectricity doped region in the second pixel region II
Surface.
In the present embodiment, the material of the second graphical layer 205 is photoresist.
The process for forming the second graphical layer 205 includes: to form initial second in 204 surface spin coating of initial conductive layer
Figure layer (not shown)；Processing is exposed to initial second figure layer；Initial second figure layer after exposure is carried out at development
Reason removes initial second figure layer of the second pixel region of part II, exposes 204 surface of initial conductive layer, forms second figure
Shape layer 205.
In one embodiment, the second graphical layer is hard mask layer, and the material of the hard mask layer includes: silicon nitride
Or silica.
Referring to FIG. 8, being exposure mask with the second graphical layer 205, etching removes second that the opening 206 exposes
The initial conductive layer 204 of pixel region II forms grid layer 250, adjacent cells on 200 second the second face surface pixel region II of substrate
There is grid groove 207 between layer 250.
The protective layer 201 on substrate 200 surface of the grid layer 250 between the second adjacent photoelectricity doped region 212
Surface.
It is formed during grid layer 250, the initial conductive layer 204 of the substrate 200 first pixel region I and isolated area III
Be formed as barrier bed 270, and the initial conductive layer 204 of 203 bottom surface of the groove and sidewall surfaces is formed as conductive layer
260。
In implementing one, the conductive layer fills full groove 203.
Barrier bed 270 is located at 211 surface of the first photoelectricity doped region, can stop incident from above the first photoelectricity doped region 211
Light, influence of the light for avoiding the top of the first photoelectricity doped region 211 incident to the first photoelectricity doped region 211.
It is exposure mask with the second graphical layer 205 in the present embodiment, the second picture that etching removal opening 206 exposes
The initial conductive layer 204 of plain area II, until 201 surface of protective layer of the second pixel region II is exposed, the second pixel region II's
Protective layer 201 forms grid layer 250, has grid groove 207 between adjacent gate compartment 250, the grid groove 207 exposes
201 surface of protective layer.
The grid groove 207 provides space to be subsequently formed filter layer.
The technique of the initial conductive layer 204 for the second pixel region II that etching removal opening 206 exposes includes anisotropy
Dry etch process or anisotropic wet-etching technology.
In the present embodiment, the technique of the initial conductive layer 204 for the second pixel region II that etching removal opening 206 exposes is
Anisotropic dry etch process.
Conductive layer 260 is between the first photoelectricity doped region 211 and the second photoelectricity doped region 212.When light enters
When two pixel region I, some light reflects on 260 surface of conductive layer, therefore the conductive layer 260 can stop from substrate 200
The light of second pixel region II enters the first photoelectricity doped region 211, to reduce the light pair of the second pixel region of substrate II
The influence of first photoelectricity doped region 211, so that the accuracy of the dark current signals of the first pixel region I improves.On the other hand, described
Conductive layer 260 is in contact with substrate 200, can export the dark current in substrate 200.Stop since the conductive layer 260 has
The effect of light is avoided that and additionally re-forms barrier structure, saved area.To sum up, the performance of imaging sensor is improved.
In the present embodiment, 203 depth of groove is deeper, and the conductive layer 260 blocks neighbouring light and enters
One photoelectricity doped region 211 avoids the crosstalk to the first photoelectricity doped region 211, so that the dark electricity obtained of the first pixel region 211
The accuracy for flowing signal improves.Also, 203 depth of groove is deeper, and conductive layer 260 and the contact area of substrate 200 are larger,
Be conducive to the export of dark current, to improve the performance of imaging sensor.
Referring to FIG. 9, after forming the grid layer 250, further includes: remove the second graphical layer 205.
The technique for removing the second graphical layer 205 is cineration technics.
In the present embodiment, further includes: form filter layer in the grid groove 207 of the second pixel region II；Form filter
After photosphere, lens jacket is formed in the filter surfaces.
The material of the filter layer includes the organic material doped with pigment.The organic material doped with pigment, can
With according to doping pigment difference, selection can by colored light.
Natural light is white light made of the set of multiple color of light, and natural light is after colour light filter layer, and only part is specific
The colored light of wavelength can pass through, to generate specific colored light.
The lens jacket is for changing optical path, so that light enters the second photoelectricity of the second pixel region II along specific optical path
Doped region 212.
Correspondingly, the embodiment of the present invention also provide it is a kind of imaging sensor is formed by using the above method, with reference to Fig. 9,
It include: substrate 200, the substrate 200 is including the first pixel region I, the second pixel region II and is located at the first pixel region I and second
Isolated area III between pixel region II；The first photoelectricity doped region 211 in the 200 first pixel region I of substrate；It is located at
The second photoelectricity doped region 212 in the 200 second pixel region II of substrate；It is recessed in the 200 isolated area III of substrate
Slot；Conductive layer 260 positioned at the bottom portion of groove surface and sidewall surfaces.
Described image sensor further include: the barrier bed 270 positioned at 200 first surface pixel region I of substrate, and it is described
Barrier bed 270 is also located at 200 surface isolated area III of substrate；The barrier bed 270 is connect with conductive layer 260.
Described image sensor further include: the grid layer 250 positioned at 200 second surface pixel region II of substrate, it is described
Substrate 200 second pixel region II surface of the grid layer 250 between adjacent second photoelectricity doped region 212, the grid layer 250
It is connect with conductive layer 260.
The substrate 200 is no longer described in detail referring to the record of Fig. 3 and previous embodiment.
The conductive layer 260, barrier bed 270 and grid layer 250 are no longer described in detail with reference to the record of Fig. 9 and previous embodiment.
Although present disclosure is as above, present invention is not limited to this.Anyone skilled in the art are not departing from this
It in the spirit and scope of invention, can make various changes or modifications, therefore protection scope of the present invention should be with claim institute
Subject to the range of restriction.
Claims (15)
1. a kind of forming method of imaging sensor characterized by comprising
Substrate is provided, the substrate is including the first pixel region, the second pixel region and is located at the first pixel region and the second pixel region
Between isolated area；
The first photoelectricity doped region is formed in first pixel region of substrate；
Multiple the second mutually discrete photoelectricity doped regions are formed in second pixel region of substrate；
Groove is formed in the substrate isolated area；
Conductive layer is formed on the bottom portion of groove surface and sidewall surfaces；
Barrier bed is formed on substrate the first pixel region surface.
2. the forming method of imaging sensor according to claim 1, which is characterized in that the thickness range of the conductive layer
It is 2100 angstroms~2400 angstroms.
3. the forming method of imaging sensor according to claim 1, which is characterized in that the material of the conductive layer is gold
Belong to material；The metal material includes: one of copper, tungsten, nickel, chromium, titanium, tantalum and aluminium or multiple combinations.
4. the forming method of imaging sensor according to claim 1, which is characterized in that the material of the barrier bed and institute
The material for stating conductive layer is identical.
5. the forming method of imaging sensor according to claim 1, which is characterized in that the barrier bed is also led with described
Electric layer connection.
6. the forming method of imaging sensor according to claim 5, which is characterized in that form the process of the conductive layer
In, form the barrier bed.
7. the forming method of imaging sensor according to claim 6, which is characterized in that the barrier bed and conductive layer
Forming method includes: to form initial conductive layer in the first pixel region of substrate and isolated area surface, and the initial conductive layer covering is recessed
Bottom surface and sidewall surfaces；Initial conductive layer positioned at the first pixel region of substrate surface is barrier bed, is located at bottom portion of groove
The initial conductive layer of surface and sidewall surfaces is conductive layer.
8. the forming method of imaging sensor according to claim 1, which is characterized in that the forming method packet of the groove
It includes: forming the first patterned layer on first pixel region of substrate, the second pixel region and isolated area surface, described first is graphical
Layer exposes substrate isolated area；Using first patterned layer as mask etching substrate, formed in substrate isolated area described recessed
Slot.
9. the forming method of imaging sensor according to claim 1, which is characterized in that further include: in the substrate
Two pixel region surfaces form grid layer, substrate second pixel region table of the grid layer between adjacent second photoelectricity doped region
Face；The grid layer is connect with conductive layer.
10. the forming method of imaging sensor according to claim 9, which is characterized in that the material of the grid layer and
The material of the conductive layer is identical.
11. the forming method of imaging sensor according to claim 10, which is characterized in that the grid layer and conductive layer
Forming method: initial conductive layer is formed in the first pixel region of substrate and isolated area surface, the initial conductive layer is also located at substrate
Second pixel region surface；Second graphical layer, the second graphical layer covering first are formed in the initial conduction layer surface
The initial conductive layer of pixel region and isolated area, the second graphical layer is interior to have opening, and the opening exposes part second
The initial conduction layer surface of pixel region；Using the second graphical layer as exposure mask, etching removal second exposed that be open
The initial conductive layer of pixel region forms grid layer on substrate the second pixel region surface, has grid groove between adjacent gate compartment.
12. the forming method of imaging sensor according to claim 1, which is characterized in that the substrate has opposite
First face and the second face；The substrate further include: the shallow trench isolation in the second pixel region of substrate and in substrate isolated area
Layer, the shallow groove isolation layer is between adjacent second photoelectricity doped region, between isolated area and the first pixel region and be isolated
Between area and the second pixel region, the first face of the substrate exposes the shallow groove isolation layer；The substrate further include: be located at
Deep trench isolation layer in the second pixel region of substrate, the deep trench isolation layer between adjacent second photoelectricity doped region, with
And between isolated area and the second pixel region, the second face of the substrate exposes the deep trench isolation layer；The groove top
Positioned at the second face of the substrate.
13. the forming method of imaging sensor according to claim 12, which is characterized in that the bottom portion of groove exposes
Shallow groove isolation layer.
14. the forming method of imaging sensor according to claim 1, which is characterized in that the depth bounds of the groove
For 1.5um~2.5um.
15. a kind of imaging sensor that the method using as described in claim 1 to 14 any one is formed, which is characterized in that
Include:
Substrate, the substrate is including the first pixel region, the second pixel region and between the first pixel region and the second pixel region
Isolated area；
The first photoelectricity doped region in first pixel region of substrate；
Multiple the second mutually discrete photoelectricity doped regions in second pixel region of substrate；
Groove in the substrate isolated area；
Conductive layer positioned at the bottom portion of groove surface and sidewall surfaces；
Barrier bed is formed positioned at substrate the first pixel region surface.
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| CN110416238A (en) * | 2019-08-06 | 2019-11-05 | 德淮半导体有限公司 | Imaging sensor and forming method thereof |
| CN117393502A (en) * | 2023-12-12 | 2024-01-12 | 合肥晶合集成电路股份有限公司 | Semiconductor structure and manufacturing method thereof |
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| KR20180079008A (en) * | 2016-12-30 | 2018-07-10 | 삼성전자주식회사 | Image sensor |
| CN109285854A (en) * | 2018-11-20 | 2019-01-29 | 德淮半导体有限公司 | Imaging sensor and its manufacturing method and imaging device |
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| CN110416238A (en) * | 2019-08-06 | 2019-11-05 | 德淮半导体有限公司 | Imaging sensor and forming method thereof |
| CN117393502A (en) * | 2023-12-12 | 2024-01-12 | 合肥晶合集成电路股份有限公司 | Semiconductor structure and manufacturing method thereof |
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Application publication date: 20190802 |