CN110060631A - Pixel circuit - Google Patents
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- CN110060631A CN110060631A CN201910381036.1A CN201910381036A CN110060631A CN 110060631 A CN110060631 A CN 110060631A CN 201910381036 A CN201910381036 A CN 201910381036A CN 110060631 A CN110060631 A CN 110060631A
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- 239000003990 capacitor Substances 0.000 claims description 17
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- 230000008901 benefit Effects 0.000 claims description 2
- 102100031699 Choline transporter-like protein 1 Human genes 0.000 description 11
- 101000940912 Homo sapiens Choline transporter-like protein 1 Proteins 0.000 description 11
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- 101000948115 Homo sapiens Choline transporter-like protein 2 Proteins 0.000 description 9
- 229910021420 polycrystalline silicon Inorganic materials 0.000 description 9
- 229920005591 polysilicon Polymers 0.000 description 8
- 239000010408 film Substances 0.000 description 6
- 238000000034 method Methods 0.000 description 5
- 230000007704 transition Effects 0.000 description 5
- 230000008878 coupling Effects 0.000 description 4
- 238000010168 coupling process Methods 0.000 description 4
- 238000005859 coupling reaction Methods 0.000 description 4
- 238000007667 floating Methods 0.000 description 4
- 230000000694 effects Effects 0.000 description 3
- 230000001360 synchronised effect Effects 0.000 description 3
- 229910021417 amorphous silicon Inorganic materials 0.000 description 2
- 230000001808 coupling effect Effects 0.000 description 2
- 238000010586 diagram Methods 0.000 description 2
- 238000005516 engineering process Methods 0.000 description 2
- 238000005224 laser annealing Methods 0.000 description 2
- 239000012528 membrane Substances 0.000 description 2
- 239000010409 thin film Substances 0.000 description 2
- 239000013078 crystal Substances 0.000 description 1
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- 229910052739 hydrogen Inorganic materials 0.000 description 1
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- 230000003287 optical effect Effects 0.000 description 1
- 238000010408 sweeping Methods 0.000 description 1
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Classifications
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
- G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
- G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
- G09G3/3208—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
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- Computer Hardware Design (AREA)
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- Theoretical Computer Science (AREA)
- Control Of Indicators Other Than Cathode Ray Tubes (AREA)
- Electroluminescent Light Sources (AREA)
- Control Of El Displays (AREA)
Abstract
The invention discloses a kind of pixel circuits, include the first data write circuit, the second data write circuit, the first voltage regulator circuit, the second voltage regulator circuit, the first compensation circuit, the second compensation circuit, the first driving circuit, the second driving circuit, reset circuit, the first light emitting diode and the second light emitting diode.First data write circuit is to receive the first scanning signal and data voltage.Second data write circuit is to receive the second scanning signal and data voltage.First driving circuit is coupled to first node and the first compensation circuit, to receive reference voltage.Second driving circuit is coupled to second node and the second compensation circuit, to receive reference voltage.Reset circuit is coupled to the first driving circuit and the second driving circuit to receive first control signal.
Description
Technical field
This disclosure of documents is in relation to a kind of pixel circuit, espespecially a kind of pixel that can compensate for driving transistor threshold voltage variation
Circuit.
Background technique
Low-temperature polysilicon film transistor (low temperature poly-silicon thin-film
Transistor, LTPS TFT) have the characteristics that high carrier transport factor is small with size, it is suitably applied high-res, narrow frame
And the display panel of low power consumption.At present industry be widely used quasi-molecule laser annealing (excimer laser annealing,
ELA) technology forms the polysilicon membrane of low-temperature polysilicon film transistor.However, sweeping due to each hair of excimer laser
Power and unstable is retouched, the polysilicon membrane of different zones there can be the difference of crystallite dimension and quantity.Therefore, in display panel
Different zones in, the characteristic of low-temperature polysilicon film transistor will be different.
For example, the low-temperature polysilicon film transistor of different zones can have different critical voltage (threshold
Voltage), critical voltage difference will will cause driving current and generate difference, lead to shining for low-temperature polysilicon film transistor
Brightness is inconsistent.In the case, display panel display as when will face display the non-uniform problem of picture brightness.
Summary of the invention
The main object of the present invention, which ties up to, provides a kind of pixel circuit, be mainly using two identical pixel circuits with
One transistor forms symmetric circuit framework, recycles the luminous driving method of synchronous mode to compensate critical voltage, solves critical voltage and become
The even property of the current unevenness of different generation, the effect of reaching scintillation when preventing display panel from showing black picture.
To reach above-mentioned purpose, this case provides a kind of pixel circuit.The pixel circuit includes the first data write circuit, the
Two data write circuits, the first voltage regulator circuit, the second voltage regulator circuit, the first compensation circuit, the second compensation circuit, the first driving electricity
Road, the second driving circuit, reset circuit, the first light emitting diode and the second light emitting diode.First data write circuit is electrical
It is coupled to data line, to receive the first scanning signal and data voltage.Second data write circuit is electrically coupled to data
Line, to receive the second scanning signal and data voltage.First voltage regulator circuit be electrically coupled to the first data write circuit with
And first node, to receive the first reference voltage.Second voltage regulator circuit is electrically coupled to the second data write circuit and
Two nodes, to receive reference voltage.First compensation circuit is electrically coupled to first node, to receive first control signal.
Second compensation circuit is electrically coupled to second node, to receive second control signal.First driving circuit is electrically coupled to
One node and the first compensation circuit, to receive reference voltage.Second driving circuit is electrically coupled to second node and
Two compensation circuits, to receive reference voltage.Reset circuit is electrically coupled to the first driving circuit and the second driving circuit is used
To receive first control signal.First light emitting diode is electrically coupled to the first compensation circuit, the first driving circuit and resetting
Circuit, to receive LED control signal.Second light emitting diode be electrically coupled to the second compensation circuit, the second driving circuit with
And reset circuit, to receive LED control signal.
Pixel circuit of the invention forms symmetrical pixels circuit using two identical pixel circuits and a transistor
Framework recycles the luminous driving method of synchronous mode to compensate critical voltage, solves the even property of current unevenness that critical voltage variation generates, reach
The effect of to scintillation when preventing display panel from showing black picture.
Detailed description of the invention
For above and other purpose, feature, advantage and the embodiment of disclosure of documents can be clearer and more comprehensible, institute's accompanying drawings
It is described as follows:
Fig. 1 is the circuit diagram according to the pixel circuit of one embodiment of this disclosure of documents；And
Fig. 2 is the time sequences figure according to the pixel circuit of one embodiment of this disclosure of documents.
Wherein, appended drawing reference:
100: pixel circuit
110,120: data write circuit
130,140: voltage regulator circuit
150,160: compensation circuit
170,180: driving circuit
190: reset circuit
OLED1, OLED2: light emitting diode
DL: data line
VDATA: data voltage
S1 [N], S1 [N+1]: scanning signal
A, E, B, F, D, H: node
ELVDD: reference voltage
ELVSS: LED control signal
CTL1, CTL2: control signal
VDDH、VSSH, PH1: high level
VDDL、VSSL, PL1: low level
Id1, Id2: driving current
Vref: reference level
VDATA: gray scale level
T1~T7: transistor
C1~C4: capacitor
TP1: reset phase
TP2: compensated stage
TP3: write phase
TP4: light emitting phase
Specific embodiment
Illustrate the embodiment of the present invention below in conjunction with correlative type.In the drawings, identical label indicate it is identical or
Similar element or method flow.
Please refer to Fig. 1.Fig. 1 is the circuit diagram according to the pixel circuit 100 of one embodiment of this disclosure of documents.As depicted in FIG. 1
Show, pixel circuit 100 includes data write circuit 110 and 120, voltage regulator circuit 130 and 140, compensation circuit 150 and 160, driving
Circuit 170 and 180, reset circuit 190, light emitting diode OLED1 and OLED2.100 controllable flow of pixel circuit is through light-emitting diodes
The size of driving current Id1, Id2 of pipe OLED1 and OLED2, so make light emitting diode OLED1 and OLED2 generate it is identical or
Different gray-scale intensities.
Hold above-mentioned, data write circuit 110 is electrically coupled to data line DL, to receive scanning signal S1 [N] and number
According to voltage VDATA；Data write circuit 120 is electrically coupled to data line DL, to receive scanning signal S1 [N+1] and data
Voltage VDATA.Voltage regulator circuit 130 is electrically coupled to the data write circuit 110 and node B, to receive reference voltage
ELVDD；Voltage regulator circuit 140 is electrically coupled to data write circuit 120 and node F, to receive reference voltage ELVDD.
Compensation circuit 150 is electrically coupled to node B, to receive control signal CTL1；Compensation circuit 160 is electrically coupled to node F, uses
Signal CTL2 is controlled to receive.Driving circuit 170 is electrically coupled to node B and compensation circuit 150, to receive reference voltage
ELVDD；Driving circuit 180 is electrically coupled to node F and compensation circuit 160, to receive reference voltage ELVDD.Resetting
Circuit 190 is electrically coupled to driving circuit 170 and 180 and to receive control signal CTL1；Light emitting diode OLED1 electrical property coupling
It is connected to compensation circuit 150, driving circuit 170 and reset circuit 190, to receive LED control signal ELVSS；Light-emitting diodes
Pipe OLED2 is electrically coupled to compensation circuit 160, driving circuit 180 and reset circuit 190, to receive LED control signal
ELVSS。
Data write circuit 110 includes transistor T1, and the first end of transistor T1 is electrically coupled to data line DL, transistor
The control terminal of T1 is electrically coupled to scanning signal S1 [N], and data write circuit 110 is to according to scanning signal S1 [N] and data
The voltage level of voltage VDATA decision node A.Data write circuit 120 includes transistor T2, and the first end of transistor T2 is electrical
Be coupled to data line DL, the control terminal of transistor T2 is electrically coupled to scanning signal S1 [N+1], data write circuit 120 to
The voltage level of node E is determined according to scanning signal S1 [N+1] and data voltage VDATA.In this embodiment, scanning signal S1
[N+1] is the scanning signal S1 [N] of adjacent rows.
Voltage regulator circuit 130 includes capacitor C1 and C2, and the first end of capacitor C1 is electrically coupled to the second end of transistor T1, electricity
The second end for holding C1 is electrically coupled to node B, and the first end of capacitor C2 is electrically coupled to the first end of capacitor C1, and the of capacitor C2
Two ends are electrically coupled to reference voltage ELVDD, voltage of the voltage regulator circuit 130 to stable node A.Voltage regulator circuit 140 includes electricity
Hold C3 and C4, the first end of capacitor C3 is electrically coupled to the second end of transistor T2, and the second end of capacitor C3 is electrically coupled to section
Point F, the first end of capacitor C4 are electrically coupled to the first end of capacitor C3, and the second end of capacitor C4 is electrically coupled to reference voltage
ELVDD, voltage of the voltage regulator circuit 140 to stable node E.
Compensation circuit 150 includes transistor T3, and the first end of transistor T3 is electrically coupled to node B, and the of transistor T3
Two ends are electrically coupled to node D, and the control terminal of transistor T3 is electrically coupled to control signal CTL1, when control signal CTL1 enable
When, transistor T3 is connected so that reference voltage ELVDD charges to node B by transistor T3, whereby to driving circuit 170
Critical voltage compensate.Compensation circuit 160 includes transistor T4, and the first end of transistor T4 is electrically coupled to node F, brilliant
The second end of body pipe T4 is electrically coupled to node H, and the control terminal of transistor T4 is electrically coupled to control signal CTL2, when control is believed
When number CTL2 enable, transistor T4 is connected so that reference voltage ELVDD charges to node F by transistor T4, right whereby
The critical voltage of driving circuit 180 compensates.
Driving circuit 170 includes transistor T5, and the first end of transistor T5 is electrically coupled to reference voltage ELVDD, crystal
The second end of pipe T5 is electrically coupled to node D, and the control terminal of transistor T5 is electrically coupled to node B, to output driving current
Id1 to light emitting diode OLED1.Driving circuit 180 includes transistor T6, and the first end of transistor T6 is electrically coupled to reference to electricity
ELVDD is pressed, the second end of transistor T6 is electrically coupled to node H, and the control terminal of transistor T6 is electrically coupled to node F, to
Output driving current Id2 to light emitting diode OLED2.
Reset circuit 190 includes that the first end of transistor T7 is electrically coupled to node D, the second end electrical property coupling of transistor T7
It is connected to node H, the control terminal of transistor T7 is electrically coupled to control signal CTL1.Reset circuit 190 is used for according to control signal
The voltage of node B, D and H are reset to low level V by CTLDDL。
In implementation, transistor T1~T7 can be realized with the low-temperature polysilicon film transistor of p-type, but the present embodiment is simultaneously
It is not limited.For example, transistor T1~T7 can also use amorphous silicon (amorphous silicon) thin film transistor (TFT) of p-type
To realize.
The function mode of pixel circuit 100 is further illustrated below in conjunction with Fig. 1 and Fig. 2, Fig. 2 is according to this announcement text
The time sequences figure of the pixel circuit of one embodiment of part.As shown in Fig. 2, in the operation of pixel circuit 100, reference voltage
ELVDD can be in high level VDDHWith low level VDDLBetween switch, LED control signal ELVSS then can be in high level VSSHWith low electricity
Flat VSSLBetween switch, data voltage VDATA can be in reference level Vref and gray scale level VDATABetween switch, and scanning signal
S1 [N] and S1 [N+1] and control signal CTL1 and CTL2 can switch between high level PH1 and low level PL1.Wherein, high electricity
Flat VDDH, high level VSSHCan be identical or not identical with high level PH1, low level VDDL, low level VSSLIt can also with low level PL1
With identical or not identical.
Hold it is above-mentioned, in reset phase TP1, reference voltage ELVDD be low level VDDL, LED control signal ELVSS is height
Level VSSH, so that the cathode terminal voltage of light emitting diode OLED1 and OLED2 are higher than anode tap voltage.Therefore, light emitting diode
OLED1 and OLED2 can be in an off state, generated in reset phase TP1 to avoid light emitting diode OLED1 and OLED2 with
Data voltage VDATA unrelated unexpected gray-scale intensity.
On the other hand, scanning signal S1 [N] is low level PL1, so that transistor T1 is on state, the voltage of node A
For reference level Vref.Control signal CTL1 is low level PL1, so that transistor T2 and T4 are on state.Control signal
CTL2 is high level PH1, so that transistor T6 is in off state.Therefore, in reset phase TP1 since node F is in floating
(floating) state is connect, and reference voltage ELVDD transition is low level VDDL, can be by the voltage pull-down of node F, so that brilliant
Body pipe T7 is operated in linear zone, and the voltage of node B, D and H are reset to low level VDDL。
Hold above-mentioned, in compensated stage TP2, LED control signal ELVSS is maintained at high level VSSH, to avoid luminous two
Pole pipe OLED1 and OLED2 generates the unexpected gray-scale intensity unrelated with data voltage VDATA in compensated stage TP2.With reference to electricity
Pressure ELVDD transition is high level VDDH, scanning signal S1 [N] is continuously low level PL1 and scanning signal S1 [N+1] transition is
Low level PL1, therefore transistor T1 and T5 are on state.Control signal CTL1 is continuously low level PL1, transistor T2 and T4
It is continuously on state, and controlling signal CTL2 transition is low level PL1, transistor T6 is on state.
Hold it is above-mentioned, in an embodiment, in compensated stage TP2 can simultaneously charge to node B and F, in resetting rank
In section TP1, the voltage V of node B and FBAnd VFIt is all VDDL, in compensated stage TP2, since transistor T3 and T5 are on shape
State, therefore can charge to node B, the voltage V of node BBIt can be indicated by following " formula 1 ", wherein VTH5Indicate transistor T5
Critical voltage.The charging of node F is similar with node B, can be to node F since transistor T4 and T6 are in the conductive state
Charging, the voltage V of node FFIt can be indicated by following " formula 1 ", wherein VTH6Indicate the critical voltage of transistor T6." formula
1 " as follows:
VB=VDDH-|VTH5|
VF=VDDH-|VTH6| " formula 1 "
It is noted that when the pixel circuit 100 of display panel Nth row and N+1 row is in the fortune for compensating the stage
When making, other row pixel circuits 100 of display panel (such as: N+2 and N+3 row) can also compensate the fortune in stage simultaneously
Make.In other words, the running that each pixel circuit 100 can have the sufficient time to execute compensated stage, therefore compensate critical electricity
The variation of pressure not will receive the limitation of panel resolution.
Hold above-mentioned, in write phase TP3, LED control signal ELVSS is maintained at high level VSSH, therefore light-emitting diodes
Pipe OLED1 and OLED2 maintain off state.Reference voltage ELVDD is maintained at high level VDDH, control signal CTL1 and control
Signal CTL2 transition is high level PH1, and transistor T3, T4 and T7 transformation are in off state.On the other hand, in write phase TP3
In, transistor T1 and T2 first can switch to closed state by state, and then turn in order is specific to be sequentially written in correspondence again
The specific data voltage V of gray-scale intensitydata.Therefore, scanning signal S1 [N] first can switch to low level by high level PH1
PL1, transistor T1 is connected and by specific data voltage VdataIt is transferred to node A, then, scanning signal S1 [N] can be by low
Level PL1 switches to high level PH1, closes transistor T1 once again.
In the case, the voltage V of node AAIt can be specific gray scale level V by reference level Vref variationDATA, and save
The voltage variety of point A can be transferred to node B by the capacitance coupling effect of capacitor C1, and node B is in floating, because
This, in write phase TP3, the voltage V of node BBAs shown in " formula 2 " below:
VB=VDDH-|VTH5|+VDATA-VRef" formula 2 "
Hold above-mentioned, scanning signal S1 [N+1] can be switched by high level PH1 after scanning signal S1 [N] switches to high level
To low level PL1, transistor T2 is connected and by specific data voltage VdataIt is transferred to node E, similar to the operation of top,
The voltage V of node EEAlso can be changed by reference level Vref is specific gray scale level VDATA, and the voltage variety meeting of node E
It is transferred to node F by the capacitance coupling effect of capacitor C3, and node F is in floating, therefore, in write phase TP3
In, the voltage V of node FFAs shown in " formula 3 " below:
VF=VDDH-|VTH6|+VDATA-VRef" formula 3 "
Then, in light emitting phase TP4, LED control signal ELVSS is by high level VSSHIt is switched to low level VSSL, so that
Light emitting diode OLED1 and OLED2 is by the switching-on state of off state.On the other hand, signal CTL1 and CTL2 are controlled all
For high level PH1, so that transistor T3, T4 and T7 are all in an off state.At this point, node B voltage VBCan still have in such as " public
Formula 2 " shown in voltage value so that transistor T5 generate driving current Id1 for example following " formula 4 " shown in:
Hold it is above-mentioned, similarly in light emitting phase TP4, node F voltage VFCan still have in the voltage as shown in " formula 3 "
Value, so that shown in the driving current Id2 for example following " formula 5 " that transistor T6 is generated:
By " formula 4 " and " formula 5 " it is found that the pixel circuit 100 of the present embodiment is in light emitting phase TP4, driving current
The element characteristic (such as: the size of critical voltage) that the size of current of Id1 and Id2 is not driven transistor T5 and T6 influences, and drives
Streaming current Id1 and Idr2 and data voltage VDATA can still maintain fixed corresponding relationship.
In conclusion pixel circuit of the invention is symmetrical using two identical pixel circuits and a transistor composition
Image element circuit framework recycles the luminous driving method of synchronous mode to compensate critical voltage, solves the electric current of critical voltage variation generation not
Uniformity reaches scintillation when preventing display panel from showing black picture, and then the effect of the contrast of increase display picture.
Some vocabulary is used in specification and claim to censure specific element.However, affiliated technology
Has usually intellectual in field, it is to be appreciated that same element may be called with different nouns.Specification and application
The scope of the patents is come with the difference of element functionally as differentiation not in such a way that the difference of title is as element is distinguished
Benchmark.The "comprising" mentioned by specification and claim is open term, thus should be construed to " include but not
It is defined in ".In addition, " coupling " is herein comprising any direct and indirect connection means.Therefore, if it is described herein that first element coupling
It is connected to second element, then representing first element can be by being electrically connected or being wirelessly transferred, and the signals connection type such as optical delivery
It is attached directly to second element, or electrical property or signal are connected to this second yuan indirectly by other elements or connection means
Part.
In addition, unless specified in the instructions, otherwise the term of any singular lattice all includes the connotation of multiple grid simultaneously.
The foregoing is merely a prefered embodiment of the invention, and all equivalent changes and modifications done according to claims of the present invention are all answered
It belongs to the scope of the present invention.
Claims (14)
1. a kind of pixel circuit, characterized by comprising:
One first data write circuit, is electrically coupled to a data line, to receive one first scanning signal and data electricity
Pressure；
One second data write circuit, is electrically coupled to the data line, to receive one second scanning signal and data electricity
Pressure；
One first voltage regulator circuit is electrically coupled to first data write circuit and a first node, to receive a reference
Voltage；
One second voltage regulator circuit is electrically coupled to second data write circuit and a second node, to receive the reference
Voltage；
One first compensation circuit, is electrically coupled to the first node, to receive a first control signal；
One second compensation circuit, is electrically coupled to the second node, to receive a second control signal；
One first driving circuit is electrically coupled to the first node and first compensation circuit, to receive the reference voltage；
One second driving circuit is electrically coupled to the second node and second compensation circuit, to receive the reference voltage；
One reset circuit is electrically coupled to first driving circuit and second driving circuit to receive the first control letter
Number；
One first light emitting diode is electrically coupled to first compensation circuit, first driving circuit and the reset circuit, uses
To receive a LED control signal；And
One second light emitting diode is electrically coupled to second compensation circuit, second driving circuit and the reset circuit, uses
To receive the LED control signal.
2. pixel circuit as described in claim 1, which is characterized in that first data write circuit includes:
One the first transistor, has a first end, a second end and a control terminal, which is electrically coupled to the data
Line, the control terminal are electrically coupled to first scanning signal.
3. pixel circuit as described in claim 1, which is characterized in that second data write circuit includes:
One second transistor, has a first end, a second end and a control terminal, which is electrically coupled to the data
Line, the control terminal are electrically coupled to second scanning signal.
4. pixel circuit as described in claim 1, which is characterized in that first voltage regulator circuit includes:
One first capacitor, has a first end and a second end, which is electrically coupled to the first node；And
One second capacitor, has a third end and one the 4th end, which is electrically coupled to the first end, the 4th end electricity
Property is coupled to the reference voltage.
5. pixel circuit as described in claim 1, which is characterized in that second voltage regulator circuit includes:
One third capacitor, has a first end and a second end, which is electrically coupled to the second node；And
One the 4th capacitor, has a third end and one the 4th end, which is electrically coupled to the first end, the 4th end electricity
Property is coupled to the reference voltage.
6. pixel circuit as described in claim 1, which is characterized in that first compensation circuit includes:
One third transistor, has a first end, a second end and a control terminal, which is electrically coupled to the first segment
Point, the second end are electrically coupled to first driving circuit, the reset circuit and first light emitting diode and the control
End is electrically coupled to the first control signal.
7. pixel circuit as described in claim 1, which is characterized in that second compensation circuit includes:
One the 4th transistor, has a first end, a second end and a control terminal, which is electrically coupled to second section
Point, the second end are electrically coupled to second driving circuit, the reset circuit and second light emitting diode and the control
End is electrically coupled to the second control signal.
8. pixel circuit as described in claim 1, which is characterized in that first driving circuit includes:
One the 5th transistor, has a first end, a second end and a control terminal, which is electrically coupled to reference electricity
Pressure, the second end are electrically coupled to first compensation circuit, the reset circuit and first light emitting diode and the control
End is electrically coupled to the first node.
9. pixel circuit as claimed in claim 8, which is characterized in that second driving circuit includes:
One the 6th transistor, has a first end, a second end and a control terminal, which is electrically coupled to reference electricity
Pressure, the second end are electrically coupled to second compensation circuit, the reset circuit and second light emitting diode and the control
End is electrically coupled to the second node.
10. pixel circuit as claimed in claim 9, which is characterized in that the reset circuit includes:
One the 7th transistor, has a first end, a second end and a control terminal, which is electrically coupled to first benefit
Repay circuit, first driving circuit and first light emitting diode, the second end be electrically coupled to the second compensation circuit, this
Two driving circuits and second light emitting diode and the control terminal are electrically coupled to the first control signal.
11. pixel circuit as described in claim 1, which is characterized in that the reference voltage is one first within one first period
Level, the LED control signal are one the 4th level, and first scanning signal and the first control signal are one the 5th level, should
Second scanning signal and the second control signal are one the 6th level, which is a reference level.
12. pixel circuit as described in claim 1, which is characterized in that the reference voltage is one second within one second period
Level, the LED control signal are one the 4th level, first scanning signal, second scanning signal, the first control signal
And the second control signal is one the 5th level, which is a reference level.
13. pixel circuit as described in claim 1, which is characterized in that the reference voltage is one second within a third period
Level, the LED control signal are one the 4th level, and first scanning signal and second scanning signal are sequentially changed into one the
Six level, the first control signal and the second control signal are one the 6th level, which is a gray scale level.
14. pixel circuit as described in claim 1, which is characterized in that the reference voltage is one second within one the 4th period
Level, the LED control signal are a third level, first scanning signal, second scanning signal, the first control signal
And the second control signal is one the 6th level, which is a reference level.
Applications Claiming Priority (4)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US201862690547P | 2018-06-27 | 2018-06-27 | |
| US62/690,547 | 2018-06-27 | ||
| TW108100431A TWI685833B (en) | 2018-06-27 | 2019-01-04 | Pixel circuit |
| TW108100431 | 2019-01-04 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN110060631A true CN110060631A (en) | 2019-07-26 |
| CN110060631B CN110060631B (en) | 2021-09-03 |
Family
ID=67322651
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201910381036.1A Active CN110060631B (en) | 2018-06-27 | 2019-05-08 | Pixel circuit |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN110060631B (en) |
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN111450908A (en) * | 2020-04-27 | 2020-07-28 | 杭州领挚科技有限公司 | Micro-fluidic pixel circuit and chip |
| CN113053303A (en) * | 2020-06-10 | 2021-06-29 | 友达光电股份有限公司 | Pixel compensation circuit |
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