CN110058956A - A kind of nand flash memory read method, system and electronic equipment and storage medium - Google Patents
A kind of nand flash memory read method, system and electronic equipment and storage medium Download PDFInfo
- Publication number
- CN110058956A CN110058956A CN201910324098.9A CN201910324098A CN110058956A CN 110058956 A CN110058956 A CN 110058956A CN 201910324098 A CN201910324098 A CN 201910324098A CN 110058956 A CN110058956 A CN 110058956A
- Authority
- CN
- China
- Prior art keywords
- data
- flash memory
- nand flash
- page
- error correction
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 230000015654 memory Effects 0.000 title claims abstract description 120
- 238000003860 storage Methods 0.000 title claims abstract description 78
- 238000000034 method Methods 0.000 title claims abstract description 57
- 238000012937 correction Methods 0.000 claims abstract description 53
- 238000013528 artificial neural network Methods 0.000 claims abstract description 43
- 238000001514 detection method Methods 0.000 claims abstract description 23
- 238000012549 training Methods 0.000 claims abstract description 18
- 238000012360 testing method Methods 0.000 claims description 15
- 238000004590 computer program Methods 0.000 claims description 12
- 238000004364 calculation method Methods 0.000 claims description 7
- 239000011159 matrix material Substances 0.000 claims description 6
- 230000000946 synaptic effect Effects 0.000 claims description 6
- 230000004913 activation Effects 0.000 claims description 3
- 230000001537 neural effect Effects 0.000 claims description 2
- 238000005516 engineering process Methods 0.000 description 9
- 230000008569 process Effects 0.000 description 7
- 238000004891 communication Methods 0.000 description 6
- 230000005055 memory storage Effects 0.000 description 6
- 238000012545 processing Methods 0.000 description 4
- 238000013500 data storage Methods 0.000 description 3
- 238000011161 development Methods 0.000 description 3
- 238000010586 diagram Methods 0.000 description 3
- 238000004422 calculation algorithm Methods 0.000 description 2
- 230000006870 function Effects 0.000 description 2
- 230000006872 improvement Effects 0.000 description 2
- 239000004973 liquid crystal related substance Substances 0.000 description 2
- 238000004519 manufacturing process Methods 0.000 description 2
- 238000012986 modification Methods 0.000 description 2
- 230000004048 modification Effects 0.000 description 2
- 238000005457 optimization Methods 0.000 description 2
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 1
- 230000008859 change Effects 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 230000006698 induction Effects 0.000 description 1
- 230000014759 maintenance of location Effects 0.000 description 1
- 210000003205 muscle Anatomy 0.000 description 1
- 239000002245 particle Substances 0.000 description 1
- 238000002360 preparation method Methods 0.000 description 1
- 230000000750 progressive effect Effects 0.000 description 1
- 238000013139 quantization Methods 0.000 description 1
- 230000009467 reduction Effects 0.000 description 1
- 229910052710 silicon Inorganic materials 0.000 description 1
- 239000010703 silicon Substances 0.000 description 1
- 238000004088 simulation Methods 0.000 description 1
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
- G06F11/08—Error detection or correction by redundancy in data representation, e.g. by using checking codes
- G06F11/10—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's
- G06F11/1008—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's in individual solid state devices
- G06F11/1068—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's in individual solid state devices in sector programmable memories, e.g. flash disk
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Quality & Reliability (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Read Only Memory (AREA)
- Techniques For Improving Reliability Of Storages (AREA)
Abstract
This application discloses a kind of nand flash memory read method, system and a kind of electronic equipment and computer readable storage mediums, this method comprises: receiving the reading order being read out to nand flash memory data；Detection judgement is carried out to the nand flash memory data, the primary data of the nand flash memory is obtained based on court verdict, and decode to the primary data；If successfully decoded, data after decoding are exported；If decoding failure, error correction is carried out to the primary data using the neural network that preparatory training obtains, obtains data after error correction, and exports data after decoding after data decoding success after to the error correction.That is, the application when being read out to nand flash memory data, if the decoded operation to primary data fails, carries out error correction to primary data using neural network trained in advance and improves the reliability of nand flash memory to effectively reduce error rates of data.
Description
Technical field
This application involves field of computer technology, more specifically to a kind of nand flash memory read method, system and one
Kind electronic equipment and a kind of computer readable storage medium.
Background technique
With Internet of Things, cloud computing, the development of big data and application, data storage is used as important information carrier, can to it
Requirement by property is higher and higher.Traditional disk storage (Hard Disk Device, HDD), which gradually can not meet, stores data
Fast reading and writing and memory capacity demand.In recent years, huge change has occurred in storage industry, using nand flash memory as medium
Data storage device gradually replaces HDD, becomes present or even following primary storage medium.
NAND-type flash memory is mainly by physical circuit, induction amplifier, the part such as silicon wafer pin and storage array composition, Fig. 1
For its plane structure chart.Wherein storage array is the most important part of NAND-type flash memory, is responsible for the storage of data.Storage unit is
The minimum unit of storing data is arranged with a kind of special institutional framework, forms storage array.In general, a storage battle array
Column include multiple pieces, and block is the smallest erasing unit；Each block includes multiple pages, and page is the smallest read-write cell.General one
The multiple that the number of pages that a block includes is 16.Every page is made of the storage unit of 4 to 8KB or even 16KB.
Fig. 2 is the basic structure of nand flash memory storage array.A certain number of storage units form one by series connection
The string (string) of NAND, multiple strings carry out arrangement according to fixed structure and form a storage array.And logical page (LPAGE) is by phase
Storage unit with wordline connection is formed.
Nand flash memory has been widely used in daily life at present, such as smart phone, mobile terminal, server, cloud clothes
Business etc..But nand flash memory, in development process, as the continuous promotion of manufacturing process and storage density are continuously increased, storage is single
The electron amount that the states of data is included is represented in member to be become less, and interference becomes readily apparent between unit, so that NAND dodges
It deposits and becomes increasingly susceptible to interfere, reliability reduces.
Therefore, how to solve the problems, such as that the reduction of nand flash memory reliability is that those skilled in the art need to pay close attention to.
Summary of the invention
The application's is designed to provide a kind of nand flash memory read method, system and a kind of electronic equipment and a kind of calculating
Machine readable storage medium storing program for executing, effectively reduces error rates of data, improves the reliability of nand flash memory.
To achieve the above object, this application provides a kind of nand flash memory read methods, comprising:
Receive the reading order being read out to nand flash memory data；
Detection judgement is carried out to the nand flash memory data, the initial number of the nand flash memory is obtained based on court verdict
According to, and the primary data is decoded；
If successfully decoded, data after decoding are exported；
If decoding failure, error correction is carried out to the primary data using the neural network that preparatory training obtains, is entangled
Data after mistake, and data after decoding are exported after data decoding success after to the error correction.
Optionally, the neural network obtained using preparatory training carries out error correction to the primary data, obtains error correction
Data afterwards, comprising:
The current page that reads of judgement whether there is lower one page；
If it is, the current storage unit read in page in overlay region is determined as storage unit to be detected；
Obtain the corresponding characteristic of input layer of the neural network of training in advance；
Target data is calculated using the neural network and the characteristic, it will be in the storage unit to be detected
The primary data be updated to the target data, obtain data after error correction.
Optionally, the corresponding characteristic of input layer for the neural network that the acquisition is trained in advance, comprising:
Obtain the low page hard-decision bits information and high page hard-decision bits information of the storage unit to be detected, Yi Jisuo
State the current type for reading page；
Obtain the adjacent storage list in described current lower one page for reading page with the storage unit direct neighbor to be detected
The log-likelihood ratio of member.
It is optionally, described to obtain target data using the neural computing, comprising:
The testing result to the primary data is determined using the neural network；
The target data is determined according to the testing result；
Wherein, corresponding first calculation formula of the neural network are as follows:
Hi=x*wi+bi
Ho=f (hi)
Oi=ho*wo+bo；
O=f (oi)
Wherein, x is input vector；Wi is hidden layer synaptic weight matrix；Bi is hidden layer bias vector；Hi is hidden layer
Input vector；F () is activation primitive；Ho is hidden layer output vector；Wo is output layer synaptic weight matrix；Bo is output layer
Bias vector；Oi is output layer input vector；O is output layer output vector；Y is testing result.
It is optionally, described that the target data is determined according to the testing result, comprising:
Based on the testing result, the target data is calculated using the second calculation formula；Wherein, second meter
Calculate formula are as follows: LLRnew=| LLRorigin|*(-1)y+1；
Wherein, LLRoriginFor the primary data；LLRnewFor the target data.
It is optionally, described that detection judgement is carried out to the nand flash memory data, comprising:
Detection judgement is carried out to the nand flash memory data using hard-decision method or soft decision method.
To achieve the above object, this application provides a kind of nand flash memories to read system, comprising:
Order receiver module, for receiving the reading order being read out to nand flash memory data；
Data decoding module is obtained described for carrying out detection judgement to the nand flash memory data based on court verdict
The primary data of nand flash memory, and the primary data is decoded；
Data outputting module, if exporting data after decoding for successfully decoded；
Correcting data error module, if being used for decoding failure, the neural network obtained using preparatory training is to the initial number
According to error correction is carried out, data after error correction are obtained, and export data after decoding after data decoding success after to the error correction.
Optionally, the correcting data error module, comprising:
Judging unit, for judging currently to read page with the presence or absence of lower one page；
Determination unit, if weight will be in the current reading page for one page in the presence of the current reading page
The storage unit in folded area is determined as storage unit to be detected；
Acquiring unit, for obtaining the corresponding characteristic of input layer of the neural network of training in advance；
Computing unit, for being calculated target data using the neural network and the characteristic, will it is described to
The primary data in detection storage unit is updated to the target data, obtains data after error correction.
To achieve the above object, this application provides a kind of electronic equipment, comprising:
Memory, for storing computer program；
Processor realizes the aforementioned disclosed any one nand flash memory reading side when for executing the computer program
The step of method.
To achieve the above object, this application provides a kind of computer readable storage medium, the computer-readable storages
Computer program is stored on medium, the computer program is realized when being executed by processor described in aforementioned disclosed any one
The step of nand flash memory read method.
By above scheme it is found that a kind of nand flash memory read method provided by the present application, comprising: receive to nand flash memory
The reading order that data are read out；Detection judgement is carried out to the nand flash memory data, is obtained based on court verdict described
The primary data of nand flash memory, and the primary data is decoded；If successfully decoded, data after decoding are exported；If translating
Code failure then carries out error correction to the primary data using the neural network that preparatory training obtains, and obtains data after error correction, and
To data after output decoding after data decoding success after the error correction.That is, the application is read out to nand flash memory data
When, if the decoded operation to primary data fails, error correction is carried out to primary data using neural network trained in advance, thus
Error rates of data is effectively reduced, the reliability of nand flash memory is improved.
Disclosed herein as well is a kind of nand flash memories to read system and a kind of electronic equipment and a kind of computer-readable storage
Medium is equally able to achieve above-mentioned technical effect.
It should be understood that the above general description and the following detailed description are merely exemplary, this can not be limited
Application.
Detailed description of the invention
In order to illustrate the technical solutions in the embodiments of the present application or in the prior art more clearly, to embodiment or will show below
There is attached drawing needed in technical description to be briefly described, it should be apparent that, the accompanying drawings in the following description is only this
Some embodiments of application for those of ordinary skill in the art without creative efforts, can be with
It obtains other drawings based on these drawings.
Fig. 1 is the plane structure chart of NAND-type flash memory in the prior art；
Fig. 2 is the basic block diagram of NAND-type flash memory storage array in the prior art；
Fig. 3 is a kind of flow chart of nand flash memory read method disclosed in the embodiment of the present application；
Fig. 4 is a kind of flow chart of nand flash memory read method disclosed in the embodiment of the present application；
Fig. 5 is the flow chart of another kind nand flash memory read method disclosed in the embodiment of the present application；
Fig. 6 is the flow chart of another nand flash memory read method disclosed in the embodiment of the present application；
Fig. 7 is the flow chart of another nand flash memory read method disclosed in the embodiment of the present application；
Fig. 8 is the experimental result schematic diagram tested for nand flash memory read method disclosed in the embodiment of the present application；
Fig. 9 is a kind of structure chart of nand flash memory reading system disclosed in the embodiment of the present application；
Figure 10 is a kind of structure chart of specific nand flash memory storage system disclosed in the embodiment of the present application；
Figure 11 is the structure chart of a kind of electronic equipment disclosed in the embodiment of the present application；
Figure 12 is the structure chart of another kind electronic equipment disclosed in the embodiment of the present application.
Specific embodiment
Below in conjunction with the attached drawing in the embodiment of the present application, technical solutions in the embodiments of the present application carries out clear, complete
Site preparation description, it is clear that described embodiments are only a part of embodiments of the present application, instead of all the embodiments.It is based on
Embodiment in the application, it is obtained by those of ordinary skill in the art without making creative efforts every other
Embodiment shall fall in the protection scope of this application.
In the development process of nand flash memory, as the continuous promotion of manufacturing process and storage density are continuously increased, store
The electron amount that the states of data is included is represented in unit to be become less, and interference becomes readily apparent between unit, so that NAND
Flash memory becomes increasingly susceptible to interfere, and reliability reduces.
The embodiment of the present application discloses a kind of nand flash memory read method, can effectively reduce error rates of data, improves
The reliability of nand flash memory.
Referring to Fig. 3, Fig. 4, a kind of flow chart of nand flash memory read method disclosed in the embodiment of the present application, such as Fig. 3, Fig. 4
It is shown, comprising:
S11: the reading order being read out to nand flash memory data is received；
In this step, the reading order for being read out to nand flash memory data is obtained.
S12: detection judgement is carried out to the nand flash memory data, the initial of the nand flash memory is obtained based on court verdict
Data, and the primary data is decoded；
Further, detection judgement is carried out to flash data.Specifically, the present embodiment can use traditional detection side
It is to be decoded to obtain nand flash memory if hard-decision method or soft decision method carry out detection judgement to the nand flash memory data for method
Primary data, and primary data is decoded.
Specifically, hard decision is the bit directly adjudicated in certain page according to reference voltage, for LSB (Least
Significant Bit, least significant bit) for, when threshold voltage is less than reference voltage, bit is determined as 1；Work as threshold value
When voltage is greater than reference voltage, bit is determined as 0.And soft-decision is then to calculate bit using the voltage range of quantization
Reliability, that is, log-likelihood ratio calculates sudden strain of a muscle by the probability density function and reference voltage of the threshold voltage after being interfered
The log-likelihood ratio (Log Likelihood Rate, LLR) of memory cell.
S13: if successfully decoded, data after decoding are exported；
It is understood that exporting data after decoding if successfully decoded completion to primary data, flash memory number is completed
According to reading.
S14: if decoding failure, error correction is carried out to the primary data using the neural network that preparatory training obtains, is obtained
Data after to error correction, and data after decoding are exported after data decoding success after to the error correction.
In the present embodiment, if the decoded operation to primary data fails, neural network trained in advance is obtained, mind is utilized
Error correction is carried out to primary data through network, and is decoded again after error correction, if this time successfully decoded, exports corresponding decoding
Data afterwards.Specifically, the present embodiment is using BP neural network (Back propagation, multilayer feedforward neural network) to data
Carry out error correction.
By above scheme it is found that a kind of nand flash memory read method provided by the present application, comprising: receive to nand flash memory
The reading order that data are read out；Detection judgement is carried out to the nand flash memory data, is obtained based on court verdict described
The primary data of nand flash memory, and the primary data is decoded；If successfully decoded, data after decoding are exported；If translating
Code failure then carries out error correction to the primary data using the neural network that preparatory training obtains, and obtains data after error correction, and
To data after output decoding after data decoding success after the error correction.That is, the application is read out to nand flash memory data
When, if the decoded operation to primary data fails, error correction is carried out to primary data using neural network trained in advance, thus
Error rates of data is effectively reduced, the reliability of nand flash memory is improved.
The embodiment of the present application discloses a kind of nand flash memory read method, and relative to a upper embodiment, the present embodiment is to skill
Art scheme has made further instruction and optimization.It is specific:
Referring to Fig. 5, the flow chart of another kind nand flash memory read method provided by the embodiments of the present application, as shown in figure 5, packet
It includes:
S21: the reading order being read out to nand flash memory data is received；
S22: detection judgement is carried out to the nand flash memory data, the initial of the nand flash memory is obtained based on court verdict
Data, and the primary data is decoded；
S23: if successfully decoded, data after decoding are exported；
S24: if decoding failure, judge that the current page that reads whether there is lower one page；
S25: if it is, it is single that the current storage unit read in page in overlay region is determined as storage to be detected
Member；
S26: the corresponding characteristic of input layer of neural network trained in advance is obtained；
S27: being calculated target data using the neural network and the characteristic, and the storage to be detected is single
The primary data in member is updated to the target data, obtains data after error correction, and the data decoding after to the error correction
Data after output decoding after success.
In the present embodiment, the process for carrying out error correction to primary data for the neural network obtained using preparatory training is carried out
It further illustrates, first determines whether currently to read page in nand flash memory with the presence or absence of lower one page, if it does not exist, then terminating error correction stream
Journey；If it is present obtaining the current storage unit for reading and being in overlay region in page, and it is single to determine it as storage to be detected
Member.
Further, it is determined that characteristic required for input layer in the neural network trained in advance, thus by characteristic
According in input neural network, target data is calculated, and utilizes target data to the initial number of current storage unit to be detected
According to being updated, the error correction to data is realized.
The embodiment of the present application discloses a kind of nand flash memory read method, and relative to a upper embodiment, the present embodiment is to skill
Art scheme has made further instruction and optimization.It is specific:
Referring to Fig. 6, Fig. 7, the flow chart of another nand flash memory read method provided by the embodiments of the present application, such as Fig. 6, figure
Shown in 7, comprising:
S31: the reading order being read out to nand flash memory data is received；
S32: detection judgement is carried out to the nand flash memory data, the initial of the nand flash memory is obtained based on court verdict
Data, and the primary data is decoded；
S33: if successfully decoded, data after decoding are exported；
S34: if decoding failure, judge that the current page that reads whether there is lower one page；
S35: if it is, it is single that the current storage unit read in page in overlay region is determined as storage to be detected
Member；
S36: obtaining the low page hard-decision bits information and high page hard-decision bits information of the storage unit to be detected, with
And the current type for reading page；
In the present embodiment, low page hard-decision bits information, the high page hard-decision bits information of storage unit to be detected are obtained,
And the current type code for reading page, specifically, the type code of page can be according to the actual conditions in specific implementation process
It is set, the present invention is not specifically limited in this embodiment, for example, the type code of page is 0 if page type is low page；If page class
Type is high page, then the type code of page is 1.
S37: it obtains and is deposited in described current lower one page for reading page with the adjacent of storage unit direct neighbor to be detected
The log-likelihood ratio of storage unit；
In this step, after determining storage unit to be detected, the position of storage unit to be detected is marked, thus root
It is determined according to the position of storage unit to be detected adjacent with storage unit direct neighbor to be detected in current lower one page for reading page
Storage unit, and determine the log-likelihood ratio of consecutive storage unit.
S38: by the low page hard-decision bits information, the high page hard-decision bits information, the type and described right
Number likelihood ratio inputs in the neural network, to determine the testing result to the primary data；
In this step, the corresponding characteristic of neural network input layer is being got, including is currently reading the low page of page and sentences firmly
Certainly bit information, current read page height page hard-decision bits information, the current logarithm for reading page type and consecutive storage unit seemingly
So after ratio, characteristic, which is input to neural network, to be calculated, and the testing result of primary data is obtained.Wherein, if it is mutually to be checked
Surveying storage unit has the consecutive storage unit being not present, then the corresponding log-likelihood ratio of the unit is set as 0.
Specifically, corresponding first calculation formula of the neural network are as follows:
Hi=x*wi+bi
Ho=f (hi)
Oi=ho*wo+bo；
O=f (oi)
Wherein, x=(x1,x2,…,x9) it is input vector；For hidden layer synaptic weight
Matrix；Bi=(bi1,bi2,…,bi9) it is hidden layer bias vector；Hi=(hi1,hi2,…,hi9) it is hidden layer input vector；For activation primitive；Ho=(ho1,ho2,…,ho9) it is hidden layer output vector；
For output layer synaptic weight matrix；Bo=(bo1,bo2) it is output layer bias vector；Oi=(oi1,oi2,…,oi9) it is output layer
Input vector；O=(o1,o2) it is output layer output vector；Y is testing result.In addition, the error function being related in algorithm isWherein, do=(do1,do2) it is desired output vector.
S39: determining the target data according to the testing result, will be described initial in the storage unit to be detected
Data are updated to the target data, obtain data after error correction, and export decoding after data decoding success after to the error correction
Data afterwards.
In this step, it is based on the testing result, target data is calculated using the second calculation formula, and utilize target
Data are updated the storage unit to be detected in overlay region.Wherein, the second calculation formula are as follows: LLRnew=| LLRorigin|*
(-1)y+1；
Wherein, LLRoriginFor primary data；LLRnewFor target data.
Fig. 8 is the experimental result of nand flash memory read method provided by the embodiments of the present application, such as Fig. 8 the simulation experiment result institute
Show, the present invention carries out error correction to error bit by neural network, 80% or more error bit can be corrected, thus effectively
The bit error rate (Bit Error Rate, BER) and page error rate (Frame Error Rate, FER) in nand flash memory are reduced,
In, S is CCI (Cell-to-Cell Interference, unit between interfere) interference strength factor.
It reads system to a kind of nand flash memory provided by the embodiments of the present application below to be introduced, one kind described below
Nand flash memory reads system can be cross-referenced with a kind of above-described nand flash memory read method.
Referring to Fig. 9, a kind of structure chart of nand flash memory reading system provided by the embodiments of the present application, as shown in figure 9, packet
It includes:
Order receiver module 100, for receiving the reading order being read out to nand flash memory data；
Data decoding module 200 obtains institute based on court verdict for carrying out detection judgement to the nand flash memory data
The primary data of nand flash memory is stated, and the primary data is decoded；
Data outputting module 300, if exporting data after decoding for successfully decoded；
Correcting data error module 400, if being used for decoding failure, the neural network obtained using preparatory training is to described initial
Data after data carry out error correction, obtain data after error correction, and output decodes after data decoding success after to the error correction.
On the basis of the above embodiments, nand flash memory provided in this embodiment is read as a preferred implementation manner,
Correcting data error module described in system may include:
Judging unit, for judging currently to read page with the presence or absence of lower one page；
Determination unit, if weight will be in the current reading page for one page in the presence of the current reading page
The storage unit in folded area is determined as storage unit to be detected；
Acquiring unit, for obtaining the corresponding characteristic of input layer of the neural network of training in advance；
Computing unit, for being calculated target data using the neural network and the characteristic, will it is described to
The primary data in detection storage unit is updated to the target data, obtains data after error correction.
Shown in Figure 10, Figure 10 is a kind of structure of specific nand flash memory storage system provided by the embodiments of the present application
Schematic diagram, as shown, nand flash memory storage system is made of storage control and nand flash memory particle chip.Wherein, it stores
Controller is one of the important technology for guaranteeing data-storage system reliability.Nand flash memory storage system provided in this embodiment,
First by storage control receive read NAND internal storage data order, and using traditional detection method to nand flash memory channel into
Row detection judgement further attempts to decode it to obtain corresponding data information, such as successfully decoded, then exports number
According to otherwise the detection of execution BP neural network auxiliary and error correction algorithm carry out error correction to former data information, and are directed to the number after error correction
It is believed that breath again attempts to decode, if successfully decoded, output data, otherwise reading data fails.
Present invention also provides a kind of electronic equipment, referring to Figure 11, a kind of electronic equipment provided by the embodiments of the present application
Structure chart, as shown in figure 11, comprising:
Memory 101, for storing computer program；
Nand flash memory provided by above-described embodiment may be implemented in processor 102 when for executing the computer program
The step of read method.
Specifically, memory 101 includes non-volatile memory medium, built-in storage.Non-volatile memory medium storage
There are operating system and computer-readable instruction, which is that the operating system and computer in non-volatile memory medium can
The operation of reading instruction provides environment.Processor 102 can be a central processing unit (Central in some embodiments
Processing Unit, CPU), controller, microcontroller, microprocessor or other data processing chips, mentioned for electronic equipment
For calculating and control ability, when executing the computer program saved in the memory 101, it is public that previous embodiment institute may be implemented
The step of any nand flash memory read method opened.
On the basis of the above embodiments, preferably, referring to Figure 12, the electronic equipment further include:
Input interface 103 is connected with processor 102, for obtaining computer program, parameter and the instruction of external importing,
It saves through the control of processor 102 into memory 101.The input interface 103 can be connected with input unit, and it is manual to receive user
The parameter or instruction of input.The input unit can be the touch layer covered on display screen, be also possible to be arranged in terminal enclosure
Key, trace ball or Trackpad, be also possible to keyboard, Trackpad or mouse etc..
Display unit 104 is connected with processor 102, for video-stream processor 102 processing data and for show can
Depending on the user interface changed.The display unit 104 can for light-emitting diode display, liquid crystal display, touch-control liquid crystal display and
OLED (Organic Light-Emitting Diode, Organic Light Emitting Diode) touches device etc..
The network port 105 is connected with processor 102, for being communicatively coupled with external each terminal device.The communication link
The communication technology used by connecing can be cable communicating technology or wireless communication technique, and such as mobile high definition chained technology (MHL) leads to
It is blue with universal serial bus (USB), high-definition media interface (HDMI), adopting wireless fidelity technology (WiFi), Bluetooth Communication Technology, low-power consumption
The tooth communication technology, communication technology based on IEEE802.11s etc..
Figure 12 illustrates only the electronic equipment with component 101-105, it will be appreciated by persons skilled in the art that Figure 12
The structure shown does not constitute the restriction to electronic equipment, may include than illustrating less perhaps more components or combination
Certain components or different component layouts.
Present invention also provides a kind of computer readable storage medium, the storage medium may include: USB flash disk, mobile hard disk,
Read-only memory (Read-Only Memory, ROM), random access memory (Random Access Memory, RAM), magnetic
The various media that can store program code such as dish or CD.Computer program, the calculating are stored on the storage medium
The step of any nand flash memory read method disclosed in previous embodiment is realized when machine program is executed by processor.
The application is when being read out nand flash memory data, if the decoded operation to primary data fails, using in advance
First trained neural network carries out error correction to primary data, to effectively reduce error rates of data, improve nand flash memory can
By property.
Each embodiment is described in a progressive manner in specification, the highlights of each of the examples are with other realities
The difference of example is applied, the same or similar parts in each embodiment may refer to each other.For system disclosed in embodiment
Speech, since it is corresponded to the methods disclosed in the examples, so being described relatively simple, related place is referring to method part illustration
?.It should be pointed out that for those skilled in the art, under the premise of not departing from the application principle, also
Can to the application, some improvement and modification can also be carried out, these improvement and modification also fall into the protection scope of the claim of this application
It is interior.
It should also be noted that, in the present specification, relational terms such as first and second and the like be used merely to by
One entity or operation are distinguished with another entity or operation, without necessarily requiring or implying these entities or operation
Between there are any actual relationship or orders.Moreover, the terms "include", "comprise" or its any other variant meaning
Covering non-exclusive inclusion, so that the process, method, article or equipment for including a series of elements not only includes that
A little elements, but also including other elements that are not explicitly listed, or further include for this process, method, article or
The intrinsic element of equipment.In the absence of more restrictions, the element limited by sentence "including a ...", is not arranged
Except there is also other identical elements in the process, method, article or apparatus that includes the element.
Claims (10)
1. a kind of nand flash memory read method characterized by comprising
Receive the reading order being read out to nand flash memory data；
Detection judgement is carried out to the nand flash memory data, the primary data of the nand flash memory is obtained based on court verdict, and
The primary data is decoded；
If successfully decoded, data after decoding are exported；
If decoding failure, error correction is carried out to the primary data using the neural network that preparatory training obtains, after obtaining error correction
Data, and data after decoding are exported after data decoding success after to the error correction.
2. nand flash memory read method according to claim 1, which is characterized in that described to utilize the mind that training obtains in advance
Error correction is carried out to the primary data through network, obtains data after error correction, comprising:
The current page that reads of judgement whether there is lower one page；
If it is, the current storage unit read in page in overlay region is determined as storage unit to be detected；
Obtain the corresponding characteristic of input layer of the neural network of training in advance；
Target data is calculated using the neural network and the characteristic, by the institute in the storage unit to be detected
It states primary data and is updated to the target data, obtain data after error correction.
3. nand flash memory read method according to claim 2, which is characterized in that the mind of acquisition training in advance
The corresponding characteristic of input layer through network, comprising:
It obtains the low page hard-decision bits information of the storage unit to be detected and high page hard-decision bits information and described works as
The preceding type for reading page；
Obtain it is described it is current read page lower one page in the consecutive storage unit of the storage unit direct neighbor to be detected
Log-likelihood ratio.
4. nand flash memory read method according to claim 3, which is characterized in that described to utilize the neural computing
Obtain target data, comprising:
The testing result to the primary data is determined using the neural network；
The target data is determined according to the testing result；
Wherein, corresponding first calculation formula of the neural network are as follows:
Wherein, x is input vector；Wi is hidden layer synaptic weight matrix；Bi is hidden layer bias vector；Hi is hidden layer input
Vector；F () is activation primitive；Ho is hidden layer output vector；Wo is output layer synaptic weight matrix；Bo is output layer biasing
Vector；Oi is output layer input vector；O is output layer output vector；Y is testing result.
5. nand flash memory read method according to claim 4, which is characterized in that described to be determined according to the testing result
The target data, comprising:
Based on the testing result, the target data is calculated using the second calculation formula；Wherein, described second public affairs are calculated
Formula are as follows: LLRnew=| LLRorigin|*(-1)y+1；
Wherein, LLRoriginFor the primary data；LLRnewFor the target data.
6. nand flash memory read method according to any one of claims 1 to 5, which is characterized in that described to the NAND
Flash data carries out detection judgement, comprising:
Detection judgement is carried out to the nand flash memory data using hard-decision method or soft decision method.
7. a kind of nand flash memory reads system characterized by comprising
Order receiver module, for receiving the reading order being read out to nand flash memory data；
Data decoding module obtains the NAND based on court verdict for carrying out detection judgement to the nand flash memory data
The primary data of flash memory, and the primary data is decoded；
Data outputting module, if exporting data after decoding for successfully decoded；
Correcting data error module, if being used for decoding failure, the neural network that is obtained using preparatory training to the primary data into
Data after row error correction obtains data after error correction, and output decodes after data decoding success after to the error correction.
8. nand flash memory according to claim 7 reads system, which is characterized in that the correcting data error module, comprising:
Judging unit, for judging currently to read page with the presence or absence of lower one page；
Determination unit, if overlay region will be in the current reading page for one page in the presence of the current reading page
Storage unit be determined as storage unit to be detected；
Acquiring unit, for obtaining the corresponding characteristic of input layer of the neural network of training in advance；
Computing unit will be described to be detected for target data to be calculated using the neural network and the characteristic
The primary data in storage unit is updated to the target data, obtains data after error correction.
9. a kind of electronic equipment characterized by comprising
Memory, for storing computer program；
Processor realizes the nand flash memory reading side as described in any one of claim 1 to 6 when for executing the computer program
The step of method.
10. a kind of computer readable storage medium, which is characterized in that be stored with computer on the computer readable storage medium
Program realizes the nand flash memory read method as described in any one of claim 1 to 6 when the computer program is executed by processor
The step of.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201910324098.9A CN110058956A (en) | 2019-04-22 | 2019-04-22 | A kind of nand flash memory read method, system and electronic equipment and storage medium |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201910324098.9A CN110058956A (en) | 2019-04-22 | 2019-04-22 | A kind of nand flash memory read method, system and electronic equipment and storage medium |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN110058956A true CN110058956A (en) | 2019-07-26 |
Family
ID=67320120
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201910324098.9A Pending CN110058956A (en) | 2019-04-22 | 2019-04-22 | A kind of nand flash memory read method, system and electronic equipment and storage medium |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN110058956A (en) |
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN110798225A (en) * | 2019-11-06 | 2020-02-14 | 深圳大普微电子科技有限公司 | Data error correction method, device and equipment and readable storage medium |
| CN112230856A (en) * | 2020-10-20 | 2021-01-15 | 北京紫光得瑞科技有限公司 | Configuration method and device of NAND hard decision reference level offset value and SSD device |
| CN113129980A (en) * | 2020-08-04 | 2021-07-16 | 长江存储科技有限责任公司 | Information decoding method and device, electronic equipment and storage medium |
| CN116679991B (en) * | 2023-05-10 | 2024-02-23 | 珠海妙存科技有限公司 | Method, system, equipment and storage medium for managing starting of memory |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20110231738A1 (en) * | 2010-03-18 | 2011-09-22 | Koji Horisaki | Error correction decoding apparatus and error correction decoding method |
| CN108777157A (en) * | 2018-05-08 | 2018-11-09 | 南京邮电大学 | The adaptive approach of MLC flash voltage threshold is predicted based on deep neural network |
| CN109087683A (en) * | 2018-07-26 | 2018-12-25 | 西京学院 | A kind of NAND Flash solid-state storage adaptive error control method |
-
2019
- 2019-04-22 CN CN201910324098.9A patent/CN110058956A/en active Pending
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20110231738A1 (en) * | 2010-03-18 | 2011-09-22 | Koji Horisaki | Error correction decoding apparatus and error correction decoding method |
| CN108777157A (en) * | 2018-05-08 | 2018-11-09 | 南京邮电大学 | The adaptive approach of MLC flash voltage threshold is predicted based on deep neural network |
| CN109087683A (en) * | 2018-07-26 | 2018-12-25 | 西京学院 | A kind of NAND Flash solid-state storage adaptive error control method |
Non-Patent Citations (2)
| Title |
|---|
| 周湘贞: "一种基于遗传算法和神经网络的硬判决译码方案", 《重庆理工大学学报(自然科学)》 * |
| 张旋等: "基于加权比特翻转的MLC型NAND闪存系统", 《微电子学与计算机》 * |
Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN110798225A (en) * | 2019-11-06 | 2020-02-14 | 深圳大普微电子科技有限公司 | Data error correction method, device and equipment and readable storage medium |
| CN113129980A (en) * | 2020-08-04 | 2021-07-16 | 长江存储科技有限责任公司 | Information decoding method and device, electronic equipment and storage medium |
| CN112230856A (en) * | 2020-10-20 | 2021-01-15 | 北京紫光得瑞科技有限公司 | Configuration method and device of NAND hard decision reference level offset value and SSD device |
| CN112230856B (en) * | 2020-10-20 | 2022-09-23 | 北京得瑞领新科技有限公司 | Configuration method and device of NAND hard decision reference level offset value and SSD device |
| CN116679991B (en) * | 2023-05-10 | 2024-02-23 | 珠海妙存科技有限公司 | Method, system, equipment and storage medium for managing starting of memory |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN110058956A (en) | A kind of nand flash memory read method, system and electronic equipment and storage medium | |
| US9098410B2 (en) | Cross-decoding for non-volatile storage | |
| US20120311402A1 (en) | Data reading method, memory controller, and memory storage device | |
| US8289771B2 (en) | Data reading method and control circuit and memory controller using the same | |
| US8578245B2 (en) | Data reading method, memory storage apparatus, and controller thereof | |
| CN104750571A (en) | Method for error correction, memory device and controller of memory device | |
| CN104283570B (en) | Log-likelihood ratio (LLR) damping in Low Density Parity Check (LDPC) decoders | |
| CN106341136A (en) | LDPC decoding method and device thereof | |
| CN107092536A (en) | Coding/decoding method, memory storage apparatus and memorizer control circuit unit | |
| KR20120103274A (en) | Non-volatile memory device and read method thereof | |
| US10522234B2 (en) | Bit tagging method, memory control circuit unit and memory storage device | |
| CN102893529B (en) | For the method and system of the decoding of LDPC code | |
| CN112383314B (en) | LDPC error correction method based on RAID information | |
| CN107608818A (en) | Coding/decoding method, memory storage apparatus and memorizer control circuit unit | |
| US11086719B2 (en) | Use of error correction codes to prevent errors in neighboring storage | |
| CN109901945A (en) | Coding/decoding method, memory storage apparatus and memorizer control circuit unit | |
| CN106681856A (en) | Decoding method, storage storing device and storage control circuit unit | |
| CN107305510A (en) | Data processing method, memory storage apparatus and memorizer control circuit unit | |
| KR20110043210A (en) | Nonvolatile memory device, method of reading the same, and memory system including the same | |
| CN109697134A (en) | Coding/decoding method, memory storage apparatus and memorizer control circuit unit | |
| US10163515B1 (en) | Memory system having feature boosting and operating method thereof | |
| TWI684106B (en) | Method of training artificial intelligence to correct log-likelihood ratio for storage device | |
| CN110970080B (en) | Method for training artificial intelligence to estimate sensing voltage of storage device | |
| CN107608817A (en) | Coding/decoding method, memory storage apparatus and memorizer control circuit unit | |
| TWI808483B (en) | Decoding method, memory storage device and memory control circuit unit |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PB01 | Publication | ||
| PB01 | Publication | ||
| SE01 | Entry into force of request for substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| RJ01 | Rejection of invention patent application after publication |
Application publication date: 20190726 |
|
| RJ01 | Rejection of invention patent application after publication |