CN1100526A

CN1100526A - Method and apparatus for minimizing mean calculation rate for an active addressed display

Info

Publication number: CN1100526A
Application number: CN94104666A
Authority: CN
Inventors: 巴里·怀恩·希罗德
Original assignee: Motorola Inc
Current assignee: Motorola Solutions Inc
Priority date: 1993-04-26
Filing date: 1994-04-25
Publication date: 1995-03-22
Anticipated expiration: 2014-04-25
Also published as: WO1994025955A1; KR0156308B1; CA2161439A1; CN1060865C; EP0696376A4; KR960702141A; EP0696376A1; US5481651A; AU6552594A; CA2161439C

Abstract

A method and apparatus for minimizing mean calculation rate in a processing system (510) performing active addressing calculations on a frame of data for driving a display (100) having a plurality of electrodes (104, 106) comprise a monitor (700) for monitoring pixel values in the frame of data to be processed and displayed. A comparator (720) compares adjacent monitored pixel values to determine resolution of the data, and thereafter a controller (622) controls the processing system (510) to minimize the mean calculation rate by modifying the active addressing calculations in accordance with the resolution determined.

Description

Method and apparatus for minimizing mean calculation rate for an active addressed display

The present invention generally speaking belongs to the electronic display technology field.Specifically, the present invention releases a kind of method and apparatus that reduces mean calculation rate greatly for the display system of active-addressed root-mean-square value (rms) response, thereby has reduced power consumption.

Directly the example of the root-mean-square value of multiplex addressing response electronic console is well-known LCD (LCD).In this display, have a kind ofly to be clipped between two parallel glass plates to liquid crystal material to type.Some electrodes in assortment on these two glass plates and surface that liquid crystal material contacts.Electrode on the common plate is lined up vertical row, and the electrode on another piece plate is then lined up the row of level, to be driven into the picture dot of electrode and column electrode confluce.For the display of the high information content, as the display as the portable laptop computer monitor, requiring has a large amount of picture dots to show various message forms.In computing machine, extensively adopt at present to have 480 row 640, be expected promptly to have soon the dot matrix lcd of millions of picture dots to come out to the dot matrix lcd that constitutes 307,200 picture dots.

In so-called root-mean-square value response display (rms responding display), the optical states of a picture dot depend primarily on the voltage (promptly being added in the voltage difference on two relative electrodes of picture dot) that is added on this picture dot square.LCD has an intrinsic time constant, and it has characterized the optical states of a picture dot and get back to the required time of equilibrium state after the voltage change that is added on the picture dot.With regard to present technology, the time constant of LCD was accomplished near the adoptable frame period of many television indicators (about 16.7 milliseconds).So little time constant can make very fast-response of LCD, does not have smear generation significantly, is particularly conducive to moving frame.

The conventional direct multiplex addressing method of LCD can run into a problem at the display constant during near the frame period.The reason that can produce this problem is that conventional direct multiplex addressing method will make each picture dot be in for very narrow " selection " pulse in each frame.The voltage of this strobe pulse is usually than high 7 to 13 times with average root-mean-square value voltage of frame period.In the very little LCD of time constant, the optical states of a picture dot can tend to turn back between the strobe pulse equilibrium state, has therefore reduced visual contrast, because human eye has the integral action that instantaneous brightness is averaged.In addition, the strobe pulse of high level may cause the situation that the location is unstable in the LCD of some type.

In order to overcome the problems referred to above, released a kind of method that is called active-addressed (active addressing).This active-addressed method uses the sets of signals that is made of a series of recurrent pulses continuously each column electrode to be driven.The common period T of these periodic pulse signals is corresponding with the frame period.Horizontal-drive signal is irrelevant with the image that will show, preferably quadrature and through standardized.So-called quadrature is meant that the integration of product in the frame period of the horizontal-drive signal of the horizontal-drive signal of certain delegation and another row equals zero.So-called standardization is meant that the horizontal-drive signal of each row has identical rms voltage in frame period T.

In each frame period, to calculate and produce a column signal for this row electrode according to total situation of each picture dot in the row for each row, its column voltage this frame period any time the value during t be proportional to each picture dot of considering in these row resulting and.(1 expression is " bright " with " pixel value " of the optical states of a picture dot of expression, + 1 expression is " secretly ", and-1 and+the corresponding shade of gray of value representation between 1) value of capable signal during that multiply by this picture dot at time t, again this MAD of each picture dot of gained has just been obtained together this and.If these orthonormal capable signals all are to switch back and forth between two capable voltage levels (+1 ,-1), that should be above-mentioned and the pixel value sum that just can be expressed as each picture dot that is added with the first row voltage level in the row deduct the pixel value sum of each picture dot that is added with the second capable voltage level.

If adopt above-mentioned active-addressed mode to drive, can prove on mathematics that then being added on each picture dot of display is a root-mean-square value voltage average in the frame period, therefore, this root-mean-square value voltage is directly proportional with the pixel value of this picture dot.Active-addressed advantage is to guarantee that displayable image has high contrast.Because active-addressed is at the strobe pulse that has added a succession of level quite low (2-5 doubly root-mean-square value voltage) on each picture dot, expanded in the cycle in entire frame, rather than only adds a high level strobe pulse at each picture dot of frame period.In addition, because the level of strobe pulse string is very low, therefore significantly reduced the unstable possibility that takes place in location.

Active-addressed problem is to require to finish in p.s. a large amount of calculating.With regard to the frame rate of a gray level display device with 480 row 640 row and per second 60 frames, require per second to finish similar 10,000,000,000 times and calculate.Certainly, it is possible finishing high-speed like this calculating with present technology, but also should consider so far the architecture of the low power consumption that do not propose as yet concerning the counter that is used for active-addressed display device.The power consumption problem is particular importance in the pocket such as battery powered laptop computer is used, and needs badly when battery life is this kind equipment initial designs and takes into account.

Therefore, thus just requiring to develop a kind ofly can reduce to mean calculation rate control that minimum makes that the desired power consumption of counter reduces greatly and the method and apparatus that drives active-addressed display device.

Proposed by the invention making has mean calculation rate in the disposal system of display of one group of electrode and reduces to minimum method and comprise following each step frame data being carried out active-addressed calculating with driving: needs are handled and these frame data of showing in each pixel value monitor; The contiguous pixel value of being monitored is compared, determined the resolving power of these data; According to determined data resolution control processing system, mean calculation rate is reduced to minimum then by revising active-addressed calculating.

Proposed by the invention making has mean calculation rate in the disposal system of display of one group of electrode and reduces to minimum device and comprise frame data being carried out active-addressed calculating with driving: one be used for monitoring needs are handled and these frame data of demonstration in the monitor of each pixel value; Thereby and comparer of receiving on the monitor, being used for the contiguous pixel value of monitoring is compared the resolving power of determining these data.This device also comprises a controller of receiving on the comparer, and this controller is reduced to minimum by revising active-addressed calculating with mean calculation rate according to determined data resolution control processing system.

The invention allows for a kind of electronic equipment, this electronic equipment comprises that an electronic circuit that is used for the frame video data information that produces is connected, is used for supporting and protecting the casing of electronic circuit with electronic circuit with one.Electronic equipment also comprises an active-addressed display of acceptance that is connected, is used for display message with electronic circuit, and this active-addressed display device has a series of picture dots that are subjected to one group of electrode control.Electronic equipment comprises that also one is connected with electronic circuit, is used for that those frame data are carried out active-addressed calculating and reduces to minimum device with disposal system and a mean calculation rate that makes disposal system of driving active-addressed display device.This device has a monitor that is used for each pixel value in the Monitoring Data frame and one to receive on the monitor, is used for the relatively more contiguous pixel value of monitoring to determine the comparer of this data resolution.This device also comprises a controller that is connected on the comparer, and this controller is reduced to minimum by revising active-addressed calculating with mean calculation rate according to determined data resolution control processing system.

In the accompanying drawing of this explanation:

Fig. 1 is the partial elevation view of conventional LCD;

Fig. 2 is the cut-open view along the line 2-2 sectility of Fig. 1;

Fig. 3 is one 8 * 8 Walsh (walsh) Jacobian matrix that the preferred embodiment of the present invention adopted;

Fig. 4 is the walsh function corresponding driving signal with Fig. 3;

Fig. 5 is the electrical block diagram as the display system of the preferred embodiment of the present invention;

Fig. 6 is the electrical block diagram of the disposal system in the display system shown in Figure 5;

Fig. 7 is the root-mean-square value correction factor counter in the disposal system shown in Figure 6 and the electrical block diagram of resolving power monitor;

Fig. 8 is the electrical block diagram of the counter in the disposal system shown in Figure 6;

Fig. 9 is the electrical block diagram of the controller in the disposal system shown in Figure 6;

Figure 10 is the electrical block diagram as the personal computer of the preferred embodiment of the present invention;

Figure 11 is the front elevation of personal computer shown in Figure 10;

Figure 12 is the workflow diagram as the display system of the preferred embodiment of the present invention;

Figure 13 is the workflow diagram as the root-mean-square value correction factor counter of the preferred embodiment of the present invention;

Figure 14 is the workflow diagram as the counter of the preferred embodiment of the present invention;

Figure 15 is the workflow diagram as the resolving power monitor of the preferred embodiment of the present invention;

Figure 16 divides into groups with the pixel value packet diagram of the situation of determining resolving power to pixel value by preferred embodiment of the present invention resolving power monitor for explanation;

Figure 17 is the workflow diagram as the controller of the preferred embodiment of the present invention;

Figure 18 is the firmware figure of explanation as the firmware situation in the resolving power monitor of the preferred embodiment of the present invention; And

Figure 19 is the workflow diagram as the resolving power monitor of another preferred embodiment of the present invention.

Referring to Fig. 1 and 2, these two figure show the partial elevational and the cut-open view of a LCD commonly used (LCD) 100 respectively.As seen from the figure, display 100 has two transparent substrates, and first substrate 102 and second substrate 204 wherein clip one deck liquid crystal material 202.Banding 204 has prevented liquid crystal material effusion LCD100.LCD100 also comprises one group by being configured in the column electrode 106 on second substrate 206 and being configured in the transparency electrode that the row electrode 104 on first substrate 102 constitutes.On the point (as plotted point 108) of each row electrode 104 and column electrode 106 intersections, the voltage that is added on the respective quadrature meeting electrode 104,106 can be controlled the optical states of liquid crystal material 202 wherein, thereby has formed a controlled picture dot.Though, that this preferred embodiment of the present invention is used is LCD, but the display device that is appreciated that other type also can use, as long as the optical characteristics of this display device is to being added in square responding of voltage on the picture dot as the root-mean-square value response of LCD.

8 * 8(, three rank of the walsh function 300 that Fig. 3 and 4 shows the preferred embodiment of the present invention respectively to be adopted) the corresponding Walsh ripple 400 of matrix.Walsh function is orthonormal, therefore preferentially is used for the foregoing former addressed display system that has.When being used for this display system, having the corresponding line electricity that voltage by the level of Walsh ripple 400 expression is added to LCD100 respectively and go up mutually.For example, Walsh waveform 404,406,408 can be added to respectively on first (uppermost), second, third electrode of column electrode 106, and the rest may be inferred.In LCD uses, preferably without Walsh ripple 402, because Walsh ripple 402 is used a undesirable DC voltage to LCD deflection.

Value that it should be noted that each Walsh ripple 400 in each time slot t is constant.For 8 Walsh ripples 400, the width of time slot t equals one of Walsh ripple 400 from beginning 410 to 1/8th of the width that finishes 402 recycle to extinction.When carrying out with 400 pairs of displays of Walsh ripple when active-addressed, the width setup of a recycle to extinction of Walsh ripple 400 is for equaling the frame period, just receives the time of a complete data set of each picture dot 108 that is used for controlling display 100.

8 Walsh ripples 400 can be distinguished and drive 8 of as many as (if without Walsh ripple 402 then be 7) column electrode 106 one by one.Certainly in fact display has many row.For example, at present widely used in notebook is the display of 480 row, 640 row.Because the walsh function matrix is to be got in confirmable each perfect set by 2 power, and because the requirement of orthogonality, any one Walsh ripple can only drive a column electrode at most, and therefore will drive a display with 480 column electrodes 106 need a 512 * 512(be 2 just ⁹* 2 ⁹) the walsh function matrix.In this case, the width on the time slot equals 1/512 of the frame period.Available 480 Walsh ripples drive 480 column electrodes 106, and remaining 32 (preferably comprising the first Walsh ripples 402 with direct current biasing) do not add use.

Fig. 5 shows the electrical block diagram as a display system 500 of the preferred embodiment of the present invention.This display system comprises one group of disposal system 510 that is connected with the Data In-Line 508 of 8 bit widths preferably, and being used for receiving needs each frame data of showing.In order to reduce the calculation requirement of each disposal system 510, LCD100 is divided into 8 districts 511, and by a corresponding disposal system 510 administrations, 160

row electrodes

104 and 240 column electrodes 106 are all contained in each district respectively.

Disposal system 510 is received on the such video digital-to-analog converter (DAC) 502 of the CXD1178Q type produced such as Sony (Song Corporation), so that the digital output signal of disposal system 510 is transformed into the row drive signal of corresponding simulation by the column output line 512 of 8 bit widths preferably.On the such analogue type row driver 504 of the SED1779DOA type driver that DAC502 such as Seiko-Yi Pusong company (Seiko Epson Corporation) is produced, so that with the row electrode 104 of the row drive LCD100 that simulates.There are two disposal systems 510 also to receive such as on the such numeric type line driver 506 of the SED1704 type driver of Seiko-Yi Pusong company production, so that drive the column electrode 106 of the LCD100 first half and Lower Half with one group of predetermined Walsh ripple by line output line 514.Certainly, DAC502, row driver 504 and line driver 506 also can be realized with other similar device.

Row driver 504 and line driver 506 receives and store a collection ofly need see Fig. 4 at time slot t() during be added to drive level information on each row electrode 104 and the column electrode 106.When row, line driver 504,506 are according to received drive level information of same then each drive level is added to corresponding row, column electrode 104,106, and remain to always row, line driver 504,506 receive next group just with next time slot t corresponding driving level information.Like this, the variation of the drive signal of each row, column electrode 104,106 is phase mutually synchronization.

Fig. 6 shows the electrical block diagram as a disposal system 510 in the display system of the preferred embodiment of the present invention.As seen from the figure, Data In-Line 508 receive disposal system 510 first, second write on the steering logic device 602,604.First, second writes steering logic device 602,604 and all comprises serial-parallel converter commonly used, counter and random-access memory (ram) steering logic.First, second function that writes steering logic device 602,604 is: reception becomes data byte from the data of each picture dot state of expression of Data In-Line 508 with the data conversion that is received, and delivers to first, second buffer RAM 606,608 by parallel bus 630 and stores.Data byte in first, second buffer RAM 606,608 writes steering logic device 602,604 by first, second and is organized into data block, and each data block is corresponding with each picture dot 108 that the row electrode 104 in the zone 511 of being determined, be in these disposal system 510 administrations by one group of size according to the present invention is controlled.

Controller 622 is received first, second by control bus 624 and is write on steering logic device 602,604 and first, second buffer RAM 606,608, and their operation is controlled.Controller 622 is by control bus 624, and virtual value line 636 and counter are partly enabled line 639 and received on first, second counter 610,612, and their operation is controlled.Controller 622 is received first, second row by bus 624 and is driven on the shift register 614,616, also their operation is controlled.Controller 622 is also received on effective value correction factor counter and the resolving power monitor 632 by bus 624, the control root-mean-square value is than positive divisor counter and resolving power monitor 632, and receives and determined correction factor and resolving power value that storage is sent than positive divisor counter and resolving power monitor 632 from root-mean-square value.Root-mean-square value is also received on the Data In-Line 508 than positive divisor counter and resolving power monitor 632, and each frame data is monitored, and determines correction factor and data resolution, and this will be illustrated in conjunction with Fig. 7 below.Receive and also have line synchro 638 and clock line 642 on the controller 622, make the work and input data sync of controller 622.

Controller 622 is coordinated the work that first, second writes steering logic device 602,604, makes first, second write each frame data that steering logic device 602,604 alternate treatment receive from Data In-Line 508.That is to say that first writes steering logic 602 receives frame data and these frame data are sent to first buffer RAM 606.Then second write steering logic device 604 reception next frame data and these frame data are sent to second buffer RAM 608.First write steering logic device 602 and receive again the next frame data and send these frame data to first buffer RAM 606 then, by that analogy, receive and transmit every frame data.

First, second buffer RAM 606,608 is received on first, second counter 610,612 by parallel data bus line 634, so that the value that is driven into electrode 104 in each Walsh ripple time slot t is calculated.Panel data bus 634 should be enough wide, to guarantee to transmit simultaneously the pixel value by all picture dots 108 of each row electrode 104 control in the zone 511 of the LCD100 of this disposal system 510 administrations.For example, be in the disposal system 510 of 8 bits at administration 240 row, each pixel value, first, second parallel data bus line 634 all must need 1920 IEEE Std parallel highways.Will explain detailedly below first, second counter 610,612.

First, second counter 610,612 is also received first, second row by transfer bus 636 and is driven on the shift register 614,616, by transfer bus 636 each walsh function value is changed to first, second counter 610,612.Parallel transfer bus 636 must be enough wide, to guarantee each bit walsh function value of going of these disposal system 510 administrations of switching.For example, in the disposal system 510 of administration 240 row, parallel transfer bus 636 must need 240 IEEE Std parallel highways.Though being appreciated that walsh function is preferred function, first, second counter 610,612 also can use other orthonormal function to calculate.

The function that first, second row drives shift register 614,616 is that slave controller 622 receives the walsh function value in corresponding each the time slot t of each row that administers with this disposal system 510.After receiving the walsh function value in the time slot t, walsh function value in the time slot t that first, second row driving shift register 614,616 just can receive is given to first, second counter 610,612, be used for calculating each the row drive signal in the time slot t, this will be illustrated afterwards.First, second row drives shift register 614,616 and also uses the walsh function value of administering in corresponding each the time slot t of each row with disposal system 510 to drive line output line 514 with the speed of controller 622 controls according to the present invention.

Controller 622 is coordinated the operation of first, second counter 610,612 and first, second row driving shift register 614,616 and is controlled, and makes first, second counter 610,612 and first, second row drive each frame data that shift register 614,616 alternate treatment are read from first, second buffer RAM 606,608.That is to say that first counter 610 and first row drive shift register 614 and handle frame data and drive column output line 512 and line output line 514 according to the value that these frame data are calculated.Then first counter 612 and second row drive shift register 616 processing next frame data and drive column output line 512 and line output line 514 according to the value that these frame data are calculated.First counter 610 and the first row driving shift register 614 are handled the next frame data again and are driven column output line 512 and line output line 514 according to the value that these frame data are calculated then, and the rest may be inferred, handles every frame data.

So will take the reason of alternate treatment to be in disposal system 510, when first buffer RAM 606 was just receiving the new data of a frame, those frame data that second buffer RAM 608 can receive last time send 612 outputs of second counter to, and vice versa.Obviously, all be effective because first, second counter 610,612 and first, second row drives shift register 614,616 every frame, therefore can save one of them counter and a row drives shift register.Certainly this just needs additional control and data routing selecting circuit, so that make an independent counter alternately to receive data from first and second buffer RAM 606,608.Equally, first and second write steering logic device 602,604 and can be merged into independent one and write the steering logic device.Yet, make for integrated circuit, had better adopt complete compound architecture shown in Figure 6.

Fig. 7 shows the electrical block diagram of imitating positive divisor counter and resolving power monitor 632 as the root-mean-square value in the disposal system 510 of the preferred embodiment of the present invention.Parts 632 have be used for receiving inputted signal and control signal Data In-Line 508 and be used for controlling the control bus 624 of root-mean-square value correction factor counter 701 and resolving power monitor 700.For with+1 picture dot of representing one complete " end ", with-1 represent the picture dot of complete " unlatching " and employing have only+1 with the display of the walsh function of-1 value, the correction factor of each row of display is

\frac{1}{\sqrt{N}} \sqrt{N - Σ_{i = 1}^{N} I_{1}^{2}} - - - (1)

Wherein: N is the line number of actual driving, and Ii is the pixel value of the picture dot in this row the third line.

The span of considering 8 bit pixel values is 0-255, supposes that the line number that is driven is 240, and then formula (1) becomes

\frac{1}{\sqrt{240}} \sqrt{240 - Σ_{i = 1}^{240} {(\frac{I_{i} - 127.5}{127.5})}^{2}} - - - (2)

This formula can be reduced to

\frac{1}{127.5 \sqrt{240}} \sqrt{250 Σ_{i = 1}^{240} I_{i} - Σ_{i = 1}^{240} I_{i}^{2}} - - - (3)

Following formula can further be reduced to

\frac{\sqrt{250 Σ_{i = 1}^{240} I_{i} - Σ_{i = 1}^{240} I_{i}^{2}}}{1975} - - - (4)

If line number is kept to 120, then formula (3) is

\frac{1}{127.5 \sqrt{120}} \sqrt{255 Σ_{i = 1}^{120} I_{i} - Σ_{i = 1}^{120} I_{i}^{2}} - - - (5)

Following formula can be reduced to

\frac{\sqrt{255 Σ_{i = 1}^{120} I_{i} - Σ_{i = 1}^{120} I_{i}^{2}}}{1397} - - - (6)

The function of root-mean-square value correction factor counter 701 is exactly to go out this correction factor according to the column count that the data that resolving power monitor 700 is sent here by DOL Data Output Line 919 will drive for each group.According to this preferred embodiment of the present invention, the data on the DOL Data Output Line 719 can be the copies of the data on the Data In-Line 508, or an one subclass, and this will be illustrated below.

Root-mean-square value correction factor counter 701 has first totalizer 710 of receiving on the DOL Data Output Line 719, is used for the pixel value that is received is sued for peace.The output terminal of first totalizer 710 is received two input ends of first subtracter 712.In first subtracter 712, subtracted input data 8 bits that at first move to left, be equivalent to that quilt subtracted the input data and multiply by 256, so to form one be the output valve of 255 ∑ I.

DOL Data Output Line 719 is also received first look-up table 704 that is used for determining pixel value square.The output terminal of first look-up table 704 is received the input end of second totalizer 706, and pixel value square is sued for peace.The output terminal of second totalizer 706 is received the subtrahend input end of second subtracter 708, and the output terminal of first subtracter 712 is then received the minuend input end of second subtracter 708, thereby obtains difference 255 ∑ I-∑ I ²The output terminal of second subtracter 708 is received second look-up table 714, to determine square root

\sqrt{250 ΣI - {ΣI}^{2}}

。

The output terminal of second look-up table 714 is received an input end of multiplier 716.Another input end of multiplier 716 is received resolving power monitor 700 by program line 712, accepts monitor 700 programmings, makes that multiplier is among two normal value K.The value of K provides the factor 1975 of equation (4) or the factor 1397 of equation (6) for division.Resolving power and the desired various adjustment of LCD100 determined by resolving power monitor 700 that this value will illustrate below depending on to drive level.The output terminal of multiplier 716 is received controller 622 by control bus 624, with the correction factor that calculates

K = \sqrt{250 ΣI - {ΣI}^{2}}

Store.Obviously, can replace in first, second look-up table 704,714 and the multiplier 716 some or all with an ALU or microcomputer.Can also see, also can replace whole devices of root-mean-square value correction factor counter 701 with a microcomputer.

Resolving power monitor 700 has a monitoring processor 716, and it is connected with the ROM (read-only memory) that has comparison program 720 (ROM) 718 with the random-access memory (ram) 717 of temporary storage data.Comparison program 720 is compared the resolving power of specified data according to the preferred embodiment of the present invention to contiguous monitoring pixel value.Monitoring processor 716 is also received on the Data In-Line 508, receives each frame data that is made of pixel value.By under the control of control bus 624, monitoring processor 716 can intactly output to the pixel value that receives on the DOL Data Output Line 719 at controller 622.Perhaps, monitoring processor 716 also can output to one of the pixel value that receives on the DOL Data Output Line 719 alternately, thereby makes root-mean-square value correction factor counter 701 desired calculation rates reduce half.Adopt the present invention,, therefore reduced the power consumption of root-mean-square value correction factor counter 701, thereby prolonged the life-span of battery in having the battery-powered equipment of display system 500 owing to reduced calculation rate, very favourable.

Comparison program 720 comprises that up initiator 722, resolving power determine program 724, ordo judiciorum 726, up check program 730 and designated frame portion identifier 732.Up initiator 722 is used for forming one group of group pixel value in succession, every group contain number for sound out number with adjacent pixel 108 corresponding pixel values, the initial value of exploration number is scheduled to, and for example is 2; Be every group of two picture dots.Then, resolving power is determined the pixel value in each group of program 724 inspections, equates mutually if find each the interior pixel value of each group in nearly all group, determines that then the resolving power that records in picture dot equals to sound out number at least.Perhaps, ordo judiciorum 726 equates mutually that according to each pixel value in each group in not all group (being that at least one group contains different pixel values) determine that resolving power is less than souning out number.

Up check program 730 equates to increase capacity of each group mutually according to each pixel value in each group in nearly all group, forms less group, and every group contains the pixel value that number is bigger exploration number.Up check program 730 also constantly heavily has definite resolving power when increasing the exploration number, increase to this system gives the maximal value of determining earlier until souning out number, perhaps increase to the value that each pixel value in each group that is not in nearly all group is equated mutually.Designated frame portion identifier 732 is the information in which zone of LCD100 to monitoring processor 716 relevant root-mean-square value correction factor counters of output and the 632 responsible processing of resolving power monitor.

Fig. 8 shows the electrical block diagram as one of counter in the disposal system 510 of the preferred embodiment of the present invention 610,612.This counter has the XOR gate (XOR) 802,806 of one group of 8 bit.XOR gate 802,806 is received on the parallel data bus line 634, so that receive pixel value from buffering RAM606, one of 608 under the control of controller 622.XOR gate 802,806 is also received on the parallel transfer bus 636, so that also drive each row value that one of shift register 614,616 connects walsh function from row under the control of controller 622.The function of XOR gate 802,806 be when the logical one of corresponding row value to each bit supplement of pixel value, and whenever corresponding row value during for logical zero the maintenance pixel value constant.Each pixel value through supplement must add below the 1(will give explanation), so as from that add up by counter 610,612 and correctly deduct this pixel value.

The output terminal of XOR gate 802,806 is received on the interconnective totalizer 804,806, so as to produce without those pixel values of XOR gate 802,806 supplements and, and from this and deduct each pixel value through supplement.The input end of first totalizer 804 is received the output terminal of correction factor Adjustment System.The correction factor Adjustment System is made up of device 816,818,820,824, is used for according to rising the symbol of functional value adjustment correction factor in the Wal of this time slot with the corresponding dummy row of the row that calculating unit, and adds essential value 1 for each pixel value through supplement.

For simplicity's sake, but these totalizers 804,808 and XOR gate 802,806 have been divided into two switch sections 850,852, each part all has 120 XOR summing stages, thereby make the operation of counter 610,612 be adapted to two other resolving powers of level, this will be illustrated below.Be familiar with one will understand that of this technology, but can mark off some switch sections again, so that counter 610,612 adapts to other resolving powers at different levels according to this preferred embodiment of the present invention.For example, in order to adapt to four other resolving powers of level (i.e. the resolving power of one, two, four and eight picture dot) but each switch sections that just requires to be divided into has 30,30,60 and 120 XOR summing stages respectively.

The output terminal that is the totalizer 804 of the 120th row service is received first electronic switch 810.First electronic switch 810 will be received the input end of the totalizer 808 that is the 121st row service for the output terminal of the totalizer 804 of the 120th row service when partly being enabled line 639 by counter and start, and when not started, will receive the parallel drive device 814 of 8 bits for the output terminal of the 120th capable totalizer 804 of serving by counter certain applications line 639, column output line 512 is driven.Second electronic switch 812 will be received parallel drive device 814 for the output terminal of the 240th capable totalizer 808 of serving when partly being enabled line 639 startups by counter.Counter is partly enabled line 639 and is also received all XOR gate 806 and totalizer 808, with the state of partly enabling line 639 according to counter enable and stop using these XOR gate 806 and totalizer 808.

But when counter 610,612, be divided into the local timesharing of switch in the above described manner, counter 610,612 can be that 1 * 1 picture dot or 2 * 2 picture dots are operated according to the data resolution that is received just.At resolving power is that desired calculation rate reduces in counter 610,612, thereby has reduced power consumption effectively under the low situation of 2 * 2 picture dots.Reduce half as described further below like that by going the walk rate that drives shift register 614,616, make number reduce the row drive signal of being calculated and extend to and fill up among the LCD100 whole regional 511 by counter 610,612 services, thus the resolving power that has produced a width of cloth resolving power and the data that received image accordingly.

The correction factor Adjustment System has one to receive the XOR gate 816 of controller 622 by control bus 624, is used for receiving the correction factor that is stored in these group row among the RAM906 in advance by controller 622.XOR gate 816 is also by the dummy row value of virtual value line 636 receptions with the walsh function of the corresponding dummy row of the row unit of being calculated.XOR gate 816 is received an input end of totalizer 818.Another input end of totalizer 818 is connected with virtual value line 636.Like this function of XOR gate 816 of Lian Jieing and totalizer 818 are symbols of making correction factor value whenever the dummy row value during for logical one for negative, and whenever the dummy row value during for logical zero for just.The output terminal of totalizer 818 is received an input end of totalizer 820.It is program control that another input end of totalizer 820 is accepted controller 622 by control bus 624, for each time slot beyond first time slot all be half the capable corrected value that equals handled row group, for first time slot then for equaling the handled capable corrected value of organizing number of going.Program control value remains in the addressable register 824.

The reason that adds capable corrected value is all to add 1 requirement in order to realize to each pixel value through supplement.For example, the Walsh factor of organizing for 240 true row all has 120 logical ones just at each time slot beyond first time slot, at first time slot 240 logical ones is arranged then.This means all will have 120 pixel values to accept the supplement operation of XOR gate 802,806 in the counter 610,612, then can have 240 pixel values will accept the supplement operation for first time slot for each time slot beyond first time slot.As previously mentioned, add 1 must for each pixel value through supplement, so as correctly from deduct these pixel values.Totalizer 820 and addressable register 824 are finished this function.

Fig. 9 is the electrical block diagram as the controller 622 of the disposal system 510 of the preferred embodiment of the present invention.Controller 622 has a microprocessor 901, receives the ROM (read-only memory) (ROM) 902 that contains operating system firmware.ROM902 has write the designated frame portion identifier 912 with that part (being the zone 511 of LCD100) of these frame data of these disposal system 510 specified processing under the indicating control 622 in advance.ROM902 is equipped with first data set 904 of the time slot value of 256 walsh functions, is used for 240 groups of column electrodes 106 of respective drive and a dummy row.ROM902 also is equipped with second data set 914 of the time slot value of 128 walsh functions, is used for 120 groups of column electrodes 106 of respective drive and a dummy row.

ROM902 is equipped with a combinator 916, is used for making up some contiguous electrodes 104,106 according to the resolving power of the received data of being determined by resolving power monitor 700.ROM902 also is equipped with a driven management program 918, and the driving of electrode 104,106 of combination is managed, and makes the same drive of each electrode in same group.Best, ROM902 is equipped with a minimized program 920 of time slot, is used for selecting the least possible active-addressed time slot according to the resolving power of received data, and timeslot number is distinguished as 128 for what have 2 * 2 picture dots, then is 256 for the resolving power with 1 * 1 picture dot.

Obviously, also can increase the level particles degree, as be increased to two picture dots, and not increase vertical granularity.For example, the firmware of controller 622 is changed a little, by will the value when driving calculation times and reduce by half that to keep timeslot number still be the resolving power of 1 picture dot obtaining the resolving power of 2 * 1 picture dots.This just requires adjacent a pair of row with same row drive, and each row is still used each horizontal-drive signal drive.

Microprocessor 910 also is connected with random-access memory (ram) 906.RAM900 has a memory block, and the function that is used for storing some devices that make disposal system 510 replaces the function alternator 908 of (as previously mentioned).RAM900 also has a memory block, is used for storing the correction factor 910 of 80 to 160 row that root-mean-square value correction factor counter 710 sends by control bus 624, and quantity is determined by the resolving power that can receive data.

Microprocessor 901 is also received on frame synchronization line 638 and the clock line 642, so that (for example being the processor of personal computer) distinguishes received frame synchronizing signal and clock signal from the frame data source.Microprocessor 901 is connected with disposal system 510 with virtual value line 636 by control bus 624, and disposal system 510 is controlled.

Figure 10 shows the electrical block diagram as the personal computer 1000 of the preferred embodiment of the present invention.As seen from the figure, the display system 500 of computing machine 1000 is connected with microcomputer 1002 by Data In-Line 508, to receive each frame data that microcomputer 1002 is sent.Display system 500 receives frame synchronizing signal and the clock signal that microcomputer 1002 is sent by frame synchronization line 638 and clock line 642.Microcomputer 1002 is connected with keyboard 1004, to receive the information that the user sends.

Figure 11 is the front elevation as the personal computer 1000 of the preferred embodiment of the present invention.As seen from the figure, display system 500 is by casing 1102 supportings and protection.Also show keyboard 1004 among the figure.Usually make the battery powered unit of pocket such as personal computer 1000 such personal computers.Display system 500 is fit to this battery powered unit very much, because compare with the disposal system of the active-addressed display device of using always, the calculation rate of the disposal system 510 of display system 500 reduces greatly, has therefore reduced power consumption greatly, thereby has prolonged the life-span of battery.

Before the working condition of explanation display system 500, at first some terms are defined.Below used term " first processor " be meant by first in each disposal system 510 and write steering logic device 602, first buffer RAM 606, first counter 610 and first row drives the first that shift register 614 constitutes.So-called " second processor " is meant by in each disposal system 510 each and second writes steering logic device 604, second buffer RAM 608, second counter 612 and second row and drive the second portion that shift register 616 constitutes.Root-mean-square value correction factor counter 701 in each disposal system 510, resolving

power monitor

700 and 622 pairs of first processors of controller and second processor are public.In addition, the term " row " that uses in conjunction with Figure 12-14 explanation of being done and " OK " are represented single row and single row when the resolving power of the data that received is a picture dot, and when resolving power is two picture dots or more a plurality of picture dot, represent the row group and go group, the size of group equals resolving power, and all electrodes in each group are driven by a public electrode drive signal.

The working condition of system is as follows." when receiving frame synchronization, disposal system 510 designated treatment was which part of these frame data under the controller 622 of each disposal system 510 was determined according to designated frame portion value respectively.Then, starting this disposal system 510 after the specified portions of controller 622 Frames such as grade arrives handles.Controller 622 access function alternators 908 are to control the processing that hockets of first, second processor.

Figure 12 shows the operational flowchart as the display system 500 of the preferred embodiment of the present invention.Beginning, the controller 622 of each disposal system 510 is waited for frame synchronizing signal (step 1202).When synchronizing signal arrives, the first processor current data frame of packing into, and each root-mean-square value correction factor counter 632 calculates each row correction factor of that part of Frame of specifying affiliated disposal system 510 processing, and the row correction factor that will be calculated by controller 622 deposits the row correction factor memory block 910(step 1204 among the RAM906 in then).

Simultaneously, second processor is used according to frame data of former existence second buffer RAM 608 in each second counter 612 and is offered the walsh function value that second row drives shift register 616 by controller 622 and calculate each column signal, drives column output line 512 and line output line 514(step 1206 respectively with column signal that calculates and walsh function value).The appropriate section of 510 pairs of each frame data of disposal system was calculated and in the appropriate time row, line output line 512,514 is driven under each controller 622 was coordinated.

Then, first, second processor is waited for frame synchronizing signal (step 1208) again.When frame synchronizing signal arrives, first processor is used according to those frame data in former existence first buffer RAM 606 in each first counter 610 and is offered the walsh function value that first row drives shift register 614 by controller 622 and calculate each column signal, drives column output line 512 and line output line 514(step 1210 respectively with column signal that calculates and walsh function value).The appropriate section of 510 pairs of each frame data of disposal system was calculated and in the appropriate time row, line output line 512,514 is driven under each controller 622 was coordinated.

Simultaneously, second processor current data frame of packing into, and each root-mean-square value correction factor counter 632 calculates each row correction factor of that part of Frame of specifying affiliated disposal system 510 processing, and the row correction factor that will be calculated by controller 622 deposits the row correction factor memory block 910(step 1212 among the RAM906 in then).Then, flow process is returned the step 1202, repeats above-mentioned processing.

Owing to alternately full frame data are managed throughout and deposit first and second buffer RAM 606,608 before system 510 is handled in, therefore display system 500 makes data obtain parallel processing effectively, thereby reduced calculation rate significantly, for example be 1/240 of active-addressed display system commonly used.By resemble as described as follows LCD100 is divided into line number be LCD100 line number half 8 the district 511, treatment capacity has reduced 15 times again.Therefore, each disposal system can be operated with the clock frequency about 2.5 megahertzes, does not make the clock frequency that then requires 40 megahertzes of dividing.Because the reduction of calculation rate has reduced the power consumption of display system 500 significantly, thereby has prolonged the life-span of battery in the portable electronic device that has display system 500 greatly.

Figure 13 shows the workflow diagram as the root-mean-square value correction factor counter 701 of the preferred embodiment of the present invention.Beginning, the appointment that controller 622 is waited for after frame synchronizing signal be (step 1304) constantly, and this is equivalent to specify the startup in the zone 511 that starts the LCD100 that handles these controller 622 services to handle constantly constantly.Handle constantly when having arrived to start, first, second totalizer 710,706 was initialized to for zero (step 1304) by controller 622.Then, monitoring processor 716 begins pixel value is sent to the root-mean-square value correction factor counter 701(step 1306).Then, first look-up table 704 is pixel value square (step 1310), through square pixel value deliver to second totalizer 706 and add up, obtain ∑ I ²(step 1314).Simultaneously, pixel value is delivered to first totalizer 710 and is added up, and obtains the ∑ I(step 1312).If also do not receive all capable pixel values of those row that calculate in the step 1316, then flow process is returned and is gone on foot 1306, receives next pixel value.

On the contrary, if step 1316 those row that calculate pixel values of all row all received, ∑ I was come with the 255(step 1318 as described in during then as former discussion Fig. 7).Then, from step 1318 values that obtain, deducting ∑ I ²(step 1320), subtraction is finished by second subtracter 708.Then, second look-up table 714 is determined the square root (step 1322) of step 1320 values that obtain.To go on foot for the 1322 value K(steps 1323 to receive on duty that obtain by multiplier 716 again) from monitoring processor 716.Then, root-mean-square value correction factor counter 701 by control bus 624 with the row correction factor value of these row (

) send to controller 622, controller 622 is stored in this value the memory block 910(step 1324 of the row correction factor of depositing these row that calculated among the RAM906).

In the step 1326, not last row of disposal system 510 services if controller 622 is determined these row that calculated, then controller 622 makes root-mean-square value correction factor counter 701 turn back to the step 1304, begins to handle the next column data.On the contrary, are last row of disposal system 510 services if controller 622 is determined these row that calculated, then controller 622 makes root-mean-square value correction factor counter 701 turn back to the step 1302, and next startup of wait handled arriving constantly.

Figure 14 shows the workflow diagram as the counter 610,612 of the preferred embodiment of the present invention.Beginning, controller 622 wait for that after frame synchronizing signal the startup of appointment handles the startup in zone 511 of the LCD100 of this controller 622 services and handle constantly (going on foot 1402).Handle constantly when having arrived to start, controller 622 is according to selecting the next time slot of handling by resolving power monitor 700 established data resolving powers, add that with each row of this controller 622 services dummy row drives shift register 614,616 in the walsh function value of this time slot (for example, this time slot 121 or 241 walsh function values) to row and carries out initialization (step 1404).

Then, controller 622 is selected next columns, receives the correction factor value of these row that calculated earlier from RAM906, and correction factor value is sent to counter 610,612(step 1406).Then, controller 622 control buffer RAM 606,608 send this pixel value that is listed as each row to counter 610,612(step 1408 concurrently).Simultaneously, counter 610,612 drives shift register 614,616 from row and receives the walsh function value (1410) of each row of these controller 622 services at this time slot.Counter 610,612 is adjusted the value (step 1412) of correction factor according to the dummy row drive signal of these row in the value of this time slot, and the adjustment situation is described in conjunction with Fig. 8 in front.

Then, horizontal-drive signal is that pixel value of each row of 1 adds that to deduct horizontal-drive signal in these row again be that each capable pixel value of 0 obtains a row drive signal (step 1414) together in the correction factor value of counter 610,612 by will be through adjusting and this row.Then, counter 610,612 and row drive shift register 614,616 respectively with this row drive signal that calculates and give horizontal-drive signal that choosing determines in this time slot drive column output line 512 and line output line 514(step 1416).

It should be noted that best executed in parallel simultaneously of

step

1406,1408,1410,1412 and 1414, to obtain best computing velocity.In addition, as the front in conjunction with Fig. 5 discuss, only drive each line driver 506 in a preferred embodiment of the invention with two disposal systems 510.Obviously, promptly using single disposal system 510 also is to drive these line drivers 506, because the horizontal-drive signal of each corresponding line all is to give fixed and mutual equating in two groups (one group of first half at LCD100, one group of Lower Half at LCD100) respectively having 240 row.

In the step 1418, controller 622 checks are to obtain handling for last row of selected time slot.If also do not have, then flow process turns back to the step 1406, selects following the processing.Otherwise controller 622 just checks last time slot of these frame data whether to obtain handling (step 1422).If also do not have, then flow process turns back to the step 1404, and time slot was handled under controller 622 was selected.Otherwise flow process just turns back to step 1402, pending next frame data such as controller 622.

More than for the discussion of the preferred embodiment of the present invention with all are situations that pixel value is represented with 8 bits.Obviously the present invention can be through adjusting the situation of representing pixel value with more or fewer bit numbers (for example 16 bits or 4 bits) that adapts to.

Figure 15 shows the workflow diagram as the resolving power monitor 700 of the preferred embodiment of the present invention.Beginning, monitoring processor 716 calls comparison program 720 firmwares, sounds out number and is set to two picture dots (step 1502).Then, monitoring processor 716 the data (step 1504) of waiting for that it serves by the designated frame portion of designated frame portion identifier 732 signs.When designated frame portion data arrived, monitoring processor 716 was by group inspection each pixel value that receives (step 1506) in each group of every group exploration numbers such as picture dot number.After designated frame portion data were all through inspection, monitoring processor 716 determined whether that each group of being checked all contains the identical picture dot of value (step 1508).All contain the identical picture dot of value if not each group, then monitor processor 716 resolving powers and be set to sound out 1/2nd of number, be i.e. a picture dot (step 1510).

On the contrary, if determine that at steps 1508 monitoring processor 716 each group all contains the identical picture dot of value, then monitor processor 716 resolving powers and be set to this exploration number (step 1512).Then, monitoring processor 716 is checked the maximal value whether this exploration number has reached system.That is the adaptable maximum of system (slightly) resolution value (step 1514).If handle stopping (step 1516).Otherwise monitoring processor 716 will be soundd out number and double to turn back to the step 1504 after (step 1518), wait for the data arrival of next designated frame portion.

Figure 16 is pixel value packet diagram (1600), shows resolving power monitor 700 according to the situation of preferred embodiment of the present invention pixel value grouping with definite resolving power.As mentioned above, what monitoring processor 716 was handled is the pixel value of 8 bits, and each zone 511 of LCD100 all is 160 to 240 row, so a Frame in each zone 511 all has 160 * 240=38,400 picture dots.For convenience's sake, example pixel value 1602 is expressed as dibit, and frame data of handling then are expressed as being made up of 16 example pixel values 1602.Certainly, monitoring processor 716 must make an amendment slightly handling the structure of this comparatively simple sample data frame, but determines that the principle of resolving power is the same.

As mentioned above, monitoring processor 716 at first is divided into example picture dot 1602 one by one the group of representing with two tuple pivots 1604 of being made up of two picture dots.For example pixel value 1602, monitoring processor 716 will determine that resolving power is two picture dots, because two all tuple pivots 1604 all contain the identical picture dot of value.If system further is modified as the maximum resolution that adapts to four picture dots, then monitors processor 716 and also these example pixel values 1602 will be divided into four-tuple 1606,1610 and estimate.After having estimated four-tuple 1606,1602, monitoring processor 716 can determine that still resolving power is two picture dots, because have only four-tuple 1610 to contain all identical picture dot of value, and four-tuple all contains incomplete identical pixel value for 1604 every groups.

Figure 17 shows the workflow diagram as the controller 622 of the preferred embodiment of the present invention.Beginning, controller 622 receives a new resolving power value (R) from resolving power monitor 700, for example is the R=2(step 1702).Thereby, these new values of controller 622 check whether with the resolving power value identical (going on foot 1704) of previous frame.If identical, then controller 622 usefulness with control and handle the employed same operation parameter of previous frame data and proceed work.On the contrary, if find the different of new R value and next frame, the then next designated frame of controller 622 waits portion's data (going on foot 1708) at steps 1704 controllers 622.When designated frame portion data arrived, controller 622 called the grouping Cheng Chengxu 916(step 1710).To enable the 1/R device that calculates in 610,612.For example, if the new value of R is 2, then controller 622 starts each XOR gate 802 and the totalizer 804 in counters 610,612 first halfs.In the step 1710, controller 622 is also controlled and is write steering logic device 602,604, only the pixel value every R-1 in the pixel value that is received is write buffer RAM 606,608.For example, if R=2 then writes steering logic device 602,604 and just will write every one pixel value.

Then, controller 622 calls driven management program 918, the transposition frequency of row driving shift register 614,616 is reduced to the 1/R(step 1712 of frequency used when resolving power is a picture dot).This will guarantee that adjacent R row are driven with identical horizontal-drive signal by identical row drive signal respectively with R adjacent row, because each row.The clock frequency of line driver 504,506 is identical when still being a picture dot with resolving power, once just has R electrode to obtain driving thereby make row drive shift register 614,616 every displacements.

Therefore, the preferred embodiments of the present invention provide the method and apparatus of a kind of counter driving active-addressed display device that required power consumption reduces greatly.Come substituting disposable to calculate the picture dot except adopting simultaneously institute's pixel value to row to carry out parallel computation, the preferred embodiments of the present invention can also reduce calculation rate automatically whenever the resolving power of the data that received satisfies in the time of can not having a significant effect to the image that shows because of the minimizing of calculation rate.

If the resolving power of the data that received has had change, for example change into 2 * 2 picture dots from 1 * 1 picture dot, then row electrode calculated amount automatically is reduced to original 1/4.According to the side circuit of realizing disposal system 510,, therefore carry out the required electric energy of calculating and also reduced by three times substantially because calculation rate has reduced by three times.Compare with active-addressed display device disposal system commonly used, the equipment of the portable battery power supply that required electric energy small object notebook is such is particularly advantageous, always wishes that in this equipment battery can use more for a long time.

Figure 18 shows the firmware 1800 as the resolving power monitor 700 of another embodiment of the present invention.What firmware 1800 was different with firmware essence shown in Figure 7 is that down initial program 1802 and descending check program 1804 have replaced up initialize routine 722 and up check program 730.The effect of these two alternative programs is to make resolving power monitor 700.The direction of testing different exploration numbers is opposite, and situation is as follows.

Referring to Figure 11, there is shown workflow diagram as the resolving power monitor 700 of another embodiment of the present invention.Beginning, monitoring processor 716 calls comparison program 720, sounds out number and is set to the maximal value (step 1902) that this system may reach.For example, if a system can adapt to the calculation rate that resolving power is one, two or four picture dot, then sound out number and be set to 4.Then, monitoring processor 716 waits for that the designated frame portion data by designated frame portion identifier 732 signs that it can be served arrive (step 1904).When designated frame portion data arrived, monitoring processor 716 was checked every group picture dot number by group and is equaled to sound out each pixel value that receives (step 1906) in each group of number.After designated frame portion data were all through inspection, monitoring processor 716 determined whether that each group of being checked all contains the identical picture dot of value (step 1908).If each group all contains the identical picture dot of value, then monitor processor 716 resolving powers and be set to this exploration number, for example be 4 picture dots (steps 1912).

On the contrary, if it is inequality to be determined to a rare pixel value of organizing each contained picture dot at steps 1908 monitoring processor 716, whether then monitor processor 716 these exploration numbers of check) greater than the 1(step 1910.If not, then monitoring is handled 716 resolving powers and is set to equal this exploration number, handles to stop (step 1916).If find to sound out numbers greater than 1 at steps 1910 monitoring processors 716, then monitor processor 716 and should sound out number and go on foot 1904 divided by turning back to after 2, wait for the data arrival of next designated frame portion.This embodiment of the present invention is the most favourable for normally thick rather than thin those display systems of resolving power of the data that received, because this embodiment tests at the beginning and just sounds out number and be set to the thickest system resolution.

Therefore, above two preferred embodiments of the present invention all provide the method and apparatus of the calculation rate that significantly reduces active-addressed display system, thereby greatly reduce the energy consumption of active-addressed display system.Owing to be automatically to reduce calculation rate according to the resolving power of the data that received, so the minimizing of calculation rate can't cause that the quality of shown image reduces, and is very favourable.The present invention is desirable especially to the battery-powered equipment that resembles notebook and so on, and this kind equipment requires display system to have very high efficient, so that battery reaches the longest serviceable life.

Claims

1, a kind ofly make that a Frame is carried out active-addressed calculating reduces to minimum method with the mean calculation rate in the disposal system that drives a display with one group of electrode, is characterized in that described method comprises following each step:

The monitoring to handle with the data presented frame in each pixel value;

Relatively the Lin Jin pixel value of being monitored is to determine the resolution of these data; And

Control processing system makes mean calculation rate reduce to minimum by revising active-addressed calculating according to determined resolution.

2, the method that claim 1 proposed, it is characterized in that this step of wherein said control processing system comprise following each the step:

The adjacent several of electrode combine respectively according to determined data resolution with this group; And

Drive each adjacent electrode group of combination respectively with one group of common drive signal,, therefore reduced mean calculation rate owing to can use less drive signal.

3, the method that claim 2 proposed is characterized in that wherein said controlled step also comprises according to the drive signal number that has reduced to select minimum possible active-addressed time slot, thereby further reduces mean calculation rate.

4, the method that claim 1 proposed is characterized in that wherein said comparison step comprises following each step:

Form the predetermined contiguous set of pixel value, every group of that contain that number equals to sound out number and the corresponding pixel value of contiguous picture dot, this initial value of souning out number is scheduled to;

Check each pixel value in each group; And

When each pixel value in the group of finding nearly all grouping equates mutually, determine that the resolution that records in the picture dot is at least the exploration number.

5, the method that claim 4 proposed is characterized in that wherein said comparison step also comprises when each pixel value equates mutually in finding to be less than nearly all group group, judges that resolution is less than the exploration number.

6, the method that claim 4 proposed is characterized in that wherein said comparison step also comprises following each step:

When each pixel value equates mutually in finding nearly all group group, enlarge each group, thereby form less group, and each group contains the picture dot that number equals bigger exploration number;

Repeat described inspection, determine and enlarge each step, satisfy that until the exploration number interior each pixel value that is less than nearly all group is equated mutually; And

Specify in and make in this step of comparison adjacent pixel value that each pixel value equates the resolving power of the maximal value of employed exploration number for these data mutually in nearly all group the group.

7, the method that claim 4 proposed is characterized in that wherein said this step of relatively adjacent pixel value also comprises following each step:

Each pixel value equates mutually and sounds out number greater than 1 the time in finding to be less than nearly all group group, dwindle each group, thereby form more group, and each group contains the pixel value that number equals less exploration number;

Repeat described inspection, determine and dwindle each step, satisfy until souning out number that each pixel value equates mutually in the group that makes nearly all group, this sounds out number greater than 1;

Specify in and make in this step of comparison adjacent pixel value that each pixel value equates the resolving power of the maximal value of employed exploration number for these data mutually in nearly all group the group, this sounds out number greater than 1, and

When the exploration number has been reduced to 1, specify the resolving power that picture dot is these data.

8, a kind of making reduced to minimum device with the mean calculation rate in the disposal system that drives a display with one group of electrode frame data being carried out active-addressed calculating, it is characterized in that described device comprises:

Monitor, be used for monitoring this frame to handle with data presented in pixel value;

Receive the comparer on the monitor, be used for the relatively more contiguous pixel value of being monitored to determine the resolving power of these data; And

Receive the controller on the comparer, be used for control processing system, make mean calculation rate reduce to minimum by revising active-addressed calculating according to determined resolving power.

9, the device that claim 8 proposed is characterized in that wherein said controller comprises:

Combiner is used for the adjacent several electrodes of this group electrode is combined respectively according to determined data resolution; And; Receive the driven management device on the combiner, be used for managing one group of common drive signal,, therefore reduced mean calculation rate owing to can use less drive signal respectively to the driving of each adjacent electrode group of combination.

10, the device that claim 9 proposed, it is characterized in that wherein said controller also comprises the minimized device of the time slot of receiving on the driven management device, be used for selecting the least possible active-addressed time slot, thereby further reduced mean calculation rate according to the drive signal number that has reduced.

11, the device that claim 8 proposed is characterized in that wherein said comparer comprises:

Initializer is used for forming the pixel value group of each predetermined adjacency, and every group contains number and equal that sound out number and the corresponding pixel value of contiguous each picture dot, and this initial value of souning out number is scheduled to;

Receive the resolving power determiner on the initializer, be used for checking the pixel value in each group, and when each pixel value in the group of nearly all group of discovery equates mutually, determine that the resolving power that records is at least the exploration number in each picture dot.

12, the device that claim 11 proposed is characterized in that wherein said comparer also comprises decision device, and when being used for that each pixel value equates mutually in finding to be less than nearly all group group, this decision device judges that resolving power is less than the exploration number.

13, the device that claim 11 proposed, it is characterized in that wherein said comparer also comprises the up verifier of receiving on the resolving power determiner, be used for when each pixel value in the group of nearly all group of discovery equates mutually, this up verifier enlarges each group, thereby form less group, and every group contain the pixel value that number equals bigger exploration number, this up verifier also is used for repeating resolution when increase souning out number determines to handle, and satisfies and makes that each pixel value equates mutually in the group that is less than nearly all group until souning out number.

14, the device that claim 11 proposed, it is characterized in that wherein said comparer also comprises the descending verifier of receiving on the resolution determiner, each pixel value equates mutually and sounds out number greater than 1 the time in finding to be less than nearly all group group, this descending verifier dwindles each group, thereby form more group, and each group contains the pixel value that number equals less exploration number.

15, the device that claim 14 proposed, it is characterized in that wherein brown descending verifier when reducing to sound out number, also repeat resolving power and determine to handle, satisfy until souning out number that each pixel value equates mutually in the group that makes nearly all group, this sounds out number greater than 1.

16, the device that claim 14 proposed, it is characterized in that wherein said descending verifier specifies in makes in the comparison that each pixel value equates the resolving power of the maximal value of employed exploration number for these data mutually in nearly all group the group, this sounds out number greater than 1, and when the exploration number has been reduced to 1, specify the resolving power that picture dot is these data.

17, a kind of electronic equipment is characterized in that described electronic equipment comprises:

An electronic circuit is used for producing the information that formation one frame needs data presented;

A casing that is connected with electronic circuit is used for supporting and the protection electronic circuit;

An active-addressed display device of receiving on the electronic circuit is used for display message, and this active-addressed display device has a series of picture dots by one group of electrode control;

A disposal system of receiving on the electronic circuit is used for these frame data are carried out active-addressed calculating to drive active-addressed display device; And

One makes the mean calculation rate in the disposal system reduce to minimum device, and this device comprises

A monitor is used for monitoring the pixel value in these frame data,

A comparer of receiving on the monitor is used for the relatively contiguous pixel value of monitoring determining the resolving power of these data, and

A controller of receiving on the comparer is used for control processing system, makes average computation reduce to minimum by revising active-addressed calculating according to determined resolving power.

18, the electronic equipment that claim 17 proposed is characterized in that wherein said controller comprises:

A combiner is used for the adjacent several electrodes of this group electrode is combined respectively according to determined data resolution, and

A driven management device of receiving on the combiner is used for managing one group of common drive signal respectively to the driving of each adjacent electrode group of combination, owing to can use less drive signal, has therefore reduced mean calculation rate.

19, the electronic equipment that claim 18 proposed, it is characterized in that wherein said controller also comprises a minimized device of receiving on the driven management device of time slot, be used for selecting the least possible active-addressed time slot, thereby further reduce mean calculation rate according to the drive signal number that has reduced.

20, the electronic equipment that claim 17 proposed is characterized in that wherein said comparer comprises:

An initializer is used for forming the pixel value group of each predetermined adjacency, and every group contains number and equal that sound out number and the corresponding pixel value of contiguous each picture dot, and this initial value of souning out number is scheduled to;

A resolving power determiner of receiving on the initializer is used for checking the pixel value in each group, and when each pixel value in the group of nearly all group of discovery equates mutually, determines that the resolving power that records is at least the exploration number in each picture dot.

21, the electronic equipment that claim 20 proposed is characterized in that wherein said comparer also comprises a decision device, and when being used for that each pixel value equates mutually in finding to be less than nearly all group group, this decision device judges that resolving power is less than the exploration number.

22, the electronic equipment that claim 20 proposed, it is characterized in that wherein said comparer also comprises a up verifier of receiving on the resolving power determiner, be used for when each pixel value in the group of nearly all group of discovery equates mutually, this up verifier enlarges by a group, thereby form less group, and every group contain the pixel value that number equals bigger exploration number, this up verifier also is used for repeating resolving power when increase souning out number determines to handle, and satisfies making that each pixel value equates mutually in the group that is less than nearly all group until exploration place number.

23, the electronic equipment that claim 20 proposed, it is characterized in that wherein said comparer also comprises a descending verifier of receiving on the resolving power determiner, be used in finding to be less than nearly all group group that each pixel value equates mutually and the exploration number greater than 1 the time, this descending verifier dwindles each group, thereby form more group, and every group contains the pixel value that number equals less exploration number.

24, the electronic equipment that claim 23 proposed, it is characterized in that wherein said descending verifier repeats resolving power and determines to handle when reducing the exploration number, satisfy until souning out number that each pixel value equates mutually in the group that makes nearly all group, this sounds out number greater than 1.

25, the electronic equipment that claim 23 proposed, it is characterized in that wherein said descending verifier specifies in makes in the comparer that each pixel value equates the resolving power of the maximal value of employed exploration number for these data mutually in nearly all group the group, and this sounds out number greater than 1.And when the exploration number has been reduced to 1, specify the resolving power that picture dot is these data.