CN110048305B - Graphene-dielectric DBR single-mode vertical cavity surface emitting laser and preparation method thereof - Google Patents

Abstract

A graphene-dielectric DBR single-mode vertical cavity surface emitting laser and a preparation method thereof relate to the field of semiconductor lasers and graphene. The structure is obtained in a multi-chip integration mode, the half-VCSEL, the graphene and the upper DBR are respectively prepared, the graphene is transferred on the half-VCSEL after the half-VCSEL is prepared, and finally the upper DBR part with curvature is obtained to form the complete VCSEL structure. Confining the transverse optical field to the top increases the high order mode loss and threshold gain, resulting in high quality single mode while reducing the contact resistance of the device.

Description

Graphene-dielectric DBR single-mode vertical cavity surface emitting laser and preparation method thereof

technical field

The invention relates to the fields of semiconductor lasers and graphene, in particular to a graphene-dielectric DBR single-mode vertical cavity surface emitting laser and a preparation method thereof.

Background technique

Vertical-cavity surface-emitting laser (VCSEL, vertical-cavity surface-emitting laser) is particularly promising in the field of functional integrated optics. A high-speed VCSEL with a single transverse mode is important because it can efficiently couple to the fiber and prevent pulse broadening over long transmission distances due to dispersion in the fiber. Typically VCSELs require a reduced cavity cross-sectional area to reduce the supported transverse modulus, so as to achieve a single transverse mode. However, this reduces its effective volume, thereby limiting the output power of the fundamental mode.

High-order modes in VCSELs can be controlled using techniques such as anti-resonance modes, surface relief modes, tunnel junction modes, and photonic crystal modes, however, these mode control techniques lead to high threshold currents in addition to complex process conditions and expensive techniques The problem.

Therefore, high-power fundamental mode emission in VCSELs has always been a challenge, and an effective measure is urgently needed to solve the shortcomings of the existing technology.

SUMMARY OF THE INVENTION

The purpose of the present invention is to provide a graphene-dielectric DBR single-mode vertical cavity surface emitting laser and a preparation method thereof. This device structure utilizes a dielectric DBR with a certain curvature to confine the lateral light field at the top, increasing the high-order mode loss and threshold gain, resulting in high-quality single-mode while reducing the contact resistance of the device, which is a high-power fundamental mode VCSEL provides a new design idea and fabrication method.

The graphene-dielectric DBR single-mode vertical cavity surface emitting laser of the present invention has a structure as shown in Figure 1; the structure mainly includes a laser back electrode (1), a GaAs substrate (2), a lower DBR (3) from bottom to top. ), an active region (4), an oxide confinement layer (6) array is provided on the active region (4), and the upper layer of each oxidation confinement layer (6) unit is a P++ doped GaAs layer (5); The product epitaxial structure is encapsulated with a layer of _SiO2 passivation layer (7), that is, the upper end face and the side face of the array including the oxide confinement layer (6) and the P++ doped GaAs layer (5) also include the active area between the arrays (4) The _SiO2 passivation layer (7) is encapsulated on the top, and the _SiO2 passivation layer (7) is etched with a hole A in the middle of the upper end face of the P++ doped GaAs layer (5) corresponding to each unit, which corresponds to the laser A light-exiting hole to expose the P++ doped GaAs layer (5); a VCSEL electrode (8) is provided on the periphery of the _SiO2 passivation layer (7) of each unit in the array, and the VCSEL electrode (8) also passes through the hole The inner side of A is connected to the P++ doped GaAs layer (5), and a half-VCSEL is formed at this time; graphene is provided on the surrounding outside of the VCSEL electrode (8) and on the P++ doped GaAs layer (5) corresponding to hole A layer (9), the entire graphene layer (9) is a complete encapsulation structure; the top graphene layer (9) of each unit in the array is provided with an upper DBR (10), and the upper DBR (10) is as a whole. A curved spherical structure with curvature, the spherical structure protrudes upward, and the spherical structure covers the hole A at the same time. Preferably, the thickness of each point on the spherical surface of the arc layer is the same.

In the structure of the present invention, the graphene layer is partially transferred to the half-VCSEL by coating PMMA;

In the structure of the present invention, the upper DBR part is formed of a thin film alternately grown by metal organic chemical vapor deposition (MOCVD) or vacuum electron beam evaporation coating machine on the glass substrate.

The VCSEL electrodes (8) are Ti/Au.

The structure of the present invention is obtained by means of multi-chip integration, half-VCSEL, graphene and upper DBR are prepared separately, and graphene is transferred on the half-VCSEL after the preparation is completed, and finally the upper DBR part with curvature is obtained to form a complete VCSEL structure.

The present invention also provides a method for preparing a graphene-dielectric DBR single-mode vertical cavity surface emitting laser, comprising:

(1) Using metal organic chemical vapor deposition (MOCVD), firstly grow the n-Al _0.12 Ga _0.88 As layer and the n-Al _0.9 Ga _0.1 As layer alternately on the n-type GaAs substrate to form the lower DBR; then grow GaAs/ The Al _0.3 Ga _0.7 As quantum well structure constitutes the active region; and then the heavily doped p-type AlGaAs, that is, Al _0.98 Ga _0.02 As, is grown to form a P++ doped GaAs layer (5), which is convenient for forming a good ohmic contact with the injection electrode;

(2) Finally, an oxidation limiting layer (6) is formed at the bottom of the heavily doped p-type AlGaAs layer through an oxidation process, a laser pattern is etched on the epitaxial wafer grown in step (1), and a selective etching solution is used to etch the epitaxial layer after photolithography. The wafer is etched into a mesa structure, and the corrosion depth is to expose the sidewall of the Al _0.98 Ga _0.02 As oxidation limiting layer; the epitaxial wafer obtained above is laterally oxidized by a wet nitrogen oxidation method in a high-temperature oxidation furnace to form an oxidation limiting layer, and an injection current limiting hole is made;

(3) use plasma-enhanced chemical vapor deposition (PECVD) to deposit _SiO2 passivation layer, and lithography, etch out laser light exit hole;

(4) Sputtering Ti/Au to form a laser array injection electrode, and peeling off the photoresist to form a laser light exit hole; complete the half-VCSEL;

(5) Transfer a layer of graphene on the prepared half-VCSEL region;

(6) Use metal organic chemical vapor deposition (MOCVD) or vacuum electron beam evaporation coating machine to alternately grow Si ₃ N ₄ /SiO ₂ thin films on the other side of graphene to form the upper DBR of the laser;

(7) grinding the substrate thin, sputtering AuGeNi/Au to form the back electrode of the laser array, and annealing to form a good ohmic contact between the metal layer and the semiconductor material;

(8) Etching and growing the upper DBR to expose the electrode, and annealing at 350° C. under N ₂ gas for 30 seconds to obtain a complete curved DBR VCSEL device. The preparation is completed.

Description of drawings

Figure 1: Schematic diagram of the overall structure of graphene-dielectric DBR single-mode vertical cavity surface emitting laser;

Figure 2: Schematic diagram of the structure of a graphene-dielectric DBR single-mode vertical cavity surface emitting laser epitaxial wafer;

Figure 3: Schematic diagram of the mesa etched by a graphene-dielectric DBR single-mode vertical cavity surface emitting laser;

Figure 4: Schematic diagram of the formation of injection current confinement holes after lateral oxidation of the device oxidation confinement layer;

Figure 5: Schematic diagram of the structure of the device after the _SiO2 passivation layer is grown;

Figure 6: Schematic diagram of the structure of the device after etching the _SiO2 passivation layer;

Figure 7: Schematic diagram of laser injection electrode formed by sputtering Ti/Au;

Figure 8: Schematic diagram of the injection electrode of the stripped Ti/Au laser;

Figure 9: Schematic diagram of the back electrode of the laser array fabricated by thinning the substrate;

Figure 10: Schematic diagram of transferring graphene on half-VCSEL;

Figure 11: Schematic diagram of DBR on alternately growing thin films on the other side of graphene;

Figure 12: Schematic diagram of the graphene-dielectric DBR single-mode vertical cavity surface emitting laser structure after annealing;

Figure 13: Planar SEM image of graphene transferred onto the Half-VCSEL structure.

Figure 14: Optical microscope image of a graphene-dielectric DBR single-mode vertical cavity surface emitting laser.

Figure 15: SEM image of a graphene-dielectric DBR single-mode vertical cavity surface emitting laser.

Figure 16: Single-mode spectrum of a graphene-dielectric DBR single-mode vertical cavity surface-emitting laser.

In Figure 1: 1. Laser back electrode, 2. GaAs substrate, 3. Lower DBR, 4. Active region, 5. P++ doped GaAs layer, 6. Oxidation confinement layer, 7. SiO ₂ passivation layer, 8 .VCSEL electrode, 9. Graphene layer, 10. Upper DBR.

Detailed ways

The present invention will be further described below in conjunction with the examples, but the present invention is not limited to the following examples.

Example 1

The following describes the preparation method of graphene-dielectric DBR single-mode vertical cavity surface emitting laser in detail with reference to Figure 2--Figure 16, as well as the physical map and spectrum:

Step 1. Use metal organic chemical vapor deposition (MOCVD) to alternately grow 30 pairs of n-Al _0.12 Ga _0.88 As layers and n-Al _0.9 Ga _0.1 As layers on the n-type GaAs substrate to form a lower DBR; then Grow GaAs/Al _0.3 Ga _0.7 As quantum well structure to form the active region; then grow an Al _0.98 Ga _0.02 As layer to form an oxidation confinement layer; finally grow heavily doped p-type AlGaAs to form a good ohmic contact with the injection electrode;

Step 2, photoetching the laser array pattern on the epitaxial wafer grown in step 1, using selective etching solution to etch the photoetched epitaxial wafer into a mesa structure, and the etching depth is to expose the sidewall of the Al _0.98 Ga _0.02 As oxidation limiting layer;

Step 3, using a high temperature oxidation furnace to laterally oxidize the epitaxial wafer in step 2 by a wet nitrogen oxidation method to form an oxidation confinement layer, and make an injection current confinement hole;

Step 4, using plasma-enhanced chemical vapor deposition (PECVD) to deposit a 300nm-thick _SiO2 passivation layer, and lithography and etching the laser light exit hole;

Step 5, sputtering Ti/Au to form a laser array injection electrode, and peeling off the photoresist to form a light hole;

Step 6. Grinding the substrate to 200 μm, sputtering AuGeNi/Au to form the back electrode of the laser array, and performing annealing to form a good ohmic contact between the metal layer and the semiconductor material, and the laser half-VCSEL region is completed;

Step 7. Transfer a layer of graphene on the prepared half-VCSEL region;

Step 8. Use metal organic chemical vapor deposition (MOCVD) or vacuum electron beam evaporation coating machine to alternately grow 7 pairs of Si ₃ N ₄ /SiO ₂ thin films on the top layer graphene, and the bottom of the Si ₃ N ₄ /SiO ₂ thin film is covered The laser light exit hole constitutes the DBR on the flat layer of the laser;

Step 10: Etch the DBR to expose the contact electrode, and perform annealing at 350° C. under N ₂ gas for 30 seconds, and the complete device is prepared.

FIG. 13 is a planar scanning electron microscope image of graphene transferred onto the Half-VCSEL structure.

Figures 14 and 15 are optical microscope images and SEM images of graphene-dielectric DBR single-mode vertical cavity surface emitting lasers, which were mechanically surface scanned, showing a curvature of about 4.5m.

From Figure 16, it can be analyzed that the single-mode light output of the graphene-dielectric DBR single-mode vertical cavity surface emitting laser has a center wavelength of about 858.5 nm.

The above descriptions are only the embodiments of the present invention, and are not intended to limit the scope of the patent of the present invention. Any equivalent structure or equivalent process transformation made by using the contents of the description and drawings of the present invention, or directly or indirectly applied to other related All technical fields are similarly included in the scope of patent protection of the present invention.

Claims (5)

1. Graphene-medium DBR single-mode vertical cavity surface emitting laser, is characterized in that, this laser mainly comprises laser back electrode (1), GaAs substrate (2), lower DBR (3), active laser sequentially from bottom to top area (4), an oxide confinement layer (6) array is arranged on the active area (4), and the upper layer of each oxidation confinement layer (6) unit is a P++ doped GaAs layer (5); in the product epitaxial structure encapsulation There is a layer of _SiO2 passivation layer (7), that is, the upper end face and the side face of the array including the oxidation confinement layer (6) and the P++ doped GaAs layer (5) also include the active region (4) between the arrays. The _SiO2 passivation layer (7) is encapsulated, and the _SiO2 passivation layer (7) is etched with a hole A in the middle of the upper end face of the P++ doped GaAs layer (5) corresponding to each unit, that is, the corresponding laser light exit hole, so that the exposure P++ doped GaAs layer (5); VCSEL electrodes (8) are provided on the periphery of the _SiO2 passivation layer (7) of each unit in the array, and the VCSEL electrodes (8) are also connected to the inner side of the hole A through the The P++ doped GaAs layer (5) is connected, and a half-VCSEL is formed at this time; a graphene layer (9) is provided on the periphery of the VCSEL electrode (8) and on the P++ doped GaAs layer (5) corresponding to the hole A, The entire graphene layer (9) is a complete encapsulation structure; the top surface graphene layer (9) of each unit in the array is provided with an upper DBR (10), and the upper DBR (10) is an arc layer with curvature as a whole Spherical structure, the spherical structure protrudes upward, and the spherical structure covers the hole A at the same time. 2. The graphene-dielectric DBR single-mode vertical cavity surface emitting laser according to claim 1, wherein the graphene layer is partially transferred to the half-VCSEL by coating PMMA. 3. according to the described graphene-dielectric DBR single-mode vertical cavity surface emitting laser of claim 1, it is characterized in that, in the structure, the upper DBR part is to utilize metal organic chemical vapor deposition or vacuum electron beam evaporation coating on glass substrate Alternately grown thin films. 4. The graphene-dielectric DBR single-mode vertical cavity surface emitting laser according to claim 1, wherein the VCSEL electrode (8) is Ti/Au. 5. the preparation method of graphene-dielectric DBR single-mode vertical cavity surface emitting laser according to claim 1, is characterized in that, comprises the following steps: (1) Using metal organic chemical vapor deposition, firstly grow the n-Al _0.12 Ga _0.88 As layer and the n-Al _0.9 Ga _0.1 As layer alternately on the n-type GaAs substrate to form the lower DBR; then grow GaAs/Al _0.3 Ga The _0.7 As quantum well structure constitutes the active region; then the heavily doped p-type AlGaAs, that is, Al _0.98 Ga _0.02 As, is grown to form a P++ doped GaAs layer (5), which is convenient for forming a good ohmic contact with the injection electrode; (2) Finally, an oxidation limiting layer (6) is formed at the bottom of the heavily doped p-type AlGaAs layer through an oxidation process, a laser pattern is etched on the epitaxial wafer grown in step (1), and a selective etching solution is used to etch the epitaxial layer after photolithography. The wafer is etched into a mesa structure, and the corrosion depth is to expose the sidewall of the Al _0.98 Ga _0.02 As oxidation limiting layer; the epitaxial wafer obtained by the wet nitrogen oxidation method is laterally oxidized in a high-temperature oxidation furnace to form an oxidation limiting layer, and an injection current limiting hole is made; (3) use plasma-enhanced chemical vapor deposition to deposit _SiO2 passivation layer, and lithography, etch out laser light exit hole; (4) Sputtering Ti/Au to form a laser array injection electrode, and peeling off the photoresist to form a laser light exit hole; complete the half-VCSEL; (5) Transfer a layer of graphene with a thickness of 3.6 nm on the prepared half-VCSEL region; (6) using metal organic chemical vapor deposition or vacuum electron beam evaporation coating machine to alternately grow Si ₃ N ₄ /SiO ₂ thin films on the other side of graphene to form the upper DBR of the laser; (7) grinding the substrate thin, sputtering AuGeNi/Au to form the back electrode of the laser array, and annealing to form a good ohmic contact between the metal layer and the semiconductor material; (8) Etching and growing the upper DBR to expose the electrode, and performing annealing under 350 degrees of N ₂ gas for 30 seconds to obtain a complete curved DBR VCSEL device. The preparation is completed.

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