CN110034700A - The waveform controlling method of inverter output current, device and system - Google Patents
The waveform controlling method of inverter output current, device and system Download PDFInfo
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- CN110034700A CN110034700A CN201810031556.5A CN201810031556A CN110034700A CN 110034700 A CN110034700 A CN 110034700A CN 201810031556 A CN201810031556 A CN 201810031556A CN 110034700 A CN110034700 A CN 110034700A
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M1/00—Details of apparatus for conversion
- H02M1/38—Means for preventing simultaneous conduction of switches
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M7/00—Conversion of ac power input into dc power output; Conversion of dc power input into ac power output
- H02M7/42—Conversion of dc power input into ac power output without possibility of reversal
- H02M7/44—Conversion of dc power input into ac power output without possibility of reversal by static converters
- H02M7/48—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
- H02M7/53—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal
- H02M7/537—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only, e.g. single switched pulse inverters
-
- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M1/00—Details of apparatus for conversion
- H02M1/38—Means for preventing simultaneous conduction of switches
- H02M1/385—Means for preventing simultaneous conduction of switches with means for correcting output voltage deviations introduced by the dead time
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02B—CLIMATE CHANGE MITIGATION TECHNOLOGIES RELATED TO BUILDINGS, e.g. HOUSING, HOUSE APPLIANCES OR RELATED END-USER APPLICATIONS
- Y02B70/00—Technologies for an efficient end-user side electric power management and consumption
- Y02B70/10—Technologies improving the efficiency by using switched-mode power supplies [SMPS], i.e. efficient power electronics conversion e.g. power factor correction or reduction of losses in power supplies or efficient standby modes
Abstract
The present embodiments relate to a kind of waveform controlling methods of inverter output current, device and system, which comprises detects to the output electric current of inverter；The compensation time of pulse width modulation (PWM) duty ratio is determined according to the current value of the output electric current and preset current threshold or according to the current value of the output electric current, the preset current threshold and the output sense of current；The PWM duty cycle is compensated with the compensation time.The embodiment of the present invention determines the compensation time of PWM duty cycle according to the current value of the output electric current of inverter and direction by presetting current threshold, can improve the current waveform of the output electric current of inverter.
Description
Technical field
The present invention relates to inverter field more particularly to a kind of waveform controlling method of inverter output current, device and
System.
Background technique
Pulse width in typical AC motor drive modulates (PWM, referred to as pulsewidth modulation) inverter system
Structure is as shown in Figure 1, comprising: rectifier 101, filter 102, inverter 103, current detecting unit 104, controller 105, with
And pwm unit 106.Rectifier 101 is three-phase bridge circuit, is made of six diodes, is converted alternating current to straight
Galvanic electricity, the DC power supply as inverter 103.Filter 102 is made of two capacitors C1 and C2, to the electricity after rectification
Pressure or electric current are filtered.Inverter 103 is also three-phase bridge circuit, is made of three bridge arms, and each bridge arm includes two
Triode (as switching tube) and two bypass freewheeling diodes, that is, the bridge arm that Q1, Q6, D1, D6 are constituted, Q3, Q4,
The bridge arm that D3, D4 are constituted, Q5, Q2, the bridge arm that D5, D2 are constituted, effect is with rectifier 101 on the contrary, it is will be straight
Galvanic electricity is converted to alternating current, and output is to load, motor M as shown in Figure 1.Current detecting unit 104 is used for a phase and b phase
Output electric current is detected, and controller 105 is output to.Controller 105 is generated according to the testing result of current detecting unit 104 and is controlled
Signal processed is supplied to pwm unit 106.Pwm unit 106 is according to the control signal of controller 105 to inverter 103
Six switching tube Q1~Q6 controlled.
Currently, in order to prevent the same bridge arm of inverter 103 a pair of switches pipe (such as Q1 and Q6 or Q3 and Q4, or
Person Q5 and Q2) it generates and leads directly to, it needs that dead time is arranged in upper and lower switching tube switching moment, takes the principle of first Guan Houkai.So
And the presence in dead zone causes the waveform of the actual output electric current of inverter 103 to be distorted, harmonic component increase, phase generation
The problems such as variation and generation torque ripple, that is, produce dead time effect.Especially in the AC motor drive of low regime operation
It is influenced significantly by dead time effect.Fig. 2 shows the waveforms (frequency 2Hz) of the output electric current influenced by dead time effect, such as Fig. 2 institute
Show, compared with ideal sine wave, which has occurred Severe distortion, also, current amplitude (2A) is significantly lower than ideal current width
It is worth (12.4A).
It should be noted that the above description of the technical background be intended merely to it is convenient to technical solution of the present invention carry out it is clear,
Complete explanation, and facilitate the understanding of those skilled in the art and illustrate.Cannot merely because these schemes of the invention
Background technology part is expounded and thinks that above-mentioned technical proposal is known to those skilled in the art.
Summary of the invention
Inventors have found that in order to reduce the influence of dead time effect, the prior art is missed for voltage caused by dead time effect
Difference compensates.However, due to the complexity of device, switching tube is generally non-ideal device, when electric current is very small, very
Difficult breakdown, (namely near zero current, referred to as zero passage area) can generate clamper (referred to as so when current direction changes
Zero current clamping), hinder electric current quickly through therefore will cause current waveform in zero passage area and be distorted.
In order to solve the above-mentioned technical problem at least one, such as dead time effect problem or zero current clamping problem, this
Inventive embodiments provide a kind of waveform controlling method of inverter output current, device and system.
According to a first aspect of the embodiments of the present invention, a kind of waveform controlling method of inverter output current is provided,
In, which comprises
The output electric current of inverter is detected；
According to the current value of the output electric current and preset current threshold or according to the output electric current
Current value, the preset current threshold and the output sense of current determine that pulse width modulates (PWM) duty
The compensation time of ratio；
The PWM duty cycle is compensated with the compensation time.
In one embodiment, when the current value of the output electric current is located at the opposite number and the electricity of the current threshold
It flows between threshold value, and when the output electric current is switched to forward direction by negative sense, using preset time bias value as described in
Compensate the time；When it is described output electric current current value be located between the opposite number and the current threshold of the current threshold, and
And the output electric current is when being switched to negative sense by forward direction, using the opposite number of preset time bias value as when the compensation
Between.Wherein, the preset time bias value is more than or less than or equal to the dead time, the switch of the inverter
Pipe cut-offs the equivalent error of the mean on-state tube voltage drop of the switching tube bypass freewheeling diode of delay time and the inverter
The sum of time.
In one embodiment, when the current value of the output electric current is greater than or equal to the current threshold, by dead zone
Time, the inverter switching tube cut-off delay time and the inverter switching tube bypass freewheeling diode it is flat
The sum of the equivalent error time of equal on-state tube voltage drop is used as the compensation time；When the current value of the output electric current is less than or waits
When the opposite number of the current threshold, the switching tube of dead time, the inverter is cut-off into delay time and described inverse
Described in the opposite number conduct for becoming the sum of equivalent error time of mean on-state tube voltage drop of switching tube bypass freewheeling diode of device
Compensate the time.
In one embodiment, the current threshold is greater than 0 ampere and is less than the 10% of inverter rated current.
According to a second aspect of the embodiments of the present invention, a kind of Waveform controller of inverter output current is provided,
In, described device includes:
Detection unit detects the output electric current of inverter；
Control unit, according to the current value of the output electric current and preset current threshold or according to described
Current value, the preset current threshold and the output sense of current of output electric current determine that pulse width is modulated
(PWM) the compensation time of duty ratio；
Compensating unit compensates the PWM duty cycle with the compensation time.
In one embodiment, when the current value of the output electric current is located at the opposite number and the electricity of the current threshold
It flows between threshold value, and when the output electric current is switched to forward direction by negative sense, described control unit mends the preset time
It repays value and is used as the compensation time；When the current value of the output electric current is located at the opposite number and the electric current of the current threshold
Between threshold value, and when the output electric current is switched to negative sense by forward direction, described control unit is by preset time bias
The opposite number of value is as the compensation time.Wherein, the preset time bias value is more than or less than or is equal to and is described
Dead time, the inverter switching tube cut-off the switching tube bypass freewheeling diode of delay time and the inverter
The sum of equivalent error time of mean on-state tube voltage drop.
In one embodiment, when the current value of the output electric current is greater than or equal to the current threshold, the control
The switching tube bypass that the switching tube of dead time, the inverter is cut-off delay time and the inverter by unit processed is continuous
The sum of equivalent error time of mean on-state tube voltage drop of diode is flowed as the compensation time；When the electricity of the output electric current
When flow valuve is less than or equal to the opposite number of the current threshold, described control unit is by dead time, the switch of the inverter
Pipe cut-offs the equivalent error of the mean on-state tube voltage drop of the switching tube bypass freewheeling diode of delay time and the inverter
The opposite number of the sum of time is as the compensation time.
In one embodiment, the current threshold is greater than 0 ampere and is less than the 10% of inverter rated current.
According to a third aspect of the embodiments of the present invention, a kind of inverter system, including inverter and controller are provided,
Wherein, the controller includes device above-mentioned.
The beneficial effects of the present invention are: the embodiment of the present invention is by presetting current threshold, according to the defeated of inverter
The current value of electric current and direction determine the compensation time of PWM duty cycle out, can improve the current wave of the output electric current of inverter
Shape solves the problems, such as dead time effect to a certain extent.In addition, the embodiment of the present invention passes through (zero passage area) root near zero current
PWM duty cycle is compensated with equivalent duty cycle time (preset time bias value) according to electric current condition of commutation, makes electricity
Can solve the problems, such as zero current clamping quickly through zero passage area when stream commutation.
Referring to following description and accompanying drawings, only certain exemplary embodiments of this invention is disclosed in detail, specifies original of the invention
Reason can be in a manner of adopted.It should be understood that embodiments of the present invention are not so limited in range.In appended power
In the range of the spirit and terms that benefit requires, embodiments of the present invention include many changes, modifications and are equal.
The feature for describing and/or showing for a kind of embodiment can be in a manner of same or similar one or more
It uses in a other embodiment, is combined with the feature in other embodiment, or the feature in substitution other embodiment.
It should be emphasized that term "comprises/comprising" refers to the presence of feature, one integral piece, step or component when using herein, but simultaneously
It is not excluded for the presence or additional of one or more other features, one integral piece, step or component.
Detailed description of the invention
The embodiment of the present invention elements and features described in one drawing or one embodiment can with one or
Elements and features shown in more other attached drawings or embodiment combine.In addition, in the accompanying drawings, similar label indicates
Corresponding component in several attached drawings, and may be used to indicate corresponding component used in more than one embodiment.
Included attached drawing is used to provide to be further understood from the embodiment of the present invention, and which constitute one of specification
Point, for illustrating embodiments of the present invention, and come together to illustrate the principle of the present invention with verbal description.Under it should be evident that
Attached drawing in the description of face is only some embodiments of the present invention, for those of ordinary skill in the art, is not paying wound
Under the premise of the property made is laborious, it is also possible to obtain other drawings based on these drawings.In the accompanying drawings:
Fig. 1 is the schematic diagram of the PWM inverter system of typical AC motor drive；
Fig. 2 is the schematic diagram for the current waveform that dead time effect influences；
Fig. 3 is the schematic diagram of existing dead time effect compensation policy；
Fig. 4 is the effect diagram of existing dead time effect compensation policy；
Fig. 5 is the schematic diagram of the waveform controlling method of the output electric current of the inverter of the embodiment of the present invention；
Fig. 6 is the schematic diagram of an example of the waveform controlling method of the output electric current of the inverter of the embodiment of the present invention；
Fig. 7 is an effect diagram of the waveform controlling method of the output electric current of the inverter of the embodiment of the present invention；
Fig. 8 is the schematic diagram of the Waveform controller of the output electric current of the inverter of the embodiment of the present invention；
Fig. 9 is the schematic diagram of the inverter system of the embodiment of the present invention；
Figure 10 is the schematic diagram of the controller in the inverter system of the embodiment of the present invention.
Specific embodiment
Referring to attached drawing, by following specification, the aforementioned and other feature of the embodiment of the present invention be will be apparent.?
In following description and drawings, the particular implementation of the embodiment of the present invention is specifically disclosed, which show can wherein use
The some embodiments of the principle of the embodiment of the present invention, it will thus be appreciated that the embodiment of the present invention is not limited to described embodiment party
Formula, on the contrary, the embodiment of the present invention includes the whole modifications, modification and the equivalents that fall within the scope of the appended claims.
In embodiments of the present invention, term " first ", " second " etc. are used to distinguish different elements from appellation, but
It is not offered as space arrangement or the time sequencing etc. of these elements, these elements should not be limited by these terms.Term " and/
Or " include the associated term listed one kind or any one of multiple and all combinations.Term "comprising", " comprising ",
" having " etc. refers to the presence of stated feature, element, element or component, but presence or addition one or more is not precluded
Other features, element, element or component.
In embodiments of the present invention, singular " one ", "the" etc. include plural form, should be broadly interpreted as "an"
Or " one kind " and be not defined as "one" meaning；Furthermore term " described " be interpreted as both include singular and also including
Plural form, unless the context clearly indicates otherwise.Furthermore term " according to " is interpreted as " based in part on ... ", term
" being based on " is interpreted as " being at least partially based on ... ", unless the context clearly indicates otherwise.
In the prior art, it can be compensated for voltage error caused by dead time effect.Electricity caused by dead time effect
Press error analysis as follows:
When the output electric current of inverter is positive, error component shows as dead time td, switching tube cut-off delay time
ton、toffAnd the equivalent error time t of the mean on-state tube voltage drop of switching tube bypass freewheeling diodevon.Above-mentioned time error
Comprehensive is terr(+), a corresponding carrier cycle TsInterior mean error voltage is uerr(+).Formula is as follows:
terr=td+ton-toff+tvon；
terr(+)=-terr；
udcFor the busbar voltage of inverter.
When the output electric current of inverter is negative sense, time error situation is with electric current forward direction on the contrary, formula is as follows:
terr(-)=terr；
In the prior art, different compensation policies can be used according to the output sense of current of inverter, for example, working as
When output electric current is positive, with terrCompensation time t as PWM duty cyclecomp；When exporting electric current is negative sense, with-terrMake
For the compensation time t of PWM duty cyclecomp；When exporting electric current is 0, tcomp=0, Fig. 3 are with a phase current i shown in FIG. 1aFor
The compensation policy is shown, is formulated as follows:
According to weber theorem, voltage error caused by being equivalent to compensation dead time effect is compensated to PWM duty cycle.
However, as previously described, because the complexity of device, switching tube is non-ideal device, when electric current is very small
Switching tube is difficult breakdown, and (near zero current, referred to as zero passage area) can generate clamper so when current direction changes, and hinder
Hinder electric current quickly through zero passage area, current waveform is caused to be distorted, as shown in Figure 4.
The problem of in order to solve the problems, such as dead time effect or zero current clamping, propose the present invention.It is right with reference to the accompanying drawing
The various embodiments of the embodiment of the present invention are illustrated.These embodiments are only exemplary, and are implemented to the present invention
The limitation of example.
Embodiment 1
A kind of waveform controlling method of inverter output current is present embodiments provided, Fig. 5 is the schematic diagram of this method, such as
Shown in Fig. 5, this method comprises:
Step 501: the output electric current of inverter is detected；
Step 502: according to the current value of the output electric current and preset current threshold or according to described defeated
The current value of electric current, the preset current threshold and the output sense of current determine that pulse width is modulated out
(PWM) the compensation time of duty ratio；
Step 503: the PWM duty cycle being compensated with the compensation time.
The method of the present embodiment not only determines the compensation plan of PWM duty cycle according to the output sense of current of inverter
Slightly, but by presetting current threshold, to be determined according to the output sense of current of the current threshold combination inverter
The compensation time of PWM duty cycle can improve the waveform of the output electric current of inverter, solve dead time effect to a certain extent
Problem.
In one embodiment, when output electric current current value be located at current threshold opposite number and current threshold it
Between, and when exporting electric current and being switched to forward direction by negative sense, using preset time bias value as the above-mentioned compensation time.At this
In embodiment, preset time bias value is referred to as equivalent duty cycle time, when the current value position of output electric current
When between the opposite number and current threshold of current threshold, illustrate that exporting electric current is located near zero passage area namely zero current, by
This compensates PWM duty cycle with equivalent duty cycle time, can make defeated when output electric current is switched to forward direction by negative sense
It can be improved when output electric current is switched to forward direction from negative sense quickly through zero passage area when electric current is from negative sense to forward conversion out
Current waveform solves the problems, such as current-clamp when output electric current is switched to forward direction from negative sense.
In one embodiment, when output electric current current value be located at current threshold opposite number and current threshold it
Between, and when exporting electric current and being switched to negative sense by forward direction, by the phase of preset time bias value (equivalent duty cycle time)
Anti- number is used as the above-mentioned compensation time.In the present embodiment, similar with previous embodiment, when the current value of output electric current is located at
When between the opposite number and current threshold of current threshold, illustrate that exporting electric current is located near zero passage area namely zero current, as a result,
When exporting electric current and being switched to negative sense by forward direction, PWM duty cycle is compensated with the opposite number of equivalent duty cycle time, it can be with
Enable to export when electric current is converted from forward direction to negative sense quickly through zero passage area, improves output electric current from forward direction and be switched to negative sense
When current waveform, solve the problems, such as current-clamp when output electric current is switched to negative sense from forward direction.
In one embodiment, when the current value for exporting electric current is greater than or equal to current threshold, by dead time, inverse
Become device switching tube cut-off delay time and inverter switching tube bypass freewheeling diode mean on-state tube voltage drop etc.
It imitates the sum of error time and is used as the above-mentioned compensation time.In the present embodiment, the current value for exporting electric current is greater than or equal to electric current
Threshold value, it is meant that output electric current is forward direction, and not at zero passage area (near zero current), can be according to original compensation policy pair
PWM duty cycle compensates.
It in one embodiment, will be dead when the current value for exporting electric current is less than or equal to the opposite number of current threshold
Area's time, inverter switching tube cut-off delay time and inverter switching tube bypass freewheeling diode mean on-state
The opposite number of the sum of the equivalent error time of tube voltage drop is as the above-mentioned compensation time.In the present embodiment, the electricity of electric current is exported
Flow valuve is less than or equal to the opposite number of current threshold, it is meant that output electric current is negative sense, and in zero passage area, (zero current is not attached
Closely), PWM duty cycle can be compensated according to original compensation policy.
Through the embodiment of the present invention, dead time effect problem is not only solved, existing dead time effect compensation skill is also solved
The zero current clamping problem of art, i.e., near zero current, according to electric current condition of commutation, in zero passage area Z0With equivalent duty cycle time
terr_z' PWM duty cycle is compensated, so that electric current, quickly through zero passage area, is improved the waveform in zero passage area when commutating.
The output electric current that following formula shows inverter is located at compensation policy when different sections:
In the equation above, i indicates the output electric current of inverter, ithIt indicates above-mentioned current threshold, shows zero passage area
Range, it is generally the case that current threshold ithGreater than 0 ampere and it is less than the 10% of inverter rated current, actual value or value
Domain can be obtained according to the theoretical calculation of the characteristic of inverter switching device pipe, can also be determined according to specific experimental data, this reality
Example is applied to this with no restriction.In one example, ithFor the value between 0 to 1, in another example, ithBetween 0 to 0.5
Value, such as 0.2.
In the equation above, terrIndicate dead time td, the inverter switching tube cut-off delay time ton-
toffAnd the equivalent error time t of the mean on-state tube voltage drop of the switching tube bypass freewheeling diode of the invertervonIt
With, specifically as previously mentioned, details are not described herein again.
In the equation above, terr_z' indicate aforementioned preset time bias value namely equivalent duty cycle time,
It can also be obtained according to the theoretical calculation of the characteristic of switching tube, can also be determined according to specific experimental data, the present embodiment
With no restriction to this.In the present embodiment, terr_z' t can be greater thanerr, might be less that terr, or it is equal to terr。
In the present embodiment, according to the section where the output electric current of inverter, the corresponding compensation time can be determined
tcomp, PWM duty cycle is compensated using the compensation time, improved output current wave can be obtained.The present embodiment
With no restriction to specific current detection mode and specific compensation way, the prior art can be referred to.
Fig. 6 is still with a phase current i shown in FIG. 1aFor the compensation policy for being illustrated the embodiment of the present invention.
As shown in fig. 6, in section 601 and section 605, iaFor forward direction, and ia≥ith, then in section 601 and 605 with terr
PWM duty cycle is compensated；In section 602 and section 604 ,-ith<ia<ithNamely section 602 and section 604 are zero passage
Area, and in section 602, iaIt is negative sense by forward conversion, then in section 602 with-terr_z' PWM duty cycle is compensated, phase
It answers, in section 604, iaForward direction is converted to by negative sense, then in section 604 with terr_z' PWM duty cycle is compensated；In area
Between 603, iaFor negative sense, and ia≤-ith, then in section 603 with-terrPWM duty cycle is compensated.
The present embodiment PWM duty cycle t fixed by (zero passage area) compensation near zero currenterr_z', after making dead time
Electric current significantly increases in new switching process, and clamper is to zero again for electric current when avoiding the arrival of next dead zone process, thus effectively
Solve the problems, such as the dead time effect of inverter and zero current clamping problem.
With 200V, for the frequency converter of 2.2kW, it is assumed that driven object is exchange 200V, the induction machine of 2.2kW, 4P, and
ith=0.4A, terr_z ’=1.8us, terr=3us, then according to the method for the present embodiment, actual output current waveform such as Fig. 7 institute
Show.It can be seen from figure 7 that the current waveform has obtained apparent improvement, and also effectively inhibit asking for zero current clamping
Topic.It is demonstrated experimentally that the method compensation effect of the embodiment of the present invention is good, strong robustness, and it is (and above-mentioned to current sensor
Current detecting unit 104) precision have no special requirements.
Embodiment 2
The Waveform controller for present embodiments providing a kind of inverter output current, the original solved the problems, such as due to the device
Content same as Example 1, same as Example 1 is managed to be not repeated to illustrate.
Fig. 8 is the schematic diagram of the Waveform controller 800 of the inverter output current of the present embodiment, as shown in figure 8, this is inverse
The Waveform controller 800 for becoming device output electric current includes: detection unit 801, control unit 802 and compensating unit 803.
Detection unit 801 is for detecting the output electric current of inverter.It can pass through current detecting shown in FIG. 1
Unit 104 realizes that the present embodiment is to its concrete implementation method and specific electric current to realize, such as by current sensor
Detection method with no restriction, can refer to the prior art.
Control unit 802 be used for according to it is described output electric current current value and preset current threshold or according to
Current value, the preset current threshold and the output sense of current of the output electric current determine pulse width
Modulate the compensation time of (PWM) duty ratio.Control unit 802 can realize by controller 105 shown in FIG. 1, such as its
It can be Digital Signal Processing (DSP) controller, be also possible to other kinds of microcontroller etc., it below will be single to control
The specific implementation of member 802 is illustrated.
Compensating unit 803 is for compensating the PWM duty cycle with the compensation time.It can pass through Fig. 1 institute
The pwm unit 106 shown realizes, the present embodiment to its concrete implementation method and specific compensation method with no restriction,
The prior art can be referred to.
In an embodiment of the present embodiment, when the current value of the output electric current is located at the phase of the current threshold
It is anti-several between the current threshold, and when the output electric current is switched to forward direction by negative sense, described control unit 802 can be with
By preset time bias value (terr_z ’) it is used as the compensation time.
In the another embodiment of the present embodiment, when the current value of the output electric current is located at the current threshold
Between opposite number and the current threshold, and when the output electric current is switched to negative sense by forward direction, described control unit 802 can
With by the opposite number (- t of preset time bias valueerr_z ’) it is used as the compensation time.
Above-mentioned preset time bias value can be more than or less than or equal to the dead time, the inverter
Switching tube cut-offs the equivalent of the mean on-state tube voltage drop of the switching tube bypass freewheeling diode of delay time and the inverter
The sum of error time.
In the yet another embodiment of the present embodiment, when the current value of the output electric current is greater than or equal to the electric current
When threshold value, described control unit 802 can be by dead time (td), the switching tube of the inverter cut-off delay time (ton-
toff) and the inverter switching tube bypass freewheeling diode mean on-state tube voltage drop equivalent error time (tvon)
The sum of (terr) it is used as the compensation time.
In the another embodiment of the present embodiment, when the current value of the output electric current is less than or equal to the electric current
When the opposite number of threshold value, described control unit 802 is by dead time (td), the switching tube of the inverter cut-off delay time
(ton-toff) and the inverter switching tube bypass freewheeling diode mean on-state tube voltage drop the equivalent error time
(tvon) the sum of opposite number (- terr) it is used as the compensation time.
In the present embodiment, the current threshold can be greater than 0 and less than 0.5, alternatively, the current threshold can be big
In 0 and less than 1.In one example, current threshold 0.2, in one example, current threshold 0.4.
Device through this embodiment passes through the PWM duty cycle t that (zero passage area) compensation near zero current is fixederr_z',
Increase electric current in new switching process after dead time significantly, avoids when next dead zone process arrives that clamper arrives electric current again
Zero, to efficiently solve the problems, such as the dead time effect and zero current clamping problem of inverter.
Embodiment 3
A kind of inverter system is present embodiments provided, Fig. 9 is the schematic diagram of the inverter system, as shown in figure 9, this is inverse
Becoming device system 900 includes inverter 901 and controller 902.
Inverter 901 can for example realize by inverter 103 shown in FIG. 1, but the present embodiment to this with no restriction,
Inverter 901 or other compositions have other structures.
Controller 902 may include the Waveform controller 800 of inverter output current as described in example 2.Due to
The device is elaborated in embodiment 2, content is incorporated herein, and is repeated no more.
Figure 10 is the schematic diagram of an embodiment of the controller 902, as shown in Figure 10, in this embodiment, control
Device 902 processed may include: current sensor 1001, central processing unit 1002 and memory 1003, and current sensor 1001 can
To realize the function of the current detecting unit 801 of device as described in example 2, embodiment 2 is may be implemented in central processing unit 1002
The control unit 802 of the device and the function of compensating unit 803, memory 1003 can be used for storing various data, example
Current threshold, preset time bias value as the aforementioned etc..
In one embodiment, the function of control unit 802 as described in example 2 can be integrated into central processing unit
In 1002, the waveform controlling method of inverter output current described in embodiment 1 is realized.For example, the central processing unit 1002 can
To be configured as according to the current value of the output electric current and preset current threshold or according to the output electric current
Current value, the preset current threshold and the output sense of current determine pulse width modulation (PWM) account for
The compensation time of empty ratio.For example, when the current value of the output electric current is located at the opposite number and the electric current of the current threshold
Between threshold value, and when the output electric current is switched to forward direction by negative sense, using preset time bias value as the benefit
Repay the time；When it is described output electric current current value be located between the opposite number and the current threshold of the current threshold, and
When the output electric current is switched to negative sense by forward direction, using the opposite number of preset time bias value as when the compensation
Between；When the current value of the output electric current is greater than or equal to the current threshold, by dead time, the switch of the inverter
Pipe cut-offs the equivalent error of the mean on-state tube voltage drop of the switching tube bypass freewheeling diode of delay time and the inverter
The sum of time is used as the compensation time；When the current value of the output electric current is less than or equal to the opposite number of the current threshold
When, the switching tube that the switching tube of dead time, the inverter cut-offs delay time and the inverter is bypassed into afterflow two
The opposite number of the sum of the equivalent error time of mean on-state tube voltage drop of pole pipe is as the compensation time.
In another embodiment, control unit 802 as described in example 2 can separately match with central processing unit 1002
It sets, such as the chip connecting with central processing unit 1002 can be configured by the control unit 802, pass through central processing unit 1002
Control realize the function of control unit 802.
In addition, being not limited to composition shown in Fig. 10, which can also include other component or the certain portions of reduction
Part.
As shown in Figure 10, central processing unit 1002 is otherwise referred to as controller or operational controls, may include microprocessor
Or other processor devices and/or logic device, the central processing unit 1002 receive each portion for inputting and controlling controller 902
The operation of part.
Wherein, memory 1003, such as can be buffer, flash memory, hard disk driver, removable medium, volatile memory, non-
One of volatile memory or other appropriate devices or more.Various information can be stored, can additionally store execution has
Close the program of information.And the program of the memory 1003 storage can be performed in central processing unit 1002, to realize that information stores
Or processing etc..The function of other component with it is existing similar, details are not described herein again.Each component of controller 902 can be by dedicated
Hardware, firmware, software or its in conjunction with realizing, be made without departing from the scope of the present invention.
The embodiment of the present invention also provides a kind of computer-readable program, wherein when executing described program in the controller,
Described program makes the controller execute method described in embodiment 1.
The embodiment of the present invention also provides a kind of storage medium for being stored with computer-readable program, wherein the computer can
Reader makes controller execute method described in embodiment 1.
The device and method more than embodiment of the present invention can be by hardware realization, can also be by combination of hardware software realization.
The present embodiments relate to such computer-readable programs can make the logic when the program is performed by logical block
Component realizes devices described above or component parts, or the logical block is made to realize various method or steps described above.
The embodiment of the present invention further relates to the storage medium for storing procedure above, such as hard disk, disk, CD, DVD, flash memory
Deng.
The software mould that hardware can be embodied directly in conjunction with the method, device that the embodiment of the present invention describes, executed by processor
Block or both combination.For example, the one or more of one or more of functional block diagram shown in fig. 8 and/or functional block diagram
Combination, both can correspond to each software module of computer program process, and can also correspond to each hardware module.These are soft
Part module can correspond respectively to each step shown in fig. 5.These hardware modules are for example using field programmable gate array
(FPGA) these software modules are solidified and is realized.
Software module can be located at RAM memory, flash memory, ROM memory, eprom memory, eeprom memory, post
Storage, hard disk, mobile disk, CD-ROM or any other form known in the art storage medium.One kind can be deposited
Storage media is coupled to processor, to enable a processor to from the read information, and can be written to the storage medium
Information；Or the storage medium can be the component part of processor.Pocessor and storage media can be located in ASIC.This is soft
Part module can store in the memory of equipment, also can store in the storage card that can be inserted into equipment.For example, if equipment is adopted
It is the MEGA-SIM card of larger capacity or the flash memory device of large capacity, then the software module is storable in the MEGA-SIM
In the flash memory device of card or large capacity.
It is combined for one or more of function box described in attached drawing and/or the one or more of function box,
It can be implemented as general processor for executing function described by the embodiment of the present invention, digital signal processor (DSP), dedicated
Integrated circuit (ASIC), field programmable gate array (FPGA) either other programmable logic device, discrete gate or transistor
Logical device, discrete hardware components or it is any appropriately combined.For one or more of the function box of attached drawing description
And/or one or more combinations of function box, it is also implemented as calculating the combination of equipment, for example, DSP and microprocessor
Combination, multi-microprocessor communicate the one or more microprocessors or any other this configuration combined with DSP.
Combining specific embodiment above, invention has been described, it will be appreciated by those skilled in the art that this
A little descriptions are all exemplary, and are not limiting the scope of the invention.Those skilled in the art can be according to the present invention
Spirit and principle various variants and modifications are made to the present invention, these variants and modifications are also within the scope of the invention.
Claims (11)
1. a kind of waveform controlling method of inverter output current, wherein the described method includes:
The output electric current of inverter is detected；
According to the current value of the output electric current and preset current threshold or according to the electric current of the output electric current
Value, the preset current threshold and the output sense of current determine pulse width modulation (PWM) duty ratio
Compensate the time；
The PWM duty cycle is compensated with the compensation time.
2. according to the method described in claim 1, wherein,
It is and described when the current value of the output electric current is located between the opposite number and the current threshold of the current threshold
When output electric current is switched to forward direction by negative sense, using preset time bias value as the compensation time；
It is and described when the current value of the output electric current is located between the opposite number and the current threshold of the current threshold
When output electric current is switched to negative sense by forward direction, using the opposite number of preset time bias value as the compensation time.
3. according to the method described in claim 2, wherein, the preset time bias value is more than or less than or is equal to institute
State dead time, the switching tube of the inverter cut-offs delay time and the switching tube of inverter bypass two pole of afterflow
The sum of equivalent error time of mean on-state tube voltage drop of pipe.
4. method according to claim 1-3, wherein
When the current value of the output electric current is greater than or equal to the current threshold, dead time, the inverter are opened
Pass pipe cut-offs the equivalent mistake of the mean on-state tube voltage drop of the switching tube bypass freewheeling diode of delay time and the inverter
The sum of poor time is used as the compensation time；
When the current value of the output electric current is less than or equal to the opposite number of the current threshold, by dead time, described inverse
The switching tube of change device cut-offs the mean on-state tube voltage drop of the switching tube bypass freewheeling diode of delay time and the inverter
The sum of equivalent error time opposite number as the compensation time.
5. method according to claim 1-3, wherein the current threshold is greater than 0 ampere and is less than inversion
The 10% of device rated current.
6. a kind of Waveform controller of inverter output current, wherein described device includes:
Detection unit detects the output electric current of inverter；
Control unit, according to the current value of the output electric current and preset current threshold or according to the output
The current value of electric current, the preset current threshold and the output sense of current determine that pulse width is modulated
(PWM) the compensation time of duty ratio；
Compensating unit compensates the PWM duty cycle with the compensation time.
7. device according to claim 6, wherein
It is and described when the current value of the output electric current is located between the opposite number and the current threshold of the current threshold
When output electric current is switched to forward direction by negative sense, described control unit is using preset time bias value as when the compensation
Between；
It is and described when the current value of the output electric current is located between the opposite number and the current threshold of the current threshold
When output electric current is switched to negative sense by forward direction, described control unit is using the opposite number of preset time bias value as described in
Compensate the time.
8. device according to claim 7, wherein the preset time bias value is more than or less than or is equal to institute
State dead time, the switching tube of the inverter cut-offs delay time and the switching tube of inverter bypass two pole of afterflow
The sum of equivalent error time of mean on-state tube voltage drop of pipe.
9. according to the described in any item devices of claim 6-8, wherein
When the current value of the output electric current is greater than or equal to the current threshold, described control unit is by dead time, institute
State inverter switching tube cut-off delay time and the inverter switching tube bypass freewheeling diode mean on-state pipe
The sum of equivalent error time of pressure drop is used as the compensation time；
When the current value of the output electric current is less than or equal to the opposite number of the current threshold, described control unit is by dead zone
Time, the inverter switching tube cut-off delay time and the inverter switching tube bypass freewheeling diode it is flat
The opposite number of the sum of the equivalent error time of equal on-state tube voltage drop is as the compensation time.
10. according to the described in any item devices of claim 6-8, wherein the current threshold is greater than 0 ampere and is less than inversion
The 10% of device rated current.
11. a kind of inverter system, including inverter and controller, wherein the controller includes that claim 6-10 appoints
Device described in one.
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Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN110716082A (en) * | 2019-09-24 | 2020-01-21 | 哈尔滨工业大学（威海） | Terminal voltage acquisition and compensation method for improving precision of power-stage motor simulator |
| CN110855138A (en) * | 2019-10-25 | 2020-02-28 | 西安班特利奥能源科技有限公司 | Dead zone compensation method for three-level converter |
| CN111342695A (en) * | 2018-12-17 | 2020-06-26 | 广州汽车集团股份有限公司 | Dead zone compensation method and device of inverter |
| CN113612381A (en) * | 2021-07-21 | 2021-11-05 | 深圳数马电子技术有限公司 | Dead zone compensation method, dead zone compensation device, motor driver and storage medium |
| CN116840568A (en) * | 2023-06-09 | 2023-10-03 | 湖南天正友选企业策划有限公司 | High-precision nondestructive state monitoring method for bus capacitor in motor driving system |
Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101951182A (en) * | 2010-08-26 | 2011-01-19 | 东元总合科技（杭州）有限公司 | Voltage compensation method of pulse width modulation output based on voltage equivalent |
| CN103236798A (en) * | 2013-04-26 | 2013-08-07 | 北方工业大学 | Three-level inverter dead time compensation control method |
| CN105576993A (en) * | 2016-01-12 | 2016-05-11 | 上海吉亿电机有限公司 | Dead-zone compensation method and compensation system for frequency converter |
| CN106788058A (en) * | 2016-12-22 | 2017-05-31 | 南京埃斯顿自动控制技术有限公司 | A kind of dead time compensation control method of permagnetic synchronous motor |
-
2018
- 2018-01-12 CN CN201810031556.5A patent/CN110034700B/en active Active
Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101951182A (en) * | 2010-08-26 | 2011-01-19 | 东元总合科技（杭州）有限公司 | Voltage compensation method of pulse width modulation output based on voltage equivalent |
| CN103236798A (en) * | 2013-04-26 | 2013-08-07 | 北方工业大学 | Three-level inverter dead time compensation control method |
| CN105576993A (en) * | 2016-01-12 | 2016-05-11 | 上海吉亿电机有限公司 | Dead-zone compensation method and compensation system for frequency converter |
| CN106788058A (en) * | 2016-12-22 | 2017-05-31 | 南京埃斯顿自动控制技术有限公司 | A kind of dead time compensation control method of permagnetic synchronous motor |
Cited By (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN111342695A (en) * | 2018-12-17 | 2020-06-26 | 广州汽车集团股份有限公司 | Dead zone compensation method and device of inverter |
| CN110716082A (en) * | 2019-09-24 | 2020-01-21 | 哈尔滨工业大学（威海） | Terminal voltage acquisition and compensation method for improving precision of power-stage motor simulator |
| CN110716082B (en) * | 2019-09-24 | 2021-11-02 | 哈尔滨工业大学（威海） | Terminal voltage acquisition and compensation method for improving precision of power-stage motor simulator |
| CN110855138A (en) * | 2019-10-25 | 2020-02-28 | 西安班特利奥能源科技有限公司 | Dead zone compensation method for three-level converter |
| CN110855138B (en) * | 2019-10-25 | 2021-08-03 | 西安班特利奥能源科技有限公司 | Dead zone compensation method for three-level converter |
| CN113612381A (en) * | 2021-07-21 | 2021-11-05 | 深圳数马电子技术有限公司 | Dead zone compensation method, dead zone compensation device, motor driver and storage medium |
| CN116840568A (en) * | 2023-06-09 | 2023-10-03 | 湖南天正友选企业策划有限公司 | High-precision nondestructive state monitoring method for bus capacitor in motor driving system |
| CN116840568B (en) * | 2023-06-09 | 2024-02-23 | 湖南栏海电气工程有限公司 | High-precision nondestructive state monitoring method for bus capacitor in motor driving system |
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| Publication number | Publication date |
|---|---|
| CN110034700B (en) | 2023-05-09 |
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