CN110034679A - A kind of method of buck-boost converter pulse wide voltage-regulation control - Google Patents

A kind of method of buck-boost converter pulse wide voltage-regulation control Download PDF

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CN110034679A
CN110034679A CN201811625961.6A CN201811625961A CN110034679A CN 110034679 A CN110034679 A CN 110034679A CN 201811625961 A CN201811625961 A CN 201811625961A CN 110034679 A CN110034679 A CN 110034679A
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square wave
wave
buck
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CN110034679B (en
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段志刚
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Beijing Xingda Zhilian Technology Co Ltd
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Beijing Xingda Zhilian Technology Co Ltd
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    • HELECTRICITY
    • H02GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02MAPPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M3/00Conversion of dc power input into dc power output
    • H02M3/02Conversion of dc power input into dc power output without intermediate conversion into ac
    • H02M3/04Conversion of dc power input into dc power output without intermediate conversion into ac by static converters
    • H02M3/10Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
    • H02M3/145Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal
    • H02M3/155Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only
    • H02M3/156Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators
    • H02M3/158Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators including plural semiconductor devices as final control devices for a single load

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  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Dc-Dc Converters (AREA)

Abstract

A kind of method and apparatus of buck-boost converter pulse wide voltage-regulation control, it include: to choose high frequency turnable pulse width square wave A, it is reference with its waveform A zero phase, it chooses base phase shift time Tpsu and establishes base phase offset square wave B, square-wave signal Ya relevant to area's high RST in the base phase shift time is established simultaneously, and square wave S1, S2 are controlled to the pulse wide voltage-regulation of Q1, Q2 with the switching group that the square wave A and synthesis square wave Ya+B establish two pipe buck-boost converters;Described square wave A, B are 20K ~ 2MHz high-frequency pulse square wave, period of time T sw, and high-value signal turn-on time is Ton≤Tsw, duty ratio D=Ton/Tsw in the monocycle, adjustable.Its advantages: realize that the buck of buck-boost converter adaptively continuously adjusts on a large scale, formula and parameter continuous adaptive is controlled to adjust in gamut, maximum turn-on time, working frequency, maximum duty cycle relatively independent can design, and without the detection of voltage raising and reducing parameter state and mode conversion, be readily adapted to accommodate various running parameters and design.

Description

A kind of method of buck-boost converter pulse wide voltage-regulation control
Technical field
The present invention relates to buck-boost converters, more specifically to a kind of two pipe buck pulsewidth modulation continuous voltage regulatings The method of control.
Background technique
Buck-boost converter is a kind of progress pressure stabilizing transformation transmission energy between new energy or bus power supply and equipment A kind of common electronic equipment, commonly referred to as secondary power supply unit or load point converter;Its use scope is wider, general to be mostly The design of producer's special type or technical routine application product.
In the field of new energy application electric vehicle such as electric bicycle and motorcycle and pickup truck, wherein to be electronic Machine provides power and mainly selects power battery pack, including lead-acid battery, manganese lithium battery, ternary lithium battery, lithium iron battery etc., electricity The voltage selection and Application of pond group is limited by the matched and associated motor voltage of aerodynamic power cost performance, ampere-hour capacity type selecting It is limited by the design mileage of power of motor and vehicle.Battery type selecting is associated with the impact of the mesh power and electric current and battery of motor Current characteristics;The charging of general more battery packs uses while configuring more branch system schemes;When the more specifications of design multi items are most When measuring battery pack and concentrating the equipment of charging, the voltage of each branch distribution type charger, electric current, power multi-size, at this time preferably Two Stages charging system scheme, wherein one-stage transfor-mation device is mainly responsible for DC bus;Two-dimensional transform device is responsible for each branch battery Direct-connected charging, manage each battery pack independently in the charging of the voltage and current and power of different time sections different modes, be similar to Load point energy is adapted to administrative unit;Energy utilization rate, the availability of entire charging equipment can be greatly improved in this way;And it can be substantially Reduce the wave of the resources such as place, electricity consumption, equipment caused by the electric energy redundancy for the charging system being made of multiple charge independence devices Take.
In the fields of new energy applications such as household or small communication devices photovoltaic, wind light mutual complementing, combustion gas, Hydrogen Energy, generating equipment Power grade generally about 1~5KW, supply voltage current range is wide in range and irregularly changes at a slow speed, can generally configure illumination with Dynamic or power points MPPT tracking, and two-stage DC converting is taken, suitable capacity energy-storage battery is configured, to efficiently use power supply energy The soft stagnant characteristic of energy;The transformation of two-stage type power DC can greatly improve energy resource system utilization rate, availability;Generally appear on the market product Design mainly take prime boosting, rear class decompression straight string combined system, also have and rear class be designed as combined type lifting buckling Parallel operation realizes that voltage is adjusted and power is converted using voltage detecting cooperation switch control logic.
Its output voltage of typical buck-boost direct current converter can both be greater than or be smaller than input voltage, and input and output Voltage can work in a certain range, such as Vin=40~90/Vout=40~90V buck-boost converter;Typical case's lifting Pressure transformation topology circuit mainly has two major classes: one kind is two pipe die formulas, and one kind is four pipe die formulas;Monotonic transformation refers to energy by list One direction is by input flow direction output;Since buck-boost converter generally uses power inductance capacity cell without applying transformer, So the input and output of this general quasi-converter are not isolated, have the association of direct potential difference and common point association.
Typical circuit topology such as Fig. 1 of four pipe buck-boost converters in the prior art corresponds to Regulation Control and generally uses Decompression/three section of nearly pressure/boosting;Wherein closely generally there are two types of pressure regulation modes for pressure section: linear low voltage difference series voltage stabilizing and switch rise It is depressured regulation of series.Typically appear on the market application scheme integrated chip such as LT8705, and builtin voltage detection control segmentation is such as Fig. 3 institute Show;Decompression section control logic is Q3, Q4=[On, Off], Q1, Q2=D.PWM [On, Off] on the right side of Fig. 3, and decompression formula is Vout =Vin*D;Boosting section control logic is Q1, Q2=[On, Off], Q3, Q4=D.PWM [On, Off], step-up formula on the left of Fig. 3 For Vout=Vin/ (1-D), wherein D is pulse-width controlled duty ratio, is nearly pressure section in the middle part of Fig. 3;Fig. 4 is nearly pressure Duan Siguan at one The control model of clock cycle, left side is nearly pressure drop pressure section control sequential in figure, and right side is nearly pressure boosting section control sequential.It can be with Notice that decompression, nearly pressure, boost control logic and pressure regulation formula are entirely different, and need Real-time and Dynamic Detection output voltage with Input voltage implements corresponding control logic and matches corresponding adjusting duty when pressure regulation formula to determine work section.Therefore, The logic of its chip interior is extremely complex, is generally difficult to be combined into practical control program using a small amount of general-purpose chip, application Special chip is limited by Yuan Pian producer given design again, and four control film-makings typically are provided with reversible transducer function, therefore interior Portion configures multiple pulse-width regulated difference preamplifiers, and the control to the voltage and current of input and output is needed to be limited or in advance It sets, model selection and parameter designing are very cumbersome, and the factors such as cost, period, batch for separately purchasing also considerably increase product and open Hair, production, the difficulty applied.
Typical circuit topology such as Fig. 2 of two pipe buck-boost converters in the prior art corresponds to Regulation Control and generally uses Two section of buck/boost;Being depressured section control logic is Q2=Off, Q1=D.PWM, and decompression formula is Vout=Vin*D;Boosting Section control logic is Q1=On, Q2=D.PWM, and step-up formula is Vout=Vin/ (1-D);Wherein D is pulse-width controlled duty ratio. It may be noted that decompression, boost control logic and pressure regulation formula it is entirely different, and need Real-time and Dynamic Detection output voltage and Input voltage implements corresponding control logic and matches corresponding adjusting duty when pressure regulation formula to determine work section, this kind of The control chip that scheme appears on the market is generally low pressure lithium battery applications, and the mature control sheet greater than 15V operating voltage has no and appears on the market.
In the prior art, the buck of typical four pipe die formulas is also equipped with bidirectional energy function of exchange, leads to control circuit Design is complicated, design is cumbersome, is not easy to simplify to adapt to one-way only operation environment, often inconvenient for use or even unreliable;And it appears on the market The integrated control chip of application is mostly that designated trade design does not have versatility, need to additionally be increased very when applied to typical buck More auxiliary circuits.
The integrated control chip of typical two pipe die formulas, the mostly control program of designed, designed, most of scheme is using combination Mode is established the comparison detection of input and output voltage, is patrolled when output voltage to be controlled is greater than input voltage using boosting rectifier control Volume, when output voltage to be controlled is less than input voltage using decompression control logic.Wherein, a part realizes buck using DSP Detection zone every and pressure regulation Current limited Control, another part using typical routine PWM control sheet as basic pulse-width controlled, cooperation detects Control logic realizes buck control.Generally speaking, it is continuous, simple to lack buck control for current two pipes buck-boost converter Control program practical, cost performance is high, versatile.
Summary of the invention
Divide the technical problem to be solved in the present invention is that detecting and controlling for buck in buck combination control model From, control to adjust buck formula disunity, buck parameter discontinuous, voltage detecting and mode conversion and be difficult to design, it is uncomfortable The defect for answering a variety of running parameters, provide it is a kind of by base phase offset and controllable pulse width from main regulation output voltage buck Method realizes buck continuous control, simple and practical, versatile.
The technical solution adopted by the present invention to solve the technical problems is: constructing a kind of buck-boost converter pulse wide voltage-regulation control The method of system, includes the following steps:
High frequency turnable pulse width square wave A is chosen, is reference with its waveform A zero phase, base phase shift time Tpsu is chosen and establishes Base phase deviates square wave B, while establishing square-wave signal Ya relevant to area's high RST in the base phase shift time, with the square wave The switching group that A and synthesis square wave Ya+B establishes two pipe buck-boost converters controls square wave S1, S2 to the pulse wide voltage-regulation of Q1, Q2;
Described square wave A, B are 20K~2MHz high-frequency pulse square wave, period of time T sw, when high-value signal is connected in the monocycle Between be Ton≤Tsw, duty ratio D is adjustable, D=Ton/Tsw, meet 0≤D≤1;It switchs and drives for converter Regulation Control.
Described pulse square wave A, B are identical frequency, same duty cycle, and frequency range is 20K~2MHz high-frequency pulse square wave, Time cycle is Tsw.
The base phase shift time Tpsu is that the square wave B lags the square wave A zero phase, meet 0.5Tsw≤Tpsu≤ Tsw, the base phase offset duty ratio is Dpsu=Tpsu/Tsw.Meet 0.5≤Dpsu≤1, i.e. base phase offset between B and A Less than one frequency cycle, but it is greater than half of frequency cycle, offset phase difference duty ratio is between 0.5~1;Timing diagram is square wave B lags behind square wave A.Wherein, the selection of base phase shift time Tpsu or duty ratio Dpsu refer to converter hardware parameter and correlation Input and output adjustable range and design object.
Further, the square wave A is according to voltage error comparator signal cooperation pwm comparator and serrated signal Ca Obtained turnable pulse width waveform, the square wave B are the base phases of the zero phase hysteresis offset time Tpsu based on turnable pulse width square wave A Deviate square wave.Wherein, hardware circuit can be used in phase shift or software algorithm is implemented.
Further, base phase offset square wave B be based on the oscillator for generating the square wave A determine pulsewidth square wave Za before Along burst pulse synchronization signal Sa zero phase, burst pulse synchronization signal Sb is obtained after base phase offset Tpsu, according to synchronization signal Sa, Sb Rising edge determines the forward position of pulse-width signal A, B;Meanwhile according to same voltage error comparator cooperate each pwm comparator and Serrated signal Ca, Cb obtains edge after pulsewidth, to obtain turnable pulse width square wave A, B;
The square wave B and Sb same-phase, with square wave A shift time Tpsu.
Further, the adjustable high-value signal Ton of described square wave A, B is in 0~2Tpsd range, wherein Tpsd=Tsw- Tpsu;Duty ratio Dpsd=Tpsd/Tsw.
Further, high-value signal relevant square-wave signal Ya in area's in the base phase shift time is opposite zero phase Time point Tpsd, Tpsu of time is time point Tpsd, Tpsu couple of edge and Relative Zero phase time before and after signal Ya high level Square wave is exported after upper section is compared with Ra in the triangular wave Ta answered.
Further, the switching tube of the buck-boost converter to the pulse wide voltage-regulation of Q1, Q2 control driving square wave S1, S2, wherein S1=A is directly formed by square wave A, and S2=Ya+B is by turnable pulse width square wave B and to determine pulse width signal Ya and synthesize, institute Stating formula symbol "+" is logical "or" operation.
Further, the buck-boost converter pressure regulation formula: Vo=K/ (1-K) * Vi;Wherein K is that conducting pulsewidth accounts for Empty ratio, 0≤K < 1, K=Ton/2Tpsd.
Further, as phase shift time Tpsu=Tpsd=0.5Tsw, K=D, the buck-boost converter pressure regulation public affairs Formula: Vo=D/ (1-D) * Vi, 0≤D < 1, D=Ton/Tsw.
Further, the maximum value design of K takes 0.67~0.75, and boosting maximum output has Vomax < (2~3) Vin.
A kind of buck-boost converter pulse wide voltage-regulation control circuit, which is characterized in that including following circuit function area: high frequency letter Number generator functional areas F11 establishes oscillator and generates high-frequency square-wave signal Za;Base phase offset functions area F12, establishes base phase forward position Synchronization signal Sa establishes the time after base phase offset along signal Ya and inversion signal Yb according to triangular wave and Tpsd time;Sawtooth Wave energy area F13, according to the forward position synchronization signal Sa, the sawtooth wave comparison signal Ca generated by pulse-width modulation circuit exports base phase Pressure regulation pulse width signal A;Pressure regulation semiotic function area F14, signal Ya, Yb and sawtooth wave functional areas after Tpsd is deviated according to base phase The pulsewidth modulation sawtooth wave comparison signal Ca generated in F13 exports phase-shift voltage regulating pulse width signal B.
A kind of buck-boost converter pulse wide voltage-regulation control circuit, which is characterized in that including following circuit function area: high frequency letter Number generator functional areas F21 establishes oscillator and generates high-frequency square-wave signal Za;Base phase offset functions area F22, by base phase signal Za establishes the timing signal Ya and inversion signal Yb after base phase offset according to triangular wave and Tpsd time;Sawtooth wave functional areas F23 establishes base phase leading edge synchronization signal Sa, phase shift Tpsu postamble according to base phase signal Za, phase shift timing signal Yb Sb;Pressure regulation semiotic function area F24, according to the forward position synchronization signal Sa, the sawtooth wave comparison signal Ca generated by pulse-width modulation circuit, Export base phase pressure regulation pulse width signal A;Phase-shift voltage regulating semiotic function area F25, according to the forward position synchronization signal Sb, by pulse-width modulation circuit The sawtooth wave comparison signal Cb of generation exports modulated pwm signal B after phase shift Tpsu;Export pressure regulation semiotic function area F26, foundation Phase shift timing signal Yb, pulse-width modulation circuit output phase shift Tpsu pulse-width signal B or operation after output pulse width pressure regulation side Wave S2, base phase pulse-width signal A are directly output as pulse wide voltage-regulation square wave S1.
A kind of buck-boost converter pulse wide voltage-regulation control circuit, which is characterized in that including following circuit function area: high frequency letter Number generator functional areas F31 establishes oscillator and generates complementary phases high frequency square wave narrow pulse signal Sa, Sb;First sawtooth wave function Energy area F32, according to the forward position synchronization signal Sa, the sawtooth wave comparison signal Ca generated by pulse-width modulation circuit exports base phase pressure regulation Pulse width signal A;Second sawtooth wave functional areas F33, according to the forward position synchronization signal Sb, the sawtooth wave ratio generated by pulse-width modulation circuit Compared with signal Cb, pressure regulation pulse width signal B after phase shift is exported.
The default ginseng of base phase shift time Tpsu and corresponding regulating time Tpsd and duty ratio corresponding value are established in the present invention Number, establishing duty score shape in unit period is depressor area, constant cabin altitude state, three sections of press area, its correspondence pressure regulation formula Unification, dutyfactor adjusting method are consistent, and export buck performance self-adapting.Also set up corresponding duty cycle adjustment source letter Number generator, establishes weber power inductance unit time equation and output voltage calculation formula, to establish complete buck The method and circuit of duty ratio pulse-width controlled pressure regulation.
The method for implementing a kind of buck-boost converter base phase offset pulse wide voltage-regulation control of the invention, has below beneficial to effect Fruit: realizing that the buck of buck-boost converter adaptively continuously adjusts on a large scale, simple direct, the buck gamut of control method Interior control and regulation formula and parameter continuous adaptive, maximum turn-on time, working frequency, maximum duty cycle relatively independent can be set Meter without the detection of voltage raising and reducing parameter state and mode conversion, is readily adapted to accommodate various running parameters, and designs more succinct, height Effect.
Detailed description of the invention
Fig. 1 is the circuit diagram of four pipe buck switch mode converters in the prior art;
Fig. 2 is the circuit diagram of two pipe buck switch mode converters in the prior art;
Fig. 3 is four pipe switch converters voltage detecting buck stepwise schematic views in the prior art;
Fig. 4 is that four pipe switch converters voltages closely press section control timing diagram in the prior art;
Fig. 5 is the present invention using negative terminal as the circuit diagram of two pipe buck-boost converter of common point;
Fig. 6 is the present invention using anode as the circuit diagram of two pipe buck-boost converter of common point;
Fig. 7 is the baseband signal time diagram of buck transformation base phase offset of the present invention;
Fig. 8 is the decompression range mode that the present invention is deviated using power positive end as the base phase of common point, in this section, work In the operation schematic diagram of specific 10,00,01 3 groups of switch states;
Fig. 9 is the boosting range mode that the present invention is deviated using power positive end as the base phase of common point, in this section, work In the operation schematic diagram of specific 10,11,01 3 groups of switch states;
Figure 10 is the corresponding basic timing of decompression section, the switch state timing, electricity of buck transformation base phase offset of the present invention Inducing current and voltage oscillogram;
Figure 11 is the corresponding basic timing of boosting section, the switch state timing, electricity of buck transformation base phase offset of the present invention Inducing current and voltage oscillogram;
Figure 12 is to open in the decompression section corresponding full duty cycle of buck transformation base phase offset of the present invention from zero phase Begin, Q1, Q2 switching signal correspond to the correlation of each time point and section.
Figure 13 is to open in the boosting section corresponding full duty cycle of buck transformation base phase offset of the present invention from zero phase Begin, Q1, Q2 switching signal correspond to the correlation of each time point and section.
Figure 14 is the control circuit example 1 of buck of the present invention transformation base phase offset, wherein base phase shift time Tpsu > 0.5Tsw, Tpsd < 0.5Tsw.
Figure 15 is the control circuit example 2 of buck of the present invention transformation base phase offset, wherein base phase offset Tpsu≤ 0.5Tsw, Tpsd≤0.5Tsw.
Figure 16 is the control circuit example 3 of buck transformation base phase offset of the present invention, and wherein base phase deviates Tpsu= 0.5Tsw, Tpsd=0.5Tsw.
Specific embodiment
Below in conjunction with attached drawing, embodiments of the present invention is further illustrated.
Fig. 5 gives the typical case that the present invention deviates pulse wide voltage-regulation using negative terminal as two pipe buck-boost converter base phases of common point Circuit topology circuit diagram.In LED industrial lighting or EUV lithographic apparatus, through more frequently with the direct current that negative terminal is common point The power supply light modulation of mould group, wherein the light-operated requirement direct correlation in the voltage and current of each mould group and corresponding autonomous working space and controlled, It is at this time suitable for that system is formed using corresponding multiple groups buck-boost direct current converter.Fig. 6 gives the present invention using anode as common point Two pipe buck-boost converter base phases offset pulse wide voltage-regulation typical circuit topological circuit schematic diagram;In the middle and small scale of lithium battery In new energy resources system, such as in the equipment such as electric bicycle, battery-operated motor cycle, through the direct current supply for frequently with anode being common point Mode, motor thermoacoustic prime engine device and charger use anode common point, particularly, when the charging cabinet of configuration multiple groups battery charging When design, corresponding battery matching port is also suitable for the buck pattern conversion charger for using anode as common point.
Fig. 7 gives the baseband signal time diagram of two pipe buck-boost converter base phases offset of the invention, wherein waveform Z For the signal of oscillator, using sawtooth wave pattern, waveform Za is by the corresponding half period square wave generated of sawtooth wave Z, and waveform Ta is The double bevel triangular wave that capacitor charge and discharge is generated by square wave Za.Quick comparator is configured at this time, and it is inclined that configuration corresponds to base phase Shift time Tpsu, that is, phase Dpsu reference level point Ra, intersects at the upper two time point positions waveform Ta, and comparator output is Symmetrical time-tagging position Tpsd, Tpsu are obtained, while obtaining reference potential point and detecting positive pulse compared with triangular wave Ta Waveform Ya corresponds to positive pulse width Ty=Tpsu-Tpsd=Tsw-2Tpsd;Ya non-value obtains impulse waveform Yb, by waveform Za, Yb rising edge phase discriminator can respectively obtain narrow pulse waveform Sa, Sb, and wherein waveform Sa pulse front edge corresponds to Za zero phase Position, waveform Sb pulse front edge correspond at the time point Tpsu of waveform Za, i.e. Sb has fixed base phase relative to former phase Sa Offset, shift time Tpsu, offset duty ratio are Dpsu, Dpsu=Tpsu/Tsw;Wherein, Tsw is signal Sa, Sb waveform Cycle time.And the present invention arranges, Tpsu≤0.5Tsw, and remembers Tpsd=Tsw-Tpsu≤0.5Tsw.Fig. 7 waveform Ta, Ya, Tsw, Tpsu, Tpsd and correlation are denoted on Sa, Sb respectively;Waveform Ca, Cb are using Sa, Sb as synchronization signal to setting Benchmark sawtooth wave synchronizing cycle that capacitor charging generates is counted, cooperates voltage error amplifier and pulse-width regulated comparator, generates base Phase deviation buck converts the switch modulation signal of two pipe pulse width pressure regulation.
Fig. 8 gives three switches of the present invention decompression varied sections that two pipe buck-boost converter base phase of anode deviates altogether In the corresponding circuit of assembled state switch and inductance capacitor element voltage and current trend and size variation process, state for time with And respective segments voltagesecond product.Wherein, left side subgraph is that switching tube Q1 conducting, Q2 are closed in circuit in figure, under this state, circuit electricity Stream by output plus terminal Vout+, by output capacitance C2 and load, reach output negative terminal Vout-, then followed by diode D2, After power inductance L1 and switching tube Q1, input negative terminal Vin- is flowed into, through capacitor C1 and power supply, input anode is returned to, returns to Common point output plus terminal.Intermediate subgraph is that switching tube Q1 is closed, Q2 is closed in circuit in figure, and under this state, circuital current is by defeated Out anode Vout+, by output capacitance C2 and load, reach output negative terminal Vout-, then followed by diode D2, power electricity Sense L1, diode D1, common point output plus terminal is returned to.The right subgraph is that circuit switch pipe Q1 is closed, Q2 is connected, this state in figure Under, circuital current returns to input by output plus terminal Vout+, by switching tube Q2 followed by power inductance L1 and diode D1 Anode returns to common point output plus terminal.
Fig. 9 gives three switches of the present invention boosting varied sections that two pipe buck-boost converter base phase of anode deviates altogether Assembled state, switchs in corresponding circuit and the voltage and current of inductance capacitor element trend and when size variation process, state Between and respective segments voltagesecond product.Wherein, left side subgraph is that switching tube Q1 conducting, Q2 are closed in circuit in figure, under this state, electricity Road electric current exports negative terminal Vout- by output plus terminal Vout+, by output capacitance C2 and load, arrival, then followed by diode D2, power inductance L1 and switching tube Q1, flow into input negative terminal Vin-, through capacitor C1 and power supply, return to input anode, return to Common point output plus terminal.Intermediate subgraph is switching tube Q1 conducting in circuit, Q2 conducting in figure, and under this state, circuital current is by defeated Anode Vout+ out successively passes through switching tube Q2, power inductance L1 and diode Q1, reaches input negative terminal Vin-, through capacitor C1 and Power supply reaches input anode, that is, returns to common point output plus terminal.The right subgraph is circuit switch pipe Q1 closing, Q2 in figure Conducting, under this state, circuital current successively pass through switching tube Q2, power inductance L1 and diode D1 by output plus terminal Vout+, Input anode is returned to, common point output plus terminal is returned to.
The list of the decompression of two pipe buck-boost converter base phases offset of the invention, the section that boosts is set forth in Figure 10, Figure 11 The corresponding switching drive signal timing of three switch combination states of period;In figure, waveform Z be oscillation source sawtooth signal, Sa, Sb is the narrow pulse signal for the time cycle being Tsw.Wherein: 0 value of Sa phase is identical as oscillator Za, and 0 value of Sb phase and Sa are deviated Time cycle be Tpsu≤0.5Tsw, Tpsd=Tsw-Tpsu, Dpsd=Tpsd/Tsw≤0.5, the present invention establish Sb relative to The fixation base phase offset phase that the base phase shift time Tpsu of Sa is formed is established using Sa, Sb as the sawtooth signal source of synchronous head Ca, Cb are established and are adjusted duty cycle signals A, B waveform with the output of output voltage difference amplifier and pwm comparator output, utilize Pulsewidth waveform A, B generate drive waveforms S1=A, S2=Ya+B of switch Q1, Q2, realize that base phase deviates two pipe buck-boost converters The pulse wide voltage-regulation control of switching tube depressor area, press area.
Figure 10 gives three switching groups of monocycle of the decompression section of two pipe buck-boost converter base phases offset of the invention Conjunction state, corresponding switching drive signal timing, time point, each state period and inductance element current waveform and potential difference Waveform;In Figure 10, the voltage differential that waveform A corresponds to Sa, Ca of 0 phase compares the pulse-width regulated waveform of output, and waveform B is corresponding Compare the pulse-width regulated waveform of output in the voltage differential of Sb, Cb of Dpsu offset phase, when the adjusting corresponding to Ca, Cb is connected Between aTon=Tpsd [Tpsd-Ta], bTon=Tpsu [Tpsd-Ta], wherein Ta be decompression pulsewidth negative increment regulating time, meet 0≤Ta≤Tpsd, and have: work as Ta=0, then Ton=Tpsd is the decompression pulsewidth upper limit, at this time Vo=Vi;As Ta=Tpsd, Ton=0 is decompression pulsewidth lower limit, at this time Vo=0.The present invention uses S1=A, S2=Ya+B to be used as switch Q1, Q2 drive waveforms, Related A, S2 waveform marks T0~T1 period in Figure 10, and the conducting of switching codes 10, i.e. switch Q1, Q2 are closed, in conjunction with the left side Fig. 8 Edge subgraph and electric current mark, it is known that inductive energy storage electric current rises at this time, and time span Tpsd-Ta, voltage Vi-Vo are scheming T1~T2 and T4~T5 period are marked in 10, switching codes 00, i.e. switch Q1 are closed, Q2 is closed, in conjunction with Fig. 8 centre subgraph and Electric current mark, it is known that inductive energy storage electric current is constant at this time, time span Ta, voltage be-Vo, in Figure 10 mark T2~T3~ The T4 period, switching codes 01, i.e. switch Q1 are closed, Q2 is connected, subgraph and electric current mark on the right of Fig. 8, it is known that electric at this time Feel the decline of energy storage electric current, time span Tpsu-Ta, voltage is 0 value;
It is calculated according to monocycle voltagesecond product:
(Vi-Vo) * (Tpsd-Ta)-Vo*Ta+0-Vo*Ta=0;It is simplified to obtain:
Vo=Vi* (Tpsd-Ta)/(Tpsd+Ta), Ta=Tpsd-Ton, 0≤Ton≤Tpsd.
Analysis substitutes into Ton and can obtain: Vo=Ton/ (2Tpsd-Ton) * Vi.
The monocycle three switches of the boosting section of two pipe buck-boost converter base phases offset of the invention are given in Figure 11 Assembled state, corresponding switching drive signal timing, time point, each state period and inductance element current waveform and electricity Potential difference waveform.In Figure 11, the voltage differential that waveform A corresponds to Sa, Ca of 0 phase compares the pulse-width regulated waveform of output, waveform B The voltage differential of Sb, Cb corresponding to Dpsu offset phase compare the pulse-width regulated waveform of output, and the adjusting corresponding to Ca, Cb is led Logical time Tpsd [Tpsd+Ta], bTon=Tpsu [Tpsd+Ta].Wherein Ta is the boosting positive increment regulating time of pulsewidth, meets 0 ≤ Ta≤Tpsd, and have: work as Ta=0, then aTon=Tpsd is boosting pulsewidth lower limit, there is Vo=Vi;As Ta=0.9Tpsd, Step-up ratio is 9, at this time Vo=9Vi, and as Ta → Tpsd, aTon → 2Tpsd, Vo is infinity at this time.The present invention uses S1= A, S2=Ya+B are used as switch Q1, Q2 drive waveforms, and related A, S2 waveform marks T0~T1 period in Figure 10, and switching codes are 10, i.e. switch Q1 conducting, Q2 are closed, and are indicated in conjunction with the left side Fig. 9 subgraph and electric current, it is known that and inductive energy storage electric current declines at this time, when Between length be Tpsd-Ta, voltage Vo-Vi, T1~T2 and T4~T5 period are marked in Figure 10;Switching codes are 11, that is, are opened Q1 conducting, Q2 conducting are closed, in conjunction with subgraph among Fig. 9 and electric current mark, it is known that inductive energy storage electric current is constant at this time, and time span is Ta, voltage Vi mark T2~T3~T4 period in Figure 11;Switching codes are 01, i.e. switch Q1 is closed, Q2 is connected, in conjunction with Subgraph and electric current mark on the right of Fig. 9, it is known that inductive energy storage electric current rises at this time, time span Tpsu-Ta, and voltage is 0 value.Root It calculates and knows according to monocycle voltagesecond product:
(Vi-Vo) * (Tpsd-Ta)+Vi*Ta+0+Vi*Ta=0;It is simplified to obtain:
Vo=Vi* (Tpsd+Ta)/(Tpsd-Ta), Ta=Ton-Tpsd, Tpsd≤Ton < 2Tpsd.Analysis substitutes into Ton can : Vo=Ton/ (2Tpsd-Ton) * Vi.
Output pressure regulation according to Fig. 8, Fig. 9 and Figure 10, Figure 11, which derives to calculate, knows decompression section, boosting section formula system One;Definition conducting pulse duty cycle value K, substitution can obtain:
Vo=K/ (1-K) * Vi;0≤K < 1, K=Ton/ (2Tpsd)
Particularly, as Tpsu=Tpsd, there are Tpsd=Tpsu=0.5Tsw, Ya=0, K=D;Meet: Vo=D/ (1-D) * Vi, 0≤D < 1, D=Ton/Tsw
Figure 12, Figure 13 press depressor area, press area respectively, give in the full duty cycle by a-signal zero phase, Q1, The correlation of Q2 switching signal corresponding each time point and section.
Figure 12 can be seen that in decompression section, and the conducting minimum of Q1 is adjusted from 0 (T0) to maximum Tpsd (T2), corresponding Then since Tpsd (T2), minimum pulse width is Tpsu (T3) for the conducting of Q2, and corresponding adjust of maximum arrives Tsw (T5), output Voltage gradually rises from 0, finally equal with input voltage;ATon={ 0,0& [0 → Tpsd] }, bTon={ Tpsd, Tpsu& [0 →Tpsd]}。
Similar, Figure 13 can be seen that in boosting section, and since T0 (Ta phase point), minimum pulse width is for the conducting of Q1 Tpsd (T1 time point), is adjusted to 2Tpsd time point, and the conducting of corresponding Q2 is since T1, minimum pulse width Tsw-Tpsd (T1), (T5) is adjusted to Tsw+Tpsd, aTon={ 0, Tpsd& [0 → Tpsd] }, bTon={ Tpsd, Tsw& [0 → Tpsd] }; Corresponding output voltage is initially equal with input voltage, quickly increases later.
In Figure 13, for convenience of analyzing, state starting point T0 is not placed at waveform A zero phase, and is placed on switch state 10 Starting point T0, the Ta phase point corresponding to waveform A is mobile with Ta.
A kind of circuit of buck-boost converter base phase offset pulse wide voltage-regulation control, as shown in figure 14, including square wave controller U1 generates 50% duty ratio square wave Za, integrating circuit U4 and generates triangular wave Ta, and Za generates narrow spaces signal Sa, pulsewidth control by U7 Device U2 and synchronization signal Sa processed, generate the forward position turnable pulse width A, and triangular wave Ta, reference voltage Ra generate phase shift by comparator U5 The upper square wave Ya of point, V1, V2, R15, C9 capacitor synchronous charging/discharging generate sawtooth reference source signal Ca, voltage error signal VEA and Sawtooth wave Ca is by edge after pulse width controller U2 generation turnable pulse width square wave A, and phase shift comparator U11 and analog gate U12-14 are to letter Number A phase shift Tpsu time obtains signal B or door U9 and synthesizes to Ya, B, is square wave S2 by U10 Hyblid Buffer Amplifier, A is as S1;Letter Number driving of S1, S2 as buck-boost converter switch Q1, Q2.
As shown in figure 14, the control circuit example 1 of buck transformation base phase offset of the present invention, the example include:
HF signal generator functional areas F11 establishes oscillator and generates high-frequency square-wave signal Za, referring to the upper left side Figure 14.
Step S11, chooses the corresponding duty cycle time Tsw of the voltage environment buck range, choose oscillator U1 and Capacitance-resistance parameter R1, C1 is configured, pierce circuit unit is established;Oscillator output signal Za is the half square wave letter of duty ratio 50% Number.
Base phase offset functions area F12 establishes base phase leading edge synchronization signal Sa, establishes base phase according to triangular wave and Tpsd time Timing signal Ya and inversion signal Yb after offset, referring to the upper right side Figure 14.
Step S12, the operational amplifier U2 and capacitance-resistance parameter R2, C2 are used for establishing triangular wave Ta, the R3=R4 The position dc point Ra in the biasing of construction amplifier input anode.
Step S13, the comparator U5, for establishing and the time point Tpsu of base phase shift time and maximum pulse width time Time point Tpsd it is associated after along forward position waveform Ya, high level time width is Tpsu-Tpsd, while being formed by NOT gate U6 Yb is used to demarcate the rising edge waveform at Tpsu time point, and the high level time width of Yb is Tsw in Ya complementation.
Step S14, the synchronous narrow pulse signal Sa are to pass through differential forward position phase demodulation and operation by determining 50% square wave Za of frequency Circuit realizes that capacitance-resistance R7, C3 determines pulse width.
Sawtooth wave functional areas F12, according to the forward position synchronization signal Sa, the sawtooth wave comparison signal generated by pulse-width modulation circuit Ca exports base phase pressure regulation pulse width signal A, referring to side in Figure 14.
Step S15, the turnable pulse width square-wave signal A are completed by frequency fixing PWM circuit U 2 and configuration circuit, including Frequency plot is synchronous, exports pressure regulation pulsewidth modulation.
Particularly, the signal Sa passes through resistance R9, capacitor C5, diode D1 completion pair as synchronous burst pulse input The instantaneous high level charging of capacitor C7, realizes and synchronizes, so that the duty cycle of the concussion unit OSC of U2 is synchronized with oscillator U1's Za, pulse zero phase are synchronized with rising edge before Sa, and the forward position of the signal A is also synchronized with rising edge before Sa;The serrated signal Ca is made of reference source REF1, Resistor-Capacitor Unit R15, C9 and switch V1, V2, and circuit is closed on edge after wherein V1, V2 form signal A, The output voltage error level VEA is directly inputted to the pulse width modulated comparator of U2 controller, completes pulsewidth modulation, generation can Pulse width signal A is adjusted, is changed after the turnable pulse width along according to output voltage error level VEA back-and-forth motion;Pressure regulation semiotic function Area F14, foundation base phase deviate timing signal Ya, Yb after Tpsu, the pulsewidth modulation sawtooth wave generated in the F12 of sawtooth wave functional areas Comparison signal Ca exports phase-shift voltage regulating pulse width signal B, referring on the downside of Figure 14.
Step S16, the turnable pulse width square-wave signal B are generated by phase shift comparator U11 and analog gate U12-14.Especially , base phase offset phase is provided by the forward position signal Yb, i.e. base phase shift time Tpsu, height electricity of the adjusting pulsewidth corresponding to signal A Flat, the time width by two groups of equivalence resistance-capacitance networks [R15, C9], [R16, C10] corresponding transfer is equal, in signal A zero phase Time point, signal A charge to capacitor C9 by reference to power supply Ref, resistance R15, and time width is voltage adjusting pulsewidth.Its The edge after signal A high level afterwards, You Yumen U8 form high level burst pulse Ha, open analog gate U12, C9 level is transferred to little Rong Signal holding capacitor C8 is measured, synchronous signal Ya opens analog gate U13, resets to capacitor C10.Later at Tpsu time point, by Yb Signal is opened analog gate U14 and is charged by reference to source Ref, resistance R16 to capacitor C10, until capacitor C10 level is equal with C8, Comparator U11 output is zero, the complete pair signals A phase shift Tpsu time;Since signal S2 is by signal Ya and B signal inclusive-OR operation It completes, so corresponding to high level time section in Ya, the unstable state in short-term of B signal does not influence circuit logic;The above circuit completes Signal B after phase shift, wherein turnable pulse width is consistent with signal A, and B signal zero phase lags behind a-signal zero phase time Tpsu.
Step S17, the turnable pulse width square-wave signal S1 for buck switching tube Q1, is direct by switching signal A It is formed;The turnable pulse width square-wave signal S2 for buck switching tube Q2 is carried out by switching signal B and switching signal Ya The inclusive-OR operation of U9 is compounded to form, and wherein U10 is same phase buffered-display driver integration slice, can provide low-resistance high frequency high current, realizes function The direct-connected driving of rate field-effect tube or transformer isolation driving.
In the application example, pulse width controller U1, U2 are Current Voltage dual-loop controller, and Vfb and Gnd is shorted by this application, The output of its builtin voltage ring is shielding for OC high resistant open circuit.The CS and Gnd of Configuration Control Unit U1 is shorted, and pulsewidth is made to export Ao, Bo For maximum 50% duty ratio;Controller U2 is to configure CS signal to the rear sawtooth wave along by pulsewidth output truncation, i.e., bicyclic control Device Central Plains processed Voltage loop is closed, and primary current ring is changed to Voltage loop, realizes single voltage PWM mode.
In this example, parameter limitation are as follows: Tpsd<0.5Tsw, Tpsu>0.5Tsw.
A kind of circuit of buck-boost converter base phase offset pulse wide voltage-regulation control, as shown in figure 15, including square wave controller U1 generates 50% duty ratio square wave Za, integrating circuit U4 and generates triangular wave Ta, and Za generates narrow spaces signal Sa, pulsewidth control by U7 Device U2 and synchronization signal Sa processed, generate the forward position turnable pulse width A, and triangular wave Ta, reference voltage Ra generate phase shift by comparator U5 Point upper square wave Ya, Ya generate Yb by NOT gate U6, and Yb generates narrow spaces signal Sb, pulse width controller U3 and synchronous letter by U8 Number Sb, generates the forward position turnable pulse width B, V1, V2, R15, C9 capacitor synchronous charging/discharging generate sawtooth reference source signal Ca, V3, V4, R16, C10 capacitor synchronous charging/discharging generate sawtooth reference source signal Cb, and voltage error signal VEA and sawtooth wave Ca are by pulse-width controlled Edge, voltage error signal VEA and sawtooth wave Cb are by pulse width controller U3 generation turnable pulse width after device U2 generates turnable pulse width square wave A Edge or door U9 synthesize Ya, B after square wave B, are square wave S2 by U10 Hyblid Buffer Amplifier, A is as S1, and signal S1, S2 are as lifting Press the driving of converter switches Q1, Q2.
As shown in figure 15, the control circuit example 2 of buck transformation base phase offset of the present invention, the example include:
HF signal generator functional areas F21 establishes oscillator and generates high-frequency square-wave signal Za, referring to the upper left side Figure 15.
Step S21, chooses the corresponding duty cycle time Tsw of the voltage environment buck range, choose oscillator U1 and Capacitance-resistance parameter R1, C1 is configured, pierce circuit unit is established;Oscillator output signal Za is the half square wave letter of duty ratio 50% Number.
Base phase offset functions area F22, by base phase signal Za, according to triangular wave and Tpsd time establish after base phase offset when Signal Ya and inversion signal Yb is marked, referring to upside in Figure 15.
Step S22, operational amplifier U2 and capacitance-resistance parameter R2, C2 are for establishing triangular wave Ta, and wherein R3=R4 is used for structure Make position dc point Ra in the biasing of amplifier input anode.
Step S23, the comparator U5, for establish with base phase shift time point Tpsu, time point Tpsd it is associated after Area high level waveform Ya in edge, forward position, high level time width are Tpsu-Tpsd;Yb is formed for demarcating by NOT gate U6 simultaneously The rising edge waveform at Tpsu time point, the high level time width of Yb are a cycle time Tsw in Ya complementation.
Sawtooth wave functional areas F23, according to base phase signal Za, phase shift timing signal Yb, establish base phase leading edge synchronization signal Sa, Phase shift Tpsu postamble Sb, referring to the upper right side Figure 15.
Step S24, described synchronous narrow pulse signal Sa, Sb are corresponding to base phase shift time point Tpsu, time point Tpsd Associated narrow pulse waveform is to be realized by square wave Za and waveform Yb by differential forward position phase demodulation and computing circuit respectively.
Pressure regulation semiotic function area F24 compares letter by the sawtooth wave that pulse-width modulation circuit generates according to the forward position synchronization signal Sa Number Ca exports base phase pressure regulation pulse width signal A, referring to the left side Figure 15.
Step S25, the turnable pulse width square-wave signal A are completed by frequency fixing PWM circuit U 2 and configuration circuit, including Frequency plot is synchronous, exports pressure regulation pulsewidth modulation;
Particularly, the signal Sa passes through resistance R9, capacitor C5, diode D1 completion pair as synchronous burst pulse input The instantaneous high level charging of C7, realizes and synchronizes, so that the duty cycle of the concussion unit OSC of U2 is synchronized with the Za of oscillator U1, arteries and veins It rushes zero phase and is synchronized with rising edge before Sa, the forward position of the signal A is also synchronized with rising edge before Sa;The serrated signal Ca is by joining Source REF1, Resistor-Capacitor Unit R15, C9 and switch V1, V2 composition are examined, circuit is closed on edge after wherein V1, V2 form signal A, described defeated Voltage error level VEA is directly inputted to pulse width modulated comparator out, completes turnable pulse width modulation, generates turnable pulse width signal A, Variation is moved forward and backward along according to output voltage error level VEA after the turnable pulse width;
Phase-shift voltage regulating semiotic function area F25, according to the forward position synchronization signal Sb, the sawtooth wave ratio generated by pulse-width modulation circuit Compared with signal Cb, modulated pwm signal B after phase shift Tpsu is exported, referring to Figure 15 lower left side.
Step S26, the turnable pulse width square-wave signal B are completed by frequency fixing PWM circuit U 3 and configuration circuit, including Frequency plot is synchronous, exports pressure regulation pulsewidth modulation;
Particularly, the signal Sb passes through resistance R10, capacitor C6, diode D2 completion pair as synchronous burst pulse input The instantaneous high level charging of C8, realizes and synchronizes, so that the duty cycle of the concussion unit OSC of U3 is synchronized with the Za of U1 output, pulse Zero phase is synchronized with rising edge before Sb, and the forward position of the signal B is also synchronized with rising edge before Sb;The serrated signal Cb is by referring to Source REF2, Resistor-Capacitor Unit R16, C10 and switch V3, V4 composition, circuit, the output are closed in edge after wherein V3, V4 form signal B Voltage error level VEA is directly inputted to pulse width modulated comparator, completes turnable pulse width modulation, generates turnable pulse width signal B, institute Change after stating turnable pulse width along according to output voltage error level VEA back-and-forth motion.
Pressure regulation semiotic function area F26 is exported, according to phase shift timing signal Yb, the phase shift Tpsu arteries and veins of pulse-width modulation circuit output Output pulse width pressure regulation square wave S2, base phase pulse-width signal A are directly output as pulse wide voltage-regulation after wide modulated signal B or operation Square wave S1, referring to right side in Figure 15.
Step S27, the turnable pulse width square-wave signal S1 for buck switching tube Q1, is direct by switching signal A It is formed;The turnable pulse width square-wave signal S2 for buck switching tube Q2 is carried out by switching signal B and switching signal Ya The inclusive-OR operation of U9 is compounded to form, and wherein U10 is same phase buffered-display driver integration slice, can provide low-resistance high frequency high current, realizes function The direct-connected driving of rate field-effect tube or transformer isolation driving.
In the application example, pulse width controller U1, U2, U3 are Current Voltage dual-loop controller, and this application is short with Gnd by Vfb It connects, the output of its builtin voltage ring is shielding for OC high resistant open circuit.The CS and Gnd of Configuration Control Unit U1 are shorted, make pulsewidth output Ao, Bo is maximum 50% duty ratio;Pulse width controller U2, U3 are to configure CS signal to the rear sawtooth wave along by pulsewidth output truncation Ca, Cb, i.e. dual-loop controller Central Plains Voltage loop are closed, and primary current ring is changed to Voltage loop, realizes single voltage PWM mode.
In this example, the phase shift time limits without application: Tpsu≤0.5Tsw, Tpsd≤0.5Tsw especially work as Tpsd= When Tpsu=0.5Tsw, Ya=0, Yb=1, circuit is working properly.
A kind of circuit of buck-boost converter base phase offset pulse wide voltage-regulation control, as shown in figure 16, including square wave controller U1 generates narrow spaces square-wave signal Sa, Sb, pulse width controller U2, U3 and synchronization signal Sa, Sb, generates the forward position turnable pulse width A, B, It is raw that V1, V2, R15, C9 capacitor synchronous charging/discharging generate sawtooth reference source signal Ca, V3, V4, R16, C10 capacitor synchronous charging/discharging At sawtooth reference source signal Cb, voltage error signal VEA and sawtooth wave Ca, Cb are by pulse width controller U2, U3 generation turnable pulse width Edge after square wave A, B, driving of the signal A=S1 and B=S2 as buck-boost converter switch Q1, Q2.
As shown in figure 16, the control circuit example 3 of buck transformation base phase offset of the present invention, the example include:
HF signal generator functional areas F31, establish oscillator generate complementary phases high frequency square wave narrow pulse signal Sa, Sb, referring on the left of Figure 16.
Step S31, chooses the corresponding duty cycle time Tsw of the voltage environment buck range, choose oscillator U1 and Capacitance-resistance parameter R1, C1 is configured, pierce circuit unit is established.
Two branches output Ao, Bo phase difference of step S32, the oscillator U1 are the half period, while providing branch access The CS signal end of U2 forms sawtooth wave, and by edge after RC time parameter R5//R4, C2 in short-term and CS boundary level starting pulsewidth Control generates narrow spaces output signal Sa, Sb, and wherein the base phase shift time of Sa, Sb signal is 0.5Tsw.
First sawtooth wave functional areas F32 is compared according to the forward position synchronization signal Sa by the sawtooth wave that pulse-width modulation circuit generates Signal Ca exports base phase pressure regulation pulse width signal A, referring to the upper right side Figure 16.
Step S33, the turnable pulse width square-wave signal A are completed by frequency fixing PWM circuit U 2 and configuration circuit, including Frequency plot is synchronous, exports pressure regulation pulsewidth modulation;
Particularly, the signal Sa passes through resistance R6, capacitor C3, diode D1 completion pair as synchronous burst pulse input The instantaneous high level charging of C5, realizes and synchronizes, so that the duty cycle of the concussion unit OSC of U2 is synchronized with the Sa of oscillator U1, arteries and veins It rushes zero phase and is synchronized with rising edge before Sa, the forward position of the signal A is also synchronized with rising edge before Sa;The serrated signal Ca is by joining Source REF1, Resistor-Capacitor Unit R12, C7 and switch V1, V2 composition are examined, wherein V1, V2 form cutting logic circuit in edge after signal A, institute It states output voltage error level VEA and is directly inputted to pulse width modulated comparator, complete turnable pulse width modulation, generate turnable pulse width letter Number A is moved forward and backward variation along according to output voltage error level VEA after the turnable pulse width;
Second sawtooth wave functional areas F33 is compared according to the forward position synchronization signal Sb by the sawtooth wave that pulse-width modulation circuit generates Signal Cb exports pressure regulation pulse width signal B after phase shift, referring to the lower right side Figure 16.
Step S34, the turnable pulse width square-wave signal B are completed by frequency fixing PWM circuit U 3 and configuration circuit, including Frequency plot is synchronous, exports pressure regulation pulsewidth modulation;
Particularly, the signal Sb passes through resistance R7, capacitor C4, diode D2 completion pair as synchronous burst pulse input The instantaneous high level charging of C6, realizes and synchronizes, so that the duty cycle of the concussion unit OSC of U3 is synchronized with the Sa of U1 output, pulse Zero phase is synchronized with rising edge before Sb, and the forward position of the signal B is also synchronized with rising edge before Sb;The serrated signal Cb is by referring to Source REF2, Resistor-Capacitor Unit R13, C8 and switch V3, V4 composition, wherein V3, V4 form cutting logic circuit in edge after signal B, described Output voltage error level VEA is directly inputted to pulse width modulated comparator, completes turnable pulse width modulation, generates turnable pulse width signal B is moved forward and backward variation along according to output voltage error level VEA after the turnable pulse width.
Step S35, the turnable pulse width square-wave signal S1 for buck switching tube Q1, is direct by switching signal A It is formed;The turnable pulse width square-wave signal S2 for buck switching tube Q2, is directly formed by switching signal B, adjustable arteries and veins Wide square-wave signal S1, S2 realize the direct-connected driving or transformer isolation driving of power field effect pipe.
In the application example, pulse width controller U1, U2, U3 are Current Voltage dual-loop controller, and wherein U1 is dual output 50% Mode controller, U2, U3 are 100% output mode controllers of single output.The application example configures U1 using Vfb and Gnd using solid Determine resistance R3 connection, the output of its builtin voltage ring is shielding for OC high resistant open circuit.The end CS of Configuration Control Unit U1 is by output signal Capacitance-resistance integral generates sawtooth wave in short-term for Ao, Bo access, makes to export the burst pulse of Ao, Bo less than 5% duty ratio, for rear end electricity The source of synchronising signal on road;Controller U2, U3 are to configure CS signal to the rear sawtooth wave along by pulsewidth output truncation, i.e., bicyclic Controller Central Plains Voltage loop is closed, and primary current ring is changed to Voltage loop, realizes single voltage PWM mode.
In this example, phase shift time restriction are as follows: Tpsd=Tpsu=0.5Tsw, K=D;Particularly, wherein pulse width controller U2, U3 configuration parameter R8=R9=1.5Kohm, therefore the maximum duty cycle of pulse width controller U2, U3 are 72%, converter boost The upper limit is Vo=Vin*2.57.
The embodiments described above only express several embodiments of the present invention, and the description thereof is more specific and detailed, but simultaneously Limitations on the scope of the patent of the present invention therefore cannot be interpreted as.It should be pointed out that for those of ordinary skill in the art For, without departing from the inventive concept of the premise, various modifications and improvements can be made, these belong to guarantor of the invention Protect range.Therefore, the scope of protection of the patent of the invention shall be subject to the appended claims.

Claims (13)

1. a kind of method of buck-boost converter pulse wide voltage-regulation control, which is characterized in that
This method comprises:
High frequency turnable pulse width square wave A is chosen, is reference with its waveform A zero phase, base phase shift time Tpsu is chosen and establishes base phase Deviate square wave B, while establishing square-wave signal Ya relevant to area's high RST in the base phase shift time, with the square wave A and The switching group that synthesis square wave Ya+B establishes two pipe buck-boost converters controls square wave S1, S2 to the pulse wide voltage-regulation of Q1, Q2;
Described square wave A, B are 20K~2MHz high-frequency pulse square wave, and period of time T sw, high-value signal turn-on time is in the monocycle Ton≤Tsw, duty ratio D is adjustable, D=Ton/Tsw, meets 0≤D≤1;It switchs and drives for converter Regulation Control.
2. the method for pulse wide voltage-regulation control according to claim 1, it is characterised in that:
The base phase shift time Tpsu is that the square wave B lags the square wave A zero phase, meets 0.5Tsw≤Tpsu≤Tsw, The base phase offset duty ratio is Dpsu=Tpsu/Tsw.
3. the method for pulse wide voltage-regulation control according to claim 2, it is characterised in that:
The square wave A is the turnable pulse width obtained according to voltage error comparator signal cooperation pwm comparator and serrated signal Ca Waveform, the square wave B are the base phase offset square waves of the zero phase hysteresis offset time Tpsu based on turnable pulse width square wave A.
4. the method for pulse wide voltage-regulation control according to claim 2, it is characterised in that:
The base phase offset square wave B is that the pulsewidth square wave Za forward position burst pulse of determining based on the oscillator for generating the square wave A synchronizes Signal Sa zero phase, base phase obtain burst pulse synchronization signal Sb after deviating Tpsu, determine arteries and veins according to synchronization signal Sa, Sb rising edge The forward position of wide modulated signal A, B;Meanwhile according to same voltage error comparator cooperate each pwm comparator and serrated signal Ca, Cb obtains edge after pulsewidth, to obtain turnable pulse width square wave A, B;
The square wave B and Sb same-phase, with square wave A shift time Tpsu.
5. according to the method for the pulse wide voltage-regulation control of claim 3 or 4, it is characterised in that:
The adjustable high-value signal Ton of square wave A, B is in 0~2Tpsd range, wherein Tpsd=Tsw-Tpsu;Duty ratio Dpsd= Tpsd/Tsw。
6. the method for pulse wide voltage-regulation control according to claim 5, it is characterised in that:
High-value signal relevant square-wave signal Ya in area's in the base phase shift time, is the time point of Relative Zero phase time Tpsd, Tpsu are the corresponding triangular wave Ta of time point Tpsd, Tpsu of edge and Relative Zero phase time before and after signal Ya high level Middle upper section compared with Ra after export square wave.
7. the method for pulse wide voltage-regulation control according to claim 6, it is characterised in that:
The switching tube of the buck-boost converter is to the pulse wide voltage-regulation of Q1, Q2 control driving square wave S1, S2, wherein S1=A, that is, straight It connects and is formed by square wave A, S2=Ya+B is by turnable pulse width square wave B and to determine pulse width signal Ya and synthesize, and the formula symbol "+" is to patrol Collect inclusive-OR operation.
8. the method for pulse wide voltage-regulation control according to claim 7, it is characterised in that:
The buck-boost converter pressure regulation formula: Vo=K/ (1-K) * Vi;Wherein K is conducting pulse duty cycle value, 0≤K < 1, K =Ton/2Tpsd.
9. the method for pulse wide voltage-regulation control according to claim 7, it is characterised in that:
As phase shift time Tpsu=Tpsd=0.5Tsw, K=D, the buck-boost converter pressure regulation formula: Vo=D/ (1-D) * Vi, 0≤D < 1, D=Ton/Tsw.
10. the method for pulse wide voltage-regulation control according to claim 8, it is characterised in that:
The maximum value design of K takes 0.67~0.75, and boosting maximum output has Vomax < (2~3) Vin.
11. a kind of buck-boost converter pulse wide voltage-regulation control circuit, which is characterized in that including following circuit function area: high frequency letter Number generator functional areas F11 establishes oscillator and generates high-frequency square-wave signal Za;Base phase offset functions area F12, establishes base phase forward position Synchronization signal Sa establishes the time after base phase offset along signal Ya and inversion signal Yb according to triangular wave and Tpsd time;Sawtooth Wave energy area F13, according to the forward position synchronization signal Sa, the sawtooth wave comparison signal Ca generated by pulse-width modulation circuit exports base phase Pressure regulation pulse width signal A;Pressure regulation semiotic function area F14, signal Ya, Yb and sawtooth wave functional areas after Tpsd is deviated according to base phase The pulsewidth modulation sawtooth wave comparison signal Ca generated in F13 exports phase-shift voltage regulating pulse width signal B.
12. a kind of buck-boost converter pulse wide voltage-regulation control circuit, which is characterized in that including following circuit function area: high frequency letter Number generator functional areas F21 establishes oscillator and generates high-frequency square-wave signal Za;Base phase offset functions area F22, by base phase signal Za establishes the timing signal Ya and inversion signal Yb after base phase offset according to triangular wave and Tpsd time;Sawtooth wave functional areas F23 establishes base phase leading edge synchronization signal Sa, phase shift Tpsu postamble according to base phase signal Za, phase shift timing signal Yb Sb;Pressure regulation semiotic function area F24, according to the forward position synchronization signal Sa, the sawtooth wave comparison signal Ca generated by pulse-width modulation circuit, Export base phase pressure regulation pulse width signal A;Phase-shift voltage regulating semiotic function area F25, according to the forward position synchronization signal Sb, by pulse-width modulation circuit The sawtooth wave comparison signal Cb of generation exports modulated pwm signal B after phase shift Tpsu;Export pressure regulation semiotic function area F26, foundation Phase shift timing signal Yb, pulse-width modulation circuit output phase shift Tpsu pulse-width signal B or operation after output pulse width pressure regulation side Wave S2, base phase pulse-width signal A are directly output as pulse wide voltage-regulation square wave S1.
13. a kind of buck-boost converter pulse wide voltage-regulation control circuit, which is characterized in that including following circuit function area: high frequency letter Number generator functional areas F31 establishes oscillator and generates complementary phases high frequency square wave narrow pulse signal Sa, Sb;First sawtooth wave function Energy area F32, according to the forward position synchronization signal Sa, the sawtooth wave comparison signal Ca generated by pulse-width modulation circuit exports base phase pressure regulation Pulse width signal A;Second sawtooth wave functional areas F33, according to the forward position synchronization signal Sb, the sawtooth wave ratio generated by pulse-width modulation circuit Compared with signal Cb, pressure regulation pulse width signal B after phase shift is exported.
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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN115441737A (en) * 2022-10-31 2022-12-06 杰华特微电子股份有限公司 Buck-boost converter and control method thereof

Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101105411A (en) * 2007-08-10 2008-01-16 中国航天科技集团公司第四研究院第四十四研究所 Self-adaptive filtering method of dynamic axle weighing signal of vehicle
US20080303502A1 (en) * 2007-06-07 2008-12-11 Holger Haiplik Buck-boost converter
CN206210211U (en) * 2016-06-24 2017-05-31 南京工程学院 A kind of power electronics and motor drag experiment porch
CN207304377U (en) * 2016-03-29 2018-05-01 半导体元件工业有限责任公司 Boost-buck power converter and lifting pressure controller
CN108336943A (en) * 2017-01-17 2018-07-27 福特全球技术公司 Multiple inverter system for motor
US20180262098A1 (en) * 2017-03-13 2018-09-13 Rohm Co., Ltd. Step-up/down dc-dc converter

Patent Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20080303502A1 (en) * 2007-06-07 2008-12-11 Holger Haiplik Buck-boost converter
CN101105411A (en) * 2007-08-10 2008-01-16 中国航天科技集团公司第四研究院第四十四研究所 Self-adaptive filtering method of dynamic axle weighing signal of vehicle
CN207304377U (en) * 2016-03-29 2018-05-01 半导体元件工业有限责任公司 Boost-buck power converter and lifting pressure controller
CN206210211U (en) * 2016-06-24 2017-05-31 南京工程学院 A kind of power electronics and motor drag experiment porch
CN108336943A (en) * 2017-01-17 2018-07-27 福特全球技术公司 Multiple inverter system for motor
US20180262098A1 (en) * 2017-03-13 2018-09-13 Rohm Co., Ltd. Step-up/down dc-dc converter

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN115441737A (en) * 2022-10-31 2022-12-06 杰华特微电子股份有限公司 Buck-boost converter and control method thereof
CN115441737B (en) * 2022-10-31 2023-03-14 杰华特微电子股份有限公司 Buck-boost converter and control method thereof

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