CN110034676A - A kind of control method and device of converter - Google Patents
A kind of control method and device of converter Download PDFInfo
- Publication number
- CN110034676A CN110034676A CN201810027695.0A CN201810027695A CN110034676A CN 110034676 A CN110034676 A CN 110034676A CN 201810027695 A CN201810027695 A CN 201810027695A CN 110034676 A CN110034676 A CN 110034676A
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- Prior art keywords
- voltage
- converter
- derided capacitors
- control amount
- power switch
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Classifications
-
- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M3/00—Conversion of dc power input into dc power output
- H02M3/02—Conversion of dc power input into dc power output without intermediate conversion into ac
- H02M3/04—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters
- H02M3/10—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
- H02M3/145—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal
- H02M3/155—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only
- H02M3/156—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators
-
- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M1/00—Details of apparatus for conversion
- H02M1/0003—Details of control, feedback or regulation circuits
- H02M1/0025—Arrangements for modifying reference values, feedback values or error values in the control loop of a converter
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- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Dc-Dc Converters (AREA)
Abstract
The present invention relates to a kind of control method and device of converter, which includes: one voltage adjusting control amount of superposition, the final control amount as three-level converter power switch in the Voltage loop output control amount of three-level converter power switch；It adjusts to obtain the voltage adjusting control amount by the first adjuster after first derided capacitors voltage of three-level converter and the second derided capacitors voltage are made difference.The voltage that the present invention passes through two derided capacitors of acquisition three-level converter, and it is modified according to the voltage difference of two derided capacitors come the Voltage loop output control amount to three-level converter power switch, the duty ratio for effectively changing power switch in three-level converter, avoids the voltage un-balance phenomenon of two derided capacitors.
Description
Technical field
The present invention relates to a kind of control method and device of converter, belong to technical field of new energy.
Background technique
With the development of new-energy automobile, wireless charging develops to high-power direction, and high power DC charging becomes new energy
The development trend of source technology.For raising efficiency, increase power density, generally promotes busbar voltage to 800V or more, for
For the metal-oxide-semiconductor of common 650V, voltage stress is exceeded very much.If selecting the MOS of 1200V, cost will be substantially increased, lead
Logical impedance ratio 650V is much bigger, is unfavorable for the promotion of efficiency.
The problem of proposition of three-level DC converter can solve voltage stress significantly reduces switching tube stress.
Three-level DC converter topology is highly suitable for high voltage powerful application in, is increasingly becoming grinding for power electronics
Study carefully hot spot, while the inductive current ripple of three-level converter is smaller, output ripple can be smaller.Wherein, three level DC becomes
The topological structure schematic diagram of parallel operation is as shown in Figure 1, include two derided capacitors C1 and C2, two power switch Q1 and Q2, afterflows
Diode D1 and D2 and filter inductance L1 etc. are constituted.
As duty ratio D < 0.5, in three-level DC converter each device curent change situation as shown in Fig. 2, its
The course of work is as follows:
1.Q1 conducting, when Q2 is turned off, capacitor C1 provides energy to inductance L1 and load, and inductive current is presented on positive slope
It rises.
2.Q1 shutdown, when Q2 is turned off, negative slope decline is presented in inductive current, and inductance L1 provides energy to load.
3.Q1 shutdown, when Q2 is connected, capacitor C2 provides energy to inductance L1 and load, and inductive current is presented on positive slope
It rises.
Step cycle above 4..
As duty ratio D > 0.5, in three-level DC converter each device curent change situation as shown in figure 3, its
The course of work is as follows:
1.Q1 conducting, when Q2 is simultaneously turned on, power supply provides energy to inductance L1 and load, and inductive current is presented on positive slope
It rises.
2.Q1 shutdown, for Q2 also in conducting phase, negative slope decline is presented in inductive current, and inductance L1 provides energy to load
Amount.
3.Q1 is connected again, and when Q2 is simultaneously turned on, power supply provides energy to inductance L1 and load, and inductive current presents just oblique
Rate rises.
Step cycle above 4..
Electric car wireless charging generally uses three level BUCK (converter) to carry out current stabilization and pressure stabilizing output, from three level
The topological diagram of BUCK, which can be seen that, to be come, this topological input terminal is two derided capacitors series connection, and when Q1 conducting, derided capacitors C1 is given
Load provides power supply, and when Q2 conducting, derided capacitors C2 provides power supply to load.In circuit actual motion, due to DSP itself
Precision be difficult to accomplish that the duty ratio of two-way driving is completely the same, double switch along with the device tolerance of hardware driving circuit
The turn-on time of pipe certainly exists difference.The energy that two such derided capacitors provide in a switch periods is unequal, point
Voltage capacitance will appear the unbalanced situation of voltage un-balance, that is, will lead to one voltage of derided capacitors higher than 1/2Vin, another is low
In 1/2Vin, all the way, the power and thermal undertaken is more, works long hours and will appear exception or even converter for high that of voltage
Damage.
Summary of the invention
The object of the present invention is to provide a kind of control method and device of converter, for solving derided capacitors voltage un-balance meeting
The problem of causing converter to damage.
In order to solve the above technical problems, the present invention provides a kind of control method of converter, including following scheme:
Method scheme one: one voltage of superposition is adjusted in the Voltage loop output control amount of three-level converter power switch
Control amount, the final control amount as three-level converter power switch；By the first derided capacitors voltage of three-level converter
It adjusts to obtain the voltage adjusting control amount by the first adjuster after making difference with the second derided capacitors voltage.
Method scheme two: on the basis of method scheme one, by the Voltage loop benchmark electricity of three-level converter power switch
The output voltage values that pressure value and sampling obtain are made to adjust to obtain the three-level converter power by the second adjuster after difference to open
The Voltage loop of pass exports control amount.
Method scheme three: on the basis of method scheme two, first adjuster be the first pi regulator, described second
Adjuster is the second pi regulator.
Method scheme four: further including respectively to the first of three-level converter on the basis of method scheme one, two or three
Derided capacitors voltage and the second derided capacitors voltage remake difference after carrying out decompression processing.
The present invention also provides a kind of control devices of converter, including following scheme:
Device scheme one: including processor and memory, the processor is used to handle and store in the memory
Instruction is to realize following method:
One voltage of superposition adjusts control amount in the Voltage loop output control amount of three-level converter power switch, as
The final control amount of three-level converter power switch；By the first derided capacitors voltage of three-level converter and the second partial pressure electricity
Hold after voltage makees difference and adjusts to obtain the voltage adjusting control amount by the first adjuster.
Device scheme two: on the basis of device scheme one, by the Voltage loop benchmark electricity of three-level converter power switch
The output voltage values that pressure value and sampling obtain are made to adjust to obtain the three-level converter power by the second adjuster after difference to open
The Voltage loop of pass exports control amount.
Device scheme three: on the basis of device scheme two, first adjuster be the first pi regulator, described second
Adjuster is the second pi regulator.
Device scheme four: further including respectively to the first of three-level converter on the basis of device scheme one, two or three
Derided capacitors voltage and the second derided capacitors voltage remake difference after carrying out decompression processing.
The beneficial effects of the present invention are: the voltage of two derided capacitors by acquisition three-level converter, and according to two
The voltage difference of a derided capacitors is modified come the Voltage loop output control amount to three-level converter power switch, effectively changes
The duty ratio for having become power switch in three-level converter avoids the voltage un-balance phenomenon of two derided capacitors.
Detailed description of the invention
Fig. 1 is the topological structure of three level BUCK；
Fig. 2 is the topological structure of three level BUCK in waveform analysis figure of the duty ratio less than 0.5；
Fig. 3 is that the topological structure of three level BUCK is greater than 0.5 waveform analysis figure in duty ratio；
Fig. 4 is the structural schematic diagram of the control method of converter of the invention；
Fig. 5 is the waveform diagram when voltage of derided capacitors C1 is higher than the voltage of derided capacitors C2；
Fig. 6 is the waveform diagram when voltage of derided capacitors C1 is lower than the voltage of derided capacitors C2.
Specific embodiment
In order to make the objectives, technical solutions, and advantages of the present invention clearer, below in conjunction with attached drawing and specific implementation
The present invention will be described in further detail for example.
The present invention provides a kind of control device of converter, which includes processor and memory, the processing
Device is used to handle instruction stored in memory to realize a kind of control method of converter.Wherein, which uses number
Word DSP is realized, effectively increases the accuracy and stability of control.Certainly, as other embodiments, digital DSP
It could alternatively be other kinds of processor.
Wherein, realize that the structural schematic diagram of the control method of converter is as shown in Figure 4, comprising the following steps:
(1) the first derided capacitors voltage and the second derided capacitors voltage for acquiring three-level converter, by the first partial pressure electricity
It adjusts to obtain voltage adjusting control amount by the first adjuster after holding voltage and the second derided capacitors voltage work difference.
Wherein, as shown in figure 4, the first derided capacitors in sampling three-level converter (BUCK circuit) are (see the electricity in Fig. 1
Hold C1) both ends voltage, the voltage sample value pass through by the devices such as voltage comparator U11 and resistance R11, R12, R13 and R14
It is the low-voltage signal of isolation by the high pressure converted of derided capacitors C1 after the first voltage reduction module constituted, the signal converted is
VC1.The voltage at both ends the second derided capacitors (see the capacitor C2 in Fig. 1) in three-level converter (BUCK circuit) is sampled, it should
Voltage sample value passes through the second voltage reduction module being made of the devices such as voltage comparator U12 and resistance R15, R16, R17 and R18
It afterwards, is the low-voltage signal of isolation by the high pressure converted of derided capacitors C2, the signal converted is VC2.Then again by VC1 and
VC2 carries out subtraction process, obtains VERR signal, there is VERR=VC1-VC2.Then this signal of VERR first is sent into adjust
Device carries out ratio enlargement and integral operation, obtains our final control amount PI_OUT1.
In the present embodiment, two decompression moulds of isolated buck processing are carried out for the capacitance voltage to three-level converter
Block is made of a voltage comparator and multiple resistance.Specifically, the same phase of the voltage comparator in each voltage reduction module
Input terminal connects the cathode of the derided capacitors voltage of level converter by resistance, and the inverting input terminal of voltage comparator passes through electricity
The anode of the derided capacitors voltage of resistance connection level converter, the inverting input terminal of voltage comparator pass through resistance and output end phase
Even, the output end of voltage comparator constitutes the output end of the voltage reduction module.Certainly, as other embodiments, above-mentioned drop
The specific structure of die block can also be using other modules or unit that isolated buck function may be implemented in the prior art.First
Adjuster is pi regulator, and as other embodiments, the first adjuster is also possible to the adjuster of other forms.
(2) it is poor to make the output voltage values that the Voltage loop reference voltage value of three-level converter power switch and sampling obtain
Control amount is exported by the Voltage loop that the second adjuster adjusts to obtain three-level converter power switch afterwards.
Specifically, the Voltage loop reference voltage value Vo_REF of three-level converter power switch is subtracted the defeated of sampling acquisition
Voltage value Vo_feedback out, the second adjuster that the value drawn is sent into Voltage loop obtain the control amount of entire pressure stabilizing loop
PI_OUT2.In the present embodiment, the second adjuster is pi regulator, certainly, as other embodiments, the second adjuster
It is also possible to the adjuster of other forms.
(3) superimposed voltage adjusts control amount in the Voltage loop output control amount of three-level converter power switch, as
The final control amount of three-level converter power switch.
Specifically, the Voltage loop of control amount PI_OUT1 and three-level converter power switch is exported control amount PI_OUT2
It carries out add operation and guarantees that the value of PI_OUT1 is never greater than the value of PI_OUT2 when doing operation.Finally obtain control amount PI_
OUT=PI_OUT1+PI_OUT2, as the final control amount of BUCK circuit, the stabilization and input partial pressure of Lai Shixian output voltage
The value of bus capacitor C1 and C2 are equal always.
Wherein, the first power switch and the second power switch are obtained (see the power in Fig. 1 according to final control amount PI_OUT
Switch Q1 and Q2) the process of control instruction include: period register inside the final control amount PI_OUT that will obtain and DSP
Value be compared, comparison result as control power tube Q1 and Q2 duty ratio.In the waveform such as Fig. 5 of period register
Sawtooth wave, sawtooth wave are compared with PI_OUT, turn-on time of the low level (see Fig. 5) obtained as Q1, by Q1 inside DSP
Duty ratio carry out complementary processing, the turn-on time and duty ratio of Q2 are obtained, by the variation of Q1 and Q2 duty ratio, to realize number
The control that word is pressed.
The control method of above-mentioned converter is by the voltage above feedback C1 capacitor and C2 capacitor, then by calculating
Control amount PI_OUT1 out, participates in the modulation of Voltage loop, and the final voltage realized above capacitor C1 and capacitor C2 is equal to 1/
2Vin.Wherein, according to the voltage's distribiuting situation of derided capacitors C1 and C2, above-mentioned control process is divided into two kinds of situations:
Situation 1: when the voltage of derided capacitors C1 is higher than the voltage of derided capacitors C2, the voltage of derided capacitors C1 is higher than 1/
The voltage of 2Vin, derided capacitors C2 are less than Vin/2.The both end voltage VC1 of capacitor C1 is obtained after overvoltage is converted, capacitor C2's
Both end voltage VC2, VC1 subtract VC2 equal to VERR, and the value of VERR is a positive value.VERR becomes one after PI operation
Positive digital quantity, this digital quantity PI_OUT1 are the significant variable of bus balance control.In steady operation, entire pressure stabilizing loop
The value of control amount PI_OUT2 be constant positive DC quantity, final control amount is PI_OUT, due to the superposition of PI_OUT1,
The value of PI_OUT can become larger.Period register after PI_OUT becomes larger and inside DSP is compared, the control Q1 of final output
Duty ratio will increase, the duty ratio of Q2 can reduce.With the reduction of Q2 duty ratio, Q2 manages the energy meeting exported in each period
Reduce, energy reduces, it is meant that the energy of the output of each period above C2 capacitor reduces, and finally makes the voltage value of C2 capacitor
Increase；With the increase of Q1 duty ratio, Q1 manages the energy that each period is exported and will increase, and energy increases, it is meant that C1 capacitor
The energy of output of each period above increases, and reduces the voltage value of C1 capacitor.With the voltage above C1 capacitor
Reduce and increase with the voltage above C2 capacitor, the final result of control is equal to the voltage above C1 capacitor above C2 capacitor
Voltage.During this, the output voltage Vo of PI_OUT1, PI_OUT2, the electric current IL1 of filter inductance L1 and three-level converter
Variation waveform diagram it is as shown in Figure 5.
Situation 2: when the voltage of derided capacitors C1 is lower than the voltage of derided capacitors C2, the voltage of derided capacitors C1 is lower than 1/
The voltage of 2Vin, derided capacitors C2 are higher than Vin/2.The both end voltage VC1 of capacitor C1 is obtained after overvoltage is converted, capacitor C2's
Both end voltage VC2, VC1 subtract VC2 equal to VERR, and the value of VERR is a negative value.VERR becomes one after PI operation
Negative digital quantity, this digital quantity PI_OUT1 are the significant variable of capacitive balance control.In steady operation, entire pressure stabilizing loop
The value of control amount PI_OUT2 be constant positive DC quantity, final control PI_OUT, due to the superposition of PI_OUT1, PI_
The value of OUT can become smaller, and the absolute value for concurrently setting PI_OUT1 is far smaller than PI_OUT2.After PI_OUT becomes smaller and inside DSP
Period register be compared, the meeting of the control Q1 duty ratio of output reduces, and the duty ratio of Q2 will increase.With Q2 duty ratio
Increase, Q2 manages the energy that each period is exported and will increase, and energy increases, it is meant that the output of each period above C2 capacitor
Energy increase, reduce the voltage value of C2 capacitor；With the reduction of Q1 duty ratio, Q1 manages what each period was exported
Energy can reduce, and energy reduces, it is meant that the energy of the output of each period above C1 capacitor reduces, and finally makes C1 capacitor
Voltage value increases.Reduce as the voltage above C1 capacitor increases with the voltage above C2 capacitor, the final result of control makes
Voltage above C1 capacitor is equal to the voltage above C2 capacitor.In the process, PI_OUT1, PI_OUT2, filter inductance L1
The variation waveform diagram of the output voltage Vo of electric current IL1 and three-level converter is as shown in Figure 6.
Present invention employs the control thinkings that derided capacitors grading ring and Voltage loop mix, to the function in three-level converter
The duty ratio of rate switch is modified, to ensure the pressure of derided capacitors in three-level converter；Using the control of digital DSP
Mode can be realized the accuracy and stability of control.
Claims (8)
1. a kind of control method of converter, which is characterized in that export control in the Voltage loop of three-level converter power switch
It is superimposed a voltage in amount and adjusts control amount, the final control amount as three-level converter power switch；By three level translations
First derided capacitors voltage of device and the second derided capacitors voltage adjust to obtain the voltage tune by the first adjuster after making difference
Save control amount.
2. the control method of converter according to claim 1, which is characterized in that by three-level converter power switch
The output voltage values that Voltage loop reference voltage value and sampling obtain adjust to obtain three level by the second adjuster after making difference
The Voltage loop of converter power switch exports control amount.
3. the control method of converter according to claim 2, which is characterized in that first adjuster is the first PI tune
Device is saved, second adjuster is the second pi regulator.
4. the control method of converter according to any one of claim 1-3, which is characterized in that further include respectively to three
The the first derided capacitors voltage and the second derided capacitors voltage of level converter remake difference after carrying out decompression processing.
5. a kind of control device of converter, which is characterized in that including processor and memory, the processor is deposited for handling
The instruction of storage in the memory is to realize following method:
One voltage of superposition adjusts control amount in the Voltage loop output control amount of three-level converter power switch, as three electricity
The final control amount of flat converter power switch；By the first derided capacitors voltage of three-level converter and the second derided capacitors electricity
Pressure adjusts to obtain the voltage adjusting control amount by the first adjuster after making difference.
6. the control device of converter according to claim 5, which is characterized in that by three-level converter power switch
The output voltage values that Voltage loop reference voltage value and sampling obtain adjust to obtain three level by the second adjuster after making difference
The Voltage loop of converter power switch exports control amount.
7. the control device of converter according to claim 6, which is characterized in that first adjuster is the first PI tune
Device is saved, second adjuster is the second pi regulator.
8. the control device of the converter according to any one of claim 5-7, which is characterized in that further include respectively to three
The the first derided capacitors voltage and the second derided capacitors voltage of level converter remake difference after carrying out decompression processing.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201810027695.0A CN110034676A (en) | 2018-01-11 | 2018-01-11 | A kind of control method and device of converter |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201810027695.0A CN110034676A (en) | 2018-01-11 | 2018-01-11 | A kind of control method and device of converter |
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| CN110034676A true CN110034676A (en) | 2019-07-19 |
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ID=67234749
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| Application Number | Title | Priority Date | Filing Date |
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| CN201810027695.0A Pending CN110034676A (en) | 2018-01-11 | 2018-01-11 | A kind of control method and device of converter |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN110429811A (en) * | 2019-08-19 | 2019-11-08 | 中车株洲电机有限公司 | A kind of pressure equalizing control method of three-level buck convertor, system and device |
Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1514531A (en) * | 2003-07-03 | 2004-07-21 | 南京航空航天大学 | Voltage divider capacity voltage deviation feedforward control circuit of current control type semibridge transducer |
| CN105703621A (en) * | 2016-04-06 | 2016-06-22 | 重庆大学 | ISOP (Input-Series-Output-Parallel) three-level Buck converter and neutral point potential balance control method |
-
2018
- 2018-01-11 CN CN201810027695.0A patent/CN110034676A/en active Pending
Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1514531A (en) * | 2003-07-03 | 2004-07-21 | 南京航空航天大学 | Voltage divider capacity voltage deviation feedforward control circuit of current control type semibridge transducer |
| CN105703621A (en) * | 2016-04-06 | 2016-06-22 | 重庆大学 | ISOP (Input-Series-Output-Parallel) three-level Buck converter and neutral point potential balance control method |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN110429811A (en) * | 2019-08-19 | 2019-11-08 | 中车株洲电机有限公司 | A kind of pressure equalizing control method of three-level buck convertor, system and device |
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Application publication date: 20190719 |