CN110028047A - The adjustable CdS of single-orientated and componentXSe1-xAlloy nanowire array and preparation method thereof - Google Patents
The adjustable CdS of single-orientated and componentXSe1-xAlloy nanowire array and preparation method thereof Download PDFInfo
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- CN110028047A CN110028047A CN201810030033.9A CN201810030033A CN110028047A CN 110028047 A CN110028047 A CN 110028047A CN 201810030033 A CN201810030033 A CN 201810030033A CN 110028047 A CN110028047 A CN 110028047A
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Abstract
The invention discloses a kind of adjustable CdS of single-orientated and componentxSe1‑xThe preparation method of alloy nanowire array, this method comprises the following steps: using thermal evaporation In Situ Heating CdS single-chip, obtains to surface and be evenly distributed with the CdS single-chip of CdS nano-wire array;The CdS single-chip of CdS nano-wire array is evenly distributed with as substrate using the surface, and using CdSe powder as raw material, protective gas is carrier, and the adjustable CdS of single-orientated and component is prepared using physical vaporous depositionxSe1‑xAlloy nanowire array, wherein 0 x≤1 <.The preparation method is simple, is successfully prepared that area big, good crystallinity, crystal orientation be consistent and the adjustable CdS of componentxSe1‑xAlloy nanowire array.
Description
Technical field
The present invention relates to nanometer semiconductor technology fields.It is adjustable more particularly, to a kind of single-orientated and component
CdSxSe1-xAlloy nanowire array and preparation method thereof.
Background technique
Japanese Scientists professor S.Iijima has had found since carbon nanotube (CNT), because of one dimension semiconductor nanometer since 1991
The confinement effect of the carrier and optical transport of material on two dimensions, has ensured the high efficiency of transmission and oriented control of carrier,
Therefore one-dimensional nano structure material causes the extensive concern of people.By the one-dimensional nano line proper alignment that largely grows vertically and
At one-dimensional nano line array there are the performances such as unique electricity, optics, magnetics, therefore to developing scale function element such as light
Electric explorer, pressure sensor and field effect transistor etc. are of great significance.
With being constantly progressive for the past few decades nano material preparation technology, a variety of synthesizing one-dimensional semiconductors have been developed and receive
The method of rice material.But the monodimension nanometer material being prepared such as nano wire, nanobelt equal distribution is mixed and disorderly, the orientation of growth is different,
Or mutually wind, be difficult to separate and have more defect, seriously constrain its device fabrication in terms of
Using and development.
In general, the semiconductor material of one-component has fixed band gap, light only is realized to the photon energy near its band gap
Response.Although fixed band gap magnitude can change with factors such as size, temperature in principle, variation range is extremely limited.This shadow
Semiconductor devices has been rung in the development of multi-functional and diversified tunable optical electrical part and wide spectrum response field.And it is common
Semiconductor alloy material is because content gradually variational, band gap are adjustable, the features such as internal carrier concentration is high, in mechanics, piezoelectric property and light
Electric conversion performance etc. shows advantage outstanding.II B-, VI A compounds of group cadmium sulfide (CdS) and cadmium selenide (CdSe) one
Dimension semiconductor nano material is because having characteristics, the nanostructures such as high-gain, high reliability and long-life also to show well
Photoconductive effect and become photodetection field hot research material.Therefore, it is based on CdSxSe1-xAlloy nano-material illumination
Under the conditions of material electric conductivity change characteristic, CdSxSe1-xWide spectrum photodetector have photoresponse height, fast response time, outside
The advantages that quantum efficiency is high can preferably meet the needs in photodetection field, thus have broader practice prospect.
With being constantly progressive for material preparation technology, the preparation method of one-dimensional nanometer semiconductor structure material includes solution-air-
Gu method (VLS), template, molecular beam epitaxy and electron beam lithography etc., several method is had their own advantages, while also having it not
Evitable disadvantage.For example, VLS growing method is used to grow a variety of one dimension semiconductors with controlled dimensions, direction and composition
Nano wire, but the method needs the support of external metallization, thus pollution may be introduced.The method of molecular beam epitaxy is conducive to control
The Nomenclature Composition and Structure of Complexes of whole nano wire, and can prepare with low defect density, the preferable nano wire of homogeneity, but it has
The disadvantages of at high cost, low output, fine operation.
Thus, it is found that a kind of novel, efficient preparation method, controllable in preparation high quality, large area, crystal structure
One dimension semiconductor nano-wire array is of great practical significance.
Summary of the invention
The first purpose of this invention is to provide a kind of single-orientated and component adjustable CdSxSe1-xAlloy nano-wire
The preparation method of array.The preparation method is simple, is successfully prepared that area is big, good crystallinity, crystal orientation are consistent and component can
The CdS of tunexSe1-xAlloy nanowire array.
Second object of the present invention is to provide a kind of single-orientated and component adjustable CdSxSe1-xAlloy nano-wire
Array.
In order to achieve the above first purpose, the present invention adopts the following technical solutions:
A kind of adjustable CdS of single-orientated and componentxSe1-xThe preparation method of alloy nanowire array comprising following step
It is rapid:
Using thermal evaporation In Situ Heating CdS single-chip, it is mono- to obtain the CdS for being evenly distributed with CdS nano-wire array to surface
Chip;
The CdS single-chip for being evenly distributed with CdS nano-wire array using the surface, using CdSe powder as raw material, is protected as substrate
Shield property gas is carrier, and the adjustable CdS of single-orientated and component is prepared using physical vaporous depositionxSe1-xAlloy nano
Linear array, wherein 0 x≤1 <.
Preferably, the structure of the CdS single-chip is hexagonal system structure, and is oriented to [0001] direction.
Preferably, the method for the thermal evaporation In Situ Heating CdS single-chip includes the following steps:
CdS single-chip list is thrown up, the heated center of tube furnace is placed in;
By tubular type stove evacuation, and it is passed through protective gas, intraductal pressure control is in 50-500Pa in gas replenishment process;
Tube furnace is warming up to 680-750 DEG C with the heating rate of 15-25 DEG C/min, and reacts 20- at this temperature
60min, wherein the flow velocity of protective gas is 30-50sccm;
After reaction, it is naturally cooling to room temperature to tube furnace, obtains to surface and is evenly distributed with CdS nano-wire array
CdS single-chip.
Preferably, the physical vaporous deposition specifically comprises the following steps:
CdSe powder is weighed in ceramic boat, and places it in the high-temperature region heated center of double temperature-area tubular furnaces;
The CdS single-chip of CdS nano-wire array is evenly distributed with as substrate using the surface, and places it in dual temperature area pipe
The heated center of formula furnace low-temperature space;
To the tubular type stove evacuation, and it is passed through protective gas, intraductal pressure control is in 50-500Pa in gas replenishment process;
The high-temperature region of the tube furnace is warming up to 630-730 DEG C with the heating speed of 15-25 DEG C/min, with identical heating
The low-temperature space of tube furnace is warming up to 500-620 DEG C by rate, reacts 20-60min with this condition, wherein protective gas
Flow velocity is 30-50sccm;
After reaction, it is naturally cooling to room temperature to the tube furnace, it is adjustable obtains described single-orientated and component
CdSxSe1-xAlloy nanowire array.
Preferably, the protective gas is the gaseous mixture of hydrogen and inert gas, wherein the inert gas is selected from nitrogen
The mixing of one or more of gas, helium, argon gas and neon.
Preferably, in the gaseous mixture, the volume content of hydrogen and inert gas are as follows: hydrogen 5-10%, inert gas 95-
90%.
Preferably, the low-temperature space of the tube furnace is being warming up to 500-620 DEG C with the heating speed of 15-25 DEG C/min
In step, CdSe steam is adjusted in 500-620 DEG C of temperature range in the depositing temperature of substrate, is realized to the CdSxSe1-xAlloy
The regulation of nano-wire array component.
To reach above-mentioned second purpose, the present invention provides prepared by the preparation method single-orientated and component
Adjustable CdSxSe1-xAlloy nanowire array, wherein on the surface of the template size of CdS single-chip, be evenly distributed with list
The CdS of one orientationxSe1-xAlloy nanowire array.
Beneficial effects of the present invention are as follows:
In the technical solution of preparation method of the present invention, realizing large area, that single-orientated and constituent content is prepared is adjustable
CdSxSe1-xAlloy nanowire array.This method is not only easy to operate, short, pollution-free, suitable without using catalyst, preparation time
It closes and produces in enormous quantities, and the CdS being preparedxSe1-xAlloy nano line length is uniform, with big draw ratio and moderate
Density has highly important application value in solar battery, photocatalysis and field of photodetectors.
Detailed description of the invention
Specific embodiments of the present invention will be described in further detail with reference to the accompanying drawing.
Fig. 1 shows original CdS single-chip (a), surface in 1 preparation method of the embodiment of the present invention and is evenly distributed with CdS nanometers
The CdS single-chip (b) of linear array and single-orientated CdS is uniformly distributed on the template size of CdS single-chipxSe1-xAlloy
The scanning electron microscope (SEM) photograph of nano-wire array (c).
Fig. 2 shows react schematic diagram in 1 preparation method of the embodiment of the present invention.
Fig. 3 shows CdS single-orientated obtained in 1 preparation method of the embodiment of the present inventionxSe1-xAlloy nanowire array
Scanning electron microscope (SEM) photograph, wherein a be top view, b be a partial enlarged view, c is side view.
The single CdS being prepared in the embodiment of the present invention 1 is shown respectively in Fig. 4xSe1-xThe transmission electricity of alloy nano-wire
Mirror (TEM) bright field image (a);Single CdSxSe1-xLocal transmission Electronic Speculum (TEM) bright field image (b) of alloy nano-wire;It is single
CdSxSe1-xHigh-resolution-ration transmission electric-lens (HRTEM) photo and corresponding selective electron diffraction (SAED) picture of alloy nano-wire
(c);Single CdSxSe1-xThe scanning transmission electron microscope bright field image (STEM) (d) of alloy nano-wire;Corresponding Cd, S, Se Elemental redistribution
Scheme (e) and EDS map (f).
Fig. 5 shows CdS obtained in the embodiment of the present invention 1xSe1-xThe room temperature PL of alloy nanowire array schemes.
Fig. 6 shows CdS obtained in the embodiment of the present invention and comparative examplexSe1-xIn alloy nanowire array x be respectively 0,
0.13,0.35,0.56,0.77,1 when, the alloy nanowire array room temperature PL figure.
Fig. 7 shows CdS obtained in the embodiment of the present inventionxSe1-xIn alloy nanowire array x be respectively 0.13,0.35,
0.56,0.77 when, the EDS energy spectrum diagram of the alloy nanowire array.
Specific embodiment
In order to illustrate more clearly of the present invention, the present invention is done further below with reference to preferred embodiments and drawings
It is bright.Similar component is indicated in attached drawing with identical appended drawing reference.It will be appreciated by those skilled in the art that institute is specific below
The content of description is illustrative and be not restrictive, and should not be limited the scope of the invention with this.
One embodiment of the present of invention provides a kind of single-orientated and component adjustable CdSxSe1-xAlloy nanowire array
Preparation method, which includes the following steps:
Using thermal evaporation In Situ Heating CdS single-chip, it is mono- to obtain the CdS for being evenly distributed with CdS nano-wire array to surface
Chip;
The CdS single-chip for being evenly distributed with CdS nano-wire array using the surface, using CdSe powder as raw material, is protected as substrate
Shield property gas is carrier, and the adjustable CdS of single-orientated and component is prepared using physical vaporous depositionxSe1-xAlloy nano
Linear array, wherein 0 x≤1 <.
In the embodiment, using thermal evaporation In Situ Heating CdS single-chip, it is easily obtained the CdS nano wire of stable structure
Array is further evenly distributed with the CdS single-chip of CdS nano-wire array as substrate, using physics gas using obtained surface
Phase sedimentation, to be prepared, good crystallinity, crystal orientation be consistent and the adjustable CdS of componentxSe1-xAlloy nanowire array.
The preparation method is simple, and environmental protection is easy to produce in enormous quantities.
In a preferable example, the structure of the CdS single-chip is hexagonal system structure, and is oriented to [0001] side
To.In the embodiment of the present invention, CdS is affected to CdS monocrystalline platelet-shaped and orientationxSe1-xThe preparation of alloy nanowire array, only
When the CdS single-chip used is hexagonal system structure and is oriented to [0001] direction, can be prepared on CdS single-chip
The CdS nano-wire array of template size, to obtain large area and single-orientated CdS nanometer linear array in CdS single wafer surface
Column, are further prepared that large area is single-orientated and the adjustable CdS of component on CdS single-chipxSe1-xAlloy nano linear array
Column.
In the present embodiment, x can (0,1] any value in range, it should be understood by those skilled in the art that the choosing of x value
It selects depending on specific reaction condition.
In a preferable example, the method for the thermal evaporation In Situ Heating CdS single-chip includes the following steps:
CdS single-chip list is thrown up, the heated center of tube furnace is placed in;
By tubular type stove evacuation, and it is passed through protective gas, intraductal pressure control is in 50-500Pa in gas replenishment process;
Tube furnace is warming up to 680-750 DEG C with the heating rate of 15-25 DEG C/min, and reacts 20- at this temperature
60min, wherein the flow velocity of protective gas is 30-50sccm;
After reaction, it is naturally cooling to room temperature to tube furnace, obtains to surface and is evenly distributed with CdS nano-wire array
CdS single-chip.
In this example, the warming temperature of tube furnace is controlled at 680-750 DEG C, on the one hand can avoid that temperature is excessively high will be entire
Single-chip is evaporated, and on the other hand also can avoid the too low thermal evaporation that cannot achieve single-chip of temperature, to can not be prepared into
The CdS single-chip of CdS nano-wire array is evenly distributed with to surface.
In the embodiment of the present invention, CdS single-chip list throws the surface that face refers to CdS single-chip.In addition, tube furnace is taken out very
When tube furnace is under vacuum condition by sky, the vacuum degree of tube furnace is preferably pressure in 0.1-10Pa.
In another preferable example, the physical vaporous deposition specifically comprises the following steps:
CdSe powder is weighed in ceramic boat, and places it in the high-temperature region heated center of double temperature-area tubular furnaces;
The CdS single-chip of CdS nano-wire array is evenly distributed with as substrate using the surface, and places it in dual temperature area pipe
The heated center of formula furnace low-temperature space;
To the tubular type stove evacuation, and it is passed through protective gas, intraductal pressure control is in 50-500Pa in gas replenishment process;
The high-temperature region of the tube furnace is warming up to 630-730 DEG C with the heating speed of 15-25 DEG C/min, with identical heating
The low-temperature space of tube furnace is warming up to 500-620 DEG C by rate, reacts 20-60min with this condition, wherein protective gas
Flow velocity is 30-50sccm;
After reaction, it is naturally cooling to room temperature to the tube furnace, it is adjustable obtains described single-orientated and component
CdSxSe1-xAlloy nanowire array.
In this example, when tube furnace is under vacuum condition by tubular type stove evacuation, the vacuum degree of tube furnace is preferably
Pressure is in 0.1-10Pa.
Wherein, the high-temperature region of the tube furnace is warming up to the 630-730 DEG C of evaporation for being conducive to the CdSe powder, by low temperature
It is warming up to 500-620 DEG C and is conducive to the deposition of CdSe steam on substrate.
In the embodiment of the present invention, the low-temperature space of the tube furnace is being warming up to the heating speed of 15-25 DEG C/min
In 500-620 DEG C of the step of, CdSe steam is adjusted in 500-620 DEG C of temperature range in the depositing temperature of substrate, realization pair
CdSxSe1-xThe component of alloy nanowire array regulates and controls.
Furthermore, it is to be understood that protective gas is to play protection stable reaction to carry out and be not involved in reaction in the present embodiment
Gas.In a preferable example, the protective gas is the gaseous mixture of hydrogen and inert gas, wherein the inertia
Gas is selected from the mixing of one or more of nitrogen, helium, argon gas and neon.In the gaseous mixture, hydrogen and inert gas
Volume content are as follows: hydrogen 5-10%, inert gas 95-90%.With this condition, the CdS being preparedxSe1-xAlloy nano
The crystallinity of linear array and orientation unicity is also more preferable, distribution of nano-wire array also more evenly.
Also providing prepared by the preparation method single-orientated and component in another embodiment of the invention can
The CdS of tunexSe1-xAlloy nanowire array is evenly distributed with single-orientated on the surface of the template size of CdS single-chip
CdSxSe1-xAlloy nanowire array.
Hereinafter, being illustrated in conjunction with some particular preferred embodiments to technical solution of the present invention:
Embodiment 1
A kind of adjustable CdS of single-orientated and componentxSe1-xThe preparation method of alloy nanowire array, including walk as follows
It is rapid:
By a piece of length and width, thickness 5*3*0.5mm, the CdS for being oriented to the hexagonal system structure of [0001] crystal orientation is mono-
Chip list throws the heated center for being placed in horizontal pipe furnace up, and the scanning electron microscope (SEM) photograph of the single-chip is as shown in figure 1 shown in a;
It opens mechanical pump to vacuumize, when pressure is down to 0.1Pa in furnace, argon hydrogen gaseous mixture (volume is passed through into tube furnace
Than making protection gas for 95%:5%);
700 DEG C are warming up to the heating speed of 20 DEG C/min and is kept for 20 minutes, during the reaction argon hydrogen gaseous mixture
Flow control is in 45sccm;
After reaction, it is naturally cooling to room temperature to tube furnace, obtains to surface and is evenly distributed with CdS nano-wire array
CdS single-chip, the scanning electron microscope (SEM) photograph of the single-chip is as shown in figure 1 shown in b;
It weighs 0.5 gram of CdSe powder to be put into ceramic boat, is then placed on the high-temperature region heating of double temperature-area tubular furnaces
Center;
As shown in Fig. 2, the CdS single-chip of CdS nano-wire array is evenly distributed with as substrate using the surface being prepared,
Place it in the low-temperature space heated center of double temperature-area tubular furnaces;
To tubular type stove evacuation, when pressure is down to 0.1Pa in furnace, argon hydrogen gaseous mixture is passed through into furnace, and (volume ratio is
95%:5%), maintain intracavitary pressure in 500pa;
The high-temperature region heated center of double temperature-area tubular furnaces is warming up to 650 DEG C with the heating speed of 20 DEG C/min, by dual temperature
The low-temperature space heated center of area's tube furnace is warming up to 520 DEG C, and holding 30 minutes with identical heating rate, during the reaction
The flow control of argon hydrogen gaseous mixture is in 40sccm;
After reaction, room temperature is naturally rung to tubular type furnace temperature, takes out CdS single-chip substrate, obtains in CdS single-chip
Whole surface on (namely on template size) be uniformly distributed single-orientated CdSxSe1-xAlloy nanowire array, scanning electricity
Mirror figure is as shown in figure 1 shown in c.The CdS that Fig. 3 isxSe1-xThe high power SEM of alloy nanowire array schemes, and wherein a is top view, b
For the partial enlarged view of a, c is side view.
As can be known from Fig. 1, original CdS single wafer surface is smooth and without any defect and impurity, by original position
The CdS single wafer surface that thermal evaporation is prepared becomes coarse and out-of-flatness, is further prepared using physical vaporous deposition
Obtained CdSxSe1-xAlloy nanowire array is evenly distributed in CdS single wafer surface.
Further as can be known from Fig. 3, the CdS obtainedxSe1-xThe high power SEM of alloy nanowire array schemes, can be with from figure
Find out, obtained CdSxSe1-xThe alloy nanowire array direction of growth is consistent, and length is 20 μm or so.
The single CdS is respectively illustrated in Fig. 4xSe1-xTransmission electron microscope (TEM) bright field image (a) of alloy nano-wire,
CdSxSe1-xAlloy nano-wire pattern is thinner in head, the thicker sharp cone distal in root;Single CdSxSe1-xThe part of alloy nano-wire
Transmission electron microscope (TEM) bright field image (b);Single CdSxSe1-xHigh-resolution-ration transmission electric-lens (HRTEM) photo and phase of alloy nano-wire
Corresponding selective electron diffraction (SAED) picture (c), point diffraction are in periodic arrangement and sharp keen, the interplanar marked in figure that becomes clear
Away from for 0.68nm and 0.36nm, (0001) and (01-10) crystal face is corresponded respectively to, illustrates the CdS being preparedxSe1-xAlloy is received
Rice noodles are monocrystalline good and are hexagonal system structure;Single CdSxSe1-xThe scanning transmission electron microscope bright field image of alloy nano-wire
(STEM)(d);Corresponding Cd, S, Se distribution diagram of element (e) and EDS map (f).Tri- kinds of elements of Cd, S, Se, which are evenly distributed on, to be received
On rice noodles, the difference of the light and shade contrast of the Element area profile of nano wire different location is had no, it can be seen that the nano wire is
Alloy structure, and be about 0.86 namely x than the ratio of S element in alloy according to the content of three kinds of elements in EDS energy spectrum diagram
About 0.86, the room temperature PL figure of the component alloy nanowire array is as shown in Figure 5.
Embodiment 2
A kind of adjustable CdS of single-orientated and componentxSe1-xThe preparation method of alloy nanowire array, including walk as follows
It is rapid:
By a piece of length and width, thickness 5*3*0.5mm, the CdS for being oriented to the hexagonal system structure of [0001] crystal orientation is mono-
Chip list throws the heated center for being placed in horizontal pipe furnace up;
It opens mechanical pump to vacuumize, when pressure is down to 0.1Pa in furnace, argon hydrogen gaseous mixture (volume is passed through into tube furnace
Than making protection gas for 95%:5%);
680 DEG C are warming up to the heating rate of 15 DEG C/min and is kept for 30 minutes, during the reaction argon hydrogen gaseous mixture
Flow control is in 40sccm;
After reaction, it is naturally cooling to room temperature to tube furnace, obtains to surface and is evenly distributed with CdS nano-wire array
CdS single-chip;
It weighs 0.5 gram of CdSe powder to be put into ceramic boat, is then placed on the high-temperature region heating of double temperature-area tubular furnaces
Center;
As shown in Fig. 2, the CdS single-chip of CdS nano-wire array is evenly distributed with as substrate using the surface being prepared,
Place it in the low-temperature space heated center of dual temperature offset tube furnace.
To tubular type stove evacuation, when pressure is down to 0.1Pa in furnace, argon hydrogen gaseous mixture is passed through into furnace, and (volume ratio is
95%:5%), maintain intracavitary pressure in 300pa;
The high-temperature region heated center of double temperature-area tubular furnaces is warming up to 660 DEG C with the heating speed of 15 DEG C/min, by dual temperature
The low-temperature space heated center of area's tube furnace is warming up to 570 DEG C, and holding 30 minutes with identical heating rate, during the reaction
The flow control of argon hydrogen gaseous mixture is in 35sccm;
After reaction, room temperature is naturally rung to tubular type furnace temperature, takes out CdS single-chip substrate, obtains in CdS single-chip
Whole surface on be uniformly distributed single-orientated CdSxSe1-xAlloy nanowire array.The characterization methods such as compose by TEM and PL,
Measure CdSxSe1-xX value is about 0.56 in alloy, gained nano-wire array pattern in the pattern and embodiment 1 of the nano-wire array
It is close.
Embodiment 3
A kind of adjustable CdS of single-orientated and componentxSe1-xThe preparation method of alloy nanowire array, including walk as follows
It is rapid:
By a piece of length and width, thickness 5*3*0.5mm, the CdS for being oriented to the hexagonal system structure of [0001] crystal orientation is mono-
Chip list throws the heated center for being placed in horizontal pipe furnace up;
It opens mechanical pump to vacuumize, when pressure is down to 0.1Pa in furnace, argon hydrogen gaseous mixture (volume is passed through into tube furnace
Than making protection gas for 95%:5%);
700 DEG C are warming up to the heating rate of 18 DEG C/min and is kept for 40 minutes, during the reaction argon hydrogen gaseous mixture
Flow control is in 35sccm;
After reaction, it is naturally cooling to room temperature to tube furnace, obtains to surface and is evenly distributed with CdS nano-wire array
CdS single-chip;
It weighs 0.5 gram of CdSe powder to be put into ceramic boat, is then placed on the high-temperature region heating of double temperature-area tubular furnaces
Center;
As shown in Fig. 2, the CdS single-chip of CdS nano-wire array is evenly distributed with as substrate using the surface being prepared,
Place it in the low-temperature space heated center of dual temperature offset tube furnace.
To tubular type stove evacuation, when pressure is down to 0.1Pa in furnace, argon hydrogen gaseous mixture is passed through into furnace, and (volume ratio is
95%:5%), maintain intracavitary pressure in 300pa;
The high-temperature region heated center of double temperature-area tubular furnaces is warming up to 680 DEG C with the heating speed of 18 DEG C/min, by dual temperature
The low-temperature space heated center of area's tube furnace is warming up to 600 DEG C, and holding 30 minutes with identical heating rate, during the reaction
The flow control of argon hydrogen gaseous mixture is in 40sccm;
After reaction, room temperature is naturally rung to tubular type furnace temperature, takes out CdS single-chip substrate, obtains in CdS single-chip
Whole surface on be uniformly distributed single-orientated CdSxSe1-xAlloy nanowire array.The characterization methods such as compose by TEM and PL,
Measure CdSxSe1-xX value is about 0.13 in alloy nanowire array, gained nanometer in the pattern and embodiment 1 of the nano-wire array
Linear array pattern is close.
In the preparation process of the alloy nanowire array, the low-temperature space temperature of double temperature-area tubular furnaces is adjusted, in 500-620
In DEG C temperature range adjustment CdSe steam substrate depositing temperature so that the CdS being preparedxSe1-xAlloy nanowire array
Middle x is respectively 0.13 (3 product of embodiment), 0.35,0.56 (2 product of embodiment), 0.77,1, while as a comparison, by CdSe
Single-chip carries out photoluminescence performance characterization, i.e. PL spectrogram when x=0, and the room temperature PL spectrogram of different component is as shown in Figure 5.
It can be seen that various components respectively correspond a very strong band-edge emission, illustrate the CdS being preparedxSe1-xAlloy nano
Linear array has highly crystalline and homogeneity.With the increase of S component x value, emission peak can be in 506nm to 708nm range
It is continuously adjusted and apparent blue shift occurs.
In addition, the CdS being prepared using the preparation methodxSe1-xX is respectively 0.13 (implementation in alloy nanowire array
3 product of example), 0.35,0.56 (2 product of embodiment), 0.77 when, EDS energy spectrum diagram is as shown in Figure 6.From the grey yin in map
Shadow zone domain can be seen that with S element ratio in Fig. 5 correspondingly, Se and S elemental constituent be in dynamic change.With the increasing of S component
Add, Se component is in reduction trend.
Comparative example 1
Repeat embodiment 1, difference is, if select hexagonal system structure, be oriented to the CdS single-chip of [10-10] as
Raw material prepares CdSxSe1-xAlloy nanowire array can not obtain large area or be evenly distributed on the surface of template size
CdSxSe1-xAlloy nanowire array.
Comparative example 2
Embodiment 1 is repeated, difference is, the process of the CdS single-chip of CdS nano-wire array is distributed on preparation surface
In, it will heat up temperature from 700 DEG C and be changed to 800 DEG C, remaining condition is constant, and CdS nano wire is distributed in the surface that can not be prepared
The CdS single-chip of array.
Obviously, the above embodiment of the present invention be only to clearly illustrate example of the present invention, and not be pair
The restriction of embodiments of the present invention may be used also on the basis of the above description for those of ordinary skill in the art
To make other variations or changes in different ways, all embodiments can not be exhaustive here, it is all to belong to this hair
The obvious changes or variations that bright technical solution is extended out are still in the scope of protection of the present invention.
Claims (8)
1. a kind of adjustable CdS of single-orientated and componentxSe1-xThe preparation method of alloy nanowire array, which is characterized in that including
Following steps:
Using thermal evaporation In Situ Heating CdS single-chip, obtains to surface and be evenly distributed with the CdS single-chip of CdS nano-wire array;
The CdS single-chip of CdS nano-wire array is evenly distributed with as substrate using the surface, using CdSe powder as raw material, protectiveness
Gas is carrier, and the adjustable CdS of single-orientated and component is prepared using physical vaporous depositionxSe1-xAlloy nano linear array
Column, wherein 0 x≤1 <.
2. preparation method according to claim 1, which is characterized in that the structure of the CdS single-chip is hexagonal crystal tying
Structure, and it is oriented to [0001] direction.
3. preparation method according to claim 1, which is characterized in that the thermal evaporation In Situ Heating CdS single-chip
Method includes the following steps:
CdS single-chip list is thrown up, the heated center of tube furnace is placed in;
By tubular type stove evacuation, and it is passed through protective gas, intraductal pressure control is in 50-500Pa in gas replenishment process;
Tube furnace is warming up to 680-750 DEG C with the heating rate of 15-25 DEG C/min, and reacts 20-60min at this temperature,
Wherein, the flow velocity of protective gas is 30-50sccm;
After reaction, it is naturally cooling to room temperature to tube furnace, it is mono- obtains the CdS for being evenly distributed with CdS nano-wire array to surface
Chip.
4. preparation method according to claim 1, which is characterized in that the physical vaporous deposition specifically includes following step
It is rapid:
CdSe powder is weighed in ceramic boat, and places it in the high-temperature region heated center of double temperature-area tubular furnaces;
The CdS single-chip of CdS nano-wire array is evenly distributed with as substrate using the surface, and places it in double temperature-area tubular furnaces
The heated center of low-temperature space;
To the tubular type stove evacuation, and it is passed through protective gas, intraductal pressure control is in 50-500Pa in gas replenishment process;
The high-temperature region of the tube furnace is warming up to 630-730 DEG C with the heating speed of 15-25 DEG C/min, with identical heating rate
The low-temperature space of tube furnace is warming up to 500-620 DEG C, reacts 20-60min with this condition, wherein the flow velocity of protective gas
For 30-50sccm;
After reaction, it is naturally cooling to room temperature to the tube furnace, obtains the adjustable CdS of described single-orientated and componentxSe1-xIt closes
Crystal structure.
5. preparation method described according to claim 1 or 3 or 4, which is characterized in that the protective gas is hydrogen and inertia
The gaseous mixture of gas, wherein the inert gas is selected from the mixing of one or more of nitrogen, helium, argon gas and neon.
6. preparation method according to claim 5, which is characterized in that in the gaseous mixture, the body of hydrogen and inert gas
Product content are as follows: hydrogen 5-10%, inert gas 95-90%.
7. the preparation method according to claim 4, it is characterised in that by the low-temperature space of the tube furnace with 15-25 DEG C/
In the step of heating speed of min is warming up to 500-620 DEG C, CdSe steam is adjusted in 500-620 DEG C of temperature range in substrate
Depositing temperature, realize to CdSxSe1-xThe regulation of alloy nanowire array component.
8. the adjustable CdS of single-orientated and component being prepared such as the described in any item preparation methods of claim 1-7xSe1-x
Alloy nanowire array, which is characterized in that on the surface of the template size of CdS single-chip, be evenly distributed with single-orientated
CdSxSe1-xAlloy nanowire array.
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