CN109995452A - A kind of determination method of clock frequency, power board system, main control board system and computer storage medium - Google Patents

A kind of determination method of clock frequency, power board system, main control board system and computer storage medium Download PDF

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Publication number
CN109995452A
CN109995452A CN201711487263.XA CN201711487263A CN109995452A CN 109995452 A CN109995452 A CN 109995452A CN 201711487263 A CN201711487263 A CN 201711487263A CN 109995452 A CN109995452 A CN 109995452A
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register
value
board system
impulse
clock frequency
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张建东
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ZTE Corp
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ZTE Corp
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    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04JMULTIPLEX COMMUNICATION
    • H04J3/00Time-division multiplex systems
    • H04J3/02Details
    • H04J3/06Synchronising arrangements
    • H04J3/0635Clock or time synchronisation in a network
    • H04J3/0685Clock or time synchronisation in a node; Intranode synchronisation
    • H04J3/0688Change of the master or reference, e.g. take-over or failure of the master
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L41/00Arrangements for maintenance, administration or management of data switching networks, e.g. of packet switching networks
    • H04L41/08Configuration management of networks or network elements
    • H04L41/0803Configuration setting
    • H04L41/0813Configuration setting characterised by the conditions triggering a change of settings
    • H04L41/0816Configuration setting characterised by the conditions triggering a change of settings the condition being an adaptation, e.g. in response to network events

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  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Power Sources (AREA)

Abstract

The embodiment of the invention discloses a kind of determination methods of clock frequency, comprising: receives the clock switching command that main control board system is sent;According to state change information, the value of mark bit register is determined;According to the value of mark bit register, the value of delay time register is determined;From at least two impulse registers, according to the value of the value of mark bit register and delay time register, impulse register is chosen, selected impulse register is controlled and generates corresponding pulse signal;It determines clock frequency algorithm corresponding with pulse signal, the clock frequency of power board system is determined according to clock frequency algorithm.The embodiment of the present invention further simultaneously discloses a kind of power board system, main control board system and computer storage medium.

Description

A kind of determination method of clock frequency, power board system, main control board system and computer Storage medium
Technical field
The present invention relates to the determination technology of clock frequency when the business board mixed insertion of switch system more particularly to a kind of clocks Determination method, power board system, main control board system and the computer storage medium of frequency.
Background technique
With the fast development of cloud computing, New Generation of IDC application scenarios propose core switch system more next Higher requirement needs switch system to have bigger exchange capacity and port bandwidth, higher reliability, more flexible expansion Malleability, the faster performances such as update, these undoubtedly make the veneer of entire switch system configure all the more complication, veneer On chip renewal speed faster and usage scenario is more diversified.
Common clock design scheme is clock source+clock generator on the veneer of existing switch system, according to list Demand of the chip on board to clock can be selected crystal or crystal oscillator as clock source and provide reference clock, and clock generator is based on The clock signal of reference clock offer corresponding frequencies;However, the clock frequency of this design method output is relatively fixed, it is designed to After type, exporting cannot be changed to the clock frequency of business board chip, and application scenarios are relatively simple.
When service board system mixed insertion access switch system, due to different model service board system mixed insertion when provide High speed signal rate is different, and switch system provides clock frequency difference used when different rates high speed signal, it is possible thereby to Find out, the clock frequency determined in the determination method of existing clock frequency causes to be not applied for industry due to immobilizing In application scenarios when business plate system mixed insertion.
Summary of the invention
In view of this, an embodiment of the present invention is intended to provide a kind of methods of the determination of clock frequency, power board system, master control Plate system and computer storage medium are able to solve the changeless technology of the clock frequency determined in existing method and ask Topic, it is intended to realize the application scenarios when clock frequency determined can be suitable for service board system mixed insertion.
In order to achieve the above objectives, the technical scheme of the present invention is realized as follows:
The embodiment of the present invention provides a kind of determination method of clock frequency, and the method is applied in power board system, It is characterized in that, the power board system is provided with the delay time register and at least of mark bit register, the mark bit register Two impulse registers, which comprises
Receive the clock switching command that main control board system is sent;Wherein, the clock switching command carries service board system It is inserted into the state change information of the power board system;
According to the state change information, switch the value of the mark bit register;
According to the value of the mark bit register, the value of the delay time register is determined;
From at least two impulse register, according to the value of the mark bit register and the delay time register Value chooses impulse register, controls selected impulse register and generates corresponding pulse signal;
It determines clock frequency algorithm corresponding with the pulse signal, the exchange is determined according to the clock frequency algorithm The clock frequency of plate system.
It is described according to the state change information in the embodiment of the present invention, switch the value of the mark bit register, packet It includes:
It determines from the time point for receiving the clock switching command and begins to pass through preset time period, become according to the state Change information, switches the value of the mark bit register.
In the embodiment of the present invention, the value according to the mark bit register determines the value of the delay time register, wraps It includes:
The value obtained after the value of the mark bit register is postponed a clock cycle, is determined as the delay time register Value.
It is described from least two impulse register in the embodiment of the present invention, according to the mark bit register The value of value and the delay time register chooses impulse register, controls selected impulse register and generates corresponding pulse letter Number, comprising:
The value for determining the mark bit register is 0, and the value of the delay time register is 1, from least two pulse The first impulse register is chosen in register, is controlled first impulse register and is generated the first pulse signal;
The value for determining the mark bit register is 1, and the value of the delay time register is 0, from least two pulse The second impulse register is chosen in register, is controlled second impulse register and is generated the second pulse signal.
The embodiment of the invention also provides a kind of determination method of clock frequency, the method is applied to main control board system In, comprising:
Capturing service plate system is inserted into the state change information of power board system;
According to the state change information, corresponding clock switching command is generated;
The clock switching command is sent to the power board system;
Wherein, the delay time register of mark bit register, the mark bit register is provided in the power board system With at least two impulse registers;
Wherein, the clock switching command switches the value of the mark bit register for the power board system, according to The value of the mark bit register, determines the value of the delay time register, from least two impulse register, according to institute The value of mark bit register and the value of the delay time register are stated, impulse register is chosen, controls selected impulse register Corresponding pulse signal is generated, clock frequency algorithm corresponding with the pulse signal is determined, according to the clock frequency algorithm Determine the clock frequency of the power board system.
The embodiment of the invention also provides a kind of power board systems, including mark bit register, the mark bit register Delay time register, at least two impulse registers, processor, memory and communication bus;
The communication bus is for realizing the connection communication between processor and memory, realization processor and at least two At the connection communication and realization between connection communication, realization processor and the mark bit register between impulse register Manage the connection communication between device and the delay time register;
The processor is used to execute the determination program of the clock frequency stored in memory, to perform the steps of
Receive the clock switching command that main control board system is sent;Wherein, the clock switching command carries service board system It is inserted into the state change information of the power board system;
According to the state change information, switch the value of the mark bit register;
According to the value of the mark bit register, the value of the delay time register is determined;
From at least two impulse register, according to the value of the mark bit register and the delay time register Value chooses impulse register, controls selected impulse register and generates corresponding pulse signal;
It determines clock frequency algorithm corresponding with the pulse signal, the exchange is determined according to the clock frequency algorithm The clock frequency of plate system.
It is described according to the state change information in the embodiment of the present invention, in the value for switching the mark bit register, institute Processor is stated for executing the determination program of the clock frequency stored in memory, to perform the steps of
It determines from the time point for receiving the clock switching command and begins to pass through preset time period, become according to the state Change information, switches the value of the mark bit register.
It is described according to the value for indicating bit register in the embodiment of the present invention, in the value for determining the delay time register, The processor is used to execute the determination program of the clock frequency stored in memory, to perform the steps of
The value obtained after the value of the mark bit register is postponed a clock cycle, is determined as the delay time register Value.
It is described from least two impulse register in the embodiment of the present invention, according to the mark bit register The value of value and the delay time register chooses impulse register, controls selected impulse register and generates corresponding pulse letter In number, the processor is used to execute the determination program of the clock frequency stored in memory, to perform the steps of
The value for determining the mark bit register is 0, and the value of the delay time register is 1, from least two pulse The first impulse register is chosen in register, is controlled first impulse register and is generated the first pulse signal;
The value for determining the mark bit register is 1, and the value of the delay time register is 0, from least two pulse The second impulse register is chosen in register, is controlled second impulse register and is generated the second pulse signal.
The embodiment of the invention also provides a kind of main control board systems, including processor, memory and communication bus;
The communication bus is for realizing the connection communication between processor and memory;
The processor is used to execute the determination program of the clock frequency stored in memory, to perform the steps of
Capturing service plate system is inserted into the state change information of power board system;
According to the state change information, corresponding clock switching command is generated;
The clock switching command is sent to the power board system;
Wherein, the delay time register of mark bit register, the mark bit register is provided in the power board system With at least two impulse registers;
Wherein, the clock switching command switches the value of the mark bit register for the power board system, according to The value of the mark bit register, determines the value of the delay time register, from least two impulse register, according to institute The value of mark bit register and the value of the delay time register are stated, impulse register is chosen, controls selected impulse register Corresponding pulse signal is generated, clock frequency algorithm corresponding with the pulse signal is determined, according to the clock frequency algorithm Determine the clock frequency of the power board system.
The embodiment of the invention also provides a kind of computer storage medium, the computer media is stored with clock frequency It determines program, the step of the determination method of the clock frequency is realized when the determination program of the clock frequency is executed by processor Suddenly.
Determination method, power board system, main control board system and the computer of clock frequency provided by the embodiment of the present invention Storage medium, this method are applied in power board system, which is provided at least two impulse registers, flag bit The delay time register of register and mark bit register;This method comprises: firstly, power board system receives main control board system transmission Clock switching command, clock switching command carries service board system and is inserted into the state change information of power board system so that Power board system learns that the insert state of service board system is changed, then, power board system according to state change information, The value of switching mark bit register, so that the value of mark bit register is overturn, further according to the value of mark bit register, really The value for determining delay time register has obtained value of the value of mark bit register after delay, finally, depositing from least two pulses In device, according to the value of the value of mark bit register and delay time register, impulse register is chosen, controls selected pulse deposit Device generates corresponding pulse signal, in this way, can know business board by the value and the worth of delay time register for indicating bit register The state of system is changed, to trigger selected arteries and veins according to the value of mark bit register and the value of delay time register It rushes register and generates corresponding pulse signal, to determine clock frequency algorithm corresponding with pulse signal, and according to clock frequency Algorithm determines the clock frequency of power board system;That is, in the embodiment of the present invention, by the mark bit register of setting and Indicate the delay time register of bit register, the value of switching mark bit register and delay are posted after receiving clock switching command Then the value of storage is chosen impulse register according to the value of the value of mark bit register and delay time register, be can control selected The impulse register of taking-up generates corresponding pulse signal, in this way, different state change informations is made to correspond to different pulses The pulse signal that register generates, then determine corresponding clock frequency algorithm, in this way, receiving clock switching command Later, clock frequency algorithm corresponding with state change information can be generated according to different state change informations, to reach To the purpose for determining clock frequency according to different state change informations, it is fixed not to solve the existing clock frequency determined The technical issues of change, the application scenarios for realizing the clock frequency determined when can be suitable for service board system mixed insertion, thus The bandwidth demand that can satisfy each service board system further improves working efficiency when service board system mixed insertion.
Detailed description of the invention
Fig. 1 is the structural schematic diagram of switch system in the embodiment of the present invention;
Fig. 2 is the process interaction schematic diagram of the determination method of clock frequency in the embodiment of the present invention;
Fig. 3 is a kind of process signal of optional signal trend of the determination method of clock frequency in the embodiment of the present invention Figure;
Fig. 4 is the timing diagram of register in the embodiment of the present invention;
Fig. 5 is the process signal of the optional signal trend of another kind of the determination method of clock frequency in the embodiment of the present invention Figure;
Fig. 6 is a kind of optional flow diagram of the determination method of clock frequency in the embodiment of the present invention;
Fig. 7 is the optional flow diagram of another kind of the determination method of clock frequency in the embodiment of the present invention;
Fig. 8 is the structural schematic diagram of power board system in the embodiment of the present invention;
Fig. 9 is the structural schematic diagram of main control board system in the embodiment of the present invention;
Figure 10 is the structural schematic diagram of computer storage medium in the embodiment of the present invention.
Specific embodiment
Following will be combined with the drawings in the embodiments of the present invention, and technical solution in the embodiment of the present invention carries out clear, complete Site preparation description.
The embodiment of the present invention provides a kind of determination method of clock frequency, and this method can be applied in switch system, Fig. 1 is the structural schematic diagram of switch system in the embodiment of the present invention, as shown in Figure 1, the switch system may include: business Plate system 11, main control board system 12, power board system 13 and machine frame 14;Wherein, service board system 11, main control board system 12 and friendship It changes plate system 13 to be all set on machine frame 14, service board system 11, main control board system 12 and power board system 13 are built between any two It is vertical to have communication connection.
Wherein, above-mentioned service board system 11 is mainly used for providing business function for switch system;Here, it needs to illustrate It is that in switch system, service board system 11 is inserted into power board system 13, when there are at least two business board systems, 11 insertions When into power board system 13, just there is the mixed insertion scene of service board system 11, at this point, original clock frequency determined is not Two service board systems 11 can be supported to work normally simultaneously, in order to enable the service board system 11 in mixed insertion scene can It works normally, proposes the determination method of the clock frequency in the embodiment of the present invention.
Above-mentioned main control board system 12 mainly for detection of service board system 11 in switch system type information, and according to The type information of service board system 11 judges switch system with the presence or absence of mixed insertion phenomenon, for example, main control board system is after testing The service board system of a model is obtained, then only only one service board system is currently running at this time, mixed insertion field is not present Scape, main control board system 12 obtain the service board system of two models after testing, then at this time there are two service board system Operation, switch system are in mixed insertion scene.
Above-mentioned power board system 13 includes logic chip, clock source, clock generator, exchange chip and other auxiliary electricity Road;It is mainly used for determining clock frequency.
Above-mentioned machine frame 14 is mainly used for providing physical support and connection for entire switch system, while also providing master control Monitoring and signal link channel of the plate system 12 to power board system 13, the height between service board system 11 and power board system 13 Fast signal link channel.
Above-mentioned switch system further includes power module, is mainly used for providing stable power supply electricity for entire switch system Pressure.
The embodiment of the present invention provides a kind of determination method of clock frequency, and this method can be applied to the friendship in above-mentioned Fig. 1 It changes planes system, wherein at least two impulse registers, mark bit register and flag bit deposit are provided in power board system The delay time register of device;Fig. 2 is the process interaction schematic diagram of the determination method of clock frequency in the embodiment of the present invention, such as Fig. 2 institute Show, the determination method of above-mentioned clock frequency may include:
S201: 12 capturing service plate system of main control board system is inserted into the state change information of power board system 13;
Specifically, when service board system 11 is inserted into power board system 13 by staff, main control board system 12 is real When acquisition be inserted into power board system 13 service board system type information, according to the model of collected service board system believe The variation of breath determines above-mentioned state change information.
Wherein, above-mentioned state change information may include: non-mixed insertion state to mixed insertion state or mixed insertion state to immiscible The state of inserting;For example, when one model of type information bear that main control board system 12 collects service board system becomes two types Number, illustrate state change information for non-mixed insertion state to mixed insertion state;When 12 system acquisition of main business plate to service board system Two models of type information bear become a model, illustrate that state change information is mixed insertion state to non-mixed insertion state.
So far, main control board system 12 can determine the state change information of service board system 11.
S202: main control board system 12 generates corresponding clock switching command, tranmitting data register switching according to state change information It instructs to power board system 13;
Here, main control board system 12 is after determining state change information, in order to determine the clock of power board system 13 Frequency needs first to inform that power board system 13, the status information of service board system 11 are changed, so, main control board system 12 generate corresponding clock switching command according to state change information, so that carrier state change information in clock switching command, Clock switching command is finally sent to power board system 13.
In power board system 13, in order to determine clock frequency, need to generate corresponding with state change information Pulse signal, to determine clock frequency algorithm, so that it is determined that clock frequency out;Based on this, it is necessary first to generation and status information Corresponding pulse signal.
In order to generate pulse signal corresponding with status information to obtain corresponding clock frequency algorithm, firstly, it is necessary to Trigger condition is generated according to state change information, corresponding pulse signal is generated when reaching trigger condition.The trigger condition can The value of the value and delay time register of thinking mark bit register is respectively particular value.
S203: power board system 13 is according to the state change information carried in clock switching command, the deposit of switching mark position The value of device;
In the specific implementation process, the default value for indicating the value initialization of bit register is 1,1 expression service board system 11 In non-mixed insertion state;When received when clock switching command, when the state change information carried in clock switching command is non- The value for indicating bit register is then switched to 0, when the state change carried in clock switching command to mixed insertion state by mixed insertion state Information is mixed insertion state to non-mixed insertion state, then the value for indicating bit register is switched to 1.
The stability of switch system can be had an impact due to redefining clock frequency, so being required to neatly It controls whether to redefine clock frequency, for example, clock switching command when received, can not know the value of mark bit register With the value of delay time register, and then clock frequency is not redefined;It can also be after receiving clock switching command, postpone Preset time period, then determine the value of mark bit register and the value of delay time register, and then redefine clock frequency;In one kind In optional embodiment, S203 may include:
It determines and from the time point for receiving clock switching command begins to pass through preset time period, according to state change information, The value of switching mark bit register.
Wherein, above-mentioned preset time period can be configured according to demand.
In the specific implementation process, by the timer in power board system 13 to from receive clock switching command when Between point start to carry out timing, when by preset time period and then according to the value of state change information switching mark bit register.
S204: power board system determines the value of delay time register according to the value of mark bit register;
Here, above-mentioned delay time register is defined as the delay time register of mark bit register, so posting in switching mark position In the case where the value of storage, the value of mark bit register is postponed according to the default clock cycle, so that it may obtain delay and post The value of storage, in this way, can know the insertion shape of service board system previous moment by mark bit register and delay time register The insert state information of state information and current time, to get the state change information of service board system.
The value of delay time register in order to obtain, in an alternative embodiment, S204 may include:
The value obtained after the value for indicating bit register is postponed a clock cycle, is determined as the value of delay time register.
Wherein, the above-mentioned clock cycle is the present clock period of clock source in power board system 13, also, above-mentioned delay The initialization default value of register is that 1,1 expression service board system is in non-mixed insertion state, when the state of service board system becomes When mixed insertion state, indicate that the value of bit register is switched to 0, after a clock cycle, the also set of the value of delay time register 0。
S205: it from least two impulse registers, according to the value of the value of mark bit register and delay time register, chooses Impulse register controls selected impulse register and generates corresponding pulse signal;
Here, after the value of the value and delay time register of determining mark bit register, according to mark bit register Value and the value of delay time register can indicate the state change information of service board system, so, according to the value of mark bit register With the value of delay time register, corresponding relationship with impulse register can select pulse from least two impulse registers Register.
In a particular embodiment, in order to select impulse register, and then corresponding pulse signal is generated, S205 can wrap It includes:
The value for determining mark bit register is 0, and the value of delay time register is 1, is chosen from least two impulse registers First impulse register, the first impulse register of control generate the first pulse signal;
The value for determining mark bit register is 1, and the value of delay time register is 0, is chosen from least two impulse registers Second impulse register, the second impulse register of control generate the second pulse signal.
Specifically, the value for determining mark bit register is 0, and the value of delay time register is 1, illustrates service board system from non- Mixed insertion state becomes mixed insertion state, needs to determine clock frequency for multiple service board systems at this time, to guarantee each business board system System can work normally, so, corresponding first impulse register of control mixed insertion state generates first pulse signal.
The value for determining mark bit register is 1, and the value of delay time register is 0, illustrates that service board system becomes from mixed insertion state For non-mixed insertion state, at this time it is only necessary to determine clock frequency for 1 service board system, to guarantee that 1 service board system can be with It works normally, so, it controls corresponding second impulse register of non-mixed insertion state and generates second pulse signal.
S206: it determines clock frequency algorithm corresponding with pulse signal, power board system is determined according to clock frequency algorithm Clock frequency.
It is above-mentioned after determining corresponding pulse signal, due to each pulse signal with corresponding clock frequency calculate Method can determine clock frequency algorithm corresponding to different pulse signals.
Wherein, above-mentioned clock frequency algorithm can be one section of program code, and power board system 13 can according to the program code To determine the clock frequency of power board system 13;Above-mentioned clock frequency algorithm can also be empirical equation, power board system 13 The clock frequency of power board system 13 can be determined according to the empirical equation;Here, the embodiment of the present invention is not especially limited.
In practical applications, after determining clock frequency algorithm, clock frequency algorithm is sent to power board system In clock generator, clock generator determines the clock frequency of power board system according to clock frequency algorithm, and to exchange Chip in plate provides the clock frequency redefined out, allows power board system to provide high speed for service board system and believes Number, to guarantee the working condition of each service board system high speed.
It is given an actual example below to be illustrated to the determination method of the clock frequency in said one or multiple embodiments.
Fig. 3 is a kind of process signal of optional signal trend of the determination method of clock frequency in the embodiment of the present invention Figure, as shown in figure 3, when main control board system 12 issues clock switching command to power board system 13, according to clock switching command The value of switching mark bit register and the value of delay time register, available two class value, first group are as follows: indicate the value of bit register Value for 1 and delay time register is 0, second group are as follows: the value for indicating bit register is 0, and the value of delay time register is 1, works as determination When for the first class value, the first impulse register is chosen, the first impulse register of control generates a pulse signal and is denoted as rising edge The corresponding configuration information of rising edge pulse signal (being equivalent to above-mentioned clock frequency algorithm) is issued to clock hair by pulse signal Raw device, clock generator generate new clock frequency according to configuration information, configure clock1 by clock2 for clock;Work as determination When for the second class value, the second impulse register is chosen, the second impulse register of control generates a pulse signal and is denoted as failing edge The corresponding configuration information of failing edge pulse signal is issued to clock generator by pulse signal, and clock generator is according to configuration Information generates new clock frequency, configures clock1 by clock2 for clock.
Fig. 4 is the timing diagram of register in the embodiment of the present invention;As shown in figure 4, epld_clk_25M is current non-mixed insertion Clock under state, the frequency of the clock are 25M, and clk_cfg indicates the value of mark bit register, and clk_cfg_d indicates delay The value of register, clk_cfg_d_falledge indicate the value of the first impulse register, and clk_cfg_d_riseedge indicates the The value of two impulse registers;After power board system 13 receives clock switching command, wherein carried in clock switching command State change information instruction service board system from non-mixed insertion state become mixed insertion state, then, power board system 13 is according to shape The value for indicating bit register is set to 0 by state change information, by after a clock cycle by the value set 0 of delay time register, In this way, the value of delay time register is 1, and the first impulse register generates a pulse signal when the value of mark bit register is 0, Such as the pulse signal of the clk_cfg_d_falledge in Fig. 4, after a while, power board system 13 receives clock After switching command, wherein the state change information carried in clock switching command indicates that service board system becomes from mixed insertion state For non-mixed insertion state, then, the value for indicating bit register is set to 1 according to state change information by power board system 13, by one By the value set 1 of delay time register after a clock cycle, in this way, when the value of mark bit register is 1, the value of delay time register It is 0, the second impulse register generates a pulse signal, such as the pulse signal of the clk_cfg_d_riseedge in Fig. 4, then so Clock frequency algorithm corresponding with pulse signal is determined afterwards, and clock frequency algorithm is issued to clock generator, clock generator New clock frequency is generated according to configuration information.
Fig. 5 is the process signal of the optional signal trend of another kind of the determination method of clock frequency in the embodiment of the present invention Figure, as shown in figure 5, the logic chip of power board system 13 receives the clock switching command that main control board system 12 is sent, according to The value of the state change information switching mark bit register carried in clock switching command and the value of delay time register, according to mark The value of bit register and the value of delay time register determine that corresponding impulse register, control impulse register generate corresponding arteries and veins Signal is rushed, and determines configuration information corresponding with pulse signal, configuration information is sent to clock generator, clock generator root The clock signal with new clock frequency is generated according to configuration information, and provides clock frequency for exchange chip, so that can be with High speed signal is provided for business board chip.
By examples detailed above, and can support different frequency demand different model service board system chip same It is used in system, is suitable for multi-mode application scene, had both been able to satisfy demand of the large enterprises to vast capacity switch system, and also could Meet the needs of medium-sized and small enterprises are to big medium capacity exchange system, and the capacity of easily later period upgrading switch system, can make to produce Product smooth upgrade, is greatly saved client cost.
The determination method of clock frequency provided by the embodiment of the present invention, this method are applied in power board system, the friendship It changes plate system and is provided at least two impulse registers, mark bit register and the delay time register for indicating bit register;The party Method includes: firstly, power board system receives the clock switching command that main control board system is sent, and clock switching command carries business board System is inserted into the state change information of power board system, so that power board system learns that the insert state of service board system occurs Variation, then, power board system is according to state change information, the value of switching mark bit register, so that mark bit register Value overturn, further according to the value of mark bit register, determine the value of delay time register, obtained mark bit register The value being worth after delay, finally, from least two impulse registers, according to the value and delay time register of mark bit register Value, choose impulse register, control selected impulse register and generate corresponding pulse signal, in this way, mark can be passed through The value of will bit register and the worth of delay time register know that the state of service board system is changed, to be posted according to flag bit The value of storage and the value of delay time register generate corresponding pulse signal to trigger selected impulse register, with determining and arteries and veins The corresponding clock frequency algorithm of signal is rushed, and determines the clock frequency of power board system according to clock frequency algorithm;That is, In the embodiment of the present invention, by the mark bit register of setting and the delay time register of mark bit register, clock is being received The value of the value of switching mark bit register and delay time register after switching command, then according to mark bit register value and prolong The value of storage of delaying in the dispatch of chooses impulse register, and the impulse register that can control selected taking-up generates corresponding pulse signal, this Sample, so that different state change informations corresponds to the pulse signal that different impulse register generates, then when determining corresponding Clock frequency algorithm, in this way, make after receiving clock switching command, according to different state change informations can be generated with The corresponding clock frequency algorithm of state change information, determines clock frequency according to different state change informations to reach Purpose solves the technical issues of existing clock frequency determined immobilizes, and realizes the clock frequency energy determined Enough it is suitable for application scenarios when service board system mixed insertion, so as to meet the bandwidth demand of each service board system, into one Step improves working efficiency when service board system mixed insertion.
It is illustrated below in determination method of equipment each in the switch system side to above-mentioned clock frequency.
Firstly, being described in determination method of the power board system side to clock frequency.
Fig. 6 is a kind of optional flow diagram of the determination method of clock frequency in the embodiment of the present invention, such as Fig. 6 institute Show, above-mentioned power board system is provided with mark bit register, indicates that the delay time register of bit register and at least two pulses are posted Storage, this method comprises:
S601: the clock switching command that main control board system is sent is received;
Wherein, clock switching command carries the state change information that service board system is inserted into power board system;
S602: according to state change information, the value of switching mark bit register;
S603: according to the value of mark bit register, the value of delay time register is determined;
S604: it from least two impulse registers, according to the value of the value of mark bit register and delay time register, chooses Impulse register controls selected impulse register and generates corresponding pulse signal;
S605: it determines clock frequency algorithm corresponding with pulse signal, power board system is determined according to clock frequency algorithm Clock frequency.
In an alternative embodiment, S602 may include:
It determines and from the time point for receiving clock switching command begins to pass through preset time period, according to state change information, Determine the value of mark bit register.
In an alternative embodiment, S603 may include:
The value obtained after the value for indicating bit register is postponed a clock cycle, is determined as the value of delay time register.
In an alternative embodiment, S603 may include:
The value for determining mark bit register is 0, and the value of delay time register is 1, is chosen from least two impulse registers First impulse register, the first impulse register of control generate the first pulse signal;
The value for determining mark bit register is 1, and the value of delay time register is 0, is chosen from least two impulse registers Second impulse register, the second impulse register of control generate the second pulse signal.
Secondly, being described in determination method of the main control board system side to clock frequency.
Fig. 7 is the optional flow diagram of another kind of the determination method of clock frequency in the embodiment of the present invention, such as Fig. 7 institute Show, this method comprises:
S701: capturing service plate system is inserted into the state change information of power board system;
S702: according to state change information, corresponding clock switching command is generated;
S703: tranmitting data register switching command to power board system.
Wherein, the delay time register and at least two that mark bit register is provided in power board system, indicates bit register A impulse register;
Wherein, clock switching command is used for the value of power board system switching mark bit register, according to mark bit register Value, determine the value of delay time register, from least two impulse registers, according to mark bit register value and delay deposit The value of device chooses impulse register, controls selected impulse register and generates corresponding pulse signal, determining and pulse signal Corresponding clock frequency algorithm, the clock frequency of power board system is determined according to clock frequency algorithm.
Based on the same inventive concept, the embodiment of the present invention provides a kind of power board system, with said one or multiple realities Apply power board systems compliant described in example.
Fig. 8 is the structural schematic diagram of power board system in the embodiment of the present invention, as shown in figure 8, the power board system includes: Indicate bit register 83, indicate the delay time register 84 of bit register, at least two impulse registers 81 and 82, processor 85, Memory 86 and communication bus 87;Communication bus 87 is for realizing the connection communication between processor 85 and memory 86, realization Connection communication, realization processor 85 and mark bit register 84 between processor 85 and at least two impulse registers 81 and 82 Between connection communication and realize connection communication between processor 85 and delay time register 84;The processor 85 is for holding The determination program of the clock frequency stored in line storage, to perform the steps of
Receive the clock switching command that main control board system is sent;According to state change information, mark bit register is determined Value;According to the value of mark bit register, the value of delay time register is determined;From at least two impulse registers, according to flag bit The value of register and the value of delay time register choose impulse register, control selected impulse register and generate corresponding arteries and veins Rush signal;It determines clock frequency algorithm corresponding with pulse signal, the clock of power board system is determined according to clock frequency algorithm Frequency.
Wherein, clock switching command carries the state change information that service board system is inserted into power board system.
In an alternative embodiment, according to state change information, in the value of switching mark bit register, the processing Device 85 is used to execute the determination program of the clock frequency stored in memory, to perform the steps of
It determines and from the time point for receiving clock switching command begins to pass through preset time period, according to state change information, The value of switching mark bit register.
In an alternative embodiment, it according to the value of mark bit register, determines in the value of delay time register, the place Reason device 85 is used to execute the determination program of the clock frequency stored in memory, to perform the steps of
The value obtained after the value for indicating bit register is postponed a clock cycle, is determined as the value of delay time register.
In an alternative embodiment, from least two impulse registers, according to the value of mark bit register and prolong Delay in the dispatch of the value of storage, chooses impulse register, controls selected impulse register and generates in corresponding pulse signal, the place Reason device 85 is used to execute the determination program of the clock frequency stored in memory, to perform the steps of
The value for determining mark bit register is 0, and the value of delay time register is 1, is chosen from least two impulse registers First impulse register, the first impulse register of control generate the first pulse signal;The value for determining mark bit register is 1, is prolonged The value of storage of delaying in the dispatch of is 0, chooses the second impulse register from least two impulse registers, the second impulse register of control is raw At the second pulse signal.
Based on the same inventive concept, the embodiment of the present invention provides a kind of main control board system, with said one or multiple realities It is consistent to apply main control board system described in example.
Fig. 9 is the structural schematic diagram of main control board system in the embodiment of the present invention, as shown in figure 9, main control board system includes place Manage device 91, memory 92 and communication bus 93;Communication bus 93 is logical for realizing the connection between processor 91 and memory 92 Letter;The processor 91 is used to execute the determination program of the clock frequency stored in memory, to perform the steps of
Capturing service plate system is inserted into the state change information of power board system;According to state change information, generation pair The clock switching command answered;Tranmitting data register switching command is to power board system.
Wherein, the delay time register and at least two that mark bit register is provided in power board system, indicates bit register A impulse register.
Wherein, clock switching command is used for the value of power board system switching mark bit register, according to mark bit register Value, determine the value of delay time register, from least two impulse registers, according to mark bit register value and delay deposit The value of device chooses impulse register, controls selected impulse register and generates corresponding pulse signal, determining and pulse signal Corresponding clock frequency algorithm, the clock frequency of power board system is determined according to clock frequency algorithm.
Based on previous embodiment, the present embodiment provides a kind of computer storage medium, Figure 10 falls into a trap for the embodiment of the present invention The structural schematic diagram of calculation machine storage medium, as shown in Figure 10, the computer storage medium 100 are stored with the determination journey of clock frequency Sequence realizes such as above-mentioned one or more exchange as described in the examples when the determination program of above-mentioned clock frequency is executed by processor The step of determination method for the clock frequency that plate system or the main control board system execute.
It should be noted that, in this document, the terms "include", "comprise" or its any other variant are intended to non-row His property includes, so that the process, method, article or the device that include a series of elements not only include those elements, and And further include other elements that are not explicitly listed, or further include for this process, method, article or device institute it is intrinsic Element.In the absence of more restrictions, the element limited by sentence "including a ...", it is not excluded that including being somebody's turn to do There is also other identical elements in the process, method of element, article or device.
The serial number of the above embodiments of the invention is only for description, does not represent the advantages or disadvantages of the embodiments.
Through the above description of the embodiments, those skilled in the art can be understood that above-described embodiment side Method can be realized by means of software and necessary general hardware platform, naturally it is also possible to by hardware, but in many cases The former is more preferably embodiment.Based on this understanding, technical solution of the present invention substantially in other words does the prior art The part contributed out can be embodied in the form of software products, which is stored in a storage medium In (such as ROM/RAM, magnetic disk, CD), including some instructions are used so that a terminal (can be mobile phone, computer, service Device, air conditioner or network equipment etc.) execute method described in each embodiment of the present invention.
The embodiment of the present invention is described with above attached drawing, but the invention is not limited to above-mentioned specific Embodiment, the above mentioned embodiment is only schematical, rather than restrictive, those skilled in the art Under the inspiration of the present invention, without breaking away from the scope protected by the purposes and claims of the present invention, it can also make very much Form, all of these belong to the protection of the present invention.

Claims (11)

1. a kind of determination method of clock frequency, the method is applied in power board system, which is characterized in that the power board System is provided with the delay time register and at least two impulse registers of mark bit register, the mark bit register, described Method includes:
Receive the clock switching command that main control board system is sent;Wherein, the clock switching command carries service board system insertion To the state change information of the power board system;
According to the state change information, switch the value of the mark bit register;
According to the value of the mark bit register, the value of the delay time register is determined;
From at least two impulse register, according to it is described mark bit register value and the delay time register value, Impulse register is chosen, selected impulse register is controlled and generates corresponding pulse signal;
It determines clock frequency algorithm corresponding with the pulse signal, the power board system is determined according to the clock frequency algorithm The clock frequency of system.
2. switching the mark the method according to claim 1, wherein described according to the state change information The value of will bit register, comprising:
It determines from the time point for receiving the clock switching command and begins to pass through preset time period, believed according to the state change Breath switches the value of the mark bit register.
3. the method according to claim 1, wherein the value according to the mark bit register, determines institute State the value of delay time register, comprising:
The value obtained after the value of the mark bit register is postponed a clock cycle, is determined as the delay time register Value.
4. the method according to claim 1, wherein described from least two impulse register, according to The value of the mark bit register and the value of the delay time register, choose impulse register, control selected pulse deposit Device generates corresponding pulse signal, comprising:
The value for determining the mark bit register is 0, and the value of the delay time register is 1, is deposited from least two pulse The first impulse register is chosen in device, is controlled first impulse register and is generated the first pulse signal;
The value for determining the mark bit register is 1, and the value of the delay time register is 0, is deposited from least two pulse The second impulse register is chosen in device, is controlled second impulse register and is generated the second pulse signal.
5. a kind of determination method of clock frequency, the method is applied in main control board system characterized by comprising
Capturing service plate system is inserted into the state change information of power board system;
According to the state change information, corresponding clock switching command is generated;
The clock switching command is sent to the power board system;
Wherein, the delay time register and extremely of mark bit register, the mark bit register is provided in the power board system Few two impulse registers;
Wherein, the clock switching command switches the value of the mark bit register for the power board system, according to described The value for indicating bit register, determines the value of the delay time register, from least two impulse register, according to the mark The value of the value of will bit register and the delay time register chooses impulse register, controls selected impulse register and generates Corresponding pulse signal determines clock frequency algorithm corresponding with the pulse signal, is determined according to the clock frequency algorithm The clock frequency of the power board system.
6. a kind of power board system, which is characterized in that the power board system includes mark bit register, flag bit deposit The delay time register of device, at least two impulse registers, processor, memory and communication bus;
The communication bus is for realizing connection communication, realization processor and at least two pulses between processor and memory The connection communication and realization processor between connection communication, realization processor and the mark bit register between register Connection communication between the delay time register;
The processor is used to execute the determination program of the clock frequency stored in memory, to perform the steps of
Receive the clock switching command that main control board system is sent;Wherein, the clock switching command carries service board system insertion To the state change information of the power board system;
According to the state change information, switch the value of the mark bit register;
According to the value of the mark bit register, the value of the delay time register is determined;
From at least two impulse register, according to it is described mark bit register value and the delay time register value, Impulse register is chosen, selected impulse register is controlled and generates corresponding pulse signal;
It determines clock frequency algorithm corresponding with the pulse signal, the power board system is determined according to the clock frequency algorithm The clock frequency of system.
7. system according to claim 6, which is characterized in that it is described according to the state change information, switch the mark In the value of will bit register, the processor is used to execute the determination program of the clock frequency stored in memory, with realize with Lower step:
It determines from the time point for receiving the clock switching command and begins to pass through preset time period, believed according to the state change Breath switches the value of the mark bit register.
8. system according to claim 6, which is characterized in that the value according to the mark bit register determines institute It states in the value of delay time register, the processor is used to execute the determination program of the clock frequency stored in memory, to realize Following steps:
The value obtained after the value of the mark bit register is postponed a clock cycle, is determined as the delay time register Value.
9. system according to claim 6, which is characterized in that it is described from least two impulse register, according to The value of the mark bit register and the value of the delay time register, choose impulse register, control selected pulse deposit Device generates in corresponding pulse signal, and the processor is used to execute the determination program of the clock frequency stored in memory, with It performs the steps of
The value for determining the mark bit register is 0, and the value of the delay time register is 1, is deposited from least two pulse The first impulse register is chosen in device, is controlled first impulse register and is generated the first pulse signal;
The value for determining the mark bit register is 1, and the value of the delay time register is 0, is deposited from least two pulse The second impulse register is chosen in device, is controlled second impulse register and is generated the second pulse signal.
10. a kind of main control board system, which is characterized in that the main control board system includes processor, memory and communication bus;
The communication bus is for realizing the connection communication between processor and memory;
The processor is used to execute the determination program of the clock frequency stored in memory, to perform the steps of
Capturing service plate system is inserted into the state change information of power board system;
According to the state change information, corresponding clock switching command is generated;
The clock switching command is sent to the power board system;
Wherein, the delay time register and extremely of mark bit register, the mark bit register is provided in the power board system Few two impulse registers;
Wherein, the clock switching command switches the value of the mark bit register for the power board system, according to described The value for indicating bit register, determines the value of the delay time register, from least two impulse register, according to the mark The value of the value of will bit register and the delay time register chooses impulse register, controls selected impulse register and generates Corresponding pulse signal determines clock frequency algorithm corresponding with the pulse signal, is determined according to the clock frequency algorithm The clock frequency of the power board system.
11. a kind of computer storage medium, which is characterized in that the computer media is stored with the determination program of clock frequency, The clock as described in any one of Claims 1-4 or 5 is realized when the determination program of the clock frequency is executed by processor The step of determination method of frequency.
CN201711487263.XA 2017-12-29 2017-12-29 A kind of determination method of clock frequency, power board system, main control board system and computer storage medium Withdrawn CN109995452A (en)

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EP2663038A1 (en) * 2012-01-21 2013-11-13 Huawei Technologies Co., Ltd Switch chip port management method, main control board, switch board, and system

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* Cited by examiner, † Cited by third party
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Application publication date: 20190709