CN109981080B - Method and circuit for improving overshoot suppression efficiency of power amplifier under same pulse trigger signal and power amplifier - Google Patents
Method and circuit for improving overshoot suppression efficiency of power amplifier under same pulse trigger signal and power amplifier Download PDFInfo
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- CN109981080B CN109981080B CN201910243505.3A CN201910243505A CN109981080B CN 109981080 B CN109981080 B CN 109981080B CN 201910243505 A CN201910243505 A CN 201910243505A CN 109981080 B CN109981080 B CN 109981080B
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K3/00—Circuits for generating electric pulses; Monostable, bistable or multistable circuits
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- H03K3/011—Modifications of generator to compensate for variations in physical values, e.g. voltage, temperature
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- H—ELECTRICITY
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Abstract
The invention belongs to the field of solid-state microwave power amplifiers, and particularly provides a method and a circuit for improving overshoot suppression efficiency of a power amplifier under the condition of the same pulse trigger signal, and the power amplifier, aiming at solving the problem of low stability or low efficiency of the power amplifier. The pulse power amplifier works in high-efficiency class B in front of a microwave excitation signal, a falling edge detection circuit is used for detecting the falling edge of the excitation signal of the power amplifier, a grid voltage control circuit is used for adjusting grid bias voltage before the falling edge of the excitation signal reaches, the working class of the power amplifier is changed, and the grid bias voltage is adjusted to class A, so that the power amplifier works in class A at the moment of the falling edge of the excitation signal, and the drain voltage does not generate overshoot at the moment of turning off the microwave excitation signal. The high stability of the class A pulse power amplifier and the high efficiency of the class B pulse power amplifier can be simultaneously obtained.
Description
Technical Field
The invention belongs to the field of solid-state microwave power amplifiers, and particularly relates to a method and a circuit for suppressing overshoot and improving efficiency of a pulse power amplifier under the same pulse trigger signal.
Background
The microwave power amplifier is an important component of a microwave system, can amplify a weak microwave signal to a required power level, is generally positioned at the tail end of a transmitter, and has wide application in the fields of wireless communication, radar, remote sensing, medical electronics, measurement and control, electronic countermeasure and the like. With the gradual maturity of the third generation semiconductor material GaN process, the output power of the power amplifier is also remarkably increased, and the output power of a single tube breaks through 1kW at present. For example, the paper published by E.Mitani et al in 2007A kW-class AlGaN/GaN HEMT Pallet Amplifier for S-band High Power Application (published in Proceedings of the 2nd European Microwave Integrated Circuits Conference), the paper Kilowatt-level Power Amplifier in a single-ended architecture at 352MHz (published in Electronicos LETTERS, Vol.52, No.18, 2016) by L.Haapala et al in 2016.
The microwave system of the pulse system has wide application, and the pulse system radar, the transceiving time-sharing electronic countermeasure system and the burst communication system are all pulse systems, so that the power amplification circuit is required to work in a pulse mode. Taking a power amplifier composed of field effect transistors as an example, there are two kinds of pulse modulation, that is, gate bias voltage modulation and drain bias voltage modulation. The Performance enhancement of Pulsed Solid State Power amplification Gate Modulation by dhar et al, 2009, and the Hyo-joint Kim et al, 2017, An X-Band 100W GaN HEMT Power Amplifier Using a Hybrid Switching method for Fast Pulse Switching (vol. 78) indicate that higher efficiency, higher output Power, higher gain, faster rising edge, faster falling edge, and flatter gain can be obtained with Drain bias voltage Modulation than with Gate bias voltage Modulation, and thus better Performance can be obtained with Drain bias voltage Modulation.
Adopting a drain electrode bias modulation mode, and in the microwave excitation pulse, the drain electrode power supply current is the dynamic current I of the power amplifierdOutside the microwave exciting pulse, the drain electrode power supply current is the quiescent current I of the power amplifierqAt the moment when the microwave excitation signal is turned off, the drain voltage overshoot V shown in fig. 1 is generated due to the parasitic inductance L of the drain supply paths：
In the formula, tfIs the excitation signal falling edge time.
In a microwave transmitter, a power amplifier is a main energy consumption part and is also the area with the most concentrated heat generation, the efficiency of a power amplification circuit has important influences on the design of a power supply system, the design of a heat dissipation system and the endurance time of the system, and the improvement of the efficiency of the pulse power amplification circuit becomes an important content for improving the performance of the circuit. James Custer et al in 2016 article center advance in kW-level Pulsed GaN Transistors with Very high efficiency points out that for kW level power amplifier high efficiency class E, class F, etc. can not be realized, and only the traditional work class of changing conduction angle can be adopted to improve efficiency. Clipps calculates the efficiency and output Power relationships of pulsed Power Amplifiers of different conduction angles in the proprietary RF Power Amplifiers for wireless Communication clipps, see fig. 2.
For the operating classes of different conduction angles α, the dynamic direct current Id is:
quiescent current IqComprises the following steps:
the drain relative voltage overshoot V thus calculatedsSee fig. 3.
In a kW-class high-power amplifier, if a class A with a conduction angle of 360 DEG is used, Id＝IqVoltage overshoot VsThe power amplifier output is 0, the pulse power amplifier cannot be damaged, the stability is high, and the efficiency is only 50%; if class B with a conduction angle of 180 DEG is used, the efficiency is as high as 78.5%, but IqIs equal to 0, thus Id>>IqWill generate a voltage overshoot V of tens of volts or even hundreds of voltssAnd the power amplifier is likely to be broken down to cause damage, so that the damage is extremely large.
Disclosure of Invention
The invention aims to solve the technical problems that: the voltage overshoot suppression and efficiency improvement method for the mixed high-power solid-state pulse power amplifier under the same trigger signal aims to solve the problem of low stability or low efficiency of the power amplifier and can obtain high stability of the A-class pulse power amplifier and high efficiency of the B-class pulse power amplifier at the same time.
In order to achieve the purpose, the technical scheme of the invention is as follows:
the power amplifier voltage overshoot suppression and efficiency improvement method under the same pulse trigger signal comprises the following steps:
1 ] before time t 0:
the pulse signal generator does not generate a pulse trigger signal, and the control grid voltage control circuit provides a B-class working point bias voltage V for the pulse power amplifiergb(ii) a The pulse power amplifier does not work;
time t 0:
the pulse signal generator provides a pulse trigger signal;
the rising edge of the pulse trigger signal is delayed by a delay circuit and sent to a radio frequency signal source;
the pulse trigger signal sent to the rising edge detection circuit generates a first trigger signal through the rising edge detection circuit, and triggers the drain voltage control circuit to provide drain bias voltage for the drain of the pulse power amplifier;
the grid voltage control circuit continuously provides the bias voltage V of the B-type working point for the pulse power amplifiergb；
3 ] between time t0 and time t 1:
the drain bias voltage of the pulse power amplifier is gradually increased from 0V to the required drain bias voltage;
the grid voltage control circuit continuously provides the bias voltage V of the B-type working point for the pulse power amplifiergb；
T1 time:
the drain bias voltage of the pulse power amplifier is stabilized to the required drain bias voltage;
the rising edge of the pulse trigger signal delayed by the second delay circuit reaches a radio frequency signal source, and the radio frequency signal source starts to generate an excitation signal;
gate voltage control circuit continuationProviding bias voltage V of B-class working point for pulse power amplifiergb；
5 ] between time t1 and time tc:
the pulse power amplifier works in a B class;
time tc:
the pulse trigger signal generated by the pulse signal generator reaches the falling edge;
the falling edge of the pulse trigger signal is delayed by a second delay circuit and sent to a radio frequency signal source;
the falling edge of the pulse trigger signal sent to the falling edge detection circuit generates a second trigger signal through the falling edge detection circuit, and the grid voltage control circuit is triggered to start to adjust grid bias voltage;
7 ] time tc to time t 2:
the working state of the pulse power amplifier is gradually changed from class B to class A, and at the moment, the pulse power amplifier is in a class AB working state;
time t 2:
by varying the gate voltage settling time taugThen, the gate bias voltage is changed to a class A operating point bias voltage Vga；
Wherein:
in the formula, VtThe grid bias voltage is the grid bias voltage when the drain voltage is over-rushed and is reduced to be within a safety range; r is the parasitic resistance from the grid voltage control circuit to the grid electrode of the pulse power amplifier, and C is the parasitic capacitance of the grid voltage control circuit to the ground;
delayed by tau via a second delay circuitgThe falling edge of the pulse trigger signal with the duration reaches a radio frequency signal source, and the radio frequency signal source stops generating an excitation signal;
delayed by tau through a first delay circuitgThe falling edge of the pulse trigger signal with the duration reaches a drain voltage control circuit, and the drain voltage control circuit stops providing drain bias voltage for the drain electrode of the pulse power amplifier;
stopping the pulse power amplifier;
t2 time to t3 time:
the pulse power amplifier works in A class;
the drain electrode bias voltage of the pulse power amplifier is gradually reduced to 0V;
time t 3:
the drain electrode bias voltage of the pulse power amplifier is reduced to 0V;
grid voltage control circuit restores to provide bias voltage V of class B operating point for pulse power amplifiergb。
The pulse power amplifier works in high-efficiency class B in front of a microwave excitation signal, a falling edge detection circuit is used for detecting the falling edge of the excitation signal of the power amplifier, a grid voltage control circuit is used for adjusting grid bias voltage before the falling edge of the excitation signal reaches, the working class of the power amplifier is changed, and the grid bias voltage is adjusted to class A, so that the power amplifier works in class A at the moment of the falling edge of the excitation signal, and the drain voltage does not generate overshoot at the moment of turning off the microwave excitation signal.
Further, in step 8 ], VgaVoltage holding time taugaFor varying the gate voltage settling time taugAnd drain bias voltage falling edge time taudfAnd (4) summing.
The invention also provides a circuit for realizing the method, which is characterized in that: the device comprises a pulse signal generator, a radio frequency signal source and a control circuit;
the control circuit comprises a rising edge detection circuit, a falling edge detection circuit, a first delay circuit, a second delay circuit, a leakage voltage control circuit and a grid voltage control circuit;
the input ends of the rising edge detection circuit and the falling edge detection circuit are respectively connected with the output end of the pulse signal generator; the output end of the rising edge detection circuit is connected with the input end of the leakage voltage control circuit and the input end of the second delay circuit; the output end of the falling edge detection circuit is connected with the input end of the grid voltage control circuit, the input end of the first delay circuit and the input end of the second delay circuit; the output end of the first delay circuit is connected with the input end of the leakage voltage control circuit; the output end of the second delay circuit is connected with the input end of the radio frequency signal source; the output end of the radio frequency signal source is connected with the signal input end of the pulse power amplifier; the output ends of the grid voltage control circuit and the drain voltage control circuit are respectively connected with the grid electrode and the drain electrode of the pulse power amplifier;
the rising edge detection circuit is used for detecting the rising edge of a pulse signal sent by the pulse signal generator and outputting a trigger signal to the leakage voltage control circuit and the second delay circuit when the rising edge of the pulse signal arrives; the falling edge detection circuit is used for detecting the falling edge of a pulse signal sent by the pulse signal generator and outputting a trigger signal to the grid voltage control circuit, the first delay circuit and the second delay circuit when the falling edge of the pulse signal arrives; and the grid voltage control circuit and the leakage voltage control circuit control the working type of the pulse power amplifier according to the pulse signal.
Further, the delay time of the first delay circuit is τg(ii) a The delay time of the second delay circuit for the rising edge of the pulse signal is the time tau required for the drain bias voltage of the pulse power amplifier to change from 0V to the required drain bias voltagedr(ii) a The time delay of the second time delay circuit to the falling edge of the pulse signal is taug。
The invention also provides a hybrid power amplifier, which comprises a pulse power amplifier and is characterized in that: the output end of the radio frequency signal source is connected with the signal input end of the pulse power amplifier; the output ends of the grid voltage control circuit and the drain voltage control circuit are respectively connected with the grid electrode and the drain electrode of the pulse power amplifier.
Further, the pulse power amplifier is a power amplifier including a field effect transistor or a power amplifier including a bipolar transistor.
The invention has the beneficial effects that:
(1) the method and the circuit provided by the invention can inhibit the voltage overshoot of the high-power pulse power amplifier, avoid the breakdown of the pulse power amplifier and improve the stability of the pulse power amplifier.
(2) By the method and the circuit provided by the invention, the mixed pulse power amplifier can obtain high efficiency of 78.5% theoretically, and can obtain maximum efficiency improvement of 28.5% compared with the currently and generally adopted A-type pulse power amplifier theoretically.
(3) When the mixed pulse power amplifier provided by the invention is switched on the bias voltage, because the output power of the class A and the class B are basically consistent, the flatness of the waveform of the output microwave can be kept while the efficiency and the stability are improved.
Drawings
The features and advantages of the present invention may be more clearly understood by reference to the accompanying drawings, which are illustrative and should not be construed as limiting the invention in any way, and in which:
FIG. 1 is a schematic diagram of pulsed power amplifier microwave excitation signal and drain bias voltage waveforms;
FIG. 2 is a diagram of output power, efficiency and conduction angle of a conventional power amplifier;
FIG. 3 is a diagram of drain-source voltage overshoot versus conduction angle for a conventional power amplifier;
FIG. 4 is a schematic diagram of the electrical characteristics of the mixed class and conventional class A and B pulse power amplifiers of the embodiment;
FIG. 5 is a schematic diagram of an exemplary mixed-mode pulse power amplifier circuit system;
fig. 6 is a charging and discharging equivalent circuit diagram of the gate of the pulse power amplifier.
Detailed Description
The invention provides a method for suppressing voltage overshoot and improving efficiency of a mixed high-power solid-state pulse power amplifier under the same trigger signal, which can suppress voltage overshoot of the high-power pulse power amplifier and obtain high efficiency.
Example one
The pulse power amplifier works in high-efficiency class B in front of a microwave excitation signal, the grid bias voltage is adjusted through the grid voltage control circuit before the falling edge of the excitation signal arrives, the working class of the power amplifier is changed, and the grid bias voltage is adjusted to class A, so that the power amplifier works in class A at the moment of the falling edge of the excitation signal, and the drain voltage does not generate overshoot at the moment of the closing of the microwave excitation signal.
As shown in fig. 4, the method specifically includes the following steps:
1 ] before time t 0:
the pulse signal generator does not generate a pulse trigger signal, and the grid voltage control circuit provides a B-class working point bias voltage V for the pulse power amplifiergb(ii) a The pulse power amplifier does not work;
time t 0:
the pulse signal generator provides a pulse trigger signal;
the rising edge of the trigger signal sent to the radio frequency signal source is delayed by a delay circuit;
the trigger signal triggers the drain voltage control circuit to provide drain bias voltage for the drain of the pulse power amplifier;
the grid voltage control circuit continuously provides the bias voltage V of the B-type working point for the pulse power amplifiergb；
3 ] between time t0 and time t 1:
the drain bias voltage of the pulse power amplifier is gradually increased from 0V to the required drain bias voltage;
the grid voltage control circuit continuously provides the bias voltage V of the B-type working point for the pulse power amplifiergb；
T1 time:
the drain bias voltage of the pulse power amplifier is stabilized to the required drain bias voltage;
the rising edge of the delayed trigger signal reaches a radio frequency signal source, and the radio frequency signal source starts to generate an excitation signal;
the grid voltage control circuit continuously provides the bias voltage V of the B-type working point for the pulse power amplifiergb；
5 ] between time t1 and time tc:
the pulse power amplifier works in a B class;
time tc:
the pulse trigger signal generated by the pulse signal generator reaches the falling edge;
the falling edge of the trigger signal sent to the radio frequency signal source is delayed by a delay circuit;
the falling edge of the trigger signal sent to the falling edge detection circuit generates a trigger signal through the falling edge detection circuit, and the grid voltage control circuit is triggered to start to adjust grid bias voltage;
7 ] time tc to time t 2:
the working state of the pulse power amplifier is gradually changed from class B to class A, and at the moment, the pulse power amplifier is in a class AB working state;
time t 2:
by varying the gate voltage settling time taugThen, the gate bias voltage is changed to a class A operating point bias voltage Vga；
Wherein:
in the formula, VtThe grid bias voltage is the grid bias voltage when the drain voltage is over-rushed and is reduced to be within a safety range; r is the parasitic resistance from the grid voltage control circuit to the grid electrode of the pulse power amplifier, and C is the parasitic capacitance of the grid voltage control circuit to the ground;
at this time, VgaVoltage holding time taugaFor varying the gate voltage settling time taugAnd drain bias voltage falling edge time taudfAnd (4) summing.
Time delay taugThe falling edge of the trigger signal with the duration reaches a radio frequency signal source, and the radio frequency signal source stops generating an excitation signal;
time delay taugThe falling edge of the trigger signal with the duration reaches a drain voltage control circuit, and the drain voltage control circuit stops providing drain bias voltage for the drain electrode of the pulse power amplifier;
stopping the pulse power amplifier;
t2 time to t3 time:
the pulse power amplifier works in A class;
the drain electrode bias voltage of the pulse power amplifier is gradually reduced to 0V;
time t 3:
the drain electrode bias voltage of the pulse power amplifier is reduced to 0V;
grid voltage control circuit restores to provide bias voltage V of class B operating point for pulse power amplifiergb。
As can be seen from fig. 5, the pulse signal generator provides pulse trigger signals to the rf signal source and the pulse power amplifier at the same time, the pulse trigger signals are used to trigger the rf signal source to generate the excitation signal and trigger the drain voltage control circuit of the pulse power amplifier to provide the drain with the bias voltage, and trigger the gate voltage control circuit to provide the gate with the correct bias voltage.
In order to realize that the power amplifier works in the class A at the moment when the microwave excitation signal is turned off, the turn-off time of the microwave excitation signal needs to be judged, the transmission delay of the microwave excitation signal is controlled, the size of the grid bias voltage is accurately controlled, and the grid bias voltage is ensured to be changed into the class A bias voltage at or before the time when the falling edge of the microwave excitation signal reaches the power amplifier. Therefore, the circuit comprises a rising edge detection circuit, a falling edge detection circuit, a first delay circuit and a second delay circuit besides the grid voltage control circuit and the leakage voltage control circuit, wherein the input ends of the rising edge detection circuit and the falling edge detection circuit are connected with the output end of the pulse signal generator.
The input ends of the rising edge detection circuit and the falling edge detection circuit are respectively connected with the output end of the pulse signal generator; the output end of the rising edge detection circuit is connected with the input end of the leakage voltage control circuit and the input end of the second delay circuit; the output end of the falling edge detection circuit is connected with the input end of the grid voltage control circuit, the input end of the first delay circuit and the input end of the second delay circuit; the output end of the first delay circuit is connected with the input end of the leakage voltage control circuit; the output end of the second delay circuit is connected with the input end of the radio frequency signal source; the output end of the radio frequency signal source is connected with the signal input end of the pulse power amplifier; the output ends of the grid voltage control circuit and the drain voltage control circuit are respectively connected with the grid electrode and the drain electrode of the pulse power amplifier;
the rising edge detection circuit is used for detecting the rising edge of a pulse signal sent by the pulse signal generator and outputting a trigger signal to the leakage voltage control circuit and the second delay circuit when the rising edge of the pulse signal arrives; the falling edge detection circuit is used for detecting the falling edge of a pulse signal sent by the pulse signal generator and outputting a trigger signal to the grid voltage control circuit, the first delay circuit and the second delay circuit when the falling edge of the pulse signal arrives; the grid voltage control circuit and the leakage voltage control circuit control the working type of the pulse power amplifier according to the pulse signal.
The specific work engineering of the above circuit is described in detail with reference to fig. 4:
t0before the moment, the pulse signal generator does not generate a pulse trigger signal, and the grid voltage control circuit makes the grid bias voltage be the B-type working point voltage V in the time of no trigger signalgb(ii) a At the moment, the pulse power amplifier does not work;
at t0At the moment, the rising edge detection circuit detects the rising edge of the pulse signal, a trigger signal is sent to the drain voltage control circuit, the drain voltage control circuit is triggered to provide drain bias voltage for the drain electrode of the pulse power amplifier, and at the moment, the grid voltage control circuit continues to provide bias voltage V of a B-class working point for the pulse power amplifiergb(ii) a The rising edge detection circuit simultaneously sends the signal to a second delay circuit, the second delay circuit delays the rising edge of the pulse signal sent to the radio frequency signal source, and the delay time is the time tau required for the drain electrode bias voltage of the pulse power amplifier to change from 0V to the required drain electrode bias voltagedr。
At t0Time to t1Between the moments, the drain bias voltage of the pulse power amplifier gradually rises from 0V to the required drain bias voltage;
the grid voltage control circuit continuously provides the bias voltage V of the B-type working point for the pulse power amplifiergb；
At time t 1:
the drain bias voltage of the pulse power amplifier is stabilized to the required drain bias voltage;
the rising edge of the delayed trigger signal reaches a radio frequency signal source, and the radio frequency signal source starts to generate an excitation signal; the grid voltage control circuit continuously provides the bias voltage V of the B-type working point for the pulse power amplifiergb；
Between time t1 and time tc:
the pulse power amplifier works in a B class;
time tc:
the falling edge detection circuit detects the falling edge of the pulse signal to generate a trigger signal, and the trigger grid voltage control circuit starts to adjust grid bias voltage; the falling edge detection circuit delays the falling edge of the pulse signal entering the radio frequency signal source through the second delay circuit at the same time, and the delay time is taugAnd delayed by tau through a first delay circuitgAfter the time, sending a trigger signal to the leakage voltage control circuit;
between time tc and time t 2:
the working state of the pulse power amplifier is gradually changed from class B to class A, and at the moment, the pulse power amplifier is in a class AB working state;
time t 2:
as shown in fig. 6, the gate voltage needs to be changed by changing the gate voltage settling time τ due to the influence of the input parasitic resistance R and the parasitic capacitance CgCan be changed into Vga，τgDetermined by R and C together:
wherein:
in the formula, VtThe gate bias voltage is generally V when the drain voltage overshoot falls within a safe ranget＝0.9Vga(ii) a R is the parasitic resistance from the grid voltage control circuit to the grid electrode of the pulse power amplifier, and C is the parasitic capacitance of the grid voltage control circuit to the ground; according to R, C, Vga、VgbThe change gate voltage stabilization time tau can be calculatedg。
At this time, VgaVoltage holding time taugaFor varying the gate voltage settling time taugAnd drain bias voltage falling edge time taudfAnd (4) summing.
Time delay taugThe falling edge of the trigger signal with the duration reaches a radio frequency signal source, and the radio frequency signal source stops generating an excitation signal;
time delay taugThe falling edge of the trigger signal with the duration reaches a drain voltage control circuit, and the drain voltage control circuit stops providing drain bias voltage for the drain electrode of the pulse power amplifier;
stopping the pulse power amplifier;
between time t2 and time t 3:
the pulse power amplifier works in A class;
the drain electrode bias voltage of the pulse power amplifier is gradually reduced to 0V;
time t 3:
the drain electrode bias voltage of the pulse power amplifier is reduced to 0V;
grid voltage control circuit restores to provide bias voltage V of class B operating point for pulse power amplifiergb。
As shown in FIG. 4, the settling time τ is changed due to the change of the gate voltagegAnd the time delay circuit, the falling edge of the pulse signal reaches the power amplifier at t2, and the gate bias voltage is changed into the A-type bias voltage, so that the generation of voltage overshoot can be inhibited. The grid voltage control circuit makes the grid bias voltage be B-type working point voltage V in the time of no trigger signalgbBiased at class A operating point voltage V under control of trigger signalga。VgaVoltage holding time taugaFor varying the gate voltage settling time taugAnd drain bias voltage falling edge time taudfThe sum of the two states, namely, the class A operation state is maintained between the falling edge of the microwave excitation signal and the falling edge of the drain bias voltage, and the class B operation state is recovered after the falling edge of the drain bias voltage is ended, for example, tau in fig. 4ga、τg、τdfThe relationship is shown. During the falling edge of the drain bias voltage, the drain current is slowly reduced without significant voltage overshoot.
It can be seen from fig. 4 that the class a drain voltage overshoot is small, the stability is high, but the efficiency is low. Class B is highly efficient, but the drain voltage overshoot is large and the stability is poor. The mixed pulse power amplifier provided by the invention enables the pulse power amplifier to work in different categories at different moments, and can simultaneously obtain the advantages of high efficiency and high stability.
The above embodiments have been described taking a power amplifier composed of a field effect transistor as an example, and are similarly applicable to a power amplifier composed of a bipolar transistor.
The invention has not been described in detail in part of the common general knowledge of those skilled in the art. The above examples and drawings are merely illustrative of the present invention and are not to be construed as limiting the scope of the present invention, and all methods similar or equivalent to the present invention are within the scope of the present invention.
Claims (6)
1. The method for improving the overshoot suppression efficiency of the power amplifier under the same pulse trigger signal is characterized by comprising the following steps of:
1 ] before time t 0:
the pulse signal generator does not generate a pulse trigger signal, and the control grid voltage control circuit provides a B-class working point bias voltage V for the pulse power amplifiergb(ii) a The pulse power amplifier does not work;
time t 0:
the pulse signal generator provides a pulse trigger signal;
the rising edge of the pulse trigger signal is delayed by a second delay circuit and sent to a radio frequency signal source;
the pulse trigger signal sent to the rising edge detection circuit generates a first trigger signal through the rising edge detection circuit, and triggers the drain voltage control circuit to provide drain bias voltage for the drain of the pulse power amplifier;
the grid voltage control circuit continuously provides the bias voltage V of the B-type working point for the pulse power amplifiergb；
3 ] between time t0 and time t 1:
the drain bias voltage of the pulse power amplifier is gradually increased from 0V to the required drain bias voltage;
the grid voltage control circuit continuously provides the bias voltage V of the B-type working point for the pulse power amplifiergb；
T1 time:
the drain bias voltage of the pulse power amplifier is stabilized to the required drain bias voltage;
the rising edge of the pulse trigger signal delayed by the second delay circuit reaches a radio frequency signal source, and the radio frequency signal source starts to generate an excitation signal;
the grid voltage control circuit continuously provides the bias voltage V of the B-type working point for the pulse power amplifiergb；
5 ] between time t1 and time tc:
the pulse power amplifier works in a B class;
time tc:
the pulse trigger signal generated by the pulse signal generator reaches the falling edge;
the falling edge of the pulse trigger signal is delayed by a second delay circuit and sent to a radio frequency signal source;
the falling edge of the pulse trigger signal sent to the falling edge detection circuit generates a second trigger signal through the falling edge detection circuit, and the grid voltage control circuit is triggered to start to adjust grid bias voltage;
7 ] time tc to time t 2:
the working state of the pulse power amplifier is gradually changed from class B to class A, and at the moment, the pulse power amplifier is in a class AB working state;
time t 2:
by varying the gate voltage settling time taugThen, the gate bias voltage is changed to a class A operating point bias voltage Vga；
Wherein:
in the formula, VtThe grid bias voltage is the grid bias voltage when the drain voltage is over-rushed and is reduced to be within a safety range; r is the parasitic resistance from the grid voltage control circuit to the grid electrode of the pulse power amplifier, and C is the parasitic capacitance of the grid voltage control circuit to the ground;
delayed by tau via a second delay circuitgThe falling edge of the pulse trigger signal with the duration reaches a radio frequency signal source, and the radio frequency signal source stops generating an excitation signal;
delayed by tau through a first delay circuitgThe falling edge of the pulse trigger signal reaches the leakage voltage control circuit, and the leakage voltage control circuit stopsStopping providing drain bias voltage for the drain of the pulse power amplifier;
stopping the pulse power amplifier;
t2 time to t3 time:
the pulse power amplifier is biased in a class A;
the drain electrode bias voltage of the pulse power amplifier is gradually reduced to 0V;
time t 3:
the drain electrode bias voltage of the pulse power amplifier is reduced to 0V;
grid voltage control circuit restores to provide bias voltage V of class B operating point for pulse power amplifiergb。
2. The method for improving the overshoot suppression efficiency of the power amplifier under the same pulse trigger signal according to claim 1, wherein:
in step 8, VgaVoltage holding time taugaFor varying the gate voltage settling time taugAnd drain bias voltage falling edge time taudfAnd (4) summing.
3. A circuit for implementing the method of claim 1, wherein: the device comprises a pulse signal generator, a radio frequency signal source and a control circuit;
the control circuit comprises a rising edge detection circuit, a falling edge detection circuit, a first delay circuit, a second delay circuit, a leakage voltage control circuit and a grid voltage control circuit;
the input ends of the rising edge detection circuit and the falling edge detection circuit are respectively connected with the output end of the pulse signal generator; the output end of the rising edge detection circuit is connected with the input end of the leakage voltage control circuit and the input end of the second delay circuit; the output end of the falling edge detection circuit is connected with the input end of the grid voltage control circuit, the input end of the first delay circuit and the input end of the second delay circuit; the output end of the first delay circuit is connected with the input end of the leakage voltage control circuit; the output end of the second delay circuit is connected with the input end of the radio frequency signal source; the output end of the radio frequency signal source is used for being connected with the signal input end of the pulse power amplifier; and the output ends of the grid voltage control circuit and the drain voltage control circuit are respectively used for being connected with the grid electrode and the drain electrode of the pulse power amplifier.
4. The circuit of claim 3, wherein: the delay time of the first delay circuit is taug(ii) a The time delay of the second time delay circuit for the rising edge of the pulse signal is the time tau required for the drain bias voltage of the pulse power amplifier to change from 0V to the required drain bias voltagedr(ii) a The time delay of the second time delay circuit to the falling edge of the pulse signal is taug。
5. A power amplifier comprises a pulse power amplifier and is characterized in that: the circuit of any of claims 3 or 4, further comprising an output of the radio frequency signal source connected to a signal input of the pulsed power amplifier; the output ends of the grid voltage control circuit and the drain voltage control circuit are respectively connected with the grid electrode and the drain electrode of the pulse power amplifier.
6. The power amplifier of claim 5, wherein: the pulse power amplifier is a power amplifier formed by a field effect transistor or a power amplifier formed by a bipolar transistor.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201910243505.3A CN109981080B (en) | 2019-03-28 | 2019-03-28 | Method and circuit for improving overshoot suppression efficiency of power amplifier under same pulse trigger signal and power amplifier |
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| CN201910243505.3A CN109981080B (en) | 2019-03-28 | 2019-03-28 | Method and circuit for improving overshoot suppression efficiency of power amplifier under same pulse trigger signal and power amplifier |
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| CN109981080B true CN109981080B (en) | 2020-08-14 |
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| CN117691957B (en) * | 2024-02-04 | 2024-04-26 | 成都明夷电子科技股份有限公司 | Radio frequency amplifier bias circuit with adjustable overshoot amplitude |
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| EP1184973B1 (en) * | 2000-08-29 | 2007-06-06 | STMicroelectronics S.r.l. | Power amplification equipment |
| CN102801392B (en) * | 2012-09-13 | 2015-03-11 | 电子科技大学 | Radio frequency power amplification device |
| US20150194936A1 (en) * | 2014-01-09 | 2015-07-09 | Qualcomm Incorporated | Power amplifier envelope tracking |
| CN208623642U (en) * | 2018-07-02 | 2019-03-19 | 南京正銮电子科技有限公司 | A kind of programmable pulse delay leakage pressure control circuit |
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