CN109981080B - Method, circuit and power amplifier for improving overshoot suppression efficiency of power amplifier under the same pulse trigger signal - Google Patents

Abstract

The invention belongs to the field of solid-state microwave power amplifiers, and specifically provides a method, circuit and power amplifier for improving the overshoot suppression efficiency of a power amplifier under the same pulse trigger signal, aiming at solving the problems of low stability or low efficiency of the power amplifier. The pulse power amplifier of the invention works in the high-efficiency class B in the front part of the microwave excitation signal, uses the falling edge detection circuit to detect the falling edge of the excitation signal of the power amplifier, and adjusts the gate bias through the gate voltage control circuit before the falling edge of the excitation signal arrives. Set the voltage, change the working category of the power amplifier, and adjust the gate bias voltage to class A, so that the power amplifier works in class A at the moment of the falling edge of the excitation signal, so that the drain voltage does not overshoot when the microwave excitation signal is turned off. The high stability of the class A pulse power amplifier and the high efficiency of the class B pulse power amplifier can be obtained at the same time.

Description

Method, circuit and method for improving overshoot suppression efficiency of power amplifier under the same pulse trigger signal Amplifier

technical field

The invention belongs to the field of solid-state microwave power amplifiers, and in particular relates to a method and circuit for suppressing overshoot and improving efficiency of a pulse power amplifier under the same pulse trigger signal.

Background technique

The microwave power amplifier is an important part of the microwave system, which can amplify the weak microwave signal to the required power level. It is generally located at the end of the transmitter. widely used. With the maturity of the third-generation semiconductor material GaN technology, the output power of the power amplifier has also increased significantly. At present, the output power of a single tube has exceeded 1kW. For example, the paper A kW-class AlGaN/GaN HEMT Pallet Amplifier for S-band High Power Application published by E.Mitani et al in 2007 (published in Proceedings of the 2nd European Microwave Integrated Circuits Conference), L.Haapala et al in 2016 The paper Kilowatt-level power amplifier in a single-ended architecture at 352MHz published in 2016 (published in ELECTRONICS LETTERS, Vol.52, No.18, 2016).

The microwave system of the pulse system is widely used. The pulse system radar, the transceiver time-sharing electronic countermeasure system and the burst communication system are all pulse systems, which requires the power amplifier circuit to work in the pulse mode. Taking a power amplifier composed of field effect transistors as an example, there are two types of pulse modulation: gate bias voltage modulation and drain bias voltage modulation. The article Performance enhancement of Pulsed Solid State PowerAmplifier using Drain Modulation over Gate Modulation by J.Dhar et al in 2009 and the article An X-Band 100W GaN HEMT Power Amplifier Using a Hybrid SwitchingMethod for Fast by Hyo-Jong Kim et al in 2017 In Pulse Switching (published in Progress In Electromagnetics ResearchB, Vol.78), it is pointed out that the use of drain bias voltage modulation can achieve higher efficiency, higher output power, higher gain, and better performance than gate bias voltage modulation. Fast rising edge, faster falling edge and flatter gain, so better performance can be obtained with drain bias voltage modulation.

In the method of drain bias modulation, in the microwave excitation pulse, the drain supply current is the power amplifier dynamic current I _d , outside the microwave excitation pulse, the drain supply current is the power amplifier quiescent current I _q , when the microwave excitation signal is turned off Instantaneously, due to the parasitic inductance L in the drain supply path, a drain voltage overshoot _Vs as shown in Figure 1 occurs:

In the formula, t _f is the falling edge time of the excitation signal.

In a microwave transmitter, the power amplifier is the main energy-consuming part, and it is also the area where the heat is most concentrated. The efficiency of the power amplifier circuit has an important impact on the design of the power supply system, the design of the heat dissipation system and the battery life of the system. The efficiency of the power amplifier circuit has become an important content to improve the circuit performance. In their 2016 article Recent Advances in kW-level Pulsed GaN Transistors with Very High Efficiency, James Custer et al. pointed out that high-efficiency class E, class F and other categories of kW-level power amplifiers cannot be realized, and only the traditional work of changing the conduction angle can be used. categories to improve efficiency. In the monograph RF Power Amplifiers for Wireless Communication Cripps, Steve C. Cripps calculates the relationship between the efficiency and output power of pulsed power amplifiers with different conduction angles, see Figure 2.

For the working categories with different conduction angles α, the dynamic DC current Id is:

The quiescent current I _q is:

The drain-relative voltage overshoot _Vs calculated from this is shown in Figure 3.

In the kW-class high-power amplifier, if a class A with a conduction angle of 360° is used, then I _d =I _q , the voltage overshoot V _s is 0, and the pulse power amplifier will not be damaged, and the stability is high, but the efficiency Only 50%; if a class B with a conduction angle of 180° is used, the efficiency is as high as 78.5%, but I _q = 0, so I _d >> I _q , there will be a voltage overshoot V _s of tens or even hundreds of volts , it is likely to break down the power amplifier and cause damage, which is extremely harmful.

SUMMARY OF THE INVENTION

The technical problem to be solved by the present invention is to provide a method for suppressing voltage overshoot and improving efficiency of a hybrid high-power solid-state pulse power amplifier under the same trigger signal, which aims to solve the problems of low stability or low efficiency of the power amplifier, and can simultaneously obtain The high stability of class A pulse power amplifier and the high efficiency of class B pulse power amplifier.

In order to achieve the above object, the technical scheme of the present invention is:

The method for suppressing voltage overshoot and improving efficiency of a power amplifier under the same pulse trigger signal includes the following steps:

1) Before time t0:

The pulse signal generator does not generate a pulse trigger signal, and the control gate voltage control circuit provides the pulse power amplifier with a class B working point bias voltage V _gb ; the pulse power amplifier does not work;

2] Time t0:

The pulse signal generator provides pulse trigger signal;

The rising edge of the pulse trigger signal is delayed by the delay circuit and sent to the radio frequency signal source;

The above-mentioned pulse trigger signal sent into the rising edge detection circuit generates a first trigger signal through the rising edge detection circuit, and triggers the leakage voltage control circuit to provide a drain bias voltage to the drain of the pulse power amplifier;

The gate voltage control circuit continues to provide the class B operating point bias voltage V _gb to the pulse power amplifier;

3) Between time t0 and time t1:

The pulse power amplifier drain bias voltage gradually rises from 0V to the desired drain bias voltage;

The gate voltage control circuit continues to provide the class B operating point bias voltage V _gb to the pulse power amplifier;

4) Time t1:

The pulse power amplifier drain bias voltage has stabilized to the desired drain bias voltage;

The rising edge of the pulse trigger signal delayed by the second delay circuit reaches the radio frequency signal source, and the radio frequency signal source starts to generate the excitation signal;

The gate voltage control circuit continues to provide the class B operating point bias voltage V _gb to the pulse power amplifier;

5) Between time t1 and time tc:

The pulse power amplifier works in class B;

6] tc time:

The pulse trigger signal generated by the pulse signal generator reaches the falling edge;

The falling edge of the pulse trigger signal is delayed by the second delay circuit and sent to the radio frequency signal source;

The falling edge of the pulse trigger signal sent to the falling edge detection circuit generates a second trigger signal through the falling edge detection circuit, which triggers the gate voltage control circuit to start adjusting the gate bias voltage;

7) Between time tc and time t2:

The working state of the pulse power amplifier gradually changes from class B to class A, and it is in the working state of class AB at this time;

8] Time t2:

After changing the gate voltage stabilization time τ _g , the gate bias voltage changes to the class A operating point bias voltage V _ga ;

in:

In the formula, V _t is the gate bias voltage when the overshoot of the drain voltage drops to a safe range; R is the parasitic resistance from the gate voltage control circuit to the gate of the pulse power amplifier, and C is the parasitic resistance of the gate voltage control circuit to the ground. capacitance;

The falling edge of the pulse trigger signal delayed by τ _g by the second delay circuit reaches the radio frequency signal source, and the radio frequency signal source stops generating the excitation signal;

The falling edge of the pulse trigger signal delayed by the first delay circuit for τ _g reaches the leakage voltage control circuit, and the leakage voltage control circuit stops providing the drain bias voltage to the drain of the pulse power amplifier;

The pulse power amplifier stops working;

9] Between time t2 and time t3:

The pulse power amplifier works in class A;

The drain bias voltage of the pulsed power amplifier gradually drops to 0V;

10] Time t3:

The drain bias voltage of the pulsed power amplifier drops to 0V;

The gate voltage control circuit resumes providing the class B working point bias voltage V _gb to the pulse power amplifier.

The pulse power amplifier of the invention works in the high-efficiency class B in the front part of the microwave excitation signal, uses the falling edge detection circuit to detect the falling edge of the excitation signal of the power amplifier, and adjusts the gate bias through the gate voltage control circuit before the falling edge of the excitation signal arrives. Set the voltage, change the working category of the power amplifier, and adjust the gate bias voltage to class A, so that the power amplifier works in class A at the moment of the falling edge of the excitation signal, so that the drain voltage does not overshoot when the microwave excitation signal is turned off.

Further, in step 8], the V _ga voltage holding time τ _ga is the sum of the change gate voltage stabilization time τ _g and the drain bias voltage falling edge time τ _df .

The present invention also provides a circuit for realizing the above method, which is special in that it includes a pulse signal generator, a radio frequency signal source and a control circuit;

The above control circuit includes a rising edge detection circuit, a falling edge detection circuit, a first delay circuit, a second delay circuit, a leakage voltage control circuit and a gate voltage control circuit;

The input ends of the rising edge detection circuit and the falling edge detection circuit are respectively connected with the output end of the pulse signal generator; the output end of the rising edge detection circuit is connected with the input end of the leakage voltage control circuit and the input end of the second delay circuit; The output end of the edge detection circuit is connected with the input end of the gate voltage control circuit, the input end of the first delay circuit and the input end of the second delay circuit; the output end of the first delay circuit is connected with the input end of the leakage voltage control circuit; The output end of the second delay circuit is connected with the input end of the radio frequency signal source; the output end of the radio frequency signal source is connected with the signal input end of the pulse power amplifier; the output ends of the grid voltage control circuit and the drain voltage control circuit are respectively connected with the pulse power amplifier grid pole and drain connection;

The above-mentioned rising edge detection circuit is used to detect the rising edge of the pulse signal sent by the pulse signal generator, and when the rising edge of the pulse signal arrives, it outputs a trigger signal to the leakage voltage control circuit and the second delay circuit; the above-mentioned falling edge detection circuit is used to detect The pulse signal generator sends out the falling edge of the pulse signal, and when the falling edge of the pulse signal arrives, it outputs a trigger signal to the gate voltage control circuit, the first delay circuit and the second delay circuit; the gate voltage control circuit and the drain voltage control circuit The circuit controls the working category of the pulse power amplifier according to the pulse signal.

Further, the delay time of the above-mentioned first delay circuit is τ _g ; the delay time of the above-mentioned second delay circuit to the rising edge of the pulse signal is that the pulse power amplifier drain bias voltage changes from 0V to the required drain bias. The time required to set the voltage is τ _dr ; the delay time of the second delay circuit to the falling edge of the pulse signal is τ _g .

The present invention also provides a hybrid power amplifier, including a pulse power amplifier, which is special in that it also includes the above circuit, the output end of the radio frequency signal source is connected with the signal input end of the pulse power amplifier; the gate voltage control circuit and the drain voltage The output end of the control circuit is respectively connected with the gate and the drain of the pulse power amplifier.

Further, the above-mentioned pulse power amplifier is a power amplifier composed of field effect transistors or a power amplifier composed of bipolar transistors.

The beneficial effects of the present invention are:

(1) With the method and circuit proposed in the present invention, the voltage overshoot of the high-power pulse power amplifier can be suppressed, the breakdown of the pulse power amplifier can be avoided, and the stability of the pulse power amplifier can be improved.

(2) Through the method and circuit proposed in the present invention, the hybrid class pulse power amplifier can obtain a theoretical high efficiency of 78.5%, which can theoretically achieve a maximum efficiency improvement of 28.5% compared with the currently commonly used class A pulse power amplifier.

(3) When the bias voltage of the hybrid pulse power amplifier proposed in the present invention is switched, since the output powers of class A and class B are basically the same, the efficiency and stability can be improved and the output microwave waveform can be kept flat.

Description of drawings

The features and advantages of the present invention may be more clearly understood by reference to the accompanying drawings, which are schematic and should not be construed as limiting the invention in any way, in which:

Figure 1 is a schematic diagram of the microwave excitation signal and the drain bias voltage waveform of the pulsed power amplifier;

Figure 2 shows the relationship between the output power, efficiency and conduction angle of a conventional power amplifier;

Figure 3 shows the relationship between the relative voltage overshoot of the drain of a conventional power amplifier and the conduction angle;

4 is a schematic diagram of the electrical characteristics of the hybrid class and traditional class A and class B pulse power amplifiers of the embodiment;

FIG. 5 is a schematic diagram of a circuit system of a hybrid pulse power amplifier according to an embodiment;

FIG. 6 is an equivalent circuit diagram of the gate charge and discharge of the pulse power amplifier.

Detailed ways

The invention provides a method for suppressing voltage overshoot and improving efficiency of a hybrid high-power solid-state pulse power amplifier under the same trigger signal, which can suppress the voltage overshoot of the high-power pulse power amplifier and obtain high efficiency at the same time.

Example 1

The pulse power amplifier of the invention works in the high-efficiency class B in the front part of the microwave excitation signal, adjusts the gate bias voltage through the gate voltage control circuit before the falling edge of the excitation signal arrives, changes the working category of the power amplifier, and biases the gate The voltage is adjusted to class A, so that the power amplifier works in class A at the moment of the falling edge of the excitation signal, so that the drain voltage does not generate overshoot when the microwave excitation signal is turned off.

As shown in Figure 4, it specifically includes the following steps:

1) Before time t0:

The pulse signal generator does not generate a pulse trigger signal, and the gate voltage control circuit provides the pulse power amplifier with a class B operating point bias voltage V _gb ; the pulse power amplifier does not work;

2] Time t0:

The pulse signal generator provides pulse trigger signal;

The rising edge of the trigger signal sent into the RF signal source is delayed by the delay circuit;

The trigger signal triggers the drain voltage control circuit to provide a drain bias voltage to the drain of the pulse power amplifier;

The gate voltage control circuit continues to provide the class B operating point bias voltage V _gb to the pulse power amplifier;

3) Between time t0 and time t1:

The pulse power amplifier drain bias voltage gradually rises from 0V to the desired drain bias voltage;

The gate voltage control circuit continues to provide the class B operating point bias voltage V _gb to the pulse power amplifier;

4) Time t1:

The pulse power amplifier drain bias voltage has stabilized to the desired drain bias voltage;

The rising edge of the delayed trigger signal reaches the RF signal source, and the RF signal source starts to generate the excitation signal;

The gate voltage control circuit continues to provide the class B operating point bias voltage V _gb to the pulse power amplifier;

5) Between time t1 and time tc:

The pulse power amplifier works in class B;

6] tc time:

The pulse trigger signal generated by the pulse signal generator reaches the falling edge;

The falling edge of the trigger signal sent into the RF signal source is delayed by the delay circuit;

The falling edge of the trigger signal sent to the falling edge detection circuit generates a trigger signal through the falling edge detection circuit, and triggers the gate voltage control circuit to start adjusting the gate bias voltage;

7) Between time tc and time t2:

The working state of the pulse power amplifier gradually changes from class B to class A, and it is in the working state of class AB at this time;

8] Time t2:

After changing the gate voltage stabilization time τ _g , the gate bias voltage changes to the class A operating point bias voltage V _ga ;

in:

In the formula, V _t is the gate bias voltage when the overshoot of the drain voltage drops to a safe range; R is the parasitic resistance from the gate voltage control circuit to the gate of the pulse power amplifier, and C is the parasitic resistance of the gate voltage control circuit to the ground. capacitance;

At this time, the V _ga voltage holding time τ _ga is the sum of the change gate voltage stabilization time τ _g and the drain bias voltage falling edge time τ _df .

The falling edge of the trigger signal with a delay of τ _g reaches the RF signal source, and the RF signal source stops generating the excitation signal;

The falling edge of the trigger signal with a delay of τ _g reaches the leakage voltage control circuit, and the leakage voltage control circuit stops providing the drain bias voltage to the drain of the pulse power amplifier;

The pulse power amplifier stops working;

9] Between time t2 and time t3:

The pulse power amplifier works in class A;

The drain bias voltage of the pulsed power amplifier gradually drops to 0V;

10] Time t3:

The drain bias voltage of the pulsed power amplifier drops to 0V;

The gate voltage control circuit resumes providing the class B working point bias voltage V _gb to the pulse power amplifier.

It can be seen from Figure 5 that the pulse signal generator provides a pulse trigger signal to the RF signal source and the pulse power amplifier at the same time, the pulse trigger signal is used to trigger the RF signal source to generate an excitation signal, and trigger the leakage voltage control circuit of the pulse power amplifier to the drain Provide the bias voltage, trigger the gate voltage control circuit to provide the correct bias voltage to the gate.

In order to realize that the power amplifier works in class A when the microwave excitation signal is turned off, it is necessary to judge the time when the microwave excitation signal is turned off, control the transmission delay of the microwave excitation signal, and accurately control the magnitude of the gate bias voltage to ensure that the microwave excitation signal arrives at the falling edge of the microwave excitation signal. The gate bias voltage has changed to the class A bias voltage at or before the time of the power amplifier. Therefore, in addition to the gate voltage control circuit and the drain voltage control circuit, the circuit also includes a rising edge detection circuit, a falling edge detection circuit, a first delay circuit and a second delay circuit. The input of the rising edge detection circuit and the falling edge detection circuit The terminals are all connected with the output terminal of the pulse signal generator.

The input terminals of the rising edge detection circuit and the falling edge detection circuit are respectively connected with the output terminal of the pulse signal generator; the output terminal of the rising edge detection circuit is connected with the input terminal of the leakage voltage control circuit and the input terminal of the second delay circuit; The output end of the detection circuit is connected with the input end of the gate voltage control circuit, the input end of the first delay circuit and the input end of the second delay circuit; the output end of the first delay circuit is connected with the input end of the leakage voltage control circuit; The output end of the two delay circuit is connected with the input end of the radio frequency signal source; the output end of the radio frequency signal source is connected with the signal input end of the pulse power amplifier; the output end of the gate voltage control circuit and the drain voltage control circuit are respectively connected with the gate of the pulse power amplifier and drain connection;

The rising edge detection circuit is used to detect the rising edge of the pulse signal sent by the pulse signal generator, and when the rising edge of the pulse signal arrives, it outputs a trigger signal to the leakage voltage control circuit and the second delay circuit; the falling edge detection circuit is used to detect the pulse signal The generator sends a falling edge of the pulse signal, and when the falling edge of the pulse signal arrives, it outputs a trigger signal to the gate voltage control circuit, the first delay circuit and the second delay circuit; the gate voltage control circuit and the drain voltage control circuit are based on the pulse signal. Controls the class of operation of the pulsed power amplifier.

With reference to Figure 4, the specific working engineering of the above circuit is described in detail:

Before time _t0 , the pulse signal generator does not generate a pulse trigger signal, and the gate voltage control circuit makes the gate bias voltage be the class B operating point voltage V _gb when there is no trigger signal; at this time, the pulse power amplifier does not work;

At time t ₀ , the rising edge detection circuit detects the rising edge of the pulse signal, sends a trigger signal to the drain voltage control circuit, and triggers the drain voltage control circuit to provide a drain bias voltage to the drain of the pulse power amplifier. At this time, the gate voltage control circuit continues A class B operating point bias voltage V _gb is provided to the pulse power amplifier; the rising edge detection circuit simultaneously sends the signal to the second delay circuit, and the second delay circuit delays the rising edge of the pulse signal sent to the radio frequency signal source, The delay time is the time τ _dr required for the pulse power amplifier drain bias voltage to change from 0V to the desired drain bias voltage.

Between time t ₀ and time t ₁ , the pulse power amplifier drain bias voltage gradually rises from 0V to the required drain bias voltage;

The gate voltage control circuit continues to provide the class B operating point bias voltage V _gb to the pulse power amplifier;

At time t1:

The pulse power amplifier drain bias voltage has stabilized to the desired drain bias voltage;

The rising edge of the delayed trigger signal reaches the radio frequency signal source, and the radio frequency signal source starts to generate the excitation signal; the gate voltage control circuit continues to provide the pulse power amplifier with a class B operating point bias voltage V _gb ;

Between time t1 and time tc:

The pulse power amplifier works in class B;

tc moment:

The falling edge detection circuit detects the falling edge of the pulse signal, generates a trigger signal, and triggers the gate voltage control circuit to start adjusting the gate bias voltage; the falling edge detection circuit simultaneously processes the falling edge of the pulse signal entering the RF signal source through the second delay circuit. Delay, the delay time is τ _g , and after the first delay circuit delays τ _g time, a trigger signal is sent to the leakage voltage control circuit;

Between time tc and time t2:

The working state of the pulse power amplifier gradually changes from class B to class A, and it is in the working state of class AB at this time;

Time t2:

As shown in Figure 6, due to the influence of the input parasitic resistance R and the parasitic capacitance C, the gate voltage needs to be changed to V _ga after changing the gate voltage stabilization time τ _g , and τ _g is jointly determined by R and C:

in:

In the formula, V _t is the gate bias voltage when the drain voltage overshoot drops to a safe range, generally V _t = 0.9V _ga ; R is the parasitic resistance from the gate voltage control circuit to the gate of the pulse power amplifier, C is the parasitic capacitance of the gate voltage control circuit to the ground; according to R, C, V _ga , V _gb , the stable time τ _g of the gate voltage can be calculated.

At this time, the V _ga voltage holding time τ _ga is the sum of the change gate voltage stabilization time τ _g and the drain bias voltage falling edge time τ _df .

The falling edge of the trigger signal with a delay of τ _g reaches the RF signal source, and the RF signal source stops generating the excitation signal;

The falling edge of the trigger signal with a delay of τ _g reaches the leakage voltage control circuit, and the leakage voltage control circuit stops providing the drain bias voltage to the drain of the pulse power amplifier;

The pulse power amplifier stops working;

Between time t2 and time t3:

The pulse power amplifier works in class A;

The drain bias voltage of the pulsed power amplifier gradually drops to 0V;

Time t3:

The drain bias voltage of the pulsed power amplifier drops to 0V;

The gate voltage control circuit resumes providing the class B working point bias voltage V _gb to the pulse power amplifier.

As shown in Figure 4, due to the combined action of changing the gate voltage stabilization time τ _g and the delay circuit, the falling edge of the pulse signal reaches the power amplifier at t2. At this time, the gate bias voltage has become a class A bias voltage, which can be suppressed Generation of voltage overshoot. The gate voltage control circuit makes the gate bias voltage be the B-type operating point voltage V _gb when there is no trigger signal, and is biased to the A-type operating point voltage V _ga under the control of the trigger signal. The V _ga voltage holding time τ _ga is the sum of the gate voltage stabilization time τ _g and the drain bias voltage falling edge time τ _df , that is, the class A operation is maintained between the falling edge of the microwave excitation signal and the falling edge of the drain bias voltage. state, after the falling edge of the drain bias voltage, it returns to the B-type working state, as shown in the relationship between τ _ga , τ _g , and τ _df in Figure 4 . During the falling edge of the drain bias voltage, the drain current decreases slowly without significant voltage overshoot.

It can be seen from Figure 4 that the class A drain voltage overshoot is small and the stability is high, but the efficiency is low. Class B has high efficiency, but large drain voltage overshoot and poor stability. The hybrid pulse power amplifier proposed by the invention makes the pulse power amplifier work in different categories at different times, and can simultaneously obtain the advantages of high efficiency and high stability.

The above embodiments take the power amplifier composed of field effect transistors as an example, and are also applicable to the power amplifier composed of bipolar transistors.

The parts of the present invention that are not described in detail belong to the common knowledge of those skilled in the art. The above examples and accompanying drawings are only examples of the present invention, and do not constitute a limitation on the protection scope of the present invention. All methods identical or similar to the present invention belong to the protection scope of the present invention.

Claims (6)

1. A method for improving power amplifier overshoot suppression efficiency under the same pulse trigger signal, characterized in that it comprises the following steps: 1) Before time t0: The pulse signal generator does not generate a pulse trigger signal, and the control gate voltage control circuit provides the pulse power amplifier with a class B working point bias voltage V _gb ; the pulse power amplifier does not work; 2] Time t0: The pulse signal generator provides pulse trigger signal; The rising edge of the pulse trigger signal is delayed by the second delay circuit and sent to the radio frequency signal source; The above-mentioned pulse trigger signal sent into the rising edge detection circuit generates a first trigger signal through the rising edge detection circuit, and triggers the leakage voltage control circuit to provide a drain bias voltage to the drain of the pulse power amplifier; The gate voltage control circuit continues to provide the class B operating point bias voltage V _gb to the pulse power amplifier; 3) Between time t0 and time t1: The pulse power amplifier drain bias voltage gradually rises from 0V to the desired drain bias voltage; The gate voltage control circuit continues to provide the class B operating point bias voltage V _gb to the pulse power amplifier; 4) Time t1: The pulse power amplifier drain bias voltage has stabilized to the desired drain bias voltage; The rising edge of the pulse trigger signal delayed by the second delay circuit reaches the radio frequency signal source, and the radio frequency signal source starts to generate the excitation signal; The gate voltage control circuit continues to provide the class B operating point bias voltage V _gb to the pulse power amplifier; 5) Between time t1 and time tc: The pulse power amplifier works in class B; 6] tc time: The pulse trigger signal generated by the pulse signal generator reaches the falling edge; The falling edge of the pulse trigger signal is delayed by the second delay circuit and sent to the radio frequency signal source; The falling edge of the pulse trigger signal sent into the falling edge detection circuit generates a second trigger signal through the falling edge detection circuit, which triggers the gate voltage control circuit to start adjusting the gate bias voltage; 7) Between time tc and time t2: The working state of the pulse power amplifier gradually changes from class B to class A, and it is in class AB working state at this time; 8] Time t2: After changing the gate voltage stabilization time τ _g , the gate bias voltage changes to the class A operating point bias voltage V _ga ; in:

In the formula, V _t is the gate bias voltage when the overshoot of the drain voltage drops to a safe range; R is the parasitic resistance from the gate voltage control circuit to the gate of the pulse power amplifier, and C is the parasitic resistance of the gate voltage control circuit to the ground. capacitance; The falling edge of the pulse trigger signal delayed by τ _g by the second delay circuit reaches the radio frequency signal source, and the radio frequency signal source stops generating the excitation signal; The falling edge of the pulse trigger signal delayed by the first delay circuit for τ _g reaches the leakage voltage control circuit, and the leakage voltage control circuit stops providing the drain bias voltage to the drain of the pulse power amplifier; The pulse power amplifier stops working; 9] Between time t2 and time t3: The pulsed power amplifier is biased in class A; The drain bias voltage of the pulsed power amplifier gradually drops to 0V; 10] Time t3: The drain bias voltage of the pulsed power amplifier drops to 0V; The gate voltage control circuit resumes providing the class B working point bias voltage V _gb to the pulse power amplifier. 2. the method for improving power amplifier overshoot suppression efficiency under the same pulse trigger signal according to claim 1, is characterized in that: In step 8], the V _ga voltage holding time τ _ga is the sum of the change gate voltage stabilization time τ _g and the drain bias voltage falling edge time τ _df . 3. A circuit for realizing the method of claim 1, characterized in that: comprising a pulse signal generator, a radio frequency signal source and a control circuit; The control circuit includes a rising edge detection circuit, a falling edge detection circuit, a first delay circuit, a second delay circuit, a leakage voltage control circuit and a gate voltage control circuit; The input ends of the rising edge detection circuit and the falling edge detection circuit are respectively connected with the output end of the pulse signal generator; the output end of the rising edge detection circuit is connected with the input end of the leakage voltage control circuit and the input end of the second delay circuit; The output end of the falling edge detection circuit is connected with the input end of the gate voltage control circuit, the input end of the first delay circuit and the input end of the second delay circuit; the output end of the first delay circuit is connected with the input end of the drain voltage control circuit The output end of the second delay circuit is connected with the input end of the radio frequency signal source; the output end of the radio frequency signal source is used for connecting with the signal input end of the pulse power amplifier; the output ends of the gate voltage control circuit and the drain voltage control circuit are respectively used for Connected to the gate and drain of the pulse power amplifier. 4. circuit according to claim 3, is characterized in that: the delay time of described first delay circuit is τ _g ; The delay time of described second delay circuit to pulse signal rising edge is pulse power amplifier The time required for the drain bias voltage to change from 0V to the required drain bias voltage is τ _dr ; the delay time of the second delay circuit for the falling edge of the pulse signal is τ _g . 5. A power amplifier comprising a pulse power amplifier, characterized in that: also comprising the circuit described in any one of claims 3 or 4, the output end of the radio frequency signal source is connected with the signal input end of the pulse power amplifier; the grid voltage control circuit and The output end of the drain voltage control circuit is respectively connected with the gate and the drain of the pulse power amplifier. 6 . The power amplifier according to claim 5 , wherein the pulse power amplifier is a power amplifier composed of field effect transistors or a power amplifier composed of bipolar transistors. 7 .

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