CN109980947A - DCDC primary side feedback voltage detecting initialization circuit and its method - Google Patents
DCDC primary side feedback voltage detecting initialization circuit and its method Download PDFInfo
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- 238000000034 method Methods 0.000 title claims abstract description 9
- 230000000087 stabilizing effect Effects 0.000 claims abstract description 34
- 238000004804 winding Methods 0.000 claims description 37
- 239000004065 semiconductor Substances 0.000 claims description 30
- 238000005070 sampling Methods 0.000 claims description 29
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- 230000003321 amplification Effects 0.000 claims description 9
- 238000003199 nucleic acid amplification method Methods 0.000 claims description 9
- 238000001514 detection method Methods 0.000 abstract description 10
- 230000003071 parasitic effect Effects 0.000 abstract description 6
- 238000005516 engineering process Methods 0.000 description 5
- 230000005347 demagnetization Effects 0.000 description 4
- 238000010586 diagram Methods 0.000 description 3
- 239000003990 capacitor Substances 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
- 238000002955 isolation Methods 0.000 description 2
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- OFCNXPDARWKPPY-UHFFFAOYSA-N allopurinol Chemical compound OC1=NC=NC2=C1C=NN2 OFCNXPDARWKPPY-UHFFFAOYSA-N 0.000 description 1
- 238000004364 calculation method Methods 0.000 description 1
- 230000007423 decrease Effects 0.000 description 1
- 230000007547 defect Effects 0.000 description 1
- 230000003111 delayed effect Effects 0.000 description 1
- 238000002513 implantation Methods 0.000 description 1
- 230000024241 parasitism Effects 0.000 description 1
- 230000006641 stabilisation Effects 0.000 description 1
- 230000009466 transformation Effects 0.000 description 1
Classifications
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R19/00—Arrangements for measuring currents or voltages or for indicating presence or sign thereof
- G01R19/0084—Arrangements for measuring currents or voltages or for indicating presence or sign thereof measuring voltage only
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/50—Testing of electric apparatus, lines, cables or components for short-circuits, continuity, leakage current or incorrect line connections
- G01R31/62—Testing of transformers
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M3/00—Conversion of dc power input into dc power output
- H02M3/22—Conversion of dc power input into dc power output with intermediate conversion into ac
- H02M3/24—Conversion of dc power input into dc power output with intermediate conversion into ac by static converters
- H02M3/28—Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac
- H02M3/325—Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac using devices of a triode or a transistor type requiring continuous application of a control signal
- H02M3/335—Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac using devices of a triode or a transistor type requiring continuous application of a control signal using semiconductor devices only
Abstract
The present invention provides a kind of detection initialization circuit of DCDC primary side feedback voltage, comprising: pressure stabilizing reference current generating circuit, sample rate current generation circuit, build-out resistor are to, duty ratio modulation circuit and power switch NMO.A kind of detection setting method of DCDC primary side feedback voltage is also provided.Not only avoid zero load caused by parasitic capacitance float high, poor anti jamming capability the problem of, also there is no influence switch power source output voltage precision.
Description
Technical field
The invention belongs to the reverse exciting switching voltage regulator technical field of DCDC primary side feedback more particularly to a kind of DCDC primary side feedbacks
The detection initialization circuit and its method of voltage.
Background technique
The basic principle of primary side feedback technology is to utilize the voltage between each winding of degaussing phase flyback transformer
Proportional characteristic, so as to detect the voltage value of another winding by the voltage of one winding of detection.Institute
The secondary side electricity of isolation can be perceived as long as the demagnetization voltage of detection primary side winding for the reverse exciting switching voltage regulator of isolated form
The size of pressure controls the duty ratio of power switch tube using PMW modulation system to achieve the purpose that stabilize the output voltage.
As shown in Figure 1, in degaussing phase, the voltage difference and auxiliary winding N at transformer main winding both endsAVoltage be all with
Voltage on vice-side winding is proportional, and due to the absolute voltage of main winding, i.e. common-mode voltage is very high, it is difficult to detection winding both ends
Pressure difference.So passing through detection auxiliary winding NAOn voltage perceive the voltage on vice-side winding, also can to control chip
Electricity is taken from auxiliary winding, general winding powers on pressure and is designed relatively high, more than the working range of control chip detection pin, so
Electric resistance partial pressure is needed to sample.However, having had more and more integrated with the further depth development of semicon industry
The BCD semiconductor technology of LDMOS power device and other high tension apparatus carries out difference for designing under high common mode input
The device pressure resistance of sampling arrived that 100V is even higher, and the voltage difference of sampling transformer main winding may be implemented to perceive output
The size of voltage can also design high pressure LDO and realize chip self-powered, then auxiliary winding can be removed, simplify transformer
Design reduces volume and save the cost.
As shown in Fig. 2, detection transformer main winding carrys out the primary side feedback reverse exciting switching voltage regulator of sampling and outputting voltage, N:1 is
The turn ratio of transformer main winding and vice-side winding, VOS are the voltage at vice-side winding both ends, resistance RREFOn voltage VREFReason
Think waveform as shown in figure 3, degaussing phase waveform have one decline small slope, be by output electric current output diode electricity
The voltage generated in resistance and other dead resistances causes, with the reduction of erasing current, the voltage generated on this quasi-resistance
It is gradually reduced.So the voltage frequently referred at the inflection point that terminates of demagnetization is defeated to perceive at the end of being typically chosen sampling soon demagnetization
Voltage out, because electric current close to zero can neglect the influence of diode resistance and dead resistance at this time, vice-side winding at this time
Both end voltage VOS and VRFEBetween relationship be:
Under the normal running conditions of power supply, the voltage V that samplesREFDifferential amplification is carried out with reference voltage 1V, is generated
The duty ratio of the pulse width signal control power tube switch of PWM modulation, eventually VREFStabilization in 1V, to finally make VOS
Stablize:
Output voltage VOUTA diode drop is differed only by between VOS, is more accurate fixed value, so VOS is steady
It is fixed, VOUTAlso it stabilizes.
As can be seen that passing through setting resistance RFBAnd RREFSize can be with the size of configuration switch electric power output voltage, still
It is this in resistance RREFIn extremely light load, there are biggish defects to be sampled for the upper degaussing waveform for generating winding: first, because
For in pin RREFPlace always has parasitic capacitance presence, especially sometimes for the stability for increasing anti-interference ability or loop, herein
Locate shunt capacitance, there is RC delay, easily cause waveform in high frequency and be distorted, especially under extremely light load when demagnetization
Between it is very short in the case where, leading to the waveform eventually detected not is the ideal waveform of real reflection output voltage, and actual samples arrive
Voltage it is lower than ideal, then the output voltage of Switching Power Supply is caused to float height；Second, sample required power consumption and signal
Anti-interference be not easy to compromise, if RREFIt is designed smaller, there is RC to be delayed small, strong antijamming capability good characteristic,
But this obviously will increase the design difficulty of sample power consumption and difference sample circuit, if RREFIt is designed larger, power consumption
It is small, but RC delay is big, anti-interference ability is deteriorated.
In order to solve the above technical problems, a chip LT8303 of Linear Tech's design, as shown in figure 4, it is resistance RREF
Portion in the chip is designed, because portion's parasitic capacitance is very small in the chip, also very little is interfered, even if there is interference to be also regarded as common mode
Signal and substantially curbed, preferably solve the problems, such as above.But this mode causes the change of output voltage precision again
The problem of difference, because being difficult to control the implantation concentration of ion and be difficult to the precision of resistance to do accurately, precision in integrated circuits
Generally other than ± 15%, this precision for directly resulting in output voltage is deteriorated.It is of course also possible to be trimmed by electricity or laser trimming
Mode resistance is modified, but deposited within ± 1% required for precision is adapted in the resistance other than ± 15%
The technical issues of be that trim cost excessively high.
Summary of the invention
In order to which some aspects of the embodiment to disclosure have a basic understanding, simple summary is shown below.It should
Summarized section is not extensive overview, nor to determine key/critical component or describe the protection scope of these embodiments.
Its sole purpose is that some concepts are presented with simple form, in this, as the preamble of following detailed description.
The present invention adopts the following technical scheme:
In some alternative embodiments, a kind of DCDC primary side feedback voltage detecting initialization circuit is provided, comprising:
Pressure stabilizing reference current generating circuit, for the reference voltage based on chip interior, in the external reference current of chip
Generate resistance RIBUpper generation reference current source, then go out proportional reference current by current mirror mirror；
Sample rate current generation circuit, for the output voltage sampling resistor R external in chipFBUpper generation reflects Switching Power Supply
The sample rate current of output voltage size；
Build-out resistor pair, the build-out resistor is to including: resistance RBAnd resistance RS, the resistance RBWith the pressure stabilizing benchmark
The output end of current generating circuit connects, the resistance RSIt is connect with the output end of the sample rate current generation circuit；
Duty ratio modulation circuit, for obtaining resistance RBAnd resistance RSOn voltage, error amplification is carried out, and according to switch
Electric power output voltage modulation duty cycle.
In some alternative embodiments, the pressure stabilizing reference current generating circuit includes: amplifier AMP, N-channel MOS
Pipe NM1 and the first current mirror；
The output end of the amplifier AMP is connect with the grid of the N-channel MOS pipe NM1, and the amplifier AMP's is anti-
It connect to input terminal with the source electrode of the N-channel MOS pipe NM1 and is connect with the RIB pin of chip, chip interior reference voltage is made
For the positive input voltage of the amplifier AMP, the drain electrode of the N-channel MOS pipe NM1 and the input section of first current mirror
The output node of point connection, first current mirror exports the reference current；
The RIB pin of chip connects the reference current and generates resistance RIBTo ground.
In some alternative embodiments, the sample rate current generation circuit includes: the P-channel for forming the second current mirror
Metal-oxide-semiconductor PM1 and P-channel metal-oxide-semiconductor PM2；
The source electrode and chip V of the P-channel metal-oxide-semiconductor PM1INPin is connected, the source electrode and chip R of P-channel metal-oxide-semiconductor PM2FB
Pin connection, the grid of the P-channel metal-oxide-semiconductor PM1 are connect with the grid of the P-channel metal-oxide-semiconductor PM2, the P-channel metal-oxide-semiconductor
The drain electrode of PM2 exports the sample rate current；
Chip VINPin meets the input voltage VIN of Switching Power Supply, chip RFBPin passes through the output voltage sampling resistor
RFBIt is connect afterwards with the output port of chip power pipe drain lead DRN and transformer main winding.
In some alternative embodiments, the resistance RBFirst electricity of one end and the pressure stabilizing reference current generating circuit
Flow the output node connection of mirror, other end ground connection；The resistance RSThe P-channel of one end and the sample rate current generation circuit
The drain electrode of metal-oxide-semiconductor PM2 connects, other end ground connection.
In some alternative embodiments, the DCDC primary side feedback voltage detecting initialization circuit, further includes: power is opened
Close NMO；
The duty ratio modulation circuit includes: error amplifier and duty cycle control module；The duty cycle control module
Input terminal connect with the output end of the error amplifier, the output end of the duty cycle control module and power switch NMO
Grid connection；The output port of the pressure stabilizing reference current generating circuit and the noninverting input of the error amplifier connect
It connects；The output port of the sample rate current generation circuit is connect with the reverse input end of the error amplifier；The power is opened
The drain electrode for closing NMO is connect with chip DRN pin.
In some alternative embodiments, the input port of transformer main winding connect the input voltage VIN of Switching Power Supply with
And input capacitance CINAnode, transformer secondary winding and output rectifier diode DOUTWith output capacitance COUTConstitute secondary side output
Rectification circuit forms reverse exciting switching voltage regulator topological structure.
In some alternative embodiments, a kind of DCDC primary side feedback voltage detecting setting method is provided, comprising:
Reference voltage of the pressure stabilizing reference current generating circuit based on chip interior generates electricity in the external reference current of chip
Hinder RIBUpper generation reference current source, then go out proportional reference current by current mirror mirror, the reference current is in the chip
The resistance R of the build-out resistor centering in portionBUpper generation pressure stabilizing reference voltage；；
The sample rate current generation circuit output voltage sampling resistor R external in chipFBUpper generation reflection Switching Power Supply output
The sample rate current of voltage swing, the resistance R of the sample rate current build-out resistor centering in portion in the chipSUpper acquisition sampling resistor electricity
Pressure；
Duty ratio modulation circuit obtains resistance RBAnd resistance RSOn voltage, carry out error amplification, and it is defeated according to Switching Power Supply
Voltage modulated duty ratio out；
Adjust output voltage sampling resistor RFBAnd reference current generates resistance RIBConfiguration switch electric power output voltage it is big
It is small.
Brought by of the invention the utility model has the advantages that sample rate current and reference current that reflected voltage generates in build-out resistor to upper
Generate voltage after carry out error amplification, be equal to sample rate current compared with reference current, and with the precision of resistance and temperature system
Number is unrelated, it is only necessary to which the resistance of appropriately designed build-out resistor pair is no more than the work of error amplifier so as to generated voltage
Make range, as long as therefore obtain the reference current of degree of precision and can be achieved with the switch power source output voltage of corresponding precision, do not deposit
The problem of influencing switch power source output voltage precision；Simultaneously as build-out resistor has parasitism to the resistance for being chip interior
The small advantage of capacitor, and erasing time very light in load, very waveform was not susceptible to distort in short-term, drew so as to avoid parasitic capacitance
The zero load risen float high, poor anti jamming capability the problem of, even if the quiescent bias current after stablizing is set to smaller, be also not easy to lead
Cause sample waveform disturbed；Sample rate is fast, is unlikely to deform, and switch power source output voltage is effectively avoided to deviate the stationary value of setting
The technical issues of.
Detailed description of the invention
Fig. 1 is the application principle figure of prior art ACDC isolation type switch power；
Fig. 2 is answering for the primary side feedback reverse exciting switching voltage regulator that prior art detection transformer main winding carrys out sampling and outputting voltage
Use schematic diagram；
Fig. 3 is resistance R in Fig. 2REFIn the voltage waveform of degaussing phase；
Fig. 4 is the simple application drawing of prior art chip LT8303；
Fig. 5 is the functional block diagram of DCDC primary side feedback voltage detecting initialization circuit of the present invention；
Fig. 6 is the circuit diagram of DCDC primary side feedback voltage detecting initialization circuit of the present invention.
Specific embodiment
It solves the problems, such as, illustrates below by specific embodiment, so as to preferably for a better understanding of the present invention
Understand the contents of the present invention.However, some design parameters design being directed to, such as the proportionality coefficient of current mirror, resistance
Proportionality coefficient etc., merely to more intuitively understanding not as the restriction to the content of present invention.
As shown in figure 5, in some illustrative embodiments, providing a kind of DCDC primary side feedback voltage detecting setting electricity
Road, comprising: pressure stabilizing reference current generating circuit, sample rate current generation circuit, build-out resistor are to, duty ratio modulation circuit and power
Switch NMO.
Pressure stabilizing reference current generating circuit, for the reference voltage VREF based on chip interior, in the external benchmark of chip
Electric current generates and generates reference current source on resistance RIB, then goes out proportional reference current by current mirror mirror.
Pressure stabilizing reference current generating circuit include input port 101, that reference current generates port 102, reference current is defeated
Exit port 103, input port 101 are connected with chip interior reference voltage VREF, and reference current generates port 102 and chip RIB
Pin connection, the first input port 104 and duty ratio modulation circuit of reference current output port 103 and build-out resistor pair
Pressure stabilizing reference voltage input port 110 is connected, 103 outputting reference electric current of reference current output port.
Sample rate current generation circuit, for generating reflection switch electricity on the external output voltage sampling resistor RFB of chip
The sample rate current of source output voltage size.
Sample rate current generation circuit includes input voltage port 108, the clamped port 107 of reflected voltage, sample rate current output
Port 106, input voltage port 108 are connect with chip VIN pin, and the clamped port 107 of reflected voltage and the RFB pin of chip connect
It connects, sample rate current output port 106 and the second input port 105 of build-out resistor pair and the electricity of duty ratio modulation circuit sampling
Input port 109 is pressed to connect, sample rate current output port 106 exports sample rate current.
Duty ratio modulation circuit carries out error amplification, and according to switch for obtaining the voltage on resistance RB and resistance RS
Electric power output voltage modulation duty cycle.
Duty ratio modulation circuit, comprising: voltage input port 109, pressure stabilizing reference voltage input port 110, output port
111, output port 111 is connect with the grid of power switch NMO, and the drain electrode of power switch NMO is drawn with chip DRN respectively with source electrode
Foot is connected with chip GND pin.
The RIB pin of chip connects the reference current and generates resistance RIBTo ground, chip VINPin connects the defeated of Switching Power Supply
Enter voltage VIN, chip RFBPin passes through output voltage sampling resistor RFBAfterwards with chip power pipe drain lead DRN and transformation
The output port of device main winding connects.The input port of transformer main winding connects the input voltage VIN and input of Switching Power Supply
Capacitor CINAnode, transformer secondary winding and output rectifier diode DOUTWith output capacitance COUTIt constitutes secondary side and exports rectified current
Road forms reverse exciting switching voltage regulator topological structure.
As shown in fig. 6, pressure stabilizing reference current generating circuit 201 includes: amplifier AMP, N-channel MOS pipe NM1 and the first electricity
Flow mirror.
The output end of amplifier AMP is connect with the grid of N-channel MOS pipe NM1, the reverse input end and N ditch of amplifier AMP
The source electrode of road metal-oxide-semiconductor NM1 is connected and is connect with the RIB pin of chip, chip interior reference voltage VREFAs amplifier AMP's
The drain electrode of positive input voltage, N-channel MOS pipe NM1 is connect with the input node of the first current mirror, the output of the first current mirror
Node outputting reference electric current.
Amplifier AMP and N-channel MOS pipe NM1 forms unity gain amplifier, the reference voltage V of chip interiorREFAs
Unity gain amplifier input voltage, thus by VREFIt copies to external reference current and generates resistance RIBOn, generate bias current
Source IRIB, bias current sources IRIBThe reference current I being proportional to is generated by the first current mirror againREF.The benchmark of chip interior
Voltage VREF and operational amplifier AMP generates resistance R in the external reference current of chipIBIt is upper to generate accurate reference current source,
Go out proportional reference current by the first current mirror mirror againIREF, and the electric current produces on the reference resistance in portion in the chip
Raw pressure stabilizing reference voltage, the reference resistance of chip interior refer to build-out resistor to the resistance R in 203B。
Sample rate current generation circuit 202 includes: P-channel metal-oxide-semiconductor PM1 and P-channel metal-oxide-semiconductor PM2, P-channel metal-oxide-semiconductor PM1 and P
Channel MOS tube PM2 forms the second current mirror.
PM1 is diode connection type, and with IBAs bias current, the source electrode and chip V of P-channel metal-oxide-semiconductor PM1INDraw
Foot is connected, the source electrode and chip R of P-channel metal-oxide-semiconductor PM2FBPin connection, the grid and P-channel metal-oxide-semiconductor PM2 of P-channel metal-oxide-semiconductor PM1
Grid connection, the drain electrode of P-channel metal-oxide-semiconductor PM2 exports sample rate current ISamp, and sample rate current ISampPortion is adopted in the chip
On sample resistance obtain sampling resistor voltage, the sampling resistor of chip interior refer to build-out resistor to 203 resistance RS。
The external reference current of chip mentioned hereinbefore generates resistance RIBElectricity is sampled with the external output voltage of chip
Hinder RFBRefer to that resistance is connected to outside chip pin, rather than the semiconductor technology device of design chips circuit, they are can
To obtain high-precision resistance value.
Build-out resistor includes: resistance R to 203BAnd resistance RS.Resistance RBWith the output end of pressure stabilizing reference current generating circuit
Connection, i.e. resistance RBIt is connect with the reference current output port 103 of pressure stabilizing reference current generating circuit 201.Resistance RSWith sampling electricity
Flow the output end connection of generation circuit, i.e. resistance RSConnect with the sample rate current output port 106 of sample rate current generation circuit 202
It connects.Specifically, resistance RBOne end is connect with the output node of the first current mirror of pressure stabilizing reference current generating circuit 201, separately
One end ground connection；Resistance RSOne end is connect with the drain electrode of the P-channel metal-oxide-semiconductor PM2 of sample rate current generation circuit 202, other end ground connection.
Resistance RBAnd resistance RSAmplify with the duty ratio of control switch power supply the output voltage stabilization for realizing power supply by error.
Build-out resistor is to the resistance R in 203BAnd resistance RSRefer to and designs same class in semiconductor technology used in the chip
The resistance of type, and matched on domain so that their characteristic is almost the same.Resistance RBIncude pressure stabilizing reference current
The reference current I that generation circuit 201 generatesREF, resistance RSIncude the sample rate current I that sample rate current generation circuit 202 generatesSamp。
Duty ratio modulation circuit 204 includes: error amplifier EA and duty cycle control module, and duty cycle control module is adjustable
Duty ratio processed, this is that Switching Power Supply controls due function, does not pluck repeat here.The input terminal and error of duty cycle control module
The output end of amplifier EA connects, and the output end of duty cycle control module is connect with the grid of power switch NMO；Pressure stabilizing benchmark electricity
The output port of stream generation circuit is connect with the noninverting input of error amplifier EA；The output port of sample rate current generation circuit
It is connect with the reverse input end of error amplifier EA；The drain electrode of power switch NMO is connect with chip DRN pin.
The working principle of technical solution of the present invention is:
The reference voltage V of chip interiorREFThe voltage follower being made up of amplifier, has copied to chip for reference voltage
On pin RIB, produce by reference voltage VREFResistance R is generated with reference currentIBThe current source of decision, the electric current can by than
It replicates and generates pressure stabilizing reference current in example ground；
Sample rate current generation circuit by the voltage clamping of chip pin RFB in voltage identical with VIN, so needing logical
Cross the external output voltage sampling resistor R of chipFBElectric current sponge, the electric current of inspiration is again from its sample rate current output port
106 outflows, generate sample rate current ISamp, sample rate current ISampThe size for reflecting switch power source output voltage, because of chip pin
RFB by clamped in voltage identical with VIN, then being added in output voltage sampling resistor R in degaussing phaseFBThe voltage at both ends is equal to
The voltage of the voltage of transformer main winding, its size and transformer secondary winding is at turn ratio relationship.
Resistance R of the pressure stabilizing reference current in build-out resistor pairBUpper generation pressure stabilizing reference voltage, due to chip interior resistance essence
Degree is poor and temperature coefficient is also big, so it is highly inaccurate；Meanwhile sample rate current ISampIn the resistance R of build-out resistor pairSOn
Sampled voltage is generated, similarly, it is also highly inaccurate, but due to the resistance R of build-out resistor pairBWith resistance RSIt is same
Same type of resistance in semiconductor technology, and domain matches, resistance RBWith resistance RSResistance value deviation and temperature system
Number cancels each other out, and has no effect on the precision of switch power source output voltage.
In some illustrative embodiments, a kind of DCDC primary side feedback voltage detecting setting method is provided, comprising:
Reference voltage V of the pressure stabilizing reference current generating circuit based on chip interiorREF, produced in the external reference current of chip
Raw resistance RIBUpper generation reference current source, then go out proportional reference current I by current mirror mirrorREF, reference current IREF?
The resistance R of the build-out resistor centering of chip interiorBUpper generation pressure stabilizing reference voltage；；
The sample rate current generation circuit output voltage sampling resistor R external in chipFBUpper generation reflection Switching Power Supply output
The sample rate current I of voltage swingSamp, sample rate current ISampThe resistance R of the build-out resistor centering in portion in the chipSIt is upper to be sampled
Resistive voltage；
Duty ratio modulation circuit obtains resistance RBAnd resistance RSOn voltage, carry out error amplification, and it is defeated according to Switching Power Supply
Voltage modulated duty ratio out；
Adjust output voltage sampling resistor RFBAnd reference current generates resistance RIBConfiguration switch electric power output voltage it is big
It is small.
Why be able to achieve the purpose of the present invention by above method, principle is: integrated circuit can design very accurate
Reference voltage, then it is to be relatively easy to that it generates more accurate reference current with external precise resistances jointly, even if precision
It is not met by design requirement, also can further improve precision by simply trimming.Reflected voltage generate induced current with
Reference current IREFError amplification is carried out after generating voltage on the same type of resistance at precise proportions, is equal to sampling electricity
Flow ISampWith reference current IREFComparison, and it is unrelated with the precision of resistance and temperature coefficient, as long as the resistance value of appropriately designed resistance
So that generated voltage is no more than the working range of error amplifier.In this case, as long as obtaining the benchmark electricity of degree of precision
Stream can be achieved with the switch power source output voltage of corresponding precision, and it is to be easy acquisition that the precision of reference current has illustrated in front
's.Simultaneously as resistance RSWith RBIt is the resistance of chip interior, the small, voltage signal above it with required parasitic capacitance
The characteristics of being not easily disturbed effectively avoids switch power source output voltage from deviateing setting so that sample rate is fast, is unlikely to deform
Stationary value.
For convenience of calculation, it is assumed that the current mirror proportionality coefficient in pressure stabilizing reference current generating circuit is 1:1, build-out resistor
To RB: RS=k, the reference current size of pressure stabilizing reference current generating circuit output are as follows:
According to the principle of Switching Power Supply, the input voltage of error amplifier EA is approximately equivalent after loop stability, i.e.,
Resistance RBWith RSOn voltage it is equal, it may be assumed that
Isamp*RS=IREF*RB；
To have:
As it can be seen that after Switching Power Supply loop stability, sample rate current ISampIt is only related with the proportionality coefficient of resistance RB and RS,
It is unrelated with the absolute value of its resistance, therefore, RBAnd RSThe deviation and temperature coefficient of resistance have no effect on the sampling electricity after stablizing
Stream, so that the output voltage of Switching Power Supply will not be influenced, because of sample rate current ISampDirectly reflect switch power source output voltage
, this reaction relation can be calculated by following.Because chip pin RFB by clamped in voltage identical with VIN, that
Degaussing phase is added in resistance RFBOn voltage be equal to transformer main winding on reflected voltage VOR, so:
VOR=ISamp*RFB；
Voltage V on transformer main windingORWith secondary voltage VOSAt turn ratio relationship, Switching Power Supply finally can be obtained
Output voltage:
Wherein N is transformer main winding NPWith vice-side winding NSTurn ratio, VBEIt is the pressure drop of output diode.It can see
Out, the output voltage V of Switching Power SupplyOUTNot by internal sample resistance RSInfluence, pass through and adjust external resistance RFBAnd RIBAll may be used
The size of output voltage is set, and the size of output voltage is related to their proportionality coefficient.Proportionality coefficient k, N, reference voltage
VREF, external resistance RFBAnd RIB, diode drop VBEAll be it is more accurate, it is hereby achieved that the due output of primary side feedback
Voltage accuracy, not by sampling resistor RSInfluence.Simultaneously as resistance RSPortion in the chip, parasitic capacitance is small, load very
Light and erasing time, very waveform was not susceptible to distort in short-term, and sampling is accurately floatd height without will lead to switch power source output voltage；I.e.
It is set to the quiescent bias current after stablizing smaller, it is disturbed also to not easily lead to sample waveform.
It should also be appreciated by one skilled in the art that various illustrative logical boxs, mould in conjunction with the embodiments herein description
Electronic hardware, computer software or combinations thereof may be implemented into block, circuit and algorithm steps.In order to clearly demonstrate hardware and
Interchangeability between software surrounds its function to various illustrative components, frame, module, circuit and step above and carries out
It is generally described.Hardware is implemented as this function and is also implemented as software, depends on specific application and to entire
The design constraint that system is applied.Those skilled in the art can be directed to each specific application, be realized in a manner of flexible
Described function, still, this realization decision should not be construed as a departure from the scope of protection of this disclosure.
Claims (7)
1.DCDC primary side feedback voltage detecting initialization circuit characterized by comprising
Pressure stabilizing reference current generating circuit is generated for the reference voltage based on chip interior in the external reference current of chip
Resistance RIBUpper generation reference current source, then go out proportional reference current by current mirror mirror；
Sample rate current generation circuit, for the output voltage sampling resistor R external in chipFBUpper generation reflection Switching Power Supply output
The sample rate current of voltage swing；
Build-out resistor pair, the build-out resistor is to including: resistance RBAnd resistance RS, the resistance RBWith the pressure stabilizing reference current
The output end of generation circuit connects, the resistance RSIt is connect with the output end of the sample rate current generation circuit；
Duty ratio modulation circuit, for obtaining resistance RBAnd resistance RSOn voltage, error amplification is carried out, and according to Switching Power Supply
Output voltage modulation duty cycle.
2. DCDC primary side feedback voltage detecting initialization circuit according to claim 1, which is characterized in that
The pressure stabilizing reference current generating circuit includes: amplifier AMP, N-channel MOS pipe NM1 and the first current mirror；
The output end of the amplifier AMP is connect with the grid of the N-channel MOS pipe NM1, and the amplifier AMP's is reversed defeated
Enter end to connect with the source electrode of the N-channel MOS pipe NM1 and connect with the RIB pin of chip, chip interior reference voltage is as institute
The positive input voltage of amplifier AMP is stated, the drain electrode of the N-channel MOS pipe NM1 connects with the input node of first current mirror
It connects, the output node of first current mirror exports the reference current；
The RIB pin of chip connects the reference current and generates resistance RIBTo ground.
3. DCDC primary side feedback voltage detecting initialization circuit according to claim 2, which is characterized in that
The sample rate current generation circuit includes: the P-channel metal-oxide-semiconductor PM1 and P-channel metal-oxide-semiconductor PM2 for forming the second current mirror；
The source electrode and chip V of the P-channel metal-oxide-semiconductor PM1INPin is connected, the source electrode and chip R of P-channel metal-oxide-semiconductor PM2FBPin connects
It connects, the grid of the P-channel metal-oxide-semiconductor PM1 is connect with the grid of the P-channel metal-oxide-semiconductor PM2, the leakage of the P-channel metal-oxide-semiconductor PM2
Pole exports the sample rate current；
Chip VINPin meets the input voltage VIN of Switching Power Supply, chip RFBPin passes through the output voltage sampling resistor RFBAfterwards
It is connect with the output port of chip power pipe drain lead DRN and transformer main winding.
4. DCDC primary side feedback voltage detecting initialization circuit according to claim 3, which is characterized in that the resistance RBOne
End is connect with the output node of the first current mirror of the pressure stabilizing reference current generating circuit, other end ground connection；The resistance
RSOne end is connect with the drain electrode of the P-channel metal-oxide-semiconductor PM2 of the sample rate current generation circuit, other end ground connection.
5. DCDC primary side feedback voltage detecting initialization circuit according to claim 4, which is characterized in that further include: power
Switch NMO；
The duty ratio modulation circuit includes: error amplifier and duty cycle control module；The duty cycle control module it is defeated
Enter end to connect with the output end of the error amplifier, the output end of the duty cycle control module and the grid of power switch NMO
Pole connection；The output port of the pressure stabilizing reference current generating circuit is connect with the noninverting input of the error amplifier；Institute
The output port for stating sample rate current generation circuit is connect with the reverse input end of the error amplifier；The power switch NMO
Drain electrode connect with chip DRN pin.
6. DCDC primary side feedback voltage detecting initialization circuit according to claim 5, which is characterized in that transformer main winding
Input port connect the input voltage VIN and input capacitance C of Switching Power SupplyINAnode, transformer secondary winding and output it is whole
Flow diode DOUTWith output capacitance COUTSecondary side output rectification circuit is constituted, reverse exciting switching voltage regulator topological structure is formed.
7.DCDC primary side feedback voltage detecting setting method characterized by comprising
Reference voltage of the pressure stabilizing reference current generating circuit based on chip interior generates resistance R in the external reference current of chipIB
Upper generation reference current source, then go out proportional reference current by current mirror mirror, reference current portion in the chip
The resistance R of build-out resistor centeringBUpper generation pressure stabilizing reference voltage；；
The sample rate current generation circuit output voltage sampling resistor R external in chipFBUpper generation reflects switch power source output voltage
The sample rate current of size, the resistance R of the sample rate current build-out resistor centering in portion in the chipSUpper acquisition sampling resistor voltage；
Duty ratio modulation circuit obtains resistance RBAnd resistance RSOn voltage, carry out error amplification, and according to Switching Power Supply export electricity
Press modulation duty cycle；
Adjust output voltage sampling resistor RFBAnd reference current generates resistance RIBThe size of configuration switch electric power output voltage.
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