CN109934021A - The layout method of the switching capacity PUF circuit of anti-probe detection - Google Patents
The layout method of the switching capacity PUF circuit of anti-probe detection Download PDFInfo
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
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- Y02D—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
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- Y02D30/70—Reducing energy consumption in communication networks in wireless communication networks
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Abstract
The present invention discloses a kind of layout method of the switching capacity PUF circuit of anti-probe detection, the capacitor that switching capacity PUF is sampled only with by constitute capacitive protective layer upper layer metal, lower metal and between the parasitic capacitance that constitutes of insulating layer, do not include fixed capacity；Then the output voltage difference of switching capacity is amplified using Simulation scale-up/comparator of the input and output without feedback network, obtains final output code key.Simultaneously; no longer using the sensitizing range of the longer wire screen protection chip of length; but use multiple shorter metal wires or the lesser metal block of area as the pole plate of switching capacity PUF sampling capacitance; and cover sensitizing range; by the area for reducing sampling capacitance; to prevent destruction+reconstruction of same layer and different layers+detection attack simultaneously, increase the probe detectivity of metal capacitive protective layer.
Description
Technical field
The present invention relates to safety chip code key generative circuit and safety protection circuit, specially switching capacity PUF code key is raw
Layout method is detected at circuit and the anti-probe based on the circuit, belongs to hardware information security technology area.
Background technique
In face of the information security threats got worse, safety chip using more and more extensive, from traditional bank and electricity
Believe industry, arrives mobile payment, E-Passport, electronic ID card, anti counterfeit appts, smart grid and intellectual property protection etc., all
It must guarantee the safety of data using safety chip, safety has become the basic and mandatory attribute an of electronic product.It is existing
The present, the attack means of hacker are not limited to the software attacks such as virus, wooden horse already, but use aggressive stronger, protection hardly possible
Spend the key information that higher intrusive attack pattern directly steals user.So-called intrusive attack, refers to and passes through reverse engineering
Directly observe chip in key, or using probe and combine laser ablation, focused ion beam (Focused Ion Beam,
The key in violent means direct detection chip such as FIB), it is aggressive strong, caused by lose it is also very big.
In order to avoid being directly opposite engineering attack, most efficient method is using physics unclonable function
(Physically Unclonable Function, PUF) provides key, and PUF detection is structure in integrated circuit production process
At the random variation of the physical characteristics of materials of circuit devcie, even chip maker is also impossible to answer using identical circuit
Identical key is produced, it is even more impossible to release key by the way that layout analysis is counter by attacker.Though PUF technology can prevent from being directly opposite
Engineering attack, but detection can not be prevented to attack, attacker can use probe direct detection chip interior sensitive part electric signal；
If sensitive information is in chip bottom, attacker can also be using destruction+detection attack, first removal top layer layout, then again
Internal sensitive signal is detected with microprobe；In addition, if top layer protective layer has electric signal characteristic, in the cloth for destroying top layer protective layer
After office, in order to keep the electric signal connection status for being destroyed circuit, need carrying out signal wire reconstruction elsewhere.Rebuild+broken
The signal wire that bad+detection attack will be exactly destroyed using FIB is reconnected in other position, with the correct of holding circuit
Connection status, then with probe destroyed regionally detecting chip interior sensitive information.It can be seen that above-mentioned direct detection, break
The attacking ability of three kinds of bad+detection, destruction+reconstruction+detection etc. the attack patterns using probe detection is very strong, protects difficulty
It is very big.
Above-mentioned detection attack, existing research mainly protect sensitizing range using capacitive protective layer in order to prevent, and
The capacitive characteristics of protective layer are connected with key.For example, Chinese invention patent " one kind is anti-to crack PUF structure " (patent No.
CN 104052604B) it proposes a kind of anti-based on switching capacity PUF and cracks structure, as shown in Fig. 1.Due to switching capacity
What PUF was sampled is the technique random deviation of capacitance ratio, and the upper bottom crown of institute's sampling capacitance leads to chip top-layer and time top layer
Metal, if external probe detection top layer perhaps secondary top-level metallic when the sampling capacitance that is connected of top layer or secondary top-level metallic hold
Value will also change, so that the capacitance ratio that switching capacity PUF is sampled also changes, and then change switching capacity
The output code key of PUF.When external damage, which is attacked, to be occurred, the key generation circuit or detection circuit being connected with protective layer are detected
The variation of protective layer circuit characteristic, and then change output key, so that the key of probe detection mistake.It is to be noted that
There is following four in the patent of invention:
(1) firstly, the capacitor of switching capacity PUF sampling is made of fixed capacity and parasitic capacitance two parts, it is used to pair
The parasitic capacitance that the wire screen that external detection attack is detected is constituted is a part of sampling capacitance, this will reduce outer
The sensitivity of portion's detection attack；
(2) secondly, it all uses the signal metal line and ground wire for being connected to sampling capacitance pole plate in top layer and secondary top layer
Mix coiling, purpose is exactly to allow signal metal line and ground wire tight distribution, increases the difficulty of external probe detection: due to signal gold
Belong to the spacing very little between line and ground wire, their short circuits will be made if big probe detection；For destruction+Rebuilding Attack, if
Same layer is operated, and the space also very little of operation can only be operated between metal wire and ground wire, as shown in Fig. 2,
Under certain 0.18 micrometre CMOS process, the space that same layer is rebuild only has 0.36 micron, and difficulty greatly increases.This kind of signal metal line
It can be effectively prevent big probe detection and same damage layer+reconstruction+detection attack with the layout type of ground wire mixing wiring, but still
So there is serious risk: as shown in Fig. 3, present FIB universal mode is will to lead in passivation layer metal signal below
It crosses FIB to guide to outside passivation layer, then is reconnected in passivation layer, in this case, with regard to the lesser problem in operating space is not present
, top layer and time top-level metallic simply can be respectively led into passivation layer very and reconnected, leaked out and be in bottom by attacker
The signal of interest line of layer, and detected with probe.For this attack, foregoing invention patent is almost without any protection energy
Power；
(3) again, although the capacitor top crown for being connected to fixed current potential is only led to top-level metallic by the patent, and it is sensitive
Signal N, P are then in time top-level metallic, and top-level metallic seems to be not in sensitive signal when code key generates.But it needs
It is noted that as shown in Fig. 4, switching capacity PUF is using the comparator of latch formula to the sensitive information point N, P
It is compared, when enable signal EN becomes for 1 moment, N, P two o'clock voltage are first the voltage after charge redistribution, but at once
The comparator of Latch formula, which can amplify N, P two o'clock, to be compared, and N, P sensitive signal is rapidly made to be enlarged into reality output
Rail-to-rail " 0/1 " digital code key, it can be seen that N, P two o'clock will rapidly become " 0/1 " from DC level, namely experience one
A fast-pulse variation.And due to capacitor stored charge cannot mutate namely capacitor have high-frequency coupling effect, N,
The quick variation of P two o'clock voltage also will couple to the capacitor top crown metallic signal lines for being connected to top-level metallic, if external attack
Person detects top-level metallic with probe, pulse whether can occurs by the detected metal wire of observation to judge corresponding N, P most
Whole voltage value (namely final code key value): if there is negative pulse or burr, corresponding to N or P is 0, if otherwise there is positive arteries and veins
Perhaps then corresponding N or P is 1 to burr for punching.Simultaneously, it should be pointed out that after probe is connected to top-level metallic, be equivalent to upper
The parasitic capacitance that an indirect probe on pole plate and ground introduces, but what is connected due to top crown is fixed current potential, it can't be right
The mismatch sampling of original capacitance impacts namely this kind occurs just or negative burr or pulse by observation top-level metallic
Attack pattern will not affect that original code key, and attack is got up highly effective；
(4) in addition, the patent of invention is protected using the capacitive wire screen connecting with switching capacity PUF institute sampling capacitance
Protecting other needs sensitizing range to be protected, if sensitizing range is larger, actual capacitive wire screen is also very long, this will significantly
Reduce the sensitivity of the capacitive metal protection layer.If external attacker cuts the wire screen in very small range
It is disconnected to destroy, and the passivation layer of top is led to, it is rebuild, then wire screen is real for entire wire screen
The capacitance variation on border will be very small, it is more likely that lower than the ability that comparator can be differentiated, is finally equivalent to external probe not
Under the premise of destroying capacitive protective layer, other sensitive informations below protective layer can be detected, to substantially reduce capacitive
The anti-detectivity of metal protection layer.
It in summary it can be seen, existing based on the capacitive metal protection layer of switching capacity PUF, there are external probe detections to attack
Detection sensitivity is low, still has the problems such as serious protection defect, in order to have the capacitive metal protection layer based on switching capacity PUF
There is real anti-detection attacking ability, firstly, the capacitor sampled should not introduce fixed capacity, but should be all using appearance
Property metal constitute parasitic capacitance；Secondly, without signal wire and ground wire mixing coiling, and wire screen does not answer cabling mistake
It is long, it should be laid out using the multiple metal blocks or metal wire shorter compared with small area or length；Finally, and mostly important
, the amplifier that N, P two o'clock are compared and enlarged absolutely cannot be using the latch formula amplifier of input and output coupling, N, P two
The voltage of point cannot mutate.
Summary of the invention
The present invention is directed to background technique described problem, proposes a kind of cloth of the switching capacity PUF circuit of anti-probe detection
Office method, the capacitor that switching capacity PUF is sampled only with by constitute capacitive protective layer upper layer metal, lower metal and between
Insulating layer constitute parasitic capacitance, do not include fixed capacity；Then Simulation scale-up/ratio of the input and output without feedback network is used
It is amplified compared with output voltage difference of the device to switching capacity, obtains final output code key.Meanwhile it is no longer longer using length
Wire screen protects the sensitizing range of chip, but uses multiple shorter metal wires or the lesser metal block of area as switch
The pole plate of capacitor PUF sampling capacitance, and cover sensitizing range, by reducing the area of sampling capacitance, with prevent simultaneously same layer and
Destruction+reconstruction of different layers+detection attack, increases the probe detectivity of metal capacitive protective layer.
In order to achieve the above object, the present invention uses following scheme:
The layout method of the switching capacity PUF circuit of anti-probe detection, comprising: the capacitor that switching capacity PUF is sampled is only
Using by constitute capacitive protective layer upper layer metal, lower metal and between the parasitic capacitance that constitutes of insulating layer, do not include solid
Determine capacitor；Then using Simulation scale-up/comparator of the input and output without feedback network to the output voltage difference of switching capacity into
Row amplification, obtains final output code key, it is characterised in that:
The double layer of metal for constituting bottom crown on switching capacity PUF sampling capacitance can be arbitrary neighborhood double layer of metal, can also
To be the non-conterminous metal without other metal routings between each other, but this double layer of metal area is identical and completely overlapped；
The insulating layer for constituting switching capacity PUF sampling capacitance dielectric layer can be in CMOS technology between adjacent metal
General insulating layer is also possible to the high-k insulating layer of metal-insulating layer-metal capacitor part in CMOS technology.
Further, each sampling metal capacitance area of switching capacity PUF is a few square microns, and electric with multiple metals
Hold the sensitizing range in array covering chip, increases the sensitivity of anti-probe detection；
For the metal capacitance capacitance of the switching capacity PUF sampling in fF rank, can be length is several microns to more than ten micro-
The linear structure of rice is also possible to the block structure that area is several square microns.
Further, the comparator compared is amplified by analog comparator for the output voltage difference to switching capacity
It constitutes, there is no output code keys to the feedback network for inputting sensitive signal point, and external attacker is avoided to pass through the connection of detection upper layer
Metal wire to fixed current potential obtains output code key value.
The beneficial effects of the present invention are:
Under the premise of guaranteeing to realize switching capacity PUF code key generation circuit function, institute's sampling capacitance only includes the present invention
The parasitic capacitance that capacitive metal protection layer is constituted, does not include fixed capacity, increases the inspection sensitivity of external probe detection.Together
The multiple metal short-terms of Shi Caiyong or the lesser metal block of area cover sensitizing range, to avoid using the lower length of sensitivity
Wire screen can further promote the detection sensitivity of external probe detection.In addition, avoiding defeated using the input of latch formula
Coupling amplifier out, and Simulation scale-up/comparator is used, key information caused by capacitive coupling can be effectively prevent to reveal, mentioned
Rise safety.
Detailed description of the invention
Fig. 1 is to crack structure based on the anti-of switching capacity PUF with reference to a kind of of patent of invention proposition；
Fig. 2 is to be used to prevent same damage layer+reconstruction+detection attack layout structure schematic diagram with reference to patent of invention；
Fig. 3 is different damage layer+reconstructions+detection Adversary Structures schematic diagram；
Fig. 4 is the waveform diagram for referring to patent of invention N, P transient signal by being capacitively coupled to top-level metallic；
Fig. 5 is the anti-probe detection layout type proposed by the invention based on switching capacity PUF；
Fig. 6 is the schematic diagram attacked in same layer by destruction+reconstruction+detection with reference to patent of invention and the present invention；
Fig. 7 is the schematic diagram attacked in different layers by destruction+reconstruction+detection with reference to patent of invention and the present invention；
Fig. 8 is analogue amplifier/comparator configuration signal between a kind of input and output of the present invention without feedback
Figure.
Specific embodiment
Below in conjunction with attached drawing and specific implementation example, invention is further explained, and the examples of the embodiments are attached
It is shown in figure, in which the same or similar labels are throughly indicated same or similar element or there is same or like function
Element.The embodiments described below with reference to the accompanying drawings are exemplary, it is intended to be used to explain the present invention, and should not be understood as
Limitation of the present invention, any modification, equivalent replacement or improvement for being made all within the spirits and principles of the present invention etc., should all
It within scope of the presently claimed invention, is not addressed in detail in the technical program, is well-known technique.
Embodiment: the anti-probe shown in fig. 5 based on switching capacity PUF detects layout type, and PUF is still using switch
Capacitance principle, detection is two capacitance ratio CUP1/CDN1And CUP2/CDN2Between mismatch, wherein four sampling capacitance CUP1、
CDN1、CUP2、CDN2Can be using parasitic metal-insulator-metal structure capacitive, upper layer metal and lower metal respectively constitute
Two pole plates of capacitor, this double layer of metal can use arbitrary neighborhood double layer of metal, can also use between there is no other letters
The non-conterminous double layer of metal of number line, and the general insulating layer in CMOS technology between metal layer constitutes dielectric；This four samplings
The dielectric layer of capacitor can also be higher using dielectric constant special used in metal-insulating layer-metal capacitor in CMOS technology
Dielectric layer.For SC PUFi unit, in design, C is setUP1=CUP2, CDN1=CDN2, to there is CUP1/CDN1=CUP2/
CDN2.But since there are deviation, C in CMOS technologyUP1And CDN1It can't be equal to C respectivelyUP2And CDN2, but can be two
Mismatch is introduced between a capacitance ratio: CUP1/CDN1=δ+CUP2/CDN2.Circuit first passes through discharge regime, i.e. EN=0, all capacitors
Both ends all meet GND, so that the charge for making all capacitor storages is all 0；Then EN=1, circuit enter charge redistribution state,
CUP1And CUP2Top crown meet VDD, the voltage of P, N two o'clock will be with CUP1/CDN1And CUP2/CDN2It is related.At this point, capacitance ratio
Mismatch δ will introduce voltage difference between P and N:
Thus capacitance ratio mismatch is just converted into voltage difference, then resulting voltage difference will be put by comparator
Greatly, and it is ultimately converted to rail-to-rail output number code key Key [i].
It is above-mentioned consistent with reference to patent of invention based on the code key production principle of SC PUF, but it is anti-in order to improve capacitive metal
The probe of sheath detects attack detecting sensitivity, sampling capacitance C in the present inventionUP1、CUP2、CDN1、CDN2It no longer include fixed capacity,
But only by double layer of metal and its between the parasitic capacitance that constitutes of insulating layer constitute, the variation of such metal protection layer will be whole
Reaction increases probe detection attack detecting sensitivity into switching capacity PUF.
In addition, in figure 5, constituting sampling capacitance CUP1、CUP2、CDN1、CDN2Metal be the lesser block structure of area
Or the linear structure that length is shorter, and the long wire screen inside non-reference patent of invention, when external attack attempts to these
When metal protection layer is destroyed or rebuild, as shown in attached drawing 6 (a) and attached drawing 7 (a), for the long gold of reference patent of invention
For belonging to gauze, since every wires are very long, if carrying out same layer or different damage layer+weights to metal wire in a small range
Build, to leak out the important sensitive information below wire screen, caused by capacitance variations may be micro- for total capacitance
Not worth mentioning, therefore, attacker probably gets correct information using destruction+reconstruction+probe detection attack, without drawing
Play the variation of switching capacity PUF output code key.And for the present invention, each metal capacitance or the gold shorter using length
Belong to line, perhaps (several squares micro- with minimum area needed for external attack using its length of the lesser metal block of area or area
Rice) in the same order of magnitude, and the region protected needed for entire with multiple metal wires or the covering of metal block array, if external damage
When+Rebuilding Attack occurs, necessarily cause the large range of variation of sampling capacitance, to greatly promote anti-external detection attack
Sensitivity, as shown in attached drawing 6 (b, c) and attached drawing 7 (b, c).By taking the existing attainable destruction+reconstruction ability of institute as an example, FIB institute energy
The minimum operation region of progress is about a few square microns, therefore, constitutes CUP1、CUP2、CDN1、CDN2The metal wire of four sampling capacitances
Or the metal block gross area is also about several square microns, corresponding capacitance is about between the fF of several fF~tens.
Finally, in order to avoid there is voltage jump in sensitive signal point N, P and cause external attack that can connect by detection
Also there is positive pulse relevant to the final voltage of N, P or negative pulse in upper layer metal to CUP1/CUP2 top crown, and then obtains
Code key value is exported, mutation should be avoided in N, P voltage, and this patent avoids the input-output coupling amplifier using latch formula,
But using amplifier/comparator without feedback between input and output common in analog circuit, at the end of comparing and comparing,
N, the voltage of P will not change, and external attack can not also obtain the final code key value of PUF by detection upper layer metal, a kind of
Embodiment is as shown in Fig. 8.
The above-described embodiments merely illustrate the principles and effects of the present invention, and is not intended to limit the present invention.It is any ripe
The personage for knowing this technology all without departing from the spirit and scope of the present invention, carries out modifications and changes to above-described embodiment.Cause
This, institute is complete without departing from the spirit and technical ideas disclosed in the present invention by those of ordinary skill in the art such as
At all equivalent modifications or change, should be covered by the claims of the present invention.
Claims (3)
1. the layout method of the switching capacity PUF circuit of anti-probe detection, comprising: the capacitor that switching capacity PUF is sampled only is adopted
With by constitute capacitive protective layer upper layer metal, lower metal and between the parasitic capacitance that constitutes of insulating layer, do not include fixing
Capacitor；Then it is carried out using output voltage difference of Simulation scale-up/comparator of the input and output without feedback network to switching capacity
Amplification, obtains final output code key, it is characterised in that:
Constituting the double layer of metal of bottom crown on switching capacity PUF sampling capacitance is arbitrary neighborhood double layer of metal, or mutually it
Between without other metal routings non-conterminous metal, but this double layer of metal area is identical and completely overlapped；
The insulating layer of composition switching capacity PUF sampling capacitance dielectric layer is the general insulation in CMOS technology between adjacent metal
The high-k insulating layer of metal-insulating layer-metal capacitor part in layer or CMOS technology.
2. the layout method of the switching capacity PUF circuit of anti-probe detection according to claim 1, which is characterized in that open
The powered-down each sampling metal capacitance area of appearance PUF is a few square microns, and in multiple metal capacitance arrays covering chip
Sensitizing range increases the sensitivity of anti-probe detection；
The metal capacitance capacitance of switching capacity PUF sampling is the linear structure that length is several microns to more than ten microns in fF rank,
Or area is the block structure of several square microns.
3. the layout method of the switching capacity PUF circuit of anti-probe detection according to claim 1, which is characterized in that use
It amplifies the comparator compared in the output voltage difference to switching capacity to be made of analog comparator, there is no output code keys
To the feedback network of input sensitive signal point, the metal wire for avoiding external attacker from being connected to fixed current potential by detecting upper layer is obtained
Code key value must be exported.
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| CN111916400A (en) * | 2020-07-22 | 2020-11-10 | 湖北大学 | Chip semi-invasive attack prevention method based on substrate coupling capacitive PUF |
| US20210377058A1 (en) * | 2020-05-28 | 2021-12-02 | Stmicroelectronics (Crolles 2) Sas | Integrated physical unclonable function device |
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