CN109920359A - Display panel, displaying panel driving method and display device - Google Patents
Display panel, displaying panel driving method and display device Download PDFInfo
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- CN109920359A CN109920359A CN201910247762.4A CN201910247762A CN109920359A CN 109920359 A CN109920359 A CN 109920359A CN 201910247762 A CN201910247762 A CN 201910247762A CN 109920359 A CN109920359 A CN 109920359A
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Abstract
The present invention provides a kind of display panel, displaying panel driving method and display device.Display panel includes: viewing area and non-display area, viewing area includes the first viewing area, the second viewing area and third viewing area, wherein, second viewing area is between the first viewing area and third viewing area, the edge of second viewing area includes concave edges section, and the recess direction of concave edges section is towards the second viewing area;Multiple pixels, multiple pixels are arranged in array, and the first viewing area includes the first pixel column, and the second viewing area includes the second pixel column, third viewing area includes third pixel column, and the pixel quantity in the second pixel column is respectively smaller than the pixel quantity in the first pixel column and third pixel column;First pixel column and the second pixel column, for the pixel quantity in the first pixel column less than the pixel quantity in the second pixel column, the second pixel column includes the common data line positioned at the second viewing area, and the first pixel column and the second pixel column share common data line.Display panel reaches narrow frame.
Description
[technical field]
The present invention relates to field of display technology more particularly to a kind of display panels, displaying panel driving method and display
Device.
[background technique]
With the development of display technology, the special-shaped display panel of comprehensive screenization has the frame of biggish screen accounting, ultra-narrow,
The visual effect of viewer can be greatly improved, to have received widespread attention.
Fig. 1 is the structural schematic diagram of special-shaped display panel in the prior art.
As shown in Figure 1, in the prior art, special-shaped display panel 100 includes two the first data line 110, first connections
Line 120, concave edges section 130, two the first data lines 110 are located at the upside of concave edges section 130, downside, and first connects
Wiring 120 is located at the adjacent side of concave edges section 130, and two the first data lines 110 are electrically connected by the first connecting line 120.But
First connecting line, 120 occupied space.
[summary of the invention]
In order to solve the above technical problem, the present invention provides a kind of display panel, displaying panel driving method and displays
Device.
On the one hand, the present invention provides a kind of display panel, comprising:
Viewing area and non-display area, the viewing area include the first viewing area, the second viewing area and third viewing area,
In, second viewing area is between first viewing area and the third viewing area, the edge of second viewing area
Including concave edges section, the recess direction of the concave edges section is towards second viewing area;
Multiple pixels, the multiple pixel are arranged in array, first viewing area include the first pixel column, described second
Viewing area includes the second pixel column, and the third viewing area includes third pixel column, the pixel quantity in second pixel column
The pixel quantity being respectively smaller than in first pixel column and the third pixel column;
First pixel column and the second pixel column, the pixel quantity in first pixel column are less than in second pixel column
Pixel quantity, second pixel column includes the common data line positioned at second viewing area, first pixel column and
Second pixel column shares the common data line.
Optionally, the non-display area includes the first sub- non-display area, the first sub- non-display area and the recess side
Rim segment is adjacent;
Multiple first switch units, first pixel column include the first data line, and first data line includes first
Sub first data line and the second sub first data line, the described first sub first data line and the second sub first data line difference
It is coupled by common data line described in different first switch unit and same, wherein the described first sub first data
Line is located at first viewing area, and for the described second sub first data line bit in the third viewing area, first son is non-display
Area is located between the described first sub first data line and second sub first data line;
Multiple second switch units, second pixel column include the second data line, and second data line includes first
Sub second data line, the second sub second data line and the common data line, the described first sub second data line and the second son
Second data line is coupled by different second switch units and the common data line respectively, wherein first son
Second data line bit is in first viewing area, and the described second sub second data line bit is in the third viewing area;
First switch unit is different with the open state of second switch unit.
Optionally, first switch unit is first switch transistor, and second switch unit is that second switch is brilliant
The type of body pipe, the first switch transistor and the second switch transistor is different;
The display panel further includes the first control line and the second control line, wherein the control of the first switch transistor
Electrode processed is electrically connected with first control line, and the coordination electrode of the second switch transistor is electrically connected with second control line
It connects.
Optionally, the coordination electrode of each first switch transistor and described in same in first viewing area
The electrical connection of first control line, in the third viewing area coordination electrode of each first switch transistor with same institute
State the electrical connection of the first control line;
The coordination electrode of each second switch transistor is controlled with described in same second in first viewing area
Line processed electrical connection, the coordination electrode of each second switch transistor is with described in same second in the third viewing area
Control line electrical connection.
Optionally, the coordination electrode of each first switch transistor is electrically connected with the first control line described in same
It connects;
The coordination electrode of each second switch transistor is electrically connected with the second control line described in same.
Optionally, the display panel further includes the first sub- connecting line, the second sub- connecting line;
Described first sub first data line is electrically connected with first switch unit by the described first sub- connecting line, described
Second sub first data line is electrically connected with first switch unit by the described second sub- connecting line;
Described first sub first data line, the first sub- connecting line, second sub first data line, second son
The sum of connecting line and the resistance of the common data line are equal to first resistor, the described first sub second data line, described second
The sum of sub second data line and the resistance of the common data line are equal to second resistance, the first resistor and second electricity
The ratio between resistance is more than or equal to 0.99 and is less than or equal to 1.01.
Optionally, the display panel further includes the first sub- connecting line, the second sub- connecting line;
Described first sub first data line is electrically connected with first switch unit by the described first sub- connecting line, described
Second sub first data line is electrically connected with first switch unit by the described second sub- connecting line;
The cross-sectional area of described first sub second data line is less than the cross-sectional area of the described first sub first data line.
Optionally, the display panel further includes the first sub- connecting line;
Described first sub first data line is electrically connected with first switch unit by the described first sub- connecting line;
The cross-sectional area of the first sub- connecting line is greater than the cross-sectional area of the described first sub first data line.
Optionally, the display panel further includes the first sub- connecting line, the second sub- connecting line, the first compensation resistance;
Described first sub first data line is electrically connected with first switch unit by the described first sub- connecting line, described
Second sub first data line is electrically connected with first switch unit by the described second sub- connecting line;
The first compensation resistance is electrically connected the described first sub second data line and is electrically connected second switch unit;
Described first sub first data line, the first sub- connecting line, second sub first data line, second son
The sum of connecting line and the resistance of the common data line are equal to 3rd resistor, the described first sub second data line, described first
It compensates the sum of resistance, second sub second data line and resistance of the common data line and is equal to the 4th resistance, described the
The ratio between three resistance and the 4th resistance are more than or equal to 0.99 and are less than or equal to 1.01.
Optionally, the display panel further includes the first sub- connecting line, the second sub- connecting line, the first compensation resistance;
Described first sub first data line is electrically connected with first switch unit by the described first sub- connecting line, described
Second sub first data line is electrically connected with first switch unit by the described second sub- connecting line;
The first compensation resistance is in parallel with the described first sub- connecting line.
On the other hand, the present invention provides a kind of displaying panel driving method;
The display panel includes viewing area and non-display area, and the viewing area includes the first viewing area, the second viewing area
With third viewing area, wherein second viewing area is between first viewing area and the third viewing area, and described
The edge of two viewing areas includes concave edges section, and the recess direction of the concave edges section is towards second viewing area;
Multiple pixels, the multiple pixel are arranged in array, first viewing area include the first pixel column, described second
Viewing area includes the second pixel column, and the third viewing area includes third pixel column, the pixel quantity in second pixel column
The pixel quantity being respectively smaller than in first pixel column and the third pixel column;
First pixel column and the second pixel column, the pixel quantity in first pixel column are less than in second pixel column
Pixel quantity, second pixel column includes the common data line positioned at second viewing area, first pixel column and
Second pixel column shares the common data line;
The display panel further include: a plurality of first scan line within first viewing area is located at described the
A plurality of second scan line within two viewing areas, a plurality of third scan line within the third viewing area;
The described method includes: executing the first data write phase, the second data write phase is executed, third data is executed and writes
Enter the stage;
In the first data write phase, scanning signal is transmitted by a plurality of third scan line line by line;
In the second data write phase, scanning signal is transmitted by a plurality of second scan line line by line;
In the third data write phase, scanning signal is transmitted by a plurality of first scan line line by line.
Optionally, the non-display area includes the first sub- non-display area, the first sub- non-display area and the recess side
Rim segment is adjacent;
Multiple first switch units, first pixel column include the first data line, and first data line includes first
Sub first data line and the second sub first data line, the described first sub first data line and the second sub first data line difference
It is coupled by common data line described in different first switch unit and same, wherein the described first sub first data
Line is located at first viewing area, and for the described second sub first data line bit in the third viewing area, first son is non-display
Area is located between the described first sub first data line and second sub first data line;
Multiple second switch units, second pixel column include the second data line, and second data line includes first
Sub second data line, the second sub second data line and the common data line, the described first sub second data line and the second son
Second data line is coupled by different second switch units and the common data line respectively, wherein first son
Second data line bit is in first viewing area, and the described second sub second data line bit is in the third viewing area;
First switch unit is different with the open state of second switch unit.
Optionally, first switch unit is first switch transistor, and second switch unit is that second switch is brilliant
The type of body pipe, the first switch transistor and the second switch transistor is different;
The display panel further includes the first control line and the second control line, wherein the control of the first switch transistor
Electrode processed is electrically connected with first control line, and the coordination electrode of the second switch transistor is electrically connected with second control line
It connects.
Optionally, in the first data write phase, Continuity signal is transmitted by first control line, passes through institute
State the second control line transmission pick-off signal;
The first switch transistor is opened, the second switch transistor is closed;
Data-signal is transmitted by the described second sub first data line and second sub second data line.
Optionally, in the first data write phase, Continuity signal is transmitted by second control line, passes through institute
State the first control line transmission pick-off signal;
The second switch transistor is opened, the first switch transistor is closed;
Data-signal is transmitted by the described second sub first data line and second sub second data line.
Optionally, in the second data write phase, Continuity signal is transmitted by second control line, passes through institute
State the first control line transmission pick-off signal;
The second switch transistor is opened, the first switch transistor is closed;
Data-signal is transmitted by the described second sub second data line and the common data line.
Optionally, in the third data write phase, Continuity signal is transmitted by first control line, passes through institute
State the second control line transmission pick-off signal;
The first switch transistor is opened, the second switch transistor is closed;
Data-signal is transmitted by first data line, the common data line.
Optionally, in the third data write phase, Continuity signal is transmitted by second control line, passes through institute
State the first control line transmission pick-off signal;
The second switch transistor is opened, the first switch transistor is closed;
Data-signal is transmitted by second data line.
In another aspect, the present invention provides a kind of display device, including the display panel.
In the present invention, the data line of the second pixel column prolongs in the first viewing area, the second viewing area and third viewing area
It stretches, the data line of the second pixel column in the first viewing area and third viewing area passes through the second pixel in the second viewing area
The data line of column is electrically connected, and the second pixel column transmits data-signal in the first viewing area, the second viewing area and third viewing area;
The data line of first pixel column extends in the first viewing area and third viewing area and interrupts at concave edges section, first
The data that the data line of the first pixel column in viewing area and third viewing area passes through the second pixel column in the second viewing area
Line electrical connection, the first pixel column transmit data-signal in the first viewing area and third viewing area.First pixel column and the second picture
Element column share the data line of the second pixel column in the second viewing area, that is, common data line.In the first viewing area and third
The data line of the first pixel column in viewing area is electrically connected not by the lead of close concave edges section in the non-display area,
The lead areas of close concave edges section in the non-display area is reduced, and display panel reaches narrow frame.
[Detailed description of the invention]
In order to illustrate the technical solution of the embodiments of the present invention more clearly, below will be to needed in the embodiment attached
Figure is briefly described, it should be apparent that, drawings in the following description are only some embodiments of the invention, for this field
For those of ordinary skill, without creative efforts, it can also be obtained according to these attached drawings other attached drawings.
Fig. 1 is the structural schematic diagram of special-shaped display panel in the prior art;
Fig. 2 is the structural schematic diagram of display panel in the embodiment of the present invention;
Fig. 3 is another structural schematic diagram of display panel in the embodiment of the present invention;
Fig. 4 is another structural schematic diagram of display panel in the embodiment of the present invention;
Fig. 5 is another structural schematic diagram of display panel in the embodiment of the present invention;
Fig. 6 is another structural schematic diagram of display panel in the embodiment of the present invention;
Fig. 7 is another structural schematic diagram of display panel in the embodiment of the present invention;
Fig. 8 is another structural schematic diagram of display panel in the embodiment of the present invention;
Fig. 9 is the flow diagram of displaying panel driving method in the embodiment of the present invention;
Figure 10 is the time diagram of displaying panel driving method in the embodiment of the present invention;
Figure 11 is another time diagram of displaying panel driving method in the embodiment of the present invention;
Figure 12 is another time diagram of displaying panel driving method in the embodiment of the present invention;
Figure 13 is the structural schematic diagram of display device in the embodiment of the present invention.
[specific embodiment]
For a better understanding of the technical solution of the present invention, being retouched in detail to the embodiment of the present invention with reference to the accompanying drawing
It states.
It will be appreciated that described embodiments are only a part of the embodiments of the present invention, instead of all the embodiments.Base
Embodiment in the present invention, it is obtained by those of ordinary skill in the art without making creative efforts it is all its
Its embodiment, shall fall within the protection scope of the present invention.
The term used in embodiments of the present invention is only to be not intended to be limiting merely for for the purpose of describing particular embodiments
The present invention.In the embodiment of the present invention and the "an" of singular used in the attached claims, " described " and "the"
It is also intended to including most forms, unless the context clearly indicates other meaning.
It should be appreciated that term "and/or" used herein is only a kind of incidence relation for describing affiliated partner, indicate
There may be three kinds of relationships, for example, A and/or B, can indicate: individualism A, exist simultaneously A and B, individualism B these three
Situation.In addition, character "/" herein, typicallys represent the relationship that forward-backward correlation object is a kind of "or".
It will be appreciated that though device may be described in embodiments of the present invention using term first, second etc., but these
Device should not necessarily be limited by these terms.These terms are only used to for device being distinguished from each other out.For example, not departing from the embodiment of the present invention
In the case where range, first device can also be referred to as second device, and similarly, second device can also be referred to as the first dress
It sets.
Fig. 2 is the structural schematic diagram of display panel in the embodiment of the present invention.
As shown in Fig. 2, display panel 200 includes: viewing area AA and non-display area NA, viewing area AA includes the first viewing area
AA1, the second viewing area AA2 and third viewing area AA3, wherein the second viewing area AA2 is located at the first viewing area AA1 and third is aobvious
Show between area AA3, the edge of the second viewing area AA2 includes concave edges section NB, and the recess direction of concave edges section NB is towards
Two viewing area AA2;Multiple pixel PX, multiple pixel PX are arranged in array, and the first viewing area AA1 includes the first pixel column PXC1,
Second viewing area AA2 includes the second pixel column PXC2, and third viewing area AA3 includes third pixel column PXC3, the second pixel column
Pixel quantity in PXC2 is respectively smaller than the pixel quantity in the first pixel column PXC1 and third pixel column PXC3;First pixel column
PXR1 (two column are schematically depicted in figure) and the second pixel column PXR2 (two column are schematically depicted in figure), the first pixel
The pixel quantity in PXR1 is arranged less than the pixel quantity in the second pixel column PXR2, the second pixel column PXR2 includes being located at second to show
Show that the common data line DL0, the first pixel column PXR1 and the second pixel column PXR2 of area AA2 share common data line DL0.
In embodiments of the present invention, the recess direction of concave edges section NB is towards the second viewing area AA2, the second viewing area
AA2 is between the first viewing area AA1 and third viewing area AA3, and concave edges section NB is located at the first viewing area AA1 and third is aobvious
Show between area AA3.First viewing area AA1, the second viewing area AA2, third viewing area AA3 have the array of pixel PX, optionally,
Any pixel PX is not had by the region surrounded concave edges section NB.Pixel quantity in second pixel column PXC2 is less than the first pixel
Pixel quantity in row PXC1 and the pixel quantity being less than in third pixel column PXC3.Optionally, in the first pixel column PXC1
Pixel quantity be equal to third pixel column PXC3 in pixel quantity.Pixel quantity in first pixel column PXR1 is less than the second picture
Element column PXR2 in pixel quantity, the first pixel column PXR1 extend in the first viewing area AA1 and third viewing area AA3 and
It is interrupted at concave edges section NB, the second pixel column PXR2 is in the first viewing area AA1, the second viewing area AA2 and third viewing area AA3
Interior extension.
As shown in Fig. 2, optional, display panel 200 further includes the driving chip IC, driving chip IC in rim area
It is electrically connected close to third viewing area AA3 and far from the first viewing area AA1, driving chip IC with third viewing area AA3 data line,
Driving chip IC transmits data-signal to third viewing area AA3 data line.It should be noted that embodiments herein can be with
Using COF (Chip On Flex, or, Chip On Film, often claim flip chip), i.e., driving IC is fixed on flexible circuit board
(FPC) it on, is then electrically connected by FPC with third viewing area AA3 data line, and transmits number to third viewing area AA3 data line
It is believed that number.
In embodiments of the present invention, the data line of the second pixel column PXR2 is in the first viewing area AA1, the second viewing area AA2
Extend in the AA3 of third viewing area, the data of the second pixel column PXR2 in the first viewing area AA1 and third viewing area AA3
Line is electrically connected by the data line of the second pixel column PXR2 in the second viewing area AA2, and the second pixel column PXR2 is aobvious first
Show and transmits data-signal in area AA1, the second viewing area AA2 and third viewing area AA3;The data line of first pixel column PXR1 is
Extend in one viewing area AA1 and third viewing area AA3 and the interruption concave edges section NB at, in the first viewing area AA1 and the
The data line of the first pixel column PXR1 in three viewing area AA3 passes through the second pixel column PXR2's in the second viewing area AA2
Data line electrical connection, the first pixel column PXR1 transmit data-signal in the first viewing area AA1 and third viewing area AA3.First
Pixel column PXR1 and the second pixel column PXR2 shares the data line of the second pixel column PXR2 in the second viewing area AA2, that is,
Common data line DL0.The data line of the first pixel column PXR1 in the first viewing area AA1 and third viewing area AA3 is simultaneously non-through
Cross the lead electrical connection of the close concave edges section NB in non-display area NA, the close concave edges section in non-display area NA
The lead areas of NB can be reduced, and display panel 200 can achieve narrow frame.
As shown in Fig. 2, non-display area NA includes the first sub- non-display area NA1, the first sub- non-display area NA1 and concave edges
Section NB is adjacent;Multiple first switch unit SW1, the first pixel column PXR1 include the first data line DL10, the first data line DL10
Including the first the data line DL12, first the first data line DL11 of son of son of first the first data line DL11 of son and second and the second son
One data line DL12 is coupled by different the first switch unit SW1 and same common data line DL0 respectively, wherein first
The first data line DL11 of son is located at the first viewing area AA1, and second the first data line DL12 of son is located at third viewing area AA3, and first
Sub- non-display area NA1 is between first the first data line DL11 of son and second the first data line DL12 of son;Multiple second switchings
Cell S W2, the second pixel column PXR2 include that the second data line DL20, the second data line DL20 includes the first sub second data line
DL21, second the second data line DL22 of son and common data line DL0, first the second data line DL21 of son and second the second number of son
It is coupled respectively by different the second switch unit SW2 and common data line DL0 according to line DL22, wherein the first sub second data
Line DL21 is located at the first viewing area AA1, and second the second data line DL22 of son is located at third viewing area AA3;First switch unit SW1
It is different with the open state of the second switch unit SW2.
In embodiments of the present invention, the first switch unit SW1 is opened, first the first data line DL11 of son and common data line
DL0 electrical connection, second the first data line DL12 of son is electrically connected with common data line DL0, first the first data line DL11 of son, public
Data line DL0, second the first data line DL12 of son transmit data-signal;First switch unit SW1 is closed, the first sub first data
Line DL11 is not electrically connected with common data line DL0, and second the first data line DL12 of son is not electrically connected with common data line DL0, the
One the first data line DL11 of son does not transmit data-signal, and second the first data line DL12 of son transmits data-signal.Second switching is single
First SW2 is opened, and first the second data line DL21 of son is electrically connected with common data line DL0, second the second data line DL22 of son and public affairs
Data line DL0 electrical connection altogether, first the second data line DL21 of son, common data line DL0, second the second data line DL22 of son transmission
Data-signal;Second switch unit SW2 is closed, and first the second data line DL21 of son is not electrically connected with common data line DL0, and second
The second data line DL22 of son is not electrically connected with common data line DL0, and first the second data line DL21 of son does not transmit data-signal, the
Two the second data line DL22 of son transmit data-signal.When the first switch unit SW1 is opened, then the second switch unit SW2 is closed;When
First switch unit SW1 is closed, then the second switch unit SW2 is opened.First the first data line DL11 of son, the second sub first data
Line DL12 is electrically connected not by the lead of the first sub- non-display area NA1, and the lead areas of the first sub- non-display area NA1 is contracted
Subtract, display panel 200 can achieve narrow frame.
As shown in Figure 2, it is preferred that first DL0 pairs of common data line of the first data line DL10 of first, left side and left side
It answering and is electrically connected, Article 2 the first data line DL10 in left side is corresponding with left side Article 2 common data line DL0 and is electrically connected,
The first data line DL10 of the N articles of left side is corresponding with the N articles of left side common data line DL0 and is electrically connected, and N is natural number.
Optionally, as shown in Fig. 2, multiple first switch unit SW1 and multiple second switch unit SW2 are aobvious positioned at first
Show in area AA1, and neighbouring second viewing area AA2;Meanwhile the first switch unit SW1 of others and others second switch
Cell S W2 is located in the AA3 of third viewing area, and neighbouring second viewing area AA2.
Fig. 3 is another structural schematic diagram of display panel in the embodiment of the present invention.
As shown in figure 3, the first switch unit SW1 is first switch transistor ST1, the second switch unit SW2 opens for second
The type for closing transistor ST2, first switch transistor ST1 and second switch transistor ST2 is different;Display panel 200 further includes
First control line GL1 and the second control line GL2, wherein the coordination electrode of first switch transistor ST1 and the first control line GL1
Electrical connection, the coordination electrode of second switch transistor ST2 are electrically connected with the second control line GL2.
In embodiments of the present invention, the first control line GL1 transmits Continuity signal, and first switch transistor ST1 is opened;First
Control line GL1 transmits pick-off signal, and first switch transistor ST1 is closed;Second control line GL2 transmits Continuity signal, and second opens
Transistor ST2 is closed to open;Second control line GL2 transmits pick-off signal, and second switch transistor ST2 is closed.When the first control line
GL1 transmits Continuity signal, then the second control line GL2 transmits pick-off signal;When the first control line GL1 transmits pick-off signal, then the
Two control line GL2 transmit Continuity signal.When first switch transistor ST1 is opened, then second switch transistor ST2 is closed;When
One switching transistor ST1 is closed, then second switch transistor ST2 is opened.
As shown in figure 3, in the first viewing area AA1 the coordination electrode of each first switch transistor ST1 with same
One control line GL1 electrical connection, in the AA3 of third viewing area the coordination electrode of each first switch transistor ST1 with same the
One control line GL1 electrical connection;In first viewing area AA1 the coordination electrode of each second switch transistor ST2 with same
Two control line GL2 electrical connection, in the AA3 of third viewing area the coordination electrode of each second switch transistor ST2 with same the
Two control line GL2 electrical connection.
In embodiments of the present invention, the first switch transistor of first the first control line GL1 and the first viewing area AA1
The coordination electrode of ST1 is electrically connected, the control of the first switch transistor ST1 of Article 2 the first control line GL1 and third viewing area AA3
Electrode electrical connection processed;First the first control line GL1 transmits Continuity signal and Article 2 the first control line GL1 transmission conducting letter
Number, the first switch transistor ST1 of the first viewing area AA1 is opened and the first switch transistor ST1 of third viewing area AA3 is opened
It opens;First the first data line DL11 of son is electrically connected with common data line DL0 and second the first data line DL12 of son and public number
It is electrically connected according to line DL0;First the first data line DL11 of son, common data line DL0, second the first data line DL12 of son transmit data
Signal;First the first control line GL1 transmission pick-off signal and Article 2 the first control line GL1 transmission Continuity signal, first
The first switch transistor ST1 of viewing area AA1 is closed and the first switch transistor ST1 of third viewing area AA3 is opened;First
The first data line DL11 of son is not electrically connected with common data line DL0 and second the first data line DL12 of son and common data line
DL0 electrical connection;Second son the first data line DL12, common data line DL0 transmits data-signal and the first sub first data line
DL11 does not transmit data-signal.
In embodiments of the present invention, the second switch transistor of first the second control line GL2 and the first viewing area AA1
The coordination electrode of ST2 is electrically connected, the control of the second switch transistor ST2 of Article 2 the second control line GL2 and third viewing area AA3
Electrode electrical connection processed;First the second control line GL2 transmits Continuity signal and Article 2 the second control line GL2 transmission conducting letter
Number, the second switch transistor ST2 of the first viewing area AA1 is opened and the second switch transistor ST2 of third viewing area AA3 is opened
It opens;First the second data line DL21 of son is electrically connected with common data line DL0 and second the second data line DL22 of son and public number
It is electrically connected according to line DL0;First the second data line DL21 of son, common data line DL0, second the second data line DL22 of son transmit data
Signal;First the second control line GL2 transmission pick-off signal and Article 2 the second control line GL2 transmission Continuity signal, first
The second switch transistor ST2 of viewing area AA1 is closed and the second switch transistor ST2 of third viewing area AA3 is opened;First
The second data line DL21 of son is not electrically connected with common data line DL0 and second the second data line DL22 of son and common data line
DL0 electrical connection;Second son the second data line DL22, common data line DL0 transmits data-signal and the first sub second data line
DL21 does not transmit data-signal.
In embodiments of the present invention, the of the first switch transistor ST1 of the first viewing area AA1 and third viewing area AA3
One switching transistor ST1 is electrically connected the first different control line GL1, and the two is individually controlled, and the two can have different open
Off status;The second switch transistor ST2 of the second switch transistor ST2 and third viewing area AA3 of first viewing area AA1 are electrically connected
The second different control line GL2 is met, the two is individually controlled, and the two can have different switch states.
Fig. 4 is another structural schematic diagram of display panel in the embodiment of the present invention.
As shown in figure 4, the coordination electrode of each first switch transistor ST1 is electrically connected with the first control line of same GL1
It connects;The coordination electrode of each second switch transistor ST2 is electrically connected with the second control line of same GL2.
In embodiments of the present invention, same the first control line GL1 and the first viewing area AA1 and third viewing area AA3
The coordination electrode of first switch transistor ST1 is electrically connected;First control line GL1 transmits Continuity signal, the first viewing area AA1 and the
The first switch transistor ST1 of three viewing area AA3 is opened;First the first data line DL11 of son is electrically connected with common data line DL0
And second the first data line DL12 of son is electrically connected with common data line DL0;First son the first data line DL11, common data line
DL0, second the first data line DL12 of son transmit data-signal;First control line GL1 transmits pick-off signal, the first viewing area AA1
It is closed with the first switch transistor ST1 of third viewing area AA3;First the first data line DL11 of son and common data line DL0 are not
It is electrically connected and second the first data line DL12 of son is not electrically connected with common data line DL0;First the first data line DL11 of son is not
It transmits data-signal and second the first data line DL12 of son transmits data-signal.
In embodiments of the present invention, same the second control line GL2 and the first viewing area AA1 and third viewing area AA3
The coordination electrode of second switch transistor ST2 is electrically connected;Second control line GL2 transmits Continuity signal, the first viewing area AA1 and the
The second switch transistor ST2 of three viewing area AA3 is opened;First the second data line DL21 of son is electrically connected with common data line DL0
And second the second data line DL22 of son is electrically connected with common data line DL0;First son the second data line DL21, common data line
DL0, second the second data line DL22 of son transmit data-signal;Second control line GL2 transmits pick-off signal, the first viewing area AA1
It is closed with the second switch transistor ST2 of third viewing area AA3;First the second data line DL21 of son and common data line DL0 are not
It is electrically connected and second the second data line DL22 of son is not electrically connected with common data line DL0;First the second data line DL21 of son is not
It transmits data-signal and second the second data line DL22 of son transmits data-signal.
In embodiments of the present invention, the of the first switch transistor ST1 of the first viewing area AA1 and third viewing area AA3
One switching transistor ST1 is electrically connected same first control line GL1, in order to avoid the first control line GL1 that setting is different, to simplify the
The route of one control line GL1;The second switch of the second switch transistor ST2 and third viewing area AA3 of first viewing area AA1 are brilliant
Body pipe ST2 is electrically connected same second control line GL2, in order to avoid the second control line GL2 that setting is different, to simplify the second control line
The route of GL2.
As shown in Fig. 2, display panel 200 further includes the first sub- connecting line CL1, the second sub- connecting line CL2;First son first
Data line DL11 is electrically connected with the first switch unit SW1 by the first sub- connecting line CL1, second the first data line DL12 of son and
One switching cell S W1 passes through the second sub- connecting line CL2 electrical connection;First the first data line DL11 of son, the first sub- connecting line CL1,
The sum of resistance of second the first data line DL12 of son, the second sub- connecting line CL2 and common data line DL0 is equal to first resistor,
The sum of resistance of first the second data line DL21 of son, second son the second data line DL22 and common data line DL0 is equal to second
Resistance, the ratio between first resistor and second resistance are more than or equal to 0.99 and are less than or equal to 1.01.
In embodiments of the present invention, the first switch unit SW1 is opened, first the first data line DL11 of son and common data line
DL0 passes through the second son even by the first sub- connecting line CL1 electrical connection, second the first data line DL12 of son and common data line DL0
Wiring CL2 electrical connection;First the first data line DL11 of son, the first sub- connecting line CL1, common data line DL0, the second sub- connecting line
CL2, second the first data line DL12 of son successively transmit data-signal.Second switch unit SW2 is opened, the first sub second data line
DL21 is electrically connected with common data line DL0, and second the second data line DL22 of son is electrically connected with common data line DL0;First son
Two data line DL21, common data line DL0, second the second data line DL22 of son successively transmit data-signal.First the first number of son
According to line DL11, the first sub- connecting line CL1, common data line DL0, the second sub- connecting line CL2, second the first data line DL12 of son
The sum of resistance, equal to or approximately equal to first the second data line DL21 of son, common data line DL0, the second sub second data line
The sum of resistance of DL22;First the first data line DL11 of son, common data line DL0, the second son mono- tunnel the first data line DL12
Load, equal to or approximately equal to first the second data line DL21 of son, common data line DL0, second the second data line DL22 of son
Load all the way;First the first data line DL11 of son, common data line DL0, the second son mono- tunnel the first data line DL12 voltage,
Equal to or approximately equal to first the second data line DL21 of son, common data line DL0, the second son mono- tunnel the second data line DL22
Voltage;First the first data line DL11 of son, common data line DL0, the second son mono- tunnel the first data line DL12 pixel PX number
It is believed that number, equal to or approximately equal to first the second data line DL21 of son, common data line DL0, the second sub second data line
The data-signal of the pixel PX on mono- tunnel DL22, the display brightness of display panel 200 is uniform, this is it is avoided that windowing phenomena.
As shown in Fig. 2, display panel 200 further includes the first sub- connecting line CL1, the second sub- connecting line CL2;First son first
Data line DL11 is electrically connected with the first switch unit SW1 by the first sub- connecting line CL1, second the first data line DL12 of son and
One switching cell S W1 passes through the second sub- connecting line CL2 electrical connection;The cross-sectional area of first the second data line DL21 of son is less than first
The cross-sectional area of the first data line DL11 of son.
In embodiments of the present invention, the cross-sectional area of first the second data line DL21 of son is less than the first sub first data line
The cross-sectional area of DL11, the resistance of first the second data line DL21 of son are greater than the resistance of first the first data line DL11 of son;First
The difference of the resistance of first data line DL11 of of the second data line DL21 of son and first is equal to or approximately equal to the first sub- connecting line
The sum of the resistance of the sub- connecting line CL2 of CL1 and second;First the first data line DL11 of son, the first sub- connecting line CL1, the second son are even
The sum of resistance of wiring CL2 is equal to or approximately equal to the resistance of first the second data line DL21 of son;First sub first data line
The resistance of DL11, the first sub- connecting line CL1, common data line DL0, the second sub- connecting line CL2, second the first data line DL12 of son
The sum of, equal to or approximately equal to first the second data line DL21 of son, common data line DL0, second the second data line DL22 of son
The sum of resistance;The load of first the first data line DL11 of son, common data line DL0, the second son mono- tunnel the first data line DL12,
Equal to or approximately equal to first the second data line DL21 of son, common data line DL0, the second son mono- tunnel the second data line DL22
Load;First the first data line DL11 of son, common data line DL0, the second son mono- tunnel the first data line DL12 voltage, be equal to or
Person be approximately equal to first the second data line DL21 of son, common data line DL0, the second son mono- tunnel the second data line DL22 voltage;
First the first data line DL11 of son, common data line DL0, the second son mono- tunnel the first data line DL12 pixel PX data letter
Number, equal to or approximately equal to first the second data line DL21 of son, common data line DL0, second the second data line DL22 mono- of son
The data-signal of the pixel PX on road, the display brightness of display panel 200 is uniform, this is it is avoided that windowing phenomena.
As shown in Fig. 2, display panel 200 further includes the first sub- connecting line CL1, the second sub- connecting line CL2;First son first
Data line DL11 is electrically connected with the first switch unit SW1 by the first sub- connecting line CL1, second the first data line DL12 of son and
One switching cell S W1 passes through the second sub- connecting line CL2 electrical connection;The cross-sectional area of first the second data line DL21 of son is less than first
The cross-sectional area of the first data line DL11 of son, and the cross-sectional area of second the second data line DL22 of son is less than second the first number of son
According to the cross-sectional area of line DL12.
In embodiments of the present invention, the cross-sectional area of first the second data line DL21 of son is less than the first sub first data line
The cross-sectional area of DL11, the resistance of first the second data line DL21 of son are greater than the resistance of first the first data line DL11 of son;Second
Cross-sectional area of the cross-sectional area of the second data line DL22 of son less than second the first data line DL12 of son, the second sub second data line
The resistance of DL22 is greater than the resistance of second the first data line DL12 of son;Sub first data of first the second data line DL21 of son and first
The difference of the resistance of line DL11 is equal to or approximately equal to the resistance of the first sub- connecting line CL1, second the second data line DL22 of son with
The difference of the resistance of second the first data line DL12 of son is equal to or approximately equal to the resistance of the second sub- connecting line CL2;First son
The sum of resistance of the sub- connecting line CL1 of one data line DL11 and first is equal to or approximately equal to first the second data line DL21's of son
Resistance, the sum of resistance of the second sub- connecting line CL2 of son the first data line DL12 and second are equal to or approximately equal to the second son the
The resistance of two data line DL22;First the first data line DL11 of son, the first sub- connecting line CL1, common data line DL0, the second son
The sum of the resistance of connecting line CL2, second the first data line DL12 of son, the equal to or approximately equal to first sub second data line
The sum of the resistance of DL21, common data line DL0, second the second data line DL22 of son;First son the first data line DL11, public number
According to line DL0, the load on the second son mono- tunnel the first data line DL12, equal to or approximately equal to first the second data line DL21 of son,
The load of common data line DL0, the second son mono- tunnel the second data line DL22;First son the first data line DL11, common data line
DL0, the second son mono- tunnel the first data line DL12 voltage, it is equal to or approximately equal to first the second data line DL21 of son, public
Data line DL0, the second son mono- tunnel the second data line DL22 voltage;First the first data line DL11 of son, common data line DL0,
The data-signal of the pixel PX on the second son mono- tunnel the first data line DL12, the equal to or approximately equal to first sub second data line
DL21, common data line DL0, the second son mono- tunnel the second data line DL22 pixel PX data-signal, display panel 200 it is aobvious
Show brightness uniformity, this is it is avoided that windowing phenomena.
As shown in Fig. 2, display panel 200 further includes the first sub- connecting line CL1;First son the first data line DL11 and first
Switch unit SW1 passes through the first sub- connecting line CL1 electrical connection;The cross-sectional area of first sub- connecting line CL1 is greater than the first son first
The cross-sectional area of data line DL11.
In embodiments of the present invention, the cross-sectional area of the first sub- connecting line CL1 is greater than first the first data line DL11's of son
Cross-sectional area, resistivity of the resistivity less than first the first data line DL11 of son of the first sub- connecting line CL1;First sub- connecting line
The sum of resistance of first data line DL11 of of CL1 and first and the gap of the resistance of first the second data line DL21 of son are reduced;The
The load of one the first data line DL11 of son, common data line DL0, the second son mono- tunnel the first data line DL12 are counted with first sub second
According to line DL21, common data line DL0, the second son mono- tunnel the second data line DL22 load gap reduce;First the first number of son
According to line DL11, common data line DL0, the voltage on the second son mono- tunnel the first data line DL12 and first the second data line DL21 of son,
Common data line DL0, the second son mono- tunnel the second data line DL22 voltage gap reduce;First the first data line DL11 of son,
Common data line DL0, the second son mono- tunnel the first data line DL12 pixel PX data-signal and the first sub second data line
DL21, common data line DL0, the second son mono- tunnel the second data line DL22 pixel PX data-signal gap reduce, display
The difference of the display brightness of panel 200 is reduced, this just alleviates windowing phenomena;First sub- connecting line CL1 far from driving chip IC, and
It is non-between first data line DL12 of of common data line DL0 and second, the first sub- connecting line CL1 has no effect on common data
The data-signal of mono- tunnel line DL0 and the second son mono- tunnel the first data line DL12 pixel PX, has no effect on the second viewing area AA2
And third viewing area AA3 display.
As shown in Fig. 2, display panel 200 further includes the first sub- connecting line CL1;First son the first data line DL11 and first
Switch unit SW1 passes through the first sub- connecting line CL1 electrical connection;The cross-sectional area of first the first data line DL11 of son is greater than the first son
The cross-sectional area of connecting line CL1.
In embodiments of the present invention, the cross-sectional area of first the first data line DL11 of son is greater than the first sub- connecting line CL1's
Cross-sectional area, the resistivity of the resistivity connecting line CL less than first of first the first data line DL11 of son;First the first number of son
The sum of resistance according to the sub- connecting line CL1 of line DL11 and first and the gap of the resistance of first the second data line DL21 of son are reduced;The
The load of one the first data line DL11 of son, common data line DL0, the second son mono- tunnel the first data line DL12 are counted with first sub second
According to line DL21, common data line DL0, the second son mono- tunnel the second data line DL22 load gap reduce;First the first number of son
According to line DL11, common data line DL0, the voltage on the second son mono- tunnel the first data line DL12 and first the second data line DL21 of son,
Common data line DL0, the second son mono- tunnel the second data line DL22 voltage gap reduce;First the first data line DL11 of son,
Common data line DL0, the second son mono- tunnel the first data line DL12 pixel PX data-signal and the first sub second data line
DL21, common data line DL0, the second son mono- tunnel the second data line DL22 pixel PX data-signal gap reduce, display
The difference of the display brightness of panel 200 is reduced, this just alleviates windowing phenomena.
Fig. 5 is another structural schematic diagram of display panel in the embodiment of the present invention.
As shown in figure 5, display panel 200 further includes the first sub- connecting line CL1, the second sub- connecting line CL2, the first compensation electricity
Hinder CR1;First the first data line DL11 of son is electrically connected with the first switch unit SW1 by the first sub- connecting line CL1, the second son
One data line DL12 is electrically connected with the first switch unit SW1 by the second sub- connecting line CL2;First compensation resistance CR1 electrical connection
First the second data line DL21 of son and the second switch unit SW2 of electrical connection;First the first data line DL11 of son, the first son connection
The sum of resistance of line CL1, second the first data line DL12 of son, the second sub- connecting line CL2 and common data line DL0 is equal to third
Resistance, first the second data line DL21 of son, the first compensation resistance CR1, second the second data line DL22 of son and common data line
The sum of resistance of DL0 is equal to the 4th resistance, and the ratio between 3rd resistor and the 4th resistance are more than or equal to 0.99 and are less than or equal to 1.01.
In embodiments of the present invention, the first compensation resistance CR1 is electrically connected first the second data line DL21 of son and is electrically connected
Second switch unit SW2;First the second data line DL21 of son, the first compensation resistance CR1, common data line DL0, the second son second
Data line DL22 series connection;First the first data line DL11 of son, the first sub- connecting line CL1, common data line DL0, the second son connection
Line CL2, second the first data line DL12 of son series connection;The resistance of first compensation resistance CR1 is equal to or approximately equal to the first son even
The sum of the resistance of the sub- connecting line CL2 of wiring CL1 and second;It is first the first data line DL11 of son, the first sub- connecting line CL1, public
The sum of the resistance of data line DL0, the second sub- connecting line CL2, second the first data line DL12 of son, equal to or approximately equal to first
The second data line DL21 of son, first compensation resistance CR1, common data line DL0, second the second data line DL22 of son resistance it
With;The load of first the first data line DL11 of son, common data line DL0, the second son mono- tunnel the first data line DL12, be equal to or
It is approximately equal to the load of the first the second data line DL21 of son, common data line DL0, the second son mono- tunnel the second data line DL22;The
One the first data line DL11 of son, common data line DL0, the second son mono- tunnel the first data line DL12 voltage, be equal to or approximate
Equal to first the second data line DL21 of son, common data line DL0, the second son mono- tunnel the second data line DL22 voltage;First son
First data line DL11, common data line DL0, the second son mono- tunnel the first data line DL12 pixel PX data-signal, be equal to
Or be approximately equal to first the second data line DL21 of son, common data line DL0, the second son mono- tunnel the second data line DL22 pixel
The display brightness of the data-signal of PX, display panel 200 is uniform, this is it is avoided that windowing phenomena.
Fig. 6 is another structural schematic diagram of display panel in the embodiment of the present invention.
As shown in fig. 6, display panel 200 further includes the first sub- connecting line CL1, the second sub- connecting line CL2, the first compensation electricity
Hinder CR1, the second compensation resistance CR2;First son the first data line DL11 and the first switch unit SW1 passes through the first sub- connecting line
CL1 electrical connection, second the first data line DL12 of son are electrically connected with the first switch unit SW1 by the second sub- connecting line CL2;First
Resistance CR1 is compensated to be electrically connected first the second data line DL21 of son and be electrically connected the second switch unit SW2, the second compensation resistance
CR2 is electrically connected second the second data line DL22 of son and is electrically connected the second switch unit SW2;First the first data line DL11 of son,
First sub- connecting line CL1, second the first data line DL12 of son, the second sub- connecting line CL2 and common data line DL0 resistance it
With equal to 3rd resistor, first the second data line DL21 of son, first compensate resistance CR1, the second son the second data line DL22, second
It compensates the sum of resistance of resistance CR2 and common data line DL0 and is equal to the 4th resistance, the ratio between 3rd resistor and the 4th resistance are greater than
Equal to 0.99 and it is less than or equal to 1.01.
In embodiments of the present invention, the first compensation resistance CR1 is electrically connected first the second data line DL21 of son and is electrically connected
Second switch unit SW2, the second compensation resistance CR2 is electrically connected second the second data line DL22 of son and is electrically connected the second switching list
First SW2;First the second data line DL21 of son, the first compensation resistance CR1, common data line DL0, the second compensation resistance CR2, second
The second data line DL22 of son series connection;First the first data line DL11 of son, the first sub- connecting line CL1, common data line DL0, second
Sub- connecting line CL2, second the first data line DL12 of son series connection;The resistance of first compensation resistance CR1 is equal to or approximately equal to the
The resistance of the resistance of one sub- connecting line CL1, the second compensation resistance CR2 is equal to or approximately equal to the electricity of the second sub- connecting line CL2
Resistance;First the first data line DL11 of son, the first sub- connecting line CL1, common data line DL0, the second sub- connecting line CL2, the second son
The sum of the resistance of first data line DL12, equal to or approximately equal to first the second data line DL21 of son, the first compensation resistance
The sum of CR1, common data line DL0, the second compensation resistance CR2, resistance of second the second data line DL22 of son;First the first number of son
According to the load of line DL11, common data line DL0, the second son mono- tunnel the first data line DL12, the equal to or approximately equal to first son
The load of second data line DL21, common data line DL0, the second son mono- tunnel the second data line DL22;First sub first data line
DL11, common data line DL0, the second son mono- tunnel the first data line DL12 voltage, equal to or approximately equal to the first son second
Data line DL21, common data line DL0, the second son mono- tunnel the second data line DL22 voltage;First the first data line DL11 of son,
Common data line DL0, the second son mono- tunnel the first data line DL12 pixel PX data-signal, equal to or approximately equal to first
The second data line DL21 of son, common data line DL0, the second son mono- tunnel the second data line DL22 pixel PX data-signal, show
Show that the display brightness of panel 200 is uniform, this is it is avoided that windowing phenomena.
Fig. 7 is another structural schematic diagram of display panel in the embodiment of the present invention.
As shown in fig. 7, display panel 200 further includes the first sub- connecting line CL1, the second sub- connecting line CL2, the first compensation electricity
Hinder CR1;First the first data line DL11 of son is electrically connected with the first switch unit SW1 by the first sub- connecting line CL1, the second son
One data line DL12 is electrically connected with the first switch unit SW1 by the second sub- connecting line CL2;First compensation resistance CR1 and first
Sub- connecting line CL1 is in parallel.
In embodiments of the present invention, the first compensation resistance CR1 is in parallel with the first sub- connecting line CL1, the first compensation resistance CR1
With the resistance of the parallel resistance connecting line CL1 less than first of the first sub- connecting line CL1, first the first data line DL11 of son passes through
First compensation resistance CR1 is electrically connected the first switch unit SW1 with the parallel resistance of the first sub- connecting line CL1 rather than passes through the first son
Connecting line CL1 is electrically connected the first switch unit SW1, first the first data line DL11 of son, first the first son of compensation resistance CR1/ even
The resistance of wiring CL1, the resistance on mono- tunnel common data line DL0 and first the second data line DL21 of son, mono- tunnel common data line DL0
Difference reduce;The load of first the first data line DL11 of son, common data line DL0, the second son mono- tunnel the first data line DL12
Subtract with the gap of load on first the second data line DL21 of son, common data line DL0, the second son mono- tunnel the second data line DL22
It is few;First the first data line DL11 of son, common data line DL0, the voltage on the second son mono- tunnel the first data line DL12 and the first son
Second data line DL21, common data line DL0, the second son mono- tunnel the second data line DL22 voltage gap reduce;First son
First data line DL11, common data line DL0, the second son mono- tunnel the first data line DL12 pixel PX data-signal and first
The second data line DL21 of son, common data line DL0, the second son mono- tunnel the second data line DL22 pixel PX data-signal difference
Away from reduction, the difference of the display brightness of display panel 200 is reduced, this just alleviates windowing phenomena.
Fig. 8 is another structural schematic diagram of display panel in the embodiment of the present invention.
As shown in figure 8, display panel 200 further includes the first sub- connecting line CL1, the second sub- connecting line CL2, the first compensation electricity
Hinder CR1;First the first data line DL11 of son is electrically connected with the first switch unit SW1 by the first sub- connecting line CL1, the second son
One data line DL12 is electrically connected with the first switch unit SW1 by the second sub- connecting line CL2;First compensation resistance CR1 and first
The first data line of son DL11 is in parallel.
In embodiments of the present invention, the first compensation resistance CR1 is in parallel with first the first data line DL11 of son, the first compensation electricity
Hinder resistance of the parallel resistance less than first the first data line DL11 of son of first data line DL11 of of CR1 and first;First compensation
Resistance of the parallel resistance of first data line DL11 of of resistance CR1 and first less than first the second data line DL21 of son;First mends
The difference for repaying the parallel resistance of resistance CR1 and first the first data line DL11 of son and the resistance of first the second data line DL21 of son is equal to
Or it is approximately equal to the resistance of the first sub- connecting line CL1;First the first data line DL11/ first of son compensates resistance CR1, the first son
The electricity of connecting line CL1, the resistance on mono- tunnel common data line DL0 and first the second data line DL21 of son, mono- tunnel common data line DL0
The difference of resistance is reduced;First the first data line DL11 of son, common data line DL0, the second son mono- tunnel the first data line DL12 it is negative
It carries and subtracts with the gap of load on first the second data line DL21 of son, common data line DL0, the second son mono- tunnel the second data line DL22
It is few;First the first data line DL11 of son, common data line DL0, the voltage on the second son mono- tunnel the first data line DL12 and the first son
Second data line DL21, common data line DL0, the second son mono- tunnel the second data line DL22 voltage gap reduce;First son
First data line DL11, common data line DL0, the second son mono- tunnel the first data line DL12 pixel PX data-signal and first
The second data line DL21 of son, common data line DL0, the second son mono- tunnel the second data line DL22 pixel PX data-signal difference
Away from reduction, the difference of the display brightness of display panel 200 is reduced, this just alleviates windowing phenomena.
Fig. 9 is the flow diagram of displaying panel driving method in the embodiment of the present invention.
As shown in Fig. 2, display panel 200 includes: viewing area AA and non-display area in displaying panel driving method 300
NA, viewing area AA include the first viewing area AA1, the second viewing area AA2 and third viewing area AA3, wherein the second viewing area AA2
Between the first viewing area AA1 and third viewing area AA3, the edge of the second viewing area AA2 includes concave edges section NB, recess
The recess direction of edge section NB is towards the second viewing area AA2;Multiple pixel PX, multiple pixel PX are arranged in array, the first display
Area AA1 includes that the first pixel column PXC1, the second viewing area AA2 includes the second pixel column PXC2, and third viewing area AA3 includes third
Pixel quantity in pixel column PXC3, the second pixel column PXC2 is respectively smaller than in the first pixel column PXC1 and third pixel column PXC3
Pixel quantity;Pixel quantity in first pixel column PXR1 and the second pixel column PXR2, the first pixel column PXR1 is less than second
Pixel quantity in pixel column PXR2, the second pixel column PXR2 include the common data line DL0 positioned at the second viewing area AA2, the
One pixel column PXR1 and the second pixel column PXR2 shares common data line DL0.Display panel 200 further include: be located at the first display
A plurality of first scan line SL1 within area AA1, a plurality of second scan line SL2 within the second viewing area AA2 are located at the
A plurality of third scan line SL3 within three viewing area AA3.
As shown in figure 9, displaying panel driving method 300 includes: to execute the first data write phase S310, the second number is executed
According to write phase S320, third data write phase S330 is executed;In the first data write phase S310, pass through a plurality of third
Scan line SL3 transmits scanning signal line by line;In the second data write phase S320, line by line by a plurality of second scan line SL2
Transmit scanning signal;In third data write phase S330, scanning signal is transmitted by a plurality of first scan line SL1 line by line.
In embodiments of the present invention, it in the first data write phase S310, is passed line by line by a plurality of third scan line SL3
Defeated scanning signal, so that data-signal is written in the first pixel column PXR1 and the second pixel column PXR2 of third viewing area AA3;
In the second data write phase S320, scanning signal is transmitted by a plurality of second scan line SL2 line by line, so as in the second display
Data-signal is written in the second pixel column PXR2 of area AA2;It is scanned in third data write phase S330 by a plurality of first
Line SL1 transmits scanning signal line by line, to write in the first pixel column PXR1 and the second pixel column PXR2 of the first viewing area AA1
Enter data-signal.
As shown in Fig. 2, non-display area NA includes the first sub- non-display area NA1 in displaying panel driving method 300, the
One sub- non-display area NA1 is adjacent with concave edges section NB;Multiple first switch unit SW1, the first pixel column PXR1 include first
Data line DL10, the first data line DL10 include the sub first data line DL12 of the first first data line DL11 of son and second, and first
It is public that first data line DL12 of of the first data line DL11 of son and second passes through different the first switch unit SW1 and same respectively
Data line DL0 coupling altogether, wherein first the first data line DL11 of son is located at the first viewing area AA1, the second sub first data line
DL12 is located at third viewing area AA3, and the first sub- non-display area NA1 is located at first number of of first the first data line DL11 of son and second
According between line DL12;Multiple second switch unit SW2, the second pixel column PXR2 include the second data line DL20, the second data line
DL20 includes first the second data line DL21 of son, second the second data line DL22 of son and common data line DL0, the first son second
Second data line DL22 of of data line DL21 and second passes through different the second switch unit SW2 and common data line DL0 respectively
Coupling, wherein first the second data line DL21 of son is located at the first viewing area AA1, and second the second data line DL22 of son is located at third
Viewing area AA3;The open state of first switch unit SW1 and the second switch unit SW2 are different.
As shown in Fig. 2, first switch unit SW1 is first switch transistor ST1 in displaying panel driving method 300,
Second switch unit SW2 is second switch transistor ST2, the type of first switch transistor ST1 and second switch transistor ST2
It is different;Display panel 200 further includes the first control line GL1 and the second control line GL2, wherein the control of first switch transistor ST1
Electrode processed is electrically connected with the first control line GL1, and the coordination electrode of second switch transistor ST2 is electrically connected with the second control line GL2.
Figure 10 is the time diagram of displaying panel driving method in the embodiment of the present invention.
As shown in Figure 10, during the first scan line SL1 transmits scanning signal line by line, the first moment T1, N-1 row
First scan line SL1 transmits Continuity signal, and Nth row the first scan line SL1 transmits pick-off signal, the first scan line of N+1 row SL1
Pick-off signal is transmitted, so as to N-1 row pixel write data signal;Second moment T2, Nth row the first scan line SL1 transmission are led
Messenger, N-1 row the first scan line SL1 transmit pick-off signal, and N+1 row the first scan line SL1 transmits pick-off signal, so as to
Data-signal is written in nth row of pixels;Third moment T3, N+1 row the first scan line SL1 transmit Continuity signal, N-1 row first
Scan line SL1 transmits pick-off signal, and Nth row the first scan line SL1 transmits pick-off signal, so as to N+1 row pixel write data
Signal;The first scan line of multirow SL1 successively transmits Continuity signal, so that multirow pixel is sequentially written in data-signal.Second scanning
It is also in this way, no longer that line SL2 transmits the process of scanning signal line by line, third scan line SL3 transmits the process of scanning signal line by line
It repeats.
Figure 11 is another time diagram of displaying panel driving method in the embodiment of the present invention.
As shown in Figure 4 and 11, in the first data write phase S310, Continuity signal is transmitted by the first control line GL1,
Pick-off signal is transmitted by the second control line GL2;First switch transistor ST1 is opened, second switch transistor ST2 is closed;It is logical
Cross second the first data line DL12 of son and second the second data line DL22 of son transmission data-signal.
In embodiments of the present invention, in the first data write phase S310, first switch transistor ST1 is opened, and second
Switching transistor ST2 is closed, and second the first data line DL12 of son is electrically connected with common data line DL0, the second sub second data line
DL22 is not electrically connected with common data line DL0, and second the first data line DL12 of son will not be short with second the second data line DL22 of son
Road;A plurality of third scan line SL3 transmits scanning signal, sub second data line of second the first data line DL12 of son and second line by line
DL22 transmits data-signal, and data-signal is written in the first pixel column PXR1 and the second pixel column PXR2 of third viewing area AA3, with
The pixel PX of third viewing area AA3 is set to shine.
Figure 12 is another time diagram of displaying panel driving method in the embodiment of the present invention.
As shown in Fig. 4,12, in the first data write phase S310, Continuity signal is transmitted by the second control line GL2,
Pick-off signal is transmitted by the first control line GL1;Second switch transistor ST2 is opened, first switch transistor ST1 is closed;It is logical
Cross second the first data line DL12 of son and second the second data line DL22 of son transmission data-signal.
In embodiments of the present invention, in the first data write phase S310, second switch transistor ST2 is opened, and first
Switching transistor ST1 is closed, and second the second data line DL22 of son is electrically connected with common data line DL0, the second sub first data line
DL12 is not electrically connected with common data line DL0, and second the first data line DL12 of son will not be short with second the second data line DL22 of son
Road;A plurality of third scan line SL3 transmits scanning signal, sub second data line of second the first data line DL12 of son and second line by line
DL22 transmits data-signal, and data-signal is written in the first pixel column PXR1 and the second pixel column PXR2 of third viewing area AA3, with
The pixel PX of third viewing area AA3 is set to shine.
As shown in Figure 11,12, in the second data write phase S320, Continuity signal is transmitted by the second control line GL2,
Pick-off signal is transmitted by the first control line GL1;Second switch transistor ST2 is opened, first switch transistor ST1 is closed;It is logical
Cross second the second data line DL22 of son and common data line DL0 transmission data-signal.
In embodiments of the present invention, in the second data write phase S320, second switch transistor ST2 is opened, and first
Switching transistor ST1 is closed, and second the second data line DL22 of son is electrically connected with common data line DL0;A plurality of second scan line SL2
Scanning signal is transmitted line by line, and second the second data line DL22 of son and common data line DL0 transmit data-signal, the second viewing area
Data-signal is written in the second pixel column PXR2 of AA2, so that the pixel PX of the second viewing area AA2 shines;Optionally, pass through here
Second the second data line DL22 of son and common data line DL0 transmits data-signal, rather than passes through second the first data line DL12 of son
Data-signal is transmitted with common data line DL0, power consumption can be saved.
As shown in Figure 11,12, in third data write phase S330, Continuity signal is transmitted by the first control line GL1,
Pick-off signal is transmitted by the second control line GL2;First switch transistor ST1 is opened, second switch transistor ST2 is closed;It is logical
Cross the first data line DL10, common data line DL0 transmission data-signal.
In embodiments of the present invention, in third data write phase S330, first switch transistor ST1 is opened, and second
Switching transistor ST2 is closed, and first the first data line DL11 of son is electrically connected with common data line DL0, the second sub first data line
DL12 is electrically connected with common data line DL0;A plurality of first scan line SL1 transmits scanning signal, the first sub first data line line by line
DL11, common data line DL0, second the first data line DL12 of son transmit data-signal, the first pixel column of the first viewing area AA1
Data-signal is written in PXR1, so that the pixel PX of the first pixel column PXR1 shines in the first viewing area AA1;First viewing area AA1
The first pixel column PXR1 and the second pixel column PXR2 be respectively written into data-signal, in order to avoid interfere with each other.
As shown in Figure 11,12, in third data write phase S330, Continuity signal is transmitted by the second control line GL2,
Pick-off signal is transmitted by the first control line GL1;Second switch transistor ST2 is opened, first switch transistor ST1 is closed;It is logical
Cross the second data line DL20 transmission data-signal.
In embodiments of the present invention, in third data write phase S330, second switch transistor ST2 is opened, and first
Switching transistor ST1 is closed, and first the second data line DL21 of son is electrically connected with common data line DL0, the second sub second data line
DL22 is electrically connected with common data line DL0;A plurality of first scan line SL1 transmits scanning signal, the first sub second data line line by line
DL21, common data line DL0, second the second data line DL22 of son transmit data-signal, the second pixel column of the first viewing area AA1
Data-signal is written in PXR2, so that the pixel PX of the second pixel column PXR2 shines in the first viewing area AA1;First viewing area AA1
The first pixel column PXR1 and the second pixel column PXR2 be respectively written into data-signal, in order to avoid interfere with each other.
In embodiments of the present invention, the first data write phase S310, the second data write phase S320, third data are write
The sequencing for entering stage S330 is not construed as limiting;Preferably, the first data write phase S310, the second data write phase
S320, third data write phase S330 circuit sequentially execution or third data write phase S330, the second data write-in rank
Section S320, the first data write phase S310 circuit sequentially execution.
Figure 13 is the structural schematic diagram of display device in the embodiment of the present invention.
As shown in figure 13, display device 400 includes display panel 200.
In embodiments of the present invention, display function, such as smart phone or similar display may be implemented in display device 400
Device.Display panel 200 is as described above, repeat no more.
In conclusion the present invention provides a kind of display panel, displaying panel driving method and display device.Display panel
It include: viewing area and non-display area, viewing area includes the first viewing area, the second viewing area and third viewing area, wherein second is aobvious
Show area between the first viewing area and third viewing area, the edge of the second viewing area includes concave edges section, concave edges section
Recess direction towards the second viewing area;Multiple pixels, multiple pixels are arranged in array, and the first viewing area includes the first pixel
Row, the second viewing area include the second pixel column, and third viewing area includes third pixel column, the pixel quantity in the second pixel column point
Not less than the pixel quantity in the first pixel column and third pixel column;First pixel column and the second pixel column, in the first pixel column
Pixel quantity less than the pixel quantity in the second pixel column, the second pixel column includes the common data positioned at the second viewing area
Line, the first pixel column and the second pixel column share common data line.Display panel reaches narrow frame.
The foregoing is merely illustrative of the preferred embodiments of the present invention, is not intended to limit the invention, all in essence of the invention
Within mind and principle, any modification, equivalent substitution, improvement and etc. done be should be included within the scope of the present invention.
Claims (19)
1. a kind of display panel characterized by comprising
Viewing area and non-display area, the viewing area include the first viewing area, the second viewing area and third viewing area, wherein institute
The second viewing area is stated between first viewing area and the third viewing area, the edge of second viewing area includes recessed
Fall into edge section, the recess direction of the concave edges section is towards second viewing area;
Multiple pixels, the multiple pixel are arranged in array, and first viewing area includes the first pixel column, second display
Area includes the second pixel column, and the third viewing area includes third pixel column, the pixel quantity difference in second pixel column
Less than the pixel quantity in first pixel column and the third pixel column;
First pixel column and the second pixel column, the pixel quantity in first pixel column are less than the picture in second pixel column
Prime number amount, second pixel column include the common data line positioned at second viewing area, first pixel column and described
Second pixel column shares the common data line.
2. display panel according to claim 1, which is characterized in that the non-display area includes the first sub- non-display area,
The first sub- non-display area is adjacent with the concave edges section;
Multiple first switch units, first pixel column include the first data line, and first data line includes the first son the
One data line and the second sub first data line, the described first sub first data line and second sub first data line pass through respectively
Common data line described in different first switch units and same couples, wherein the described first sub first data line bit
In first viewing area, the described second sub first data line bit is in the third viewing area, the non-display position of first son
Between the described first sub first data line and second sub first data line;
Multiple second switch units, second pixel column include the second data line, and second data line includes the first son the
Two data lines, the second sub second data line and the common data line, the described first sub second data line and the second son second
Data line is coupled by different second switch units and the common data line respectively, wherein first son second
Data line bit is in first viewing area, and the described second sub second data line bit is in the third viewing area;
First switch unit is different with the open state of second switch unit.
3. display panel according to claim 2, which is characterized in that first switch unit is first switch crystal
Pipe, second switch unit are second switch transistor, the first switch transistor and the second switch transistor
Type is different;
The display panel further includes the first control line and the second control line, wherein the control electricity of the first switch transistor
Pole is electrically connected with first control line, and the coordination electrode of the second switch transistor is electrically connected with second control line.
4. display panel according to claim 3, which is characterized in that each first switch in first viewing area
The coordination electrode of transistor is electrically connected with the first control line described in same, and each described first opens in the third viewing area
The coordination electrode for closing transistor is electrically connected with the first control line described in same;
In first viewing area coordination electrode of each second switch transistor with the second control line described in same
It is electrically connected, the coordination electrode of each second switch transistor is controlled with described in same second in the third viewing area
Line electrical connection.
5. display panel according to claim 4, which is characterized in that the coordination electrode of each first switch transistor
It is electrically connected with the first control line described in same;
The coordination electrode of each second switch transistor is electrically connected with the second control line described in same.
6. display panel according to claim 2, which is characterized in that further include the first sub- connecting line, the second sub- connecting line;
Described first sub first data line is electrically connected with first switch unit by the described first sub- connecting line, and described second
Sub first data line is electrically connected with first switch unit by the described second sub- connecting line;
Described first sub first data line, the first sub- connecting line, second sub first data line, the second son connection
The sum of line and the resistance of the common data line are equal to first resistor, first sub second data line, second son the
The sum of two data lines and the resistance of the common data line are equal to second resistance, the first resistor and the second resistance it
Than being more than or equal to 0.99 and being less than or equal to 1.01.
7. display panel according to claim 2, which is characterized in that further include the first sub- connecting line, the second sub- connecting line;
Described first sub first data line is electrically connected with first switch unit by the described first sub- connecting line, and described second
Sub first data line is electrically connected with first switch unit by the described second sub- connecting line;
The cross-sectional area of described first sub second data line is less than the cross-sectional area of the described first sub first data line.
8. display panel according to claim 2, which is characterized in that further include the first sub- connecting line;
Described first sub first data line is electrically connected with first switch unit by the described first sub- connecting line;
The cross-sectional area of the first sub- connecting line is greater than the cross-sectional area of the described first sub first data line.
9. display panel according to claim 2, which is characterized in that further include the first sub- connecting line, the second sub- connecting line,
First compensation resistance;
Described first sub first data line is electrically connected with first switch unit by the described first sub- connecting line, and described second
Sub first data line is electrically connected with first switch unit by the described second sub- connecting line;
The first compensation resistance is electrically connected the described first sub second data line and is electrically connected second switch unit;
Described first sub first data line, the first sub- connecting line, second sub first data line, the second son connection
The sum of line and the resistance of the common data line are equal to 3rd resistor, the described first sub second data line, first compensation
The sum of resistance, second sub second data line and resistance of the common data line are equal to the 4th resistance, the third electricity
The ratio between resistance and the 4th resistance are more than or equal to 0.99 and are less than or equal to 1.01.
10. display panel according to claim 2, which is characterized in that further include the first sub- connecting line, the second son connection
Line, the first compensation resistance;
Described first sub first data line is electrically connected with first switch unit by the described first sub- connecting line, and described second
Sub first data line is electrically connected with first switch unit by the described second sub- connecting line;
The first compensation resistance is in parallel with the described first sub- connecting line.
11. a kind of displaying panel driving method, which is characterized in that the display panel includes viewing area and non-display area, described
Viewing area includes the first viewing area, the second viewing area and third viewing area, wherein it is aobvious that second viewing area is located at described first
Show between area and the third viewing area, the edge of second viewing area includes concave edges section, the concave edges section
Direction be recessed towards second viewing area;
Multiple pixels, the multiple pixel are arranged in array, and first viewing area includes the first pixel column, second display
Area includes the second pixel column, and the third viewing area includes third pixel column, the pixel quantity difference in second pixel column
Less than the pixel quantity in first pixel column and the third pixel column;
First pixel column and the second pixel column, the pixel quantity in first pixel column are less than the picture in second pixel column
Prime number amount, second pixel column include the common data line positioned at second viewing area, first pixel column and described
Second pixel column shares the common data line;
The display panel further include: it is aobvious to be located at described second for a plurality of first scan line within first viewing area
Show a plurality of second scan line within area, a plurality of third scan line within the third viewing area;
The described method includes: executing the first data write phase, the second data write phase is executed, third data is executed and rank is written
Section;
In the first data write phase, scanning signal is transmitted by a plurality of third scan line line by line;
In the second data write phase, scanning signal is transmitted by a plurality of second scan line line by line;
In the third data write phase, scanning signal is transmitted by a plurality of first scan line line by line.
12. displaying panel driving method according to claim 11, which is characterized in that the non-display area includes the first son
Non-display area, the first sub- non-display area are adjacent with the concave edges section;
Multiple first switch units, first pixel column include the first data line, and first data line includes the first son the
One data line and the second sub first data line, the described first sub first data line and second sub first data line pass through respectively
Common data line described in different first switch units and same couples, wherein the described first sub first data line bit
In first viewing area, the described second sub first data line bit is in the third viewing area, the non-display position of first son
Between the described first sub first data line and second sub first data line;
Multiple second switch units, second pixel column include the second data line, and second data line includes the first son the
Two data lines, the second sub second data line and the common data line, the described first sub second data line and the second son second
Data line is coupled by different second switch units and the common data line respectively, wherein first son second
Data line bit is in first viewing area, and the described second sub second data line bit is in the third viewing area;
First switch unit is different with the open state of second switch unit.
13. displaying panel driving method according to claim 12, which is characterized in that first switch unit is first
Switching transistor, second switch unit are second switch transistor, the first switch transistor and the second switch
The type of transistor is different;
The display panel further includes the first control line and the second control line, wherein the control electricity of the first switch transistor
Pole is electrically connected with first control line, and the coordination electrode of the second switch transistor is electrically connected with second control line.
14. displaying panel driving method according to claim 13, which is characterized in that in the first data write phase
In, Continuity signal is transmitted by first control line, pick-off signal is transmitted by second control line;
The first switch transistor is opened, the second switch transistor is closed;
Data-signal is transmitted by the described second sub first data line and second sub second data line.
15. displaying panel driving method according to claim 13, which is characterized in that in the first data write phase
In, Continuity signal is transmitted by second control line, pick-off signal is transmitted by first control line;
The second switch transistor is opened, the first switch transistor is closed;
Data-signal is transmitted by the described second sub first data line and second sub second data line.
16. displaying panel driving method according to claim 13, which is characterized in that in the second data write phase
In, Continuity signal is transmitted by second control line, pick-off signal is transmitted by first control line;
The second switch transistor is opened, the first switch transistor is closed;
Data-signal is transmitted by the described second sub second data line and the common data line.
17. displaying panel driving method according to claim 13, which is characterized in that in the third data write phase
In, Continuity signal is transmitted by first control line, pick-off signal is transmitted by second control line;
The first switch transistor is opened, the second switch transistor is closed;
Data-signal is transmitted by first data line, the common data line.
18. displaying panel driving method according to claim 17, which is characterized in that in the third data write phase
In, Continuity signal is transmitted by second control line, pick-off signal is transmitted by first control line;
The second switch transistor is opened, the first switch transistor is closed;
Data-signal is transmitted by second data line.
19. a kind of display device, which is characterized in that including display panel described in any one in claims 1 to 10.
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