CN109889419A - The bus-powered and means of communication, device and storage medium - Google Patents
The bus-powered and means of communication, device and storage medium Download PDFInfo
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Abstract
The embodiment of the present invention proposes the bus-powered and means of communication of one kind, device and computer readable storage medium.Wherein method includes: the power supply signal for receiving and being modulated with pre-set detection cycle, and detection cycle includes idle communication time and power-on time；In the case where needing to send upstream data, idle communication time is elongated as data communication time in detection cycle, and accordingly shorten power-on time；Upstream data is sent by power supply signal in data communication time；The downlink data in power supply signal is received when idle communication time starts, and on the basis of the signal characteristic of a bit data, all data bit of byte where parsing the bit.The embodiment of the present invention improves system power supply ability on the basis of ensureing communication efficiency, all data bit of byte are parsed on the basis of the signal characteristic of a bit data, keep data parsing more accurate, it overcomes in data transmission procedure and parses difficulty caused by the factors such as distortion, improve the accuracy rate of data transmission.
Description
Technical field
The present invention relates to communication technique fields, more particularly to a kind of bus-powered and means of communication, device and computer can
Read storage medium.
Background technique
The bus communications technologies such as RS485, CAN (Controller Area Network, controller local area network) are various
It is used widely in distributed system.Wherein, RS (recommended standard) represents proposed standard.Such as it is being distributed
The network structures such as star topology, bus-type topology or tree topology can be used in formula system.The equipment supplier of electricity of distributed system
There are three types of methods: power supplied locally, centrally connected power supply and bus-powered.Power supplied locally refers to that equipment provides power supply nearby, these power supplys are general
It is exchanged by local 220V through an AC/DC (Alternating Current/Direct Current, ac/dc) adapter
After obtain.The method that centrally connected power supply generally uses power supply line and communication line to be routed simultaneously, by unified DC (Direct
Current, direct current) power supply for equipment provides electric energy.In the above-mentioned methods, it is easy using power supplied locally by external interference；Using
Centrally connected power supply interference free performance is preferable, but needs to increase wiring.Using bus-powered technology appropriate, metal can be not only saved
Conducting wire can also improve system reliability.
In bus-powered method, power transmission and both-way communication are realized using a cable.But the prior art
Bus-powered method, without reasonable bus timing design, cannot take into account well for from node power supply and main and subordinate node it
Between the demand that communicates.Such as host node and between node for a long time be in communication state, will lead to bus for a long time be in low
Level state is unable to satisfy the demand to power from node.
Summary of the invention
The embodiment of the present invention provides the bus-powered and means of communication of one kind, device and computer readable storage medium, so that
One or more technical problems in the prior art are solved less.
In a first aspect, the embodiment of the invention provides a kind of bus-powered and means of communication, comprising:
Receive power supply signal modulate with pre-set detection cycle, the detection cycle include idle communication time with
Power-on time；And
In the case where needing to send upstream data, in the detection cycle, it is by the idle communication time elongation
Data communication time, and accordingly shorten the power-on time；
In the data communication time, the upstream data is sent by the power supply signal；
When the idle communication time starts, the downlink data in the power supply signal is received, and with a bit data
Signal characteristic on the basis of, parse all data bit of byte where the bit.
In one embodiment, the power supply signal in the idle communication time to communicate power voltage supply, in institute
It states and is powered in power-on time with supply voltage.
In one embodiment, the method also includes: the power-on time and the sky are arranged according to communication speed
The ratio of not busy communication time；And/or
The ratio of the power-on time Yu the data communication time is set according to communication speed.
In one embodiment, on the basis of the signal characteristic of a bit data, byte where parsing the bit
All data bit, comprising:
The signal characteristic of the bit data in the downlink data is obtained, the signal characteristic includes distortion type, width
It is worth range and/or signal duration；
According to the signal characteristic of a bit data, byte where calculating the bit using Fourier transformation owns
Data bit.
In one embodiment, according to the signal characteristic of a bit data, the ratio is calculated using Fourier transformation
All data bit of byte where special position, comprising:
According to the signal characteristic of a bit data, the distortion degree of the signal of a bit data is judged；
According to the distortion degree of the signal of a bit data, byte where calculating the bit using Fourier transformation
All data bit.
Second aspect, the embodiment of the invention provides a kind of bus-powered and communication devices, comprising:
Receiving unit, for receiving the power supply signal modulated with pre-set detection cycle, the detection cycle includes
Idle communication time and power-on time；And
Modulation unit is used for: in the case where needing to send upstream data, in the detection cycle, by the free time
It is data communication time that communication time, which elongates, and accordingly shortens the power-on time；
Transmission unit is used for: in the data communication time, sending the upstream data by the power supply signal；
The receiving unit is also used to: when the idle communication time starts, receiving the downlink in the power supply signal
Data, and on the basis of the signal characteristic of a bit data, all data bit of byte where parsing the bit.
In one embodiment, further includes: the power supply signal is in the idle communication time to communicate voltage confession
Electricity is powered in the power-on time with supply voltage.
In one embodiment, described device further includes setting unit, is used for:
The ratio of the power-on time and the idle communication time is set according to communication speed；And/or
The ratio of the power-on time Yu the data communication time is set according to communication speed.
In one embodiment, the receiving unit is also used to:
The signal characteristic of the bit data in the downlink data is obtained, the signal characteristic includes distortion type, width
It is worth range and/or signal duration；
According to the signal characteristic of a bit data, byte where calculating the bit using Fourier transformation owns
Data bit.
In one embodiment, the receiving unit is also used to:
According to the signal characteristic of a bit data, the distortion degree of the signal of a bit data is judged；
According to the distortion degree of the signal of a bit data, byte where calculating the bit using Fourier transformation
All data bit.
The third aspect, the embodiment of the invention provides a kind of bus-powered and communication device, the function of described device can be with
By hardware realization, corresponding software realization can also be executed by hardware.The hardware or software include it is one or more with
The corresponding module of above-mentioned function.
It include processor and memory in the structure of described device in a possible design, the memory is used for
Storage supports described device to execute the program of the above method, the processor is configured to storing in the memory for executing
Program.Described device can also include communication interface, be used for and other equipment or communication.
Fourth aspect, the embodiment of the invention provides a kind of computer readable storage mediums, are stored with computer program,
The program realizes any method in above-mentioned first aspect when being executed by processor.
A technical solution in above-mentioned technical proposal has the following advantages that or the utility model has the advantages that by communication and power supply point
When the timing Design that handles, the detection cycle of power supply signal is divided into idle communication time and power-on time, is on the one hand provided
On the other hand the communication modes being simple and efficient ensure that enough power-on times, to mention on the basis of ensureing communication efficiency
High system power supply ability.
Another technical solution in above-mentioned technical proposal has the following advantages that or the utility model has the advantages that is arranged according to communication speed
The ratio of the power-on time and the idle communication time, the communication need and system power supply taken into account between main and subordinate node need
It asks, system power supply ability can be further increased on the basis of ensureing communication efficiency.
Another technical solution in above-mentioned technical proposal has the following advantages that or the utility model has the advantages that with a bit data
Signal characteristic on the basis of, parse all data bit of byte where the bit, data parsing can be made more accurate, overcome
Distortion, distortion in data transmission procedure, the variation of signal duration and caused by parse difficult, improve the accurate of data transmission
Rate.
Above-mentioned general introduction is merely to illustrate that the purpose of book, it is not intended to be limited in any way.Except foregoing description
Schematical aspect, except embodiment and feature, by reference to attached drawing and the following detailed description, the present invention is further
Aspect, embodiment and feature, which will be, to be readily apparent that.
Detailed description of the invention
In the accompanying drawings, unless specified otherwise herein, otherwise indicate the same or similar through the identical appended drawing reference of multiple attached drawings
Component or element.What these attached drawings were not necessarily to scale.It should be understood that these attached drawings depict only according to the present invention
Disclosed some embodiments, and should not serve to limit the scope of the present invention.
Fig. 1 is provided in an embodiment of the present invention bus-powered and the means of communication flow chart.
When Fig. 2 is the time-division processing for bus-powered and the means of communication the bus idle state that one embodiment of the invention provides
Sequence figure.
Fig. 3 be another embodiment of the present invention provides bus-powered and the means of communication time-division processing timing diagram.
Fig. 4 is that provided in an embodiment of the present invention bus-powered and the means of communication bus free is illustrated to downlink data switching
Figure.
Fig. 5 is provided in an embodiment of the present invention bus-powered and the means of communication downlink data schematic diagram.
Fig. 6 is the flow chart of provided in an embodiment of the present invention bus-powered and the means of communication data parsing.
Fig. 7 is provided in an embodiment of the present invention bus-powered and the means of communication upstream data schematic diagram.
Fig. 8 is bus-powered and communication device the structural block diagram that one embodiment of the invention provides.
Fig. 9 be another embodiment of the present invention provides bus-powered and communication device structural block diagram.
Figure 10 is bus-powered and communication device the structural block diagram that further embodiment of this invention provides.
Specific embodiment
Hereinafter, certain exemplary embodiments are simply just described.As one skilled in the art will recognize that
Like that, without departing from the spirit or scope of the present invention, described embodiment can be modified by various different modes.
Therefore, attached drawing and description are considered essentially illustrative rather than restrictive.
Fig. 1 is provided in an embodiment of the present invention bus-powered and the means of communication flow chart.As shown in Figure 1, the present invention is real
The bus-powered and means of communication for applying example include:
Step S110, receives the power supply signal modulated with pre-set detection cycle, and the detection cycle includes the free time
Communication time and power-on time；And
Step S120, in the case where needing to send upstream data, in the detection cycle, when by the idle communication
Between to elongate be data communication time, and accordingly shorten the power-on time；
Step S130 sends the upstream data by the power supply signal in the data communication time；
Step S140 receives the downlink data in the power supply signal, and when the idle communication time starts with one
On the basis of the signal characteristic of bit data, all data bit of byte where parsing the bit.
In bus-powered method, such as RS485 distributed bus system, due to realizing electricity using a cable
Power transmission and both-way communication, it is therefore desirable to rationally design matching relationship of the power supply with communication in time sequencing.Of the invention real
In the bus-powered and means of communication that example offer is provided, the detection cycle of power supply signal is preset, in an inspection of power supply signal
Survey in the period includes idle communication time and power-on time.On the one hand this method guarantees that sufficient power-on time is to supply from node
Electricity；When on the other hand needing to send upstream data from node, idle communication time can be elongated and led to for data in detection cycle
The time is interrogated, in data communication time, upstream data is sent by power supply signal, ensure that higher communication efficiency.
In one embodiment, the method also includes: the power supply signal in the idle communication time with logical
Power voltage supply is interrogated, is powered in the power-on time with supply voltage.
When Fig. 2 is the time-division processing for bus-powered and the means of communication the bus idle state that one embodiment of the invention provides
Sequence figure.Fig. 3 be another embodiment of the present invention provides bus-powered and the means of communication time-division processing timing diagram.In Fig. 2 and Fig. 3
In, VHIndicate supply voltage；VMIndicate communication voltage；VLIndicate low level voltage；TS indicates detection cycle；T0 indicates idle communication
Time；T1 indicates data communication time；T2 indicates power-on time.
In one example, supply voltage VHVoltage value value range be more than or equal to 12V；Communicate voltage VMElectricity
The value range of pressure value is more than or equal to 10V.
When bus is in idle condition, that is, when there is no data interaction in bus, bus timing relations of distribution ginseng
As shown in the bold portion in Fig. 2.As shown in Fig. 2, in an example of the bus timing relations of distribution, a detection cycle TS
It is made of idle communication time T0 and power-on time T2, i.e. TS=T0+T2.Can be communicated in idle communication time voltage be from
Node power supply, in power-on time with supply voltage be from node power.It wherein, can be according to network and the characteristic and performance of bus
Index and host node and idle communication time is set from the communication need of node.For example, free time communication time T0 may be configured as
200μs。
Referring to Fig. 3, when needing to send upstream data from node, the bus timing relations of distribution are referring to the dotted line part in Fig. 3
Shown in point.It has been observed that when bus is in idle condition, the bus timing relations of distribution referring to fig. 2 in bold portion shown in.Together
Sample, timing relations of distribution when indicating that bus is in idle condition also by bold portion in Fig. 3, this relations of distribution and figure
It is identical shown in 2.As shown in figure 3, being distributed in an example of the bus timing relations of distribution with the bus timing of idle state
Relationship Comparison elongates the idle communication time T0 of idle state for data communication time T1 in a detection cycle TS, and
It is corresponding to shorten power-on time.That is, when sending upstream data from node, for example, when replying data to host node from node,
Data communication time T1 is greater than idle communication time T0.One detection cycle TS is by data communication time T1 and power-on time T2 group
At.From node upstream data can be sent to host node in data communication time T1.It can will be loaded with the communication signal of upstream data
It is modulated in power supply signal, that is, communication signal is added in power supply signal, then pass through power supply signal for upstream data
It is sent to host node.Host node can communicate voltage in data communication time T1 and receive the upstream data, and in power supply
Between with supply voltage be to power from node in T2.It wherein, can be according to the characteristic and performance indicator and host node of network and bus
Data communication time is set with from the communication need of node.For example, data communication time T1 may be configured as 400 μ s.
Above-mentioned technical proposal has the following advantages that or the utility model has the advantages that is set by the timing to the time-division processing that communicates and power
Meter, is divided into idle communication time and power-on time for the detection cycle of power supply signal, on the one hand provides the communication being simple and efficient
On the other hand mode ensure that enough power-on times, to improve system power supply energy on the basis of ensureing communication efficiency
Power.
In one embodiment, the method also includes: the power-on time and the sky are arranged according to communication speed
The ratio of not busy communication time.
In one embodiment, the method also includes the ratios of: the power-on time and the idle communication time
It is 5~20.
In one example, in the case where communication speed is 2400 baud rate, by power-on time and idle communication time
Ratio T2/T0 be set as 10~20；In the case where communication speed is 9600 baud rate, when by power-on time and idle communication
Between ratio T2/T0 be set as 5~10.Power-on time is appropriately extended in the case where not having data interaction in bus, is conducive to
Improve power supply efficiency.
In above-mentioned example, in the case where communication speed is relatively low, network transfer speeds are also relatively slow, such case
Under a settable detection cycle TS time it is relatively long.And in the case where different communication speeds, idle communication time
T0 may be configured as identical value.By TS=T0+T2, it is known that in the case where communication speed is relatively low, power-on time T2 can be opposite
It is longer.Therefore, in the case where communication speed is relatively low, the ratio T2/T0 of power-on time and idle communication time is relatively
Greatly.
In one embodiment, the method also includes: the power-on time and the number are arranged according to communication speed
According to the ratio of communication time.
In one embodiment, the method also includes the ratios of the power-on time and the data communication time
It is 3~10.
In one example, in the case where communication speed is 2400 baud rate, by power-on time and data communication time
Ratio T2/T1 be set as 5~10；In the case where communication speed is 9600 baud rate, when by power-on time and data communication
Between ratio T2/T1 be set as 3~5.The rationally ratio of setting power-on time and data communication time, takes into account between main and subordinate node
Communication need and system power supply demand, system power supply ability can be further increased on the basis of ensureing communication efficiency.
Above-mentioned technical proposal have the following advantages that or the utility model has the advantages that according to communication speed be arranged the power-on time with it is described
The ratio of idle communication time takes into account communication need and system power supply demand between main and subordinate node, can ensure communication efficiency
On the basis of further increase system power supply ability.
In one embodiment, the method also includes: when the idle communication time starts, receive the power supply
Downlink data in signal.
On the one hand the bus-powered and means of communication of the embodiment of the present invention guarantee that sufficient power-on time is to power from node,
It, can be when the idle communication time of a detection cycle starts, by downlink when another aspect host node needs to send downlink data
Data are sent to from node, ensure that higher communication efficiency.For example, idle communication time of the host node in a detection cycle
When beginning, the disposable sending of broadcast message is sent broadcast messages to by bus from node.Similarly, from node and
When idle communication time starts, the downlink data in the power supply signal is received.
Fig. 4 is that provided in an embodiment of the present invention bus-powered and the means of communication bus free is illustrated to downlink data switching
Figure.In Fig. 4, VHIndicate supply voltage；VMIndicate communication voltage；VLIndicate low level voltage, VLThe value range of voltage value be
VM>VL≥0；TS indicates detection cycle.It has been observed that when bus is in idle condition, when a detection cycle TS is communicated by the free time
Between T0 and power-on time T2 composition, i.e. TS=T0+T2.When host node is to when sending downlink data from node, host node will be
Downlink data is sent bus by the moment that one T0 starts, and middle power supply signal voltage value pulls down to V referring to fig. 4LCorresponding
Period.
In this embodiment, since the data volume of downlink data is generally smaller, such as host node sends one extensively
Information is broadcast, therefore it is also fewer to send the downlink data occupied time.Downlink data is sent using the less time, it will not volume
It is outer to occupy excessive power-on time, power supply capacity will not be impacted.Wherein, host node and from node both ends all to confession
Electric signal is detected, main when the idle communication time for some detection cycle for detecting power supply signal starts
Node sends data to from node, and this mode is simple and efficient convenient for detection, implementation method, can ensure and realize higher communication
Efficiency.
In one embodiment, when the idle communication time starts, host node passes through the power supply signal for institute
State data be sent to it is described from node, further includes:
The downlink data is sent with the supply voltage, wherein a bit-binary is sent in first time threshold
Data, and in the case where sending bit-binary data " 0 ", in the first time threshold, in the power supply electricity
The pulse signal of the low level voltage of a length of second time threshold at one is modulated in pressure.
Fig. 5 is provided in an embodiment of the present invention bus-powered and the means of communication downlink data schematic diagram.In Fig. 5, VH
Indicate supply voltage；VLIndicate low level voltage, VLVoltage value value range be VM>VL≥0；T3 indicates a downlink data
Delivery time.As shown in figure 5, in one example, host node is with supply voltage VHData are sent, a bit-binary is sent
The time of data " 1 " and the time for sending a bit-binary data " 0 " are all T3.When sending data " 1 ", for telecommunications
Number voltage value be always held at supply voltage VH.When sending bit-binary data " 0 ", host is in supply voltage VHOn
It is shorter to modulate a time span, voltage is low level voltage VLPulse signal.That is, transmission " 0 " data when
It waits, supply voltage was in low level voltage V before thisL, then draw high supply voltage VH, can guarantee simultaneously in this way host node have compared with
High communication efficiency and enough system power supply abilities.
Fig. 6 is the flow chart of provided in an embodiment of the present invention bus-powered and the means of communication data parsing.Such as Fig. 6 institute
Show, in one embodiment, on the basis of the signal characteristic of a bit data, all numbers of byte where parsing the bit
According to position, comprising:
Step S210, obtains the signal characteristic of the bit data in the downlink data, and the signal characteristic includes abnormal
Become type, amplitude range and/or signal duration；
Step S220 calculates bit place using Fourier transformation according to the signal characteristic of a bit data
All data bit of byte.
In one example, the upstream data of a byte can be transmitted in data communication time T1 from node.Usual feelings
Under condition, the data format of bus transfer can be made of start bit, data bit and stop position etc..For example, in data communication time T1
The interior data bit for sending a byte is 8.
Referring to Fig. 5, the data content that each data bit is sent may include a bit-binary data " 1 " or a bit two into
Data " 0 " processed.In this embodiment, when receiving downlink data from node, it will description a data figure conduct
Benchmark, such as using the time of first T3 as benchmark in Fig. 5, go parsing to restore entire word according to special algorithm with this benchmark
Joint number evidence.
In network transmission process, the decaying of the signal as caused by distance and environment, inductance capacitance between line, inductance and its
The reasons such as the interference wave of his different frequency can cause different degrees of influence to normal data, signal inevitably occurs
Situations such as distortion, waveform distortion, therefore after the pulse curve of a data figure is depicted, it can be from wherein getting
The signal characteristics such as distortion type, amplitude range and/or signal duration.When parsing all data bit of entire byte, Ke Yiyu
The pulse curve for a data figure for having been described out compares, by the signal characteristic of the pulse curve of a data figure
On the basis of go to parse all data bit of entire byte, to avoid error is parsed caused by signal distortion.
In one embodiment, according to the signal characteristic of a bit data, the ratio is calculated using Fourier transformation
All data bit of byte where special position, comprising:
According to the signal characteristic of a bit data, the distortion degree of the signal of a bit data is judged；
According to the distortion degree of the signal of a bit data, byte where calculating the bit using Fourier transformation
All data bit.
Specifically, the figure of a data can be depicted first actually to judge the position in the waveform reality after signal reflex
Distortion degree, such as edge slope, ring, volt value, pulsewidth.Further according to above-mentioned a data sample waveform as benchmark, benefit
The real data of other in byte where calculating this bit of data with Fourier transformation.This method uses the side of spot sampling
Formula, it is possible to prevente effectively from the difference sex distortion that data generate under the conditions of passing through various complex jammings, so as to efficiently true
Ground restoring data completes data exchange process.
Above-mentioned technical proposal has the following advantages that or the utility model has the advantages that on the basis of the signal characteristic of a bit data,
All data bit of byte where parsing the bit can make data parsing more accurate, overcome in data transmission procedure
Distortion, distortion, the variation of signal duration and caused by parse difficult, the accuracy rate of the data transmission of raising.
In one embodiment, in the data communication time, the upper line number is sent by the power supply signal
According to, comprising:
The upstream data of a byte is sent in the data communication time of each detection cycle.
Fig. 7 is provided in an embodiment of the present invention bus-powered and the means of communication upstream data schematic diagram.In Fig. 7, VH
Indicate supply voltage；VMIndicate communication voltage；VLIndicate low level voltage, VLVoltage value value range be VM>VL≥0；TS table
Show detection cycle；T1 indicates data communication time；T4 indicates the time from node transmission a data.
In one example, the upstream data of a byte is sent in data communication time T1 from node.Usual situation
Under, the data format of bus transfer can be made of start bit, data bit, parity check bit and stop position.Wherein, parity bit
It is not required.The beginning of one byte of start bit flag transmission.Sender starts a byte by sending start bit
Transmission, recipient can make the reception clock of oneself synchronous with the data of sender with start bit.Data bit indicates that one group of data is real
The data bits that border includes, i.e., the information content actually sent.Data bit is really having in communication after start bit
Imitate information.The digit of data bit is arranged jointly by communicating pair.For example, in embodiments of the present invention, in data communication time T1
The interior data bit for sending a byte is 8.Stop position is finally, the end transmitted to mark one byte.Position the time be
Each time width, as the T4 in Fig. 7 indicates the time of transmission a data.
In this embodiment, data volume appropriate is sent, in each detection cycle to better adapt to network biography
Defeated rate.Such as the upstream data of a byte is sent in the data communication time of each detection cycle, it can be preferably
Adapt to communication speed.In one example, in the case where communication speed is 9600 baud rate, the time for transmitting a byte is needed
Want 1 millisecond；In the case where communication speed is 2400 baud rate, the time for transmitting a byte needs 4 milliseconds.Show at another
In example, cycle T S can be will test and be set as 4 milliseconds, wherein the portion of time in detection cycle, is i.e. power-on time T2 is set as
3.6 millisecond.Free time another part time communication time T0 in detection cycle is 400 microseconds, is used for transmission data.
Fig. 8 is bus-powered and communication device the structural block diagram that one embodiment of the invention provides.As shown in figure 8, this hair
The bus-powered and communication device of bright embodiment includes:
Receiving unit 100, for receiving the power supply signal modulated with pre-set detection cycle, the detection cycle packet
Include idle communication time and power-on time；And
Modulation unit 200, is used for: in the case where needing to send upstream data, in the detection cycle, by the sky
It is data communication time that not busy communication time, which elongates, and accordingly shortens the power-on time；
Transmission unit 300, is used for: in the data communication time, sending the upper line number by the power supply signal
According to；
The receiving unit 100 is also used to: when the idle communication time starts, under receiving in the power supply signal
Row data, and on the basis of the signal characteristic of a bit data, all data bit of byte where parsing the bit.
In one embodiment, further includes: the power supply signal is in the idle communication time to communicate voltage confession
Electricity is powered in the power-on time with supply voltage.
Fig. 9 be another embodiment of the present invention provides bus-powered and communication device structural block diagram.As shown in figure 9,
In a kind of embodiment, described device further includes setting unit 400, for the power-on time and institute to be arranged according to communication speed
State the ratio of idle communication time.
In one embodiment, further includes: the ratio of the power-on time and the idle communication time is 5~20.
Referring to Fig. 9, in one embodiment, described device further includes setting unit 400, for being set according to communication speed
Set the ratio of the power-on time Yu the data communication time.
In one embodiment, further includes: the ratio of the power-on time and the data communication time is 3~10.
In one embodiment, the transmission unit 300 is also used to: logical in the data of each detection cycle
Interrogate the upstream data that a byte is sent in the time.
In one embodiment, the receiving unit 100 is also used to: when the idle communication time starts, being received
Downlink data in the power supply signal.
In one embodiment, the receiving unit 100 is also used to:
The signal characteristic of the bit data in the downlink data is obtained, the signal characteristic includes distortion type, width
It is worth range and/or signal duration；
According to the signal characteristic of a bit data, byte where calculating the bit using Fourier transformation owns
Data bit.
In one embodiment, the receiving unit is also used to:
According to the signal characteristic of a bit data, the distortion degree of the signal of a bit data is judged；
According to the distortion degree of the signal of a bit data, byte where calculating the bit using Fourier transformation
All data bit.
The function of each unit may refer to the correlation of the above method in the bus-powered and communication device of the embodiment of the present invention
Description, details are not described herein.
It is described including processor and memory in bus-powered and communication device structure in a possible design
Memory executes above-mentioned bus-powered and the means of communication the programs, the processing for storing supporting bus power supply and communication device
Device is configurable for executing the program stored in the memory.Described bus-powered and communication device can also include communication
Interface, bus-powered and communication device and other equipment or communication.
Figure 10 is bus-powered and communication device the structural block diagram that further embodiment of this invention provides.As shown in Figure 10,
The device includes: memory 101 and processor 102, and the computer that can be run on the processor 102 is stored in memory 101
Program.The processor 102 realizes the bus-powered and means of communication in above-described embodiment when executing the computer program.Institute
The quantity for stating memory 101 and processor 102 can be one or more.
The device further include:
Communication interface 103 carries out data interaction for being communicated with external device.
Memory 101 may include high speed RAM memory, it is also possible to further include nonvolatile memory (non-
Volatile memory), a for example, at least magnetic disk storage.
If memory 101, processor 102 and the independent realization of communication interface 103, memory 101,102 and of processor
Communication interface 103 can be connected with each other by bus and complete mutual communication.The bus can be Industry Standard Architecture
Structure (ISA, Industry Standard Architecture) bus, external equipment interconnection (PCI, Peripheral
Component) bus or extended industry-standard architecture (EISA, Extended Industry Standard
Component) bus etc..The bus can be divided into address bus, data/address bus, control bus etc..For convenient for expression, Figure 10
In only indicated with a thick line, it is not intended that an only bus or a type of bus.
Optionally, in specific implementation, if memory 101, processor 102 and communication interface 103 are integrated in one piece of core
On piece, then memory 101, processor 102 and communication interface 103 can complete mutual communication by internal interface.
Another aspect, the embodiment of the invention provides a kind of computer readable storage mediums, are stored with computer program,
The program realizes any method in the above-mentioned bus-powered and means of communication when being executed by processor.
In the description of this specification, reference term " one embodiment ", " some embodiments ", " example ", " specifically show
The description of example " or " some examples " etc. means specific features, structure, material or spy described in conjunction with this embodiment or example
Point is included at least one embodiment or example of the invention.Moreover, particular features, structures, materials, or characteristics described
It may be combined in any suitable manner in any one or more of the embodiments or examples.In addition, without conflicting with each other, this
The technical staff in field can be by the spy of different embodiments or examples described in this specification and different embodiments or examples
Sign is combined.
In addition, term " first ", " second " are used for descriptive purposes only and cannot be understood as indicating or suggesting relative importance
Or implicitly indicate the quantity of indicated technical characteristic." first " is defined as a result, the feature of " second " can be expressed or hidden
It include at least one this feature containing ground.In the description of the present invention, the meaning of " plurality " is two or more, unless otherwise
Clear specific restriction.
Any process described otherwise above or method description are construed as in flow chart or herein, and expression includes
It is one or more for realizing specific logical function or process the step of executable instruction code module, segment or portion
Point, and the range of the preferred embodiment of the present invention includes other realization, wherein can not press shown or discussed suitable
Sequence, including according to related function by it is basic simultaneously in the way of or in the opposite order, Lai Zhihang function, this should be of the invention
Embodiment person of ordinary skill in the field understood.
Expression or logic and/or step described otherwise above herein in flow charts, for example, being considered use
In the order list for the executable instruction for realizing logic function, may be embodied in any computer-readable medium, for
Instruction execution system, device or equipment (such as computer based system, including the system of processor or other can be held from instruction
The instruction fetch of row system, device or equipment and the system executed instruction) it uses, or combine these instruction execution systems, device or set
It is standby and use.For the purpose of this specification, " computer-readable medium ", which can be, any may include, stores, communicates, propagates or pass
Defeated program is for instruction execution system, device or equipment or the dress used in conjunction with these instruction execution systems, device or equipment
It sets.The more specific example (non-exhaustive list) of computer-readable medium include the following: there is the electricity of one or more wirings
Interconnecting piece (electronic device), portable computer diskette box (magnetic device), random access memory (RAM), read-only memory
(ROM), erasable edit read-only storage (EPROM or flash memory), fiber device and portable read-only memory
(CDROM).In addition, computer-readable medium can even is that the paper that can print described program on it or other suitable Jie
Matter, because can then be edited, be interpreted or when necessary with other for example by carrying out optical scanner to paper or other media
Suitable method is handled electronically to obtain described program, is then stored in computer storage.
It should be appreciated that each section of the invention can be realized with hardware, software, firmware or their combination.Above-mentioned
In embodiment, software that multiple steps or method can be executed in memory and by suitable instruction execution system with storage
Or firmware is realized.It, and in another embodiment, can be under well known in the art for example, if realized with hardware
Any one of column technology or their combination are realized: having a logic gates for realizing logic function to data-signal
Discrete logic, with suitable combinational logic gate circuit specific integrated circuit, programmable gate array (PGA), scene
Programmable gate array (FPGA) etc..
Those skilled in the art are understood that realize all or part of step that above-described embodiment method carries
It suddenly is that relevant hardware can be instructed to complete by program, the program can store in a kind of computer-readable storage medium
In matter, which when being executed, includes the steps that one or a combination set of embodiment of the method.
It, can also be in addition, each functional unit in each embodiment of the present invention can integrate in a processing module
It is that each unit physically exists alone, can also be integrated in two or more units in a module.Above-mentioned integrated mould
Block both can take the form of hardware realization, can also be realized in the form of software function module.The integrated module is such as
Fruit is realized and when sold or used as an independent product in the form of software function module, also can store in a computer
In readable storage medium storing program for executing.The storage medium can be read-only memory, disk or CD etc..
The above description is merely a specific embodiment, but scope of protection of the present invention is not limited thereto, any
Those familiar with the art in the technical scope disclosed by the present invention, can readily occur in its various change or replacement,
These should be covered by the protection scope of the present invention.Therefore, protection scope of the present invention should be with the guarantor of the claim
It protects subject to range.
Claims (12)
1. a kind of bus-powered and means of communication characterized by comprising
The power supply signal modulated with pre-set detection cycle is received, the detection cycle includes idle communication time and power supply
Time；And
In the case where needing to send upstream data, in the detection cycle, the idle communication time is elongated as data
Communication time, and accordingly shorten the power-on time；
In the data communication time, the upstream data is sent by the power supply signal；
When the idle communication time starts, the downlink data in the power supply signal is received, and with the letter of a bit data
On the basis of number feature, all data bit of byte where parsing the bit.
2. the method according to claim 1, wherein further include:
The power supply signal in the idle communication time to communicate power voltage supply, with supply voltage in the power-on time
Power supply.
3. the method according to claim 1, wherein further include:
The ratio of the power-on time and the idle communication time is set according to communication speed；And/or
The ratio of the power-on time Yu the data communication time is set according to communication speed.
4. method according to any one of claim 1-3, which is characterized in that using the signal characteristic of a bit data as base
Standard, all data bit of byte where parsing the bit, comprising:
The signal characteristic of the bit data in the downlink data is obtained, the signal characteristic includes distortion type, amplitude model
It encloses and/or signal duration；
According to the signal characteristic of a bit data, all data of byte where calculating the bit using Fourier transformation
Position.
5. according to the method described in claim 4, it is characterized in that, utilizing Fu according to the signal characteristic of a bit data
In leaf transformation calculate all data bit of byte where the bit, comprising:
According to the signal characteristic of a bit data, the distortion degree of the signal of a bit data is judged；
According to the distortion degree of the signal of a bit data, the institute of byte where calculating the bit using Fourier transformation
There is data bit.
6. a kind of bus-powered and communication device characterized by comprising
Receiving unit, for receiving the power supply signal modulated with pre-set detection cycle, the detection cycle includes the free time
Communication time and power-on time；And
Modulation unit is used for: in the case where needing to send upstream data, in the detection cycle, by the idle communication
It is data communication time that time, which is elongated, and accordingly shortens the power-on time；
Transmission unit is used for: in the data communication time, sending the upstream data by the power supply signal；
The receiving unit is also used to: when the idle communication time starts, the downlink data in the power supply signal is received,
And on the basis of the signal characteristic of a bit data, all data bit of byte where parsing the bit.
7. device according to claim 6, which is characterized in that further include:
The power supply signal in the idle communication time to communicate power voltage supply, with supply voltage in the power-on time
Power supply.
8. device according to claim 6, which is characterized in that further include setting unit, be used for:
The ratio of the power-on time and the idle communication time is set according to communication speed；And/or
The ratio of the power-on time Yu the data communication time is set according to communication speed.
9. device a method according to any one of claims 6-8, which is characterized in that the receiving unit is also used to:
The signal characteristic of the bit data in the downlink data is obtained, the signal characteristic includes distortion type, amplitude model
It encloses and/or signal duration；
According to the signal characteristic of a bit data, all data of byte where calculating the bit using Fourier transformation
Position.
10. device according to claim 9, which is characterized in that the receiving unit is also used to:
According to the signal characteristic of a bit data, the distortion degree of the signal of a bit data is judged；
According to the distortion degree of the signal of a bit data, the institute of byte where calculating the bit using Fourier transformation
There is data bit.
11. a kind of bus-powered and communication device characterized by comprising
One or more processors；
Storage device, for storing one or more programs；
When one or more of programs are executed by one or more of processors, so that one or more of processors
Realize such as method as claimed in any one of claims 1 to 5.
12. a kind of computer readable storage medium, is stored with computer program, which is characterized in that the program is held by processor
Such as method as claimed in any one of claims 1 to 5 is realized when row.
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| CN201910140321.4A CN109889419B (en) | 2019-02-26 | 2019-02-26 | Bus power supply and communication method, device and storage medium |
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| CN201910140321.4A CN109889419B (en) | 2019-02-26 | 2019-02-26 | Bus power supply and communication method, device and storage medium |
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| CN109889419B (en) | 2021-06-15 |
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