CN109889161A - A kind of annular digital controlled oscillator based on mos capacitance tuning structure - Google Patents
A kind of annular digital controlled oscillator based on mos capacitance tuning structure Download PDFInfo
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- CN109889161A CN109889161A CN201810366966.5A CN201810366966A CN109889161A CN 109889161 A CN109889161 A CN 109889161A CN 201810366966 A CN201810366966 A CN 201810366966A CN 109889161 A CN109889161 A CN 109889161A
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- pmos transistor
- phase inverter
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Abstract
It the present invention relates to a kind of annular digital controlled oscillator based on mos capacitance tuning structure, is made of the cascade of three-level differential feedback phase inverter, including the identical first differential feedback phase inverter τ of structure1, the second differential feedback phase inverter τ2And third differential feedback phase inverter τ3, DCO oscillating circuit, which passes through, changes the differential vibrating signal that frequency selects control word to export corresponding frequencies.Frequency tuning structure, which is used, greatly improves the tuning range and resolution ratio of DCO output frequency by the array that two pairs of reverse parallel connection PMOS capacitor cells form, the quantizing noise of DCO circuit is further reduced under the premise of guaranteeing low-power consumption, improves the overall performance of circuit.
Description
Technical field
The present invention relates to a kind of digital controlled oscillator, especially a kind of annular numerical control oscillation based on mos capacitance tuning structure
Device belongs to fields of numeric control technique.
Background technique
With the rapid development of wireless communication industry, hot spot is also become for the research of transceiver.As wireless
The key component of transceiver, delay lock loop (Phase locked loops, PLLs) provide this for entire wireless transceiver system
Shake signal.In recent years, being constantly progressive with integrated circuit technology, the voltage margin of traditional delay lock loop increasingly by
Limit, and the demand of area cost and low power dissipation design all determines that it is increasingly difficult to adapt to twireless radio-frequency communication.Therefore in order to
It solves the above problems, proposes the concept of all-digital phase-locked loop (All Digital Phase Locked Loop, ADPLL), phase
Compared with traditional simulation locking ring, ADPLL is not easily susceptible to the influence of voltage, temperature and process deviation, has very on overall performance
Good advantage.
The most important performance of delay lock loop is phase noise, and DCO is directly determined as the nucleus module in ADPLL
ADPLL with outer phase noise performance.DCO frequency resolution is higher, and correspondingly, quantizing noise is lower, therefore improves frequency
Rate resolution ratio is conducive to inhibit out-of-band noise.The DCO for how designing high frequency resolution also becomes the weight of IC design
Point and difficult point.
For oscillator, general there are two types of structure types: LC oscillator and ring oscillator.The oscillation of LC oscillator
Frequency is very high, be spaced between adjacent output frequency it is larger and be not easy it is digital control, be generally used for simulation High-frequency PLL.Review ring
The CMOS technology of pure digi-tal can be used to realize in shape oscillator, does not need inductance element, so as to effectively reduce chip area,
Reduce cost.In addition, the structure of ring oscillator is simple, it is made of, is easy to control simple chain of inverters, this is in digital electricity
Occupy stronger advantage in the design on road.Although the phase noise of ring oscillator inferior to LC oscillator, it is contemplated that
Ring oscillator structure is simple and is easier the advantage compatible with digital integrated electronic circuit, using annular digital controlled oscillator to mentioning
Still there is very big advantage in the performance of high full-digital circuit.
Improving DCO tuned cell structure is to realize the direct and effective approach of one kind of high frequency resolution DCO, is generally adopted
Tentatively control DCO's first is that being made of delay cell and multi-path selecting solution device with the output frequency of two kinds of mechanism control DCO
Frequency, this mechanism adjusting adjustable range is big, is unfavorable for improving frequency resolution；Another controlling mechanism is by capacitance tuning
Unit is constituted, although the power loss of DCO can be effectively reduced as tuned cell using the micro capacitance based on transmission line, by
Passive device is introduced in circuit, DCO circuit loses the advantage of easy expansion.Meanwhile the length of transmission line also determines
The area and cost of chip.
Summary of the invention
It is an object of the invention to: in view of the defects existing in the prior art, propose a kind of based on mos capacitance tuning structure
Annular digital controlled oscillator further reduces the quantizing noise of DCO circuit under the premise of guaranteeing low-power consumption, improves circuit
Overall performance.
To achieve the above object, the technical solution of the present invention is as follows: a kind of annular numerical control vibration based on mos capacitance tuning structure
Device is swung, is made of the cascade of three-level differential feedback phase inverter, including the identical first differential feedback phase inverter τ of structure1, the second difference
Feedback inverter τ2And third differential feedback phase inverter τ3；
The first differential feedback phase inverter τ1Input terminal IN+With IN-Respectively with the output end DCO of DCO oscillating circuit-
With DCO+It is connected, the first differential feedback phase inverter τ1Output end OUT-With OUT+Respectively with the second differential feedback reverse phase
Device τ2Input terminal IN+With IN-It is connected；The second differential feedback phase inverter τ2Output end OUT-With OUT+Respectively with third
Differential feedback phase inverter τ3Input terminal IN+With IN-It is connected；The third differential feedback phase inverter τ3Output end OUT-With
OUT+Respectively with the output end DCO of DCO oscillating circuit-With DCO+It is connected, forms ring structure；
The capacitance tuning array that the frequency tuning structure is made of two pairs of reverse parallel connection PMOS capacitor cells.
The present invention is made of the cascade of three-level differential feedback phase inverter, and DCO oscillating circuit selects control word by changing frequency
Export the differential vibrating signal of corresponding frequencies.Frequency tuning structure uses the battle array being made of two pairs of reverse parallel connection PMOS capacitor cells
Column greatly improve the tuning range and resolution ratio of DCO output frequency, further reduce under the premise of guaranteeing low-power consumption
The quantizing noise of DCO circuit improves the overall performance of circuit.
Of the invention further limits technical solution are as follows: the capacitance tuning array is that 4bit controls digit, including four
Identical mos capacitance C0, C1, C2 and C3；The top crown of described mos capacitance C0, C1, C2, C3 homogeneously connect, and are connected to simultaneously
The output end of current differential feedback phase inverter；The bottom crown of described mos capacitance C0, C1, C2, C3 homogeneously connect, and are grounded simultaneously.
Further, the mos capacitance unit is made of two pairs of reverse parallel connection PMOS capacitors, including the first PMOS transistor
PM1, the second PMOS transistor PM2, third PMOS transistor PM3 and the 4th PMOS transistor PM4；First PMOS transistor
The source level of PM1, drain electrode, liner body interconnect, while being connected with the grid of third PMOS transistor PM3, and the first PMOS
The grid and tuning control word b of transistor PM1nIt is connected；The source level of the third PMOS transistor PM3, drain electrode, liner body are mutual
It is connected, while meets tuning control word bn；The source level of the second PMOS transistor PM2, drain electrode, liner body interconnect, together
The grid of tetra- PMOS transistor PM4 of Shi Yu is connected, and the grid of the second PMOS transistor PM2 and tuning control word bnIt is connected
It connects；The source level of the 4th PMOS transistor PM4, drain electrode, liner body interconnect, while meeting tuning control word bn。
Further, the basic rp unit of the oscillator is differential feedback phase inverter, including four PMOS transistors
With two NMOS transistors, respectively the first PMOS transistor MP1, the second PMOS transistor MP2, third PMOS transistor MP3And
4th PMOS transistor MP4；First NMOS transistor MN1And the second NMOS transistor MN2；Differential input signal IN+Is connect respectively
One PMOS transistor MP1With the first NMOS transistor MN1Grid；Differential input signal IN-The 4th PMOS transistor M is met respectivelyP4
With the second NMOS transistor MN2Grid.
The first PMOS transistor MP1Source electrode meet power supply Vdd, drain electrode and the second PMOS transistor MP2Drain electrode and
First NMOS transistor MN1Drain electrode be connected；The second PMOS transistor MP2Source electrode connect power supply Vdd, grid and the 4th
PMOS transistor MP4Drain electrode be connected, as difference output end OUT+；The third PMOS transistor MP3Source electrode connect power supply
Vdd, drain electrode and the 4th PMOS transistor MP4Drain electrode and the second NMOS transistor MN2Drain electrode be connected；Its grid and
One PMOS transistor MP1Drain electrode be connected, as difference output end OUT-；The 4th PMOS transistor MP4Source electrode connect power supply
Vdd；The first NMOS transistor MN1Source electrode ground connection, the second NMOS transistor MN2Source electrode ground connection.
The invention adopts the above technical scheme compared with prior art, has following technical effect that
The present invention uses the annular digital controlled oscillator with high frequency resolution and broad tuning range, and frequency tuning unit is adopted
With the array being made of two pairs of reverse parallel connection PMOS capacitor cells, small electric tolerance is obtained using the size difference of two pairs of PMOS tube
Value, in this way by increasing or decreasing that the number of access mos capacitance unit can be smaller come control ring shape digital controlled oscillator
Output frequency, to realize the design of high-resolution DCO.Entire DCO circuit does not introduce supplementary module, is guaranteeing low-power consumption
Under the premise of further reduce the quantizing noise of DCO circuit, improve the overall performance of circuit.
Detailed description of the invention
The present invention will be further described below with reference to the drawings.
Fig. 1 is basic circuit structure figure of the invention.
Fig. 2 is PMOS capacitance tuning array circuit diagram of the invention.
Fig. 3 is every grade of difference feedback inverter circuit diagram of annular digital controlled oscillator of the invention.
Fig. 4 is PMOS specific capacitance SP analogous diagram of the invention；
Wherein Fig. 4-a is the PMOS capacitor cell SP analogous diagram when frequency control word is 0, and Fig. 4-b is to work as frequency control word
PMOS capacitor cell SP analogous diagram when being 1.
Fig. 5 is PMOS specific capacitance C-V curve figure of the invention.
Fig. 6 is Transient figure of the invention.
Fig. 7 is the annular digital controlled oscillator of the invention based on mos capacitance tuning structure and is free of mos capacitance tuning structure
Digital controlled oscillator phase noise analogous diagram；
Wherein 7-a is the analogous diagram of mutually making an uproar based on mos capacitance tuning structure, and 7-b is free from the phase of mos capacitance tuning structure
It makes an uproar analogous diagram.
Specific embodiment
Present embodiments provide a kind of annular digital controlled oscillator based on mos capacitance tuning structure, structure such as Fig. 1 institute
Show, by three-level differential feedback phase inverter τ1、τ2And τ3Cascade is constituted, and DCO oscillating circuit selects control word b by changing frequencynIt is defeated
The differential vibrating signal DCO of corresponding frequencies out+And DCO-。τ1Input terminal IN+With IN-Respectively meet DCO output end DCO-With
DCO+；τ1Output end OUT-With OUT+Respectively meet τ2Input terminal IN+With IN-；τ2Output end OUT-With OUT+Respectively divide
τ is not met3Input terminal IN+With IN-；τ3Output end OUT-With OUT+Respectively meet DCO output end DCO-With DCO+, such structure
At entire DCO loop.
As shown in Fig. 2, PMOS capacitance tuning array using 4bit control digit, including four identical mos capacitance C0,
C1, C2 and C3, wherein the top crown of C0, C1, C2 and C3 are connected with, while connecing the output of current differential feedback phase inverter
End；What the bottom crown of C0, C1, C2 and C3 were also connected to, it is grounded simultaneously.
Designed mos capacitance unit is made of two pairs of reverse parallel connection PMOS capacitors, including four PMOS transistors,
In:
The source level of PM1, drain electrode, liner body are connected to, and connect the grid of PM3 together；The grid of PM1 meets tuning control word bn；
The source level of PM3, drain electrode, liner body are connected to, and meet tuning control word b togethern；The source level of PM2, drain electrode, liner body are connected to, and one
With the grid for meeting PM4；The grid of PM2 meets tuning control word bn；The source level of PM4, drain electrode, liner body are connected to, and connect tuning together
Control word bn。
As shown in figure 3, the basic rp unit of the annular digital controlled oscillator is differential feedback phase inverter, including four PMOS
Transistor and two NMOS transistors, in which:
Differential input signal IN+M is met respectivelyP1And MN1Grid；Differential input signal IN-M is met respectivelyP4And MN2Grid；
MP1Source electrode meet power supply Vdd；MP1Drain electrode and MP2Drain electrode, MN1Drain electrode be connected；MP2Source electrode connect power supply
Vdd；MP2Grid and MP4Drain electrode be connected, and as difference output end OUT+；MN1Source electrode ground connection；
MP3Source electrode meet power supply Vdd；MP3Drain electrode and MP4Drain electrode, MN2Drain electrode be connected；MP3Grid and MP1Leakage
Extremely it is connected, and as difference output end OUT-；MP4Source electrode meet power supply Vdd；MN2Source electrode ground connection.
Fig. 4 is PMOS capacitor SP analogous diagram of the invention；Wherein Fig. 4-a is the PMOS capacitor list when frequency control word is 0
First SP analogous diagram, Fig. 4-b are the PMOS capacitor cell SP analogous diagrams when frequency control word is 1.From the figure we can see that when
When control word input is 0, SP emulates to obtain PMOS capacitor's capacity to be 469.518aF；When control word input is 1, SP is emulated
It is 809.046aF to PMOS capacitor's capacity.Obtained difference 339.528aF, the capacitive differential of realization is smaller, and such DCO is adjacent
Interval between control word output frequency can also become smaller, and entire DCO resolution ratio is greatly improved.
Fig. 5 is PMOS specific capacitance C-V curve figure of the invention.It can be seen from the figure that working as frequency control word bnIt is 1
When, PM1 and PM2 work work in region C, PM3 and PM4 in region F；As frequency control word bnWhen being 0, PM1 and PM2 work exist
Region D, PM3 and PM4 work are in region E.When frequency control word changes, it can be achieved that capacitive differential are as follows: (CC+CF)-
(CD+CE)。
Fig. 6 is the annular digital controlled oscillator Transient figure of the invention based on mos capacitance tuning structure.It can be with from figure
To find out, designed annular digital controlled oscillator can work normally near 2.4GHz, and output waveform is standard sine wave,
The amplitude of oscillation is 1.2V.
Fig. 7 is the annular digital controlled oscillator of the invention based on mos capacitance tuning structure and is free of mos capacitance tuning structure
Digital controlled oscillator phase noise analogous diagram；Wherein it is imitative to be that the annular digital controlled oscillator based on mos capacitance tuning structure is mutually made an uproar by 7-a
True figure, the digital controlled oscillator that 7-b is free from mos capacitance tuning structure are mutually made an uproar analogous diagram.It can be with from the comparison of Fig. 7-a and 7-b
Find out, at 1MHz frequency deviation, the phase noise of the digital controlled oscillator without mos capacitance tuning structure is -85.85dBc/Hz, is led to
It crosses using mos capacitance tuning structure, the phase noise of output signal drops to -94.85dBc/Hz, that is to say, that the present invention will
The phase noise performance of DCO optimizes 9dBc/Hz.
In conclusion the present invention, which is used, cascades the annular digital controlled oscillator constituted, frequency by three-level differential feedback phase inverter
Tuned cell uses the array that is made of two pairs of reverse parallel connection PMOS capacitor cells, using the size difference of two pairs of PMOS tube obtain compared with
Small capacitances difference, by increasing or decreasing, the number of access mos capacitance unit is smaller to be vibrated come control ring figurate number control in this way
The output frequency of device, to realize the design of high-resolution DCO.Entire DCO circuit does not introduce supplementary module, is guaranteeing low function
The quantizing noise of DCO circuit is further reduced under the premise of consumption, improves the overall performance of circuit.
The foregoing is merely better embodiment of the invention, protection scope of the present invention is not with above embodiment
Limit, as long as those of ordinary skill in the art's equivalent modification or variation made by disclosure according to the present invention, should all be included in power
In the protection scope recorded in sharp claim.
Claims (5)
1. a kind of annular digital controlled oscillator based on mos capacitance tuning structure, it is characterised in that: by three-level differential feedback phase inverter
Cascade is constituted, including the identical first differential feedback phase inverter τ of structure1, the second differential feedback phase inverter τ2And third differential feedback
Phase inverter τ3；
The first differential feedback phase inverter τ1Input terminal IN+With IN-Respectively with the output end DCO of DCO oscillating circuit-With DCO+
It is connected, the first differential feedback phase inverter τ1Output end OUT-With OUT+Respectively with the second differential feedback phase inverter τ2's
Input terminal IN+With IN-It is connected；The second differential feedback phase inverter τ2Output end OUT-With OUT+It is anti-with third difference respectively
Present phase inverter τ3Input terminal IN+With IN-It is connected；The third differential feedback phase inverter τ3Output end OUT-With OUT+Respectively
With the output end DCO of DCO oscillating circuit-With DCO+It is connected, forms ring structure；
The capacitance tuning array that the frequency tuning structure is made of two pairs of reverse parallel connection PMOS capacitor cells.
2. the annular digital controlled oscillator according to claim 1 based on mos capacitance tuning structure, it is characterised in that: described
Capacitance tuning array is that 4bit controls digit, including four identical mos capacitance C0, C1, C2 and C3；The mos capacitance C0,
The top crown of C1, C2, C3 homogeneously connect, while being connected to the output end of current differential feedback phase inverter；The mos capacitance
The bottom crown of C0, C1, C2, C3 homogeneously connect, and are grounded simultaneously.
3. the annular digital controlled oscillator according to claim 2 based on mos capacitance tuning structure, it is characterised in that: described
Mos capacitance unit is made of two pairs of reverse parallel connection PMOS capacitors, including the first PMOS transistor PM1, the second PMOS transistor
PM2, third PMOS transistor PM3 and the 4th PMOS transistor PM4；
The source level of the first PMOS transistor PM1, drain electrode, liner body interconnect, while with third PMOS transistor PM3's
Grid is connected, and the grid of the first PMOS transistor PM1 and tuning control word bnIt is connected；
The source level of the third PMOS transistor PM3, drain electrode, liner body interconnect, while meeting tuning control word bn；
The source level of the second PMOS transistor PM2, drain electrode, liner body interconnect, while with the 4th PMOS transistor PM4's
Grid is connected, and the grid of the second PMOS transistor PM2 and tuning control word bnIt is connected；
The source level of the 4th PMOS transistor PM4, drain electrode, liner body interconnect, while meeting tuning control word bn。
4. the annular digital controlled oscillator according to claim 3 based on mos capacitance tuning structure, it is characterised in that: described
The basic rp unit of oscillator is differential feedback phase inverter, including four PMOS transistors and two NMOS transistors, difference
For the first PMOS transistor MP1, the second PMOS transistor MP2, third PMOS transistor MP3And the 4th PMOS transistor MP4；First
NMOS transistor MN1And the second NMOS transistor MN2；
Differential input signal IN+The first PMOS transistor M is met respectivelyP1With the first NMOS transistor MN1Grid；Differential Input letter
Number IN-The 4th PMOS transistor M is met respectivelyP4With the second NMOS transistor MN2Grid.
5. the annular digital controlled oscillator according to claim 4 based on mos capacitance tuning structure, it is characterised in that: described
First PMOS transistor MP1Source electrode meet power supply Vdd, drain electrode and the second PMOS transistor MP2Drain electrode and the first NMOS crystal
Pipe MN1Drain electrode be connected；
The second PMOS transistor MP2Source electrode meet power supply Vdd, grid and the 4th PMOS transistor MP4Drain electrode be connected,
As difference output end OUT+；
The third PMOS transistor MP3Source electrode meet power supply Vdd, drain electrode and the 4th PMOS transistor MP4Drain electrode and second
NMOS transistor MN2Drain electrode be connected；Its grid and the first PMOS transistor MP1Drain electrode be connected, as difference output end
OUT-；
The 4th PMOS transistor MP4Source electrode meet power supply Vdd；
The first NMOS transistor MN1Source electrode ground connection, the second NMOS transistor MN2Source electrode ground connection.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201810366966.5A CN109889161A (en) | 2018-04-23 | 2018-04-23 | A kind of annular digital controlled oscillator based on mos capacitance tuning structure |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201810366966.5A CN109889161A (en) | 2018-04-23 | 2018-04-23 | A kind of annular digital controlled oscillator based on mos capacitance tuning structure |
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| CN109889161A true CN109889161A (en) | 2019-06-14 |
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ID=66924780
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| CN201810366966.5A Withdrawn CN109889161A (en) | 2018-04-23 | 2018-04-23 | A kind of annular digital controlled oscillator based on mos capacitance tuning structure |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN113364458A (en) * | 2021-06-08 | 2021-09-07 | 南京邮电大学 | Numerically controlled oscillator circuit with high frequency resolution |
-
2018
- 2018-04-23 CN CN201810366966.5A patent/CN109889161A/en not_active Withdrawn
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN113364458A (en) * | 2021-06-08 | 2021-09-07 | 南京邮电大学 | Numerically controlled oscillator circuit with high frequency resolution |
| CN113364458B (en) * | 2021-06-08 | 2022-09-16 | 南京邮电大学 | Numerically controlled oscillator circuit with high frequency resolution |
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Application publication date: 20190614 |