CN108768301A - A kind of LC voltage controlled oscillators of substrate dynamic bias - Google Patents
A kind of LC voltage controlled oscillators of substrate dynamic bias Download PDFInfo
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- CN108768301A CN108768301A CN201810431737.7A CN201810431737A CN108768301A CN 108768301 A CN108768301 A CN 108768301A CN 201810431737 A CN201810431737 A CN 201810431737A CN 108768301 A CN108768301 A CN 108768301A
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- nmos tube
- capacitance
- dynamic bias
- substrate
- cross
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03B—GENERATION OF OSCILLATIONS, DIRECTLY OR BY FREQUENCY-CHANGING, BY CIRCUITS EMPLOYING ACTIVE ELEMENTS WHICH OPERATE IN A NON-SWITCHING MANNER; GENERATION OF NOISE BY SUCH CIRCUITS
- H03B5/00—Generation of oscillations using amplifier with regenerative feedback from output to input
- H03B5/02—Details
- H03B5/04—Modifications of generator to compensate for variations in physical values, e.g. power supply, load, temperature
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03B—GENERATION OF OSCILLATIONS, DIRECTLY OR BY FREQUENCY-CHANGING, BY CIRCUITS EMPLOYING ACTIVE ELEMENTS WHICH OPERATE IN A NON-SWITCHING MANNER; GENERATION OF NOISE BY SUCH CIRCUITS
- H03B5/00—Generation of oscillations using amplifier with regenerative feedback from output to input
- H03B5/08—Generation of oscillations using amplifier with regenerative feedback from output to input with frequency-determining element comprising lumped inductance and capacitance
- H03B5/12—Generation of oscillations using amplifier with regenerative feedback from output to input with frequency-determining element comprising lumped inductance and capacitance active element in amplifier being semiconductor device
- H03B5/1206—Generation of oscillations using amplifier with regenerative feedback from output to input with frequency-determining element comprising lumped inductance and capacitance active element in amplifier being semiconductor device using multiple transistors for amplification
- H03B5/1218—Generation of oscillations using amplifier with regenerative feedback from output to input with frequency-determining element comprising lumped inductance and capacitance active element in amplifier being semiconductor device using multiple transistors for amplification the generator being of the balanced type
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- Inductance-Capacitance Distribution Constants And Capacitance-Resistance Oscillators (AREA)
Abstract
The present invention discloses a kind of LC voltage controlled oscillators of substrate dynamic bias, including cross-coupled pair, substrate dynamic bias circuit, resonant cavity, capacitor array and frequency tuning module, wherein, the control terminal of cross-coupled pair is connect with substrate dynamic bias circuit, the output end of cross-coupled pair respectively with resonant cavity, capacitor array, frequency tuning wired in parallel；Cross-coupled pair provides negative resistance, makes up the loss of resonant cavity；Inductance and capacitance determine frequency of oscillation, capacitor array selects frequency range, ensures that meeting frequency band covering under all process corners requires, varactor is responsible for finely tuning frequency of oscillation, and substrate dynamic bias circuit is then responsible for adjusting underlayer voltage in real time, all line infalls have tie point in Fig. 1.Such oscillator structure automatically adjusts underlayer voltage in stable oscillation stationary vibration followed by waveform, and transistor is avoided to enter linear zone, deteriorates phase noise, while the influence to environmental factor is insensitive.
Description
Technical field
The invention belongs to technology field of voltage-controlled oscillator, more particularly to a kind of LC voltage controlled oscillators of substrate dynamic bias.
Background technology
In radio-frequency receiving system, phaselocked loop is responsible for frequency mixer and provides stable local oscillation signal, is in receives link
Nucleus module, and voltage controlled oscillator is one of key modules of phaselocked loop, power consumption is in the even entire receives link of phaselocked loop
All occupy considerable share.Therefore in order to realize the low-power consumption of whole receiving circuit, the optimization of voltage controlled oscillator power consumption is set
Meter is very crucial.
Structurally, when supply voltage is relatively low, since the threshold voltage of transistor cannot be reduced with technique equal proportion,
The starting of oscillation of oscillator is more difficult, and Induction Peried is long, in this case it is necessary to adjust underlayer voltage to reduce the threshold value of transistor
Voltage reduces Induction Peried, however from the point of view of entire voltage controlled oscillator, reducing threshold value makes transistor be more easy to enter linear zone, dislikes
Change whole Q values, increases phase noise, while PN junction has the risk of positively biased.
Invention content
The purpose of the present invention is to provide a kind of LC voltage controlled oscillators of substrate dynamic bias, stable oscillation stationary vibration followed by
Waveform automatically adjusts underlayer voltage, and transistor is avoided to enter linear zone, deteriorates phase noise, while to the shadow of environmental factor
Sound is insensitive.
In order to achieve the above objectives, solution of the invention is：
A kind of LC voltage controlled oscillators of substrate dynamic bias, including cross-coupled pair, substrate dynamic bias circuit, resonance
Chamber, capacitor array and frequency tuning module, wherein the control terminal of cross-coupled pair is connect with substrate dynamic bias circuit, is intersected
Coupling pair output end respectively with resonant cavity, capacitor array, frequency tuning wired in parallel.
Above-mentioned cross-coupled pair includes the first, second NMOS tube, wherein the source electrode of the first, second NMOS tube is connected and connects
Ground, the grid of the first NMOS tube are connect with the drain electrode of the second NMOS tube, the grid of the drain electrode and the second NMOS tube of the first NMOS tube
Connection, the control terminal of the substrate of the first, second NMOS tube as cross-coupled pair, connect with substrate dynamic bias circuit；The first,
Output end of the drain electrode of second NMOS tube as cross-coupled pair, respectively simultaneously with resonant cavity, capacitor array, frequency tuning module
Connection.
Above-mentioned substrate dynamic bias circuit includes third, the 4th NMOS tube and third, the 4th capacitance, wherein third capacitance
Top crown connect with the drain electrode of the first NMOS tube, after the grid of third NMOS tube and drain electrode short circuit, reconnect third capacitance
Bottom crown, the source electrode ground connection of third NMOS tube, the grid of third NMOS tube connect the substrate of the first NMOS tube；4th capacitance it is upper
Pole plate is connect with the drain electrode of the second NMOS tube, after the grid and drain electrode short circuit of the 4th NMOS tube, reconnects the lower pole of the 4th capacitance
Plate, the source electrode ground connection of the 4th NMOS tube, the grid of the 4th NMOS tube connect the substrate of the second NMOS tube.
Above-mentioned resonant cavity include the 5th capacitance, the 6th capacitance and inductance, wherein the five, the 6th capacitances series connection after, then with electricity
Sense is in parallel, and inductance is in parallel with cross-coupled pair.
Said frequencies tuner module includes the first, second capacitance, the first, second resistance and the first, second varactor,
In, the one end of one end of the first capacitance as frequency tuning module, the other end of the first capacitance is successively through the first varactor, second
Varactor connects one end of the second capacitance, the other end of the other end of the second capacitance as frequency tuning module, the frequency tune
One end of humorous module and the other end are in parallel with cross-coupled pair respectively；After the series connection of first, second resistance, one end is connected to first
Between capacitance, the first varactor, the other end is connected between the second capacitance, the second varactor.
After adopting the above scheme, the present invention has the following advantages compared with the prior art：
(1) it uses dynamic bias, underlayer voltage to be adjusted in real time with waveform, need to reduce threshold voltage when electric current, needs
Promotion threshold value voltage when transistor being avoided to enter linear zone, reduces phase noise；
(2) zero bias is provided for substrate by capacitance and metal-oxide-semiconductor at the beginning of starting of oscillation, avoids the wind of transistor PN junction positively biased
Danger.
Description of the drawings
Fig. 1 is the circuit diagram of the present invention；
Fig. 2 is the phase noise figure using the present invention and the voltage controlled oscillator that the present invention is not used.
Specific implementation mode
Below with reference to attached drawing, technical scheme of the present invention and advantageous effect are described in detail.
As shown in Figure 1, the present invention provides a kind of LC voltage controlled oscillators of substrate dynamic bias, which includes intersecting coupling
Close to, resonant cavity, capacitor array, substrate dynamic bias circuit and frequency tuning module, from function module divide it is upper with it is traditional
LC oscillators are consistent：Cross-coupled pair provides negative resistance, makes up the loss of resonant cavity；Inductance and capacitance determine frequency of oscillation, frequency
Tuner module realizes that small range precisely tunes, and capacitor array selects frequency range, ensures to meet frequency band covering under all process corners
It is required that and substrate dynamic bias circuit is then responsible for adjusting underlayer voltage in real time, all line infalls have tie point in Fig. 1.
The cross-coupled pair and substrate dynamic bias circuit include：M1, M2, M3, M4 and C3, C4, wherein M1, M2,
M3, M4 are NMOS tube, and C3 and C4 are capacitance.The grid of M1 is connected with the drain electrode of M2；The grid of M2 is connected with the drain electrode of M1；C4's
Top crown is connected with the drain electrode of M2；The grid of M4 is connected with drain electrode, then is connected with the substrate of the bottom crown of C4 and M2, the grid of M4
The underlayer voltage of M2 is controlled as feedback end；The top crown of C3 is connected with the drain electrode of M1；The grid of M3 with drain electrode be connected, then with C3
Bottom crown be connected with the substrate of M1, the grid of M3 controls the underlayer voltage of M1 as feedback end.
As shown in Fig. 2, curve A is the phase noise of voltage controlled oscillator curve that substrate dynamic bias is not used, curve B is to make
With the low-power consumption substrate dynamic bias phase noise of voltage controlled oscillator curve of the present embodiment.It can be seen from the figure that using substrate
After dynamic biasing technique, at 1M frequency shift (FS)s, phase noise reduces 0.2dBc.
It can be seen from the above, the innovation of the present embodiment is mainly reflected in the design of substrate dynamic bias circuit.Tradition
LC oscillators its underlayer voltages to be a fixed current potential also make transistor be more easy to although reducing oscillator Induction Peried
Into linear zone, it is degrading phase noise.The present invention proposes a kind of substrate dynamic bias circuit, which can be with waveform
The underlayer voltage of adjustment cross-coupled pair in real time, makes Substrate bias in no-voltage in DC, avoids transistor PN junction positively biased
Risk, after stable oscillation stationary vibration, when transistor its grid voltage of cross-coupled pair is in maximum value, and its drain voltage is
When minimum value, underlayer voltage is negative value, promotes underlayer voltage, and transistor is avoided to enter linear zone, deteriorates Q values.Compared to tradition
Substrate bias technology, the present invention improves the Q values of circuit, reduces phase noise under identical power consumption.
Above example is merely illustrative of the invention's technical idea, and protection scope of the present invention cannot be limited with this, every
According to technological thought proposed by the present invention, any change done on the basis of technical solution each falls within the scope of the present invention
Within.
Claims (5)
1. a kind of LC voltage controlled oscillators of substrate dynamic bias, it is characterised in that：Including cross-coupled pair, substrate dynamic bias electricity
Road, resonant cavity, capacitor array and frequency tuning module, wherein the control terminal of cross-coupled pair connects with substrate dynamic bias circuit
Connect, the output end of cross-coupled pair respectively with resonant cavity, capacitor array, frequency tuning wired in parallel.
2. a kind of LC voltage controlled oscillators of substrate dynamic bias as described in claim 1, it is characterised in that：The cross-couplings
To including the first, second NMOS tube, wherein the source electrode of the first, second NMOS tube is connected and is grounded, the grid of the first NMOS tube with
The drain electrode of second NMOS tube connects, and the drain electrode of the first NMOS tube is connect with the grid of the second NMOS tube, the first, second NMOS tube
Control terminal of the substrate as cross-coupled pair, connect with substrate dynamic bias circuit；The drain electrode of first, second NMOS tube is as friendship
Fork coupling pair output end, respectively with resonant cavity, capacitor array, frequency tuning wired in parallel.
3. a kind of LC voltage controlled oscillators of substrate dynamic bias as claimed in claim 2, it is characterised in that：The substrate dynamic
Biasing circuit includes third, the 4th NMOS tube and third, the 4th capacitance, wherein the top crown of third capacitance and the first NMOS tube
Drain electrode connection, after the grid of third NMOS tube and drain electrode short circuit, reconnect the bottom crown of third capacitance, the source of third NMOS tube
Pole is grounded, and the grid of third NMOS tube connects the substrate of the first NMOS tube；The leakage of the top crown and the second NMOS tube of 4th capacitance
Pole connects, and after the grid and drain electrode short circuit of the 4th NMOS tube, reconnects the bottom crown of the 4th capacitance, the source electrode of the 4th NMOS tube connects
Ground, the grid of the 4th NMOS tube connect the substrate of the second NMOS tube.
4. a kind of LC voltage controlled oscillators of substrate dynamic bias as described in claim 1, it is characterised in that：The resonant cavity packet
Include the 5th capacitance, the 6th capacitance and inductance, wherein the five, the 6th capacitances series connection after, then with inductance in parallel, and inductance with intersect
Coupling is to being in parallel.
5. a kind of LC voltage controlled oscillators of substrate dynamic bias as described in claim 1, it is characterised in that：The frequency tuning
Module includes the first, second capacitance, the first, second resistance and the first, second varactor, wherein one end conduct of the first capacitance
The other end of one end of frequency tuning module, the first capacitance connects the second capacitance through the first varactor, the second varactor successively
One end, the other end of the other end of the second capacitance as frequency tuning module, one end of the frequency tuning module and the other end
It is in parallel respectively with cross-coupled pair；After the series connection of first, second resistance, one end is connected between the first capacitance, the first varactor,
The other end is connected between the second capacitance, the second varactor.
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| Application Number | Priority Date | Filing Date | Title |
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| CN201810431737.7A CN108768301A (en) | 2018-05-08 | 2018-05-08 | A kind of LC voltage controlled oscillators of substrate dynamic bias |
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| CN201810431737.7A CN108768301A (en) | 2018-05-08 | 2018-05-08 | A kind of LC voltage controlled oscillators of substrate dynamic bias |
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Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN109995324A (en) * | 2019-03-12 | 2019-07-09 | 东南大学 | A kind of LC voltage controlled oscillator that dynamic bias is adjusted |
| CN110071693A (en) * | 2019-04-16 | 2019-07-30 | 广西电网有限责任公司钦州供电局 | A kind of voltage controlled oscillator and its noise reduction increasing product method towards distribution status monitoring |
| CN110719070A (en) * | 2019-09-29 | 2020-01-21 | 天津大学 | Low-power consumption voltage-controlled oscillator based on dynamic threshold technology |
| WO2020199216A1 (en) * | 2019-04-04 | 2020-10-08 | 华为技术有限公司 | Oscillator and device |
| CN114039548A (en) * | 2021-11-12 | 2022-02-11 | 江苏稻源科技集团有限公司 | LC oscillator for accelerating oscillation starting |
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Cited By (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN109995324A (en) * | 2019-03-12 | 2019-07-09 | 东南大学 | A kind of LC voltage controlled oscillator that dynamic bias is adjusted |
| WO2020199216A1 (en) * | 2019-04-04 | 2020-10-08 | 华为技术有限公司 | Oscillator and device |
| CN110071693A (en) * | 2019-04-16 | 2019-07-30 | 广西电网有限责任公司钦州供电局 | A kind of voltage controlled oscillator and its noise reduction increasing product method towards distribution status monitoring |
| CN110719070A (en) * | 2019-09-29 | 2020-01-21 | 天津大学 | Low-power consumption voltage-controlled oscillator based on dynamic threshold technology |
| CN110719070B (en) * | 2019-09-29 | 2023-05-12 | 天津大学 | Low-power consumption voltage-controlled oscillator based on dynamic threshold technology |
| CN114039548A (en) * | 2021-11-12 | 2022-02-11 | 江苏稻源科技集团有限公司 | LC oscillator for accelerating oscillation starting |
| CN114039548B (en) * | 2021-11-12 | 2022-07-19 | 江苏稻源科技集团有限公司 | LC oscillator for accelerating oscillation starting |
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Application publication date: 20181106 |
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