CN109887923A

CN109887923A - Three-dimensional programmable storage preparation method

Info

Publication number: CN109887923A
Application number: CN201910109123.1A
Authority: CN
Inventors: 彭泽忠
Original assignee: Chengdu Pi Zhao Yong Technology Co Ltd
Current assignee: Chengdu Pi Zhao Yong Technology Co Ltd
Priority date: 2019-02-03
Filing date: 2019-02-03
Publication date: 2019-06-14
Also published as: WO2020156039A1

Abstract

Three-dimensional programmable storage preparation method, is related to the technology of preparing of memory.The present invention includes: 1) to be formed to have the step of foundation structure body of stepped construction；2) on foundation structure body, the step of opening up deep hole in the stacking direction；3) middle dielectric layer is deposited in inner walls of deep holes, and has the step of filling conducting medium in the deep hole of middle dielectric layer in inner wall belt；The step 3) includes: 3.1) to deposit middle dielectric layer in inner walls of deep holes；3.2) conducting medium is filled in the deep hole that inner wall belt has middle dielectric layer, forms inner conductive dielectric layer；3.3) apply breakdown voltage between the connection conductor outside the inner conductive dielectric layer and selected deep hole in selected deep hole, to puncture the middle dielectric layer between the connection conductor outside inner conductive dielectric layer and deep hole, make to form conductive connection between the connection conductor outside inner conductive dielectric layer and deep hole.The present invention has the characteristics that yield is high (defect rate is low).

Description

Three-dimensional programmable storage preparation method

Technical field

The present invention relates to the technologies of preparing of memory.

Background technique

The prior art includes Erasable Programmable Read Only Memory EPROM (EPROM), electrically erasable programmable read-only memory (EEPROM), flash memory, NAND- flash memory, hard disc, CD (CD), digital versatile disc (DVD), Blu-ray Disc association Various digital storage techniques including Blu-ray Disc of registration etc., 50 Yu Nianlai are widely used for data storage.However, storage The service life of medium is usually less than 5 years to 10 years.The antifuse memory technology for storing and developing for big data, because its is very expensive And storage density is low, is not able to satisfy the demand of mass data storage.

Summary of the invention

The technical problem to be solved by the invention is to provide a kind of three-dimensional programmable storage preparation methods, are prepared Memory have the characteristics that high density, low cost, in particular, using method of the invention have higher yield.

The present invention solve the technical problem the technical solution adopted is that, three-dimensional programmable storage preparation method, comprising:

1) being formed has the step of foundation structure body of stepped construction；

2) on foundation structure body, the step of opening up deep hole in the stacking direction；

3) middle dielectric layer is deposited in inner walls of deep holes, and fills conducting medium in the deep hole that inner wall belt has middle dielectric layer The step of；

It is characterized in that, the step 3) includes:

3.1) middle dielectric layer is deposited in inner walls of deep holes；

3.2) conducting medium is filled in the deep hole that inner wall belt has middle dielectric layer, forms inner conductive dielectric layer；

3.3) apply between the connection conductor outside the inner conductive dielectric layer and selected deep hole in selected deep hole and hit Voltage is worn, to puncture the middle dielectric layer between the connection conductor outside inner conductive dielectric layer and deep hole, makes inner conductive medium It is formed and is conductively connected between connection conductor outside layer and deep hole.

Further, the middle dielectric layer includes insulating medium layer.The connection conductor is located at deep hole bottom.

Further, after step 1), further includes: in the step of forming fourchette structure on foundation structure body.

The invention has the advantages that the semiconductor memory storage density being prepared is high, and process costs are low, easily In realization, yield height (defect rate is low).

Detailed description of the invention

Fig. 1 is a kind of schematic perspective view of 3 D semiconductor programmable storage.

Fig. 2 is the stereoscopic schematic diagram of foundation structure body of the invention.

Fig. 3 is the schematic diagram (overlook direction) that fourchette structure is formed on foundation structure body.

Fig. 4 is the schematic diagram that deep hole is opened up on foundation structure body.

Fig. 5 is the schematic diagram of deposition first medium layer in deep hole.

Fig. 6 is the schematic diagram that first medium layer is deposited under vertical profile state.

Fig. 7 is the schematic diagram that second dielectric layer is deposited under vertical profile state.

Fig. 8 is the schematic diagram that core dielectric layer is filled under vertical profile state.

Fig. 9 is deep hole bottom breakdown schematic diagram.

Figure 10 is the schematic diagram of embodiment 2.

Figure 11 is the schematic diagram (clearance hole) of embodiment 3.

Figure 12 is the schematic diagram (clearance hole filling) of embodiment 3.

Specific embodiment

One of preparation-obtained organization of semiconductor memory of the present invention is shown referring to Fig. 1, Fig. 1.Wherein, 11 are Conducting medium, 12 be middle dielectric layer, and 13 be core dielectric layer (inner conductive dielectric layer).Core dielectric layer is in subsequent vertical profile shape Label in state schematic diagram is.

Fig. 2~5 show the key step of preparation process.

Embodiment 1

Such as Fig. 2 -- 3, foundation structure body by be laminated dielectric --- conducting medium is constituted, by etching form it into Then fourchette structure shown in Fig. 3 fills etch areas with dielectric, then predeterminated position opens up circle on foundation structure body Deep hole, deep hole position and connection conductor position are corresponding, connect for example, foundation structure body itself is layer by layer deposition being provided with On the substrate of conductor, the position of deep hole is determined by the position of connection conductor.Fig. 2-5 is the schematic diagram of overlook direction.Then in depth Hole inner wall deposits to form middle dielectric layer.

After the completion of middle dielectric layer deposition, in next step to fill core dielectric layer in it, but core dielectric layer should be with External connection conductor, which is formed, to be conductively connected, and the middle dielectric layer of deep hole bottom has separated core dielectric layer and external connection Conducting wire produces conductivity problems.The first solution is, before filling core dielectric, again to the bottom zone of deep hole Etching processing is made in domain, and defect is that, since target area is located at deep hole bottom, bore is very small, is etched and is removed by deep-well Medium is extremely difficult to high yield and high reliability, it is also possible to adversely affect to the dielectric layer of inner walls of deep holes.

Therefore, the present invention provides another solutions, specifically, after inner walls of deep holes deposits intermediate medium, nothing Deep hole bottom need to be etched, but directly filling conducting medium forms inner conductive dielectric layer (core dielectric layer).After filling, Apply a breakdown voltage, the electricity of the voltage between internal conducting medium layer and the connection conductor B1 of deep hole bottom hole exterior domain Pressure value is enough to puncture inner conductive dielectric layer and connects the insulated part between conductor, after breakdown, inner conductive dielectric layer and company It connects conductor and forms conductive connection.Inner conductive dielectric layer and connection conductor can be selected voluntarily, and breakdown or batch are hit simultaneously one by one It wears and all may be used.

The material of the conducting medium layer of the present embodiment, first medium layer and core dielectric layer can be used any group in table 1 It closes.

Table 1

	Conducting medium layer	First medium layer	Core dielectric layer
				Combination 1	P-type semiconductor	Dielectric	N-type semiconductor
Combination 2	N-type semiconductor	Dielectric	P-type semiconductor
				Combination 3	Schottky metal	Dielectric	Semiconductor
Combination 4	Semiconductor	Dielectric	Schottky metal
				Combination 5	Conductor	Memory media	Conductor

The above are the embodiment that middle dielectric layer is single layer, the present invention can be applied equally to the middle dielectric layer of multilayer, As the following examples.

Embodiment 2: referring to Fig. 6~9, the cylinder of the present embodiment is 3-tier architecture.Attached drawing of the invention is schematic diagram, three-dimensional State illustrates the number of plies of (Fig. 1,2) may not be consistent with the number of plies of vertical profile status diagram (Fig. 6), but does not influence to understand.Cylindrical hole Usually internal diameter is different up and down in actual process, and practical is truncated cone-shaped, cylindrical hole of the invention is still constituted, also that is, " cylindrical hole " Not in mathematical meaning, the hole of upper and lower diameter strict conformance.

Step 1: using depositing operation, in such a way that conducting medium layer and insulating medium layer are overlapping, predetermined layer is set Several conducting medium layers and insulating medium layer, basis of formation structural body.

Step 2: being defined with exposure mask, and etch the isolation through foundation structure body top layer to bottom with deep-well etching technics Slot 50 forms two staggered fourchette structures, and the fourchette structure includes at least two fingers and a commonly connected item, same Each finger in fourchette structure all connects with the commonly connected item in the fourchette structure, and dielectric is filled in isolation channel. In Fig. 3,51,52,53,54 be finger, and 55 and 56 be commonly connected item, and finger 51,53 and commonly connected item 55 form first A fourchette structure, finger 52,54 and commonly connected item 56 form second fourchette structure, the finger staggered row of two fourchette structures Column.

Step 3: being defined with exposure mask, and with deep-well etching technics, formed at isolation channel and arrived through foundation structure body top layer The hole 60 of bottom forms cylindricality hole array；Region between two neighboring finger is known as interdigital area domain, is in same interdigital area domain Cylindrical hole be colleague cylindrical hole, such as Fig. 4.

Step 4: in the programmable medium for growing 0.5~5nm of a layer thickness in cylindrical hole inner wall with ALD technique, as First medium layer A1, such as Fig. 5；

Step 5: with ALD technique cylindrical hole inner wall (i.e. the surface of first medium layer) grow one layer of buffering P- polysilicon or Silicon, as second dielectric layer A2, thickness is depending on the requirement optimization of programming backward dioded leakage current.

Step 6: cylindrical hole inner wall dielectric layer after setting completed, it is heavy with ALD technique in the cavity inside cylindrical hole Product filling core dielectric material, forms core dielectric material layer A3.The core dielectric material is N+ semiconductor or Schottky gold Belong to, such as Fig. 8.

After filling, apply one between internal conducting medium layer and the connection conductor B1 of deep hole bottom hole exterior domain Breakdown voltage, the voltage value of the voltage is enough to puncture inner conductive dielectric layer and connects the insulated part between conductor, after breakdown, By breakdown area 100, inner conductive dielectric layer and connection conductor are formed and are conductively connected.Inner conductive dielectric layer and connection conductor It can voluntarily select, breakdown all may be used simultaneously for breakdown or batch one by one.

Conducting medium layer, first medium layer, second dielectric layer and core dielectric layer material any group in table 2 can be used It closes:

Table 2

Embodiment 3

Referring to Figure 10~12, there are also following step after the step 6 of embodiment 2 for the present embodiment:

Step 7: being defined with exposure mask, and with deep-well etching technics, between the central point of colleague and two adjacent cylindrical holes Clearance hole is set, and clearance hole invades two cylindrical holes adjacent thereto, and the edge of clearance hole is located at the center of adjacent two cylindrical hole Between point, also that is, after having opened up clearance hole, the core dielectric material layer of cylindrical hole still remains an entirety；

Step 8: using ALD technique, the fill insulant in clearance hole.

Claims

1. three-dimensional programmable storage preparation method, comprising:

3) middle dielectric layer is deposited in inner walls of deep holes, and fills the step of conducting medium in the deep hole that inner wall belt has middle dielectric layer Suddenly；

It is characterized in that, the step 3) includes:

3.1) middle dielectric layer is deposited in inner walls of deep holes；

3.3) apply breakdown potential between the connection conductor outside the inner conductive dielectric layer and selected deep hole in selected deep hole Pressure, to puncture the middle dielectric layer between the connection conductor outside inner conductive dielectric layer and deep hole, make inner conductive dielectric layer and It is formed and is conductively connected between connection conductor outside deep hole.

2. three-dimensional programmable storage preparation method as described in claim 1, which is characterized in that the middle dielectric layer includes Insulating medium layer.

3. three-dimensional programmable storage preparation method as described in claim 1, which is characterized in that the connection conductor is located at deep Hole bottom.

4. three-dimensional programmable storage preparation method as described in claim 1, which is characterized in that after step 1), also wrap It includes: in the step of forming fourchette structure on foundation structure body.