CN109885521B - Interrupt processing method and system, electronic equipment and storage medium - Google Patents

Interrupt processing method and system, electronic equipment and storage medium Download PDF

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CN109885521B
CN109885521B CN201910150499.7A CN201910150499A CN109885521B CN 109885521 B CN109885521 B CN 109885521B CN 201910150499 A CN201910150499 A CN 201910150499A CN 109885521 B CN109885521 B CN 109885521B
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interrupt signal
signal
error
interrupt
reset
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CN109885521A (en
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吕孟桓
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Suzhou Inspur Intelligent Technology Co Ltd
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Suzhou Inspur Intelligent Technology Co Ltd
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Abstract

The application discloses an interrupt processing method, a system, an electronic device and a computer readable storage medium, wherein the method comprises the following steps: after receiving the interrupt signal, judging whether the self in-place signal is reset or not; the in-situ signal is used for representing whether hot plugging occurs or not; if yes, inhibiting responding to the interrupt signal; if not, recording an interrupt signal, and determining an error type corresponding to the interrupt signal; and if the error type is UCE type error, sending an interrupt signal to the central processing unit to trigger a corresponding safety protection mechanism. After the application receives the interrupt signal, whether hot plugging occurs is judged through the in-place signal, if yes, the hot plugging is repeated in configuration, since the historical error reporting information is not cleared in time, the historical error reporting information may not be the currently configured information, and if the interrupt signal is responded at the moment, error reporting may occur, so that the application prohibits responding to the current interrupt signal, and the problem of error reporting which may occur is avoided.

Description

Interrupt processing method and system, electronic equipment and storage medium
Technical Field
The present application relates to the field of computer technologies, and in particular, to an interrupt processing method and system, an electronic device, and a computer-readable storage medium.
Background
PCIe is configured in the server and has an AER error reporting system structure built therein. As shown in fig. 1, a typical PCIe architecture design diagram may be divided into Root ports and Switch ports, where an uplink channel of Switch is an Upstream Port and a downlink channel is a downlink Port, and the Switch ports are used to connect to an end equipment device.
If the device supports hot plug under the current system configuration, because the AER history error message previously stored in the register cannot be cleared when the system is restarted, the system cannot judge whether the error message comes from the same card, thereby possibly causing error report. Therefore, how to solve the above problems is a great concern for those skilled in the art.
Disclosure of Invention
The present application is directed to provide an interrupt processing method, system, electronic device and computer-readable storage medium, which avoid the problem of false alarm and error possibly occurring in the legacy error reporting information due to hot plug and card replacement.
To achieve the above object, the present application provides an interrupt processing method, including:
after receiving the interrupt signal, judging whether the self in-place signal is reset or not; wherein, the in-situ signal is used for representing whether hot plugging occurs or not;
if so, inhibiting responding to the interrupt signal;
if not, recording the interrupt signal, and determining an error type corresponding to the interrupt signal;
and if the error type is UCE type error, sending the interrupt signal to a central processing unit to trigger a corresponding safety protection mechanism.
Optionally, the method further includes:
and after error reporting information sent based on a PCIe protocol is configured at the tail end, determining the corresponding interrupt signal by using the error reporting information.
Optionally, after the prohibiting the response to the interrupt signal, the method further includes:
and clearing the historical error reporting information in the register.
Optionally, the recording the interrupt signal includes:
and sending the interrupt signal to the flash ROM to record the error type and the error amount.
To achieve the above object, the present application provides an interrupt processing system including:
the reset judging module is used for judging whether the self in-place signal is reset or not after receiving the interrupt signal; wherein, the in-situ signal is used for representing whether hot plugging occurs or not;
a response prohibition module, configured to prohibit a response to the interrupt signal if the in-place signal is reset;
the signal recording module is used for recording the interrupt signal and determining the error type corresponding to the interrupt signal if the in-place signal is reset;
and the signal sending module is used for sending the interrupt signal to a central processing unit to trigger a corresponding safety protection mechanism if the error type is a UCE type error.
Optionally, the method further includes:
and the interrupt signal judgment module is used for determining the corresponding interrupt signal by using the error information after the error information sent based on the PCIe protocol configured at the tail end is acquired.
Optionally, the method further includes:
and the history clearing module is used for clearing the history error reporting information in the register after the response to the interrupt signal is forbidden.
Optionally, the signal recording module includes:
and the error reporting and recording unit is used for sending the interrupt signal to the flash ROM to record the error type and the error number.
To achieve the above object, the present application provides an electronic device including:
a memory for storing a computer program;
a processor for implementing the steps of any of the interrupt processing methods disclosed above when executing the computer program.
To achieve the above object, the present application provides a computer-readable storage medium having a computer program stored thereon, which, when being executed by a processor, implements the steps of any one of the interrupt processing methods disclosed in the foregoing disclosure.
According to the above scheme, the interrupt processing method provided by the present application includes: after receiving the interrupt signal, judging whether the self in-place signal is reset or not; wherein, the in-situ signal is used for representing whether hot plugging occurs or not; if so, inhibiting responding to the interrupt signal; if not, recording the interrupt signal, and determining an error type corresponding to the interrupt signal; and if the error type is UCE type error, sending the interrupt signal to a central processing unit to trigger a corresponding safety protection mechanism. Therefore, after the interrupt signal is received, whether hot plugging occurs or not is judged through the in-place signal, if the in-place signal is reset, the situation that the configuration is plugged again is indicated, since the historical error reporting information in the register is not cleared in time, the historical error reporting information may not be the currently configured information, and if the interrupt signal is responded at the moment, error reporting may occur, the current interrupt signal is forbidden to be responded, and the problem that false reporting possibly occurs due to the fact that the historical error reporting information left after the hot plugging and card changing are caused is solved.
The application also discloses an interrupt processing system, an electronic device and a computer readable storage medium, which can also achieve the technical effects.
Drawings
In order to more clearly illustrate the embodiments of the present application or the technical solutions in the prior art, the drawings used in the description of the embodiments or the prior art will be briefly described below, it is obvious that the drawings in the following description are only some embodiments of the present application, and for those skilled in the art, other drawings can be obtained according to the drawings without creative efforts.
FIG. 1 is a diagram of a typical PCIe fabric design in the prior art;
fig. 2 is a flowchart of an interrupt processing method according to an embodiment of the present application;
FIG. 3 is a flow chart of another interrupt processing method disclosed in the embodiments of the present application;
FIG. 4 is a block diagram of an interrupt handling system according to an embodiment of the present disclosure;
FIG. 5 is a PCIe fabric design diagram in an interrupt processing system according to the disclosure of the present application;
fig. 6 is a block diagram of an electronic device disclosed in an embodiment of the present application;
fig. 7 is a block diagram of another electronic device disclosed in the embodiments of the present application.
Detailed Description
The technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the drawings in the embodiments of the present application, and it is obvious that the described embodiments are only a part of the embodiments of the present application, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present application.
In the prior art, if the device supports hot plug under the current system configuration, since the AER history error message previously stored in the register cannot be cleared when the system is restarted, the system cannot determine whether the error message is from the same card, thereby possibly causing error.
Therefore, the embodiment of the application discloses an interrupt processing method, which avoids the problem of false alarm possibly occurring in the historical error reporting information caused by hot plug card replacement.
Referring to fig. 2, a flowchart of an interrupt processing method disclosed in an embodiment of the present application is shown in fig. 2, and includes:
s101: after receiving the interrupt signal, judging whether the self in-place signal is reset or not; wherein, the in-situ signal is used for representing whether hot plugging occurs or not;
in this step, the process of acquiring the interrupt signal is as follows: and acquiring error reporting information sent by the tail end configuration based on the PCIe protocol, and determining the corresponding interrupt signal by using the error reporting information. Specifically, the error information is configured by a Downstream Port (Downstream Port) passing through the Switch Port at the end, and then is transmitted to an AER error driver in the Root Port via an Upstream Port (Upstream Port) of the Switch Port, and the AER error driver is used to determine an interrupt signal corresponding to the error information. Furthermore, it is determined whether the self-bit signal is reset, that is, whether hot-plug card replacement occurs.
S102: if so, inhibiting responding to the interrupt signal;
it can be understood that if the reset of the in-place signal is detected, the hot plug is represented, and the response to the interrupt signal is prohibited at the moment, so that the trigger error reporting caused by the error of the left historical error reporting information after the card is replaced is avoided.
S103: if not, recording the interrupt signal, and determining an error type corresponding to the interrupt signal;
in addition, if the reset of the in-place signal is not detected, the hot plug is not generated, at the moment, the interrupt signal is recorded, and the error type corresponding to the interrupt signal is further judged.
S104: and if the error type is UCE type error, sending the interrupt signal to a central processing unit to trigger a corresponding safety protection mechanism.
In this embodiment, if the error type corresponding to the interrupt signal is UCE type, i.e., uncorrectable errors, the interrupt signal needs to be immediately sent to the central processing unit for processing, so as to trigger the emergency safety protection mechanism. In addition, if the error type corresponding to the interrupt signal is a CE type error, i.e., a correctable error, the current interrupt signal may be ignored, and the interrupt signal is prohibited from being sent to the cpu.
According to the above scheme, the interrupt processing method provided by the present application includes: after receiving the interrupt signal, judging whether the self in-place signal is reset or not; wherein, the in-situ signal is used for representing whether hot plugging occurs or not; if so, inhibiting responding to the interrupt signal; if not, recording the interrupt signal, and determining an error type corresponding to the interrupt signal; and if the error type is UCE type error, sending the interrupt signal to a central processing unit to trigger a corresponding safety protection mechanism. Therefore, after the interrupt signal is received, whether hot plugging occurs or not is judged through the in-place signal, if the in-place signal is reset, the situation that the configuration is plugged again is indicated, since the historical error reporting information in the register is not cleared in time, the historical error reporting information may not be the currently configured information, and if the interrupt signal is responded at the moment, error reporting may occur, the current interrupt signal is forbidden to be responded, and the problem that false reporting possibly occurs due to the fact that the historical error reporting information left after the hot plugging and card changing are caused is solved.
The embodiment of the application discloses an interrupt processing method, and compared with the previous embodiment, the embodiment further describes and optimizes the technical scheme. Specifically, the method comprises the following steps:
referring to fig. 3, a flowchart of another interrupt processing method provided in the embodiment of the present application is shown in fig. 3, and includes:
s201: after receiving the interrupt signal, judging whether the self in-place signal is reset or not; wherein, the in-situ signal is used for representing whether hot plugging occurs or not;
s202: if yes, forbidding to respond to the interrupt signal, and clearing historical error reporting information in the register;
in this embodiment, after the reset of the in-place signal is detected, that is, the hot plug card replacement occurs, the historical error reporting information in the register is cleared, so as to avoid the occurrence of error reporting in the historical error reporting information left after the card replacement.
S203: if not, sending the interrupt signal to a flash type read-only memory for recording the error type and the error number, and determining the error type corresponding to the interrupt signal;
in this step, if the reset of the on-site signal is not detected, the interrupt signal is sent to the flash ROM to record the error type and the error amount.
S204: and if the error type is UCE type error, sending the interrupt signal to a central processing unit to trigger a corresponding safety protection mechanism.
In the following, an interrupt handling system provided by an embodiment of the present application is introduced, and an interrupt handling system described below and an interrupt handling method described above may be referred to each other.
Referring to fig. 4, a structure diagram of an interrupt processing system according to an embodiment of the present application is shown in fig. 4, and includes:
a reset determining module 100, configured to determine whether a reset occurs in an in-place signal of the reset determining module after receiving the interrupt signal; wherein, the in-situ signal is used for representing whether hot plugging occurs or not;
a response disable module 200, configured to disable the response to the interrupt signal if the in-place signal is reset;
a signal recording module 300, configured to record the interrupt signal and determine an error type corresponding to the interrupt signal if the in-place signal is reset;
a signal sending module 400, configured to send the interrupt signal to a central processing unit to trigger a corresponding security protection mechanism if the error type is a UCE type error.
On the basis of the foregoing embodiment, as a preferred implementation manner, the interrupt processing system provided in the embodiment of the present application may further include:
and the interrupt signal judgment module is used for determining the corresponding interrupt signal by using the error information after the error information sent based on the PCIe protocol configured at the tail end is acquired.
On the basis of the foregoing embodiment, as a preferred implementation manner, the interrupt processing system provided in the embodiment of the present application may further include:
and the history clearing module is used for clearing the history error reporting information in the register after the response to the interrupt signal is forbidden.
On the basis of the foregoing embodiment, as a preferred implementation manner, in the interrupt processing system provided in the embodiment of the present application, the signal recording module includes:
and the error reporting and recording unit is used for sending the interrupt signal to the flash ROM to record the error type and the error number.
Referring to fig. 5, a PCIe architecture design diagram in an interrupt processing system according to the embodiment of the present disclosure is shown in fig. 5, where when the system performs hot plug, it is determined whether an error is actually reported by monitoring its in-place signal. The tail-end configures error message issued over PCIe protocol, goes through the Down Port of Switch Port, and then passes to the AER driver within Root Port via the Up Port of Switch Port to issue an interrupt signal. If the on-site signal of the system is reset, the system will reconfigure the AER error reporting driver in the register to clear the historical error reporting information, thereby avoiding the error reporting of the left error information caused by hot plug card replacement, and simultaneously avoiding the error sending of an interrupt signal to the central processing unit caused by the system reset. Further determining whether to send an interrupt signal to a Central Processing Unit (CPU) according to the error type, if the error type is a CE type, not influencing the system operation, and not sending the interrupt signal to the CPU, if the error type is a UCE type, immediately sending the interrupt signal to the CPU to perform an emergency safety protection mechanism; if the system's bit is not reset, an interrupt is sent to the SD card to record the type and number of errors. That is to say, the interrupt processing system can judge whether the hot plug occurs in the system end configuration through the in-place signal, and can effectively manage the error information of the system and facilitate the subsequent analysis of the error information.
The present application further provides an electronic device, referring to fig. 6, a structure diagram of an electronic device provided in an embodiment of the present application, as shown in fig. 6, includes:
a memory 11 for storing a computer program;
the processor 12 is configured to implement the steps of any of the interrupt processing methods disclosed in the above embodiments when executing the computer program.
Specifically, the memory 11 includes a nonvolatile storage medium and an internal memory. The non-volatile storage medium stores an operating system and computer-readable instructions, and the internal memory provides an environment for the operating system and the computer-readable instructions in the non-volatile storage medium to run. The processor 12 may be a Central Processing Unit (CPU), a controller, a microcontroller, a microprocessor or other data Processing chip in some embodiments, and provides computing and controlling capability for the electronic device, and when executing the computer program stored in the memory 11, the processor may implement any of the steps of the interrupt Processing method disclosed in the above embodiments.
On the basis of the above embodiment, as a preferred implementation, referring to fig. 7, the electronic device further includes:
and the input interface 13 is connected with the processor 12 and is used for acquiring computer programs, parameters and instructions imported from the outside, and storing the computer programs, parameters and instructions into the memory 11 under the control of the processor 12. The input interface 13 may be connected to an input device for receiving parameters or instructions manually input by a user. The input device may be a touch layer covered on a display screen, or a button, a track ball or a touch pad arranged on a terminal shell, or a keyboard, a touch pad or a mouse, etc.
A display unit 14, connected to the processor 12, for displaying data processed by the processor 12 and for displaying a visual user interface. The display unit 15 may be an LED display, a liquid crystal display, a touch-controlled liquid crystal display, an OLED (Organic Light-Emitting Diode) touch device, and the like.
And the network port 15 is connected with the processor 12 and is used for performing communication connection with each external terminal device. The communication technology adopted by the communication connection can be a wired communication technology or a wireless communication technology, such as a mobile high definition link (MHL) technology, a Universal Serial Bus (USB), a High Definition Multimedia Interface (HDMI), a wireless fidelity (WiFi), a bluetooth communication technology, a low power consumption bluetooth communication technology, an ieee802.11 s-based communication technology, and the like.
Fig. 7 shows only an electronic device with components 11-15, and those skilled in the art will appreciate that the structure shown in fig. 7 does not constitute a limitation of the electronic device, and may include fewer or more components than those shown, or some components may be combined, or a different arrangement of components.
The present application also provides a computer-readable storage medium, which may include: various media capable of storing program codes, such as a usb disk, a removable hard disk, a Read-Only Memory (ROM), a Random Access Memory (RAM), a magnetic disk, or an optical disk. The storage medium stores thereon a computer program which, when executed by a processor, implements the steps of any of the interrupt processing methods disclosed in the above embodiments.
Therefore, after the interrupt signal is received, whether hot plugging occurs or not is judged through the in-place signal, if the in-place signal is reset, the situation that the configuration is plugged again is indicated, since the historical error reporting information in the register is not cleared in time, the historical error reporting information may not be the currently configured information, and if the interrupt signal is responded at the moment, error reporting may occur, the current interrupt signal is forbidden to be responded, and the problem that false reporting possibly occurs due to the fact that the historical error reporting information left after the hot plugging and card changing are caused is solved.
The embodiments are described in a progressive manner in the specification, each embodiment focuses on differences from other embodiments, and the same and similar parts among the embodiments are referred to each other. For the system disclosed by the embodiment, the description is relatively simple because the system corresponds to the method disclosed by the embodiment, and the relevant points can be referred to the method part for description. It should be noted that, for those skilled in the art, it is possible to make several improvements and modifications to the present application without departing from the principle of the present application, and such improvements and modifications also fall within the scope of the claims of the present application.
It is further noted that, in the present specification, relational terms such as first and second, and the like are used solely to distinguish one entity or action from another entity or action without necessarily requiring or implying any actual such relationship or order between such entities or actions. Also, the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or apparatus. Without further limitation, an element defined by the phrase "comprising an … …" does not exclude the presence of other identical elements in a process, method, article, or apparatus that comprises the element.

Claims (8)

1. An interrupt processing method, comprising:
after receiving the interrupt signal, judging whether the self in-place signal is reset or not; wherein, the in-situ signal is used for representing whether hot plugging occurs or not;
if so, inhibiting responding to the interrupt signal;
if not, recording the interrupt signal, and determining an error type corresponding to the interrupt signal;
if the error type is UCE type error, the interrupt signal is sent to a central processing unit so as to trigger a corresponding safety protection mechanism;
wherein, the acquisition process of the interrupt signal comprises:
and after error reporting information sent based on a PCIe protocol is configured at the tail end, determining the corresponding interrupt signal by using the error reporting information.
2. The interrupt processing method of claim 1, further comprising, after said inhibiting responding to said interrupt signal:
and clearing the historical error reporting information in the register.
3. The interrupt processing method according to claim 1 or 2, wherein the recording the interrupt signal includes:
and sending the interrupt signal to the flash ROM to record the error type and the error amount.
4. An interrupt processing system, comprising:
the reset judging module is used for judging whether the self in-place signal is reset or not after receiving the interrupt signal; wherein, the in-situ signal is used for representing whether hot plugging occurs or not;
a response prohibition module, configured to prohibit a response to the interrupt signal if the in-place signal is reset;
the signal recording module is used for recording the interrupt signal and determining the error type corresponding to the interrupt signal if the in-place signal is reset;
the signal sending module is used for sending the interrupt signal to a central processing unit to trigger a corresponding safety protection mechanism if the error type is a UCE type error;
further comprising:
and the interrupt signal judgment module is used for determining the corresponding interrupt signal by using the error information after the error information sent based on the PCIe protocol configured at the tail end is acquired.
5. The interrupt processing system of claim 4, further comprising:
and the history clearing module is used for clearing the history error reporting information in the register after the response to the interrupt signal is forbidden.
6. The interrupt handling system of claim 4 or 5, wherein the signal recording module comprises:
and the error reporting and recording unit is used for sending the interrupt signal to the flash ROM to record the error type and the error number.
7. An electronic device, comprising:
a memory for storing a computer program;
a processor for implementing the steps of the interrupt handling method of any of claims 1 to 3 when executing the computer program.
8. A computer-readable storage medium, characterized in that a computer program is stored on the computer-readable storage medium, which computer program, when being executed by a processor, carries out the steps of the interrupt processing method according to any one of claims 1 to 3.
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