CN109873565A - A kind of new topology and its common-mode voltage inhibition strategy of dual-level matrix frequency converter - Google Patents
A kind of new topology and its common-mode voltage inhibition strategy of dual-level matrix frequency converter Download PDFInfo
- Publication number
- CN109873565A CN109873565A CN201910179031.0A CN201910179031A CN109873565A CN 109873565 A CN109873565 A CN 109873565A CN 201910179031 A CN201910179031 A CN 201910179031A CN 109873565 A CN109873565 A CN 109873565A
- Authority
- CN
- China
- Prior art keywords
- vector
- inverse cascade
- modulation
- common
- dual
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Landscapes
- Rectifiers (AREA)
- Ac-Ac Conversion (AREA)
Abstract
The invention discloses the new topologys and its common-mode voltage of a kind of dual-level matrix frequency converter to inhibit strategy, its topological structure is single-way switch pipe of respectively connecting on the upper and lower bus of DC side of traditional dual-level matrix frequency converter, inverse cascade zero vector when the effective vector of inverse cascade is equivalent to DC side switch conduction when due to the shutdown of DC side switching tube, it is called the equivalent zero vector of inverse cascade, the present invention participates in modulation using equivalent zero vector, the modulation of seven section space vector of inverse cascade is optimized for three-stage space vector modulation, while realizing the inhibition of common-mode voltage.Usefulness of the present invention is can be suitable with prior art inhibitory effect in voltage transmission than load-side common-mode voltage is down to input 0.577 times of phase voltage peak value in 0~0.866 whole region；Change of current control strategy is simple, can directly implement the change of current to rectification stage, improve system reliability；The modulation strategy of optimization is simply easily achieved, the total actual switch number of system is basically unchanged compared to conventional modulated strategy, inverse cascade actual switch number is greatly decreased, change system switching loss distribution, reduce output current harmonics aberration rate, input current quality remains unchanged, and power quality is improved.
Description
Technical field
The present invention relates to the topology of converters and the suppression technologies of common-mode voltage, and in particular to a kind of stage type
The new topology and its common-mode voltage of matrix converter inhibit strategy.
Background technique
As a kind of novel A-A transducer, dual-level matrix frequency converter not only has the input of classical matrix converter
It exports current sinusoidal, energy capable of bidirectional flowing, be not necessarily to the advantages that DC energy storage element, power density are high, compact-sized, also have
The advantages that rectification stage zero current transition, clamp circuit control is simple, therefore between more than 20 years of past, cause lot of domestic and foreign
The concern of person has development potentiality very much.
In motor driven application, dual-level matrix frequency converter load-side can generate common-mode voltage, and then form axis electricity
Stream, causes motor bearings to damage, reduces the service life of motor, while common-mode voltage can generate common mode current in systems, right
The normal operation of device causes electromagnetic interference.
Existing document inhibits expansion correlative study to the common-mode voltage of dual-level matrix frequency converter, a kind of method be avoid it is inverse
Become grade and directly participates in the synthesis of expectation voltage vector using zero vector to realize the inhibition of common-mode voltage, as rectification stage has zero vector
Effective vector that modulation strategy, inverse cascade of the inverse cascade without zero vector use both direction opposite replaces zero vector etc., but such
Method directly results in rectification stage must be using four_step commutation strategy, and control is more complex, exists simultaneously the increased disadvantage of on-off times
End, increases system loss, and input and output electric current percent harmonic distortion is risen；Another kind of method is to change rectification stage sector
Using two lesser line voltage synthesis middle dc voltages to realize that common-mode voltage inhibits, but there is maximum electricity in distributing position
The problem for pressing transfer ratio limited, simultaneously because there are zero vectors for inverse cascade, if inverse cascade is rectified using seven segmentation on off sequences
Zero current transition may be implemented in grade, but actual switch number greatly increases, if not using seven segmentation on off sequences, rectification stage must
Four_step commutation strategy must be used.Inhibit the modulation strategy of common-mode voltage there are rectification stage change of current complexity in conclusion having, switch
Number increases or voltage transmission is than the drawbacks such as limited.
Summary of the invention
The object of the present invention is in voltage transmission than realizing dual-level matrix frequency converter common mode in 0~0.866 whole region
Voltage inhibits, and reaches prior art inhibitory effect, while rectification stage can directly implement the change of current, input and output power quality obtains
Improve.
The technical scheme adopted by the invention is as follows:
A kind of new topology and its common-mode voltage inhibition strategy of dual-level matrix frequency converter, improve traditional stage type square first
Battle array converter topology is then based on new topology using the Double Space Vector Modulation strategy of optimization and inhibits common-mode voltage.
The new topology of dual-level matrix frequency converter is made of rectification stage, DC side and inverse cascade three parts, and rectification stage is six
The three-phase bridge circuit that a two-way switch unit is composed, each two-way switch by cascode grade two single-way switch pipe strings
Join, single-way switch pipe of respectively connecting on the upper and lower bus of direct current, the switching tube emitter of Up Highway UHW meets inverse cascade, lower mother
The switching tube emitter of line connects rectification stage, and inverse cascade is the three-phase bridge circuit being composed of six single-way switch pipes.
Traditional Double Space Vector Modulation strategy be optimized for keep rectification stage conventional current space vector modulation it is constant, then
The modulation of seven section space vector of inverse cascade is optimized for three-stage space vector tune by the conducting and shutdown for controlling DC side switching tube
System, specific as follows:
(1) the effective vector of the inverse cascade equivalent inverse cascade null vector with when DC side switch conduction when DC side switching tube turns off
Amount, becomes the equivalent zero vector of inverse cascade；
(2) in the modulation of seven section space vector of inverse cascade, zero vector shape is replaced with zero vector switch state equivalent in (1)
State constitutes effective vector selection principle in equivalent zero vector as on-off times minimum, such as V0V1V2V7V7V2V1V0It replaces with
V1V1V2V2V2V2V1V1, inverse cascade space vector modulation is reduced to three-stage；When effective Vector modulation expectation voltage vector, direct current
The conducting of side switching tube.
The present invention compared with prior art caused by effect are as follows:
(1) in voltage transmission than load-side common-mode voltage is down to input phase voltage peak value in 0~0.866 whole region
It is 0.577 times, suitable with prior art inhibitory effect；
(2) change of current control strategy is simple, can directly implement the change of current to rectification stage, improve system reliability；
(3) modulation strategy optimized is simply easily achieved, and the total actual switch number of system is compared to conventional modulated strategy base
This is constant, and inverse cascade actual switch number is greatly decreased, and changes system switching loss distribution, it is abnormal to reduce output current harmonics
Variability, input current quality remain unchanged, and power quality is improved.
Detailed description of the invention
Fig. 1: the new topology of dual-level matrix frequency converter；
Fig. 2: (a) rectification stage space vector sector is distributed；(b) inverse cascade space vector sector is distributed；
Fig. 3: dual-level matrix frequency converter common-mode voltage generates schematic diagram；
Fig. 4: rectification stage I1, DC side switching tube shutdown and inverse cascade V1System equivalent circuit diagram when effect；
Fig. 5: the coordinated control figure of rectification stage, DC side and inverse cascade switching tube；
Fig. 6: (a) rectification stage expectation input current vector synthesis；(b) inverse cascade desired output voltage vector synthesizes；
Specific embodiment
The present invention will be further described with reference to the accompanying drawing；
The new topology of a kind of dual-level matrix frequency converter of the present invention, as shown in Figure 1, main circuit topology is by rectifying
Grade, DC side and inverse cascade three parts are constituted.Wherein, rectification stage three-phase input indicates that rectification stage is six two-way openeds with a, b, c
The three-phase bridge circuit that unit is composed is closed, each two-way switch is connected in series by two single-way switch pipes of cascode grade,
Six two-way switch unit Sij(i=a, b, c；J=P, N) it indicates, it is intended that connection input i phase and the end DC bus j.Direct current
It respectively connects on upper and lower bus a single-way switch pipe, the switching tube emitter of Up Highway UHW connects inverse cascade, the switching tube hair of Down Highway
Emitter-base bandgap grading connects rectification stage, uses S respectivelyPP '、SNN 'It indicates, it is intended that connection direct current Up Highway UHW front end P and rear end P ', direct current Down Highway front end
N and rear end N '.The three-phase of inverse cascade is exported and is indicated with A, B, C, the three-phase bridge that inverse cascade is composed of six single-way switch pipes
Formula circuit, six effective S of single-way switchok(o=A, B, C；K=P ', N ') it indicates, it is intended that the connection output end o and DC bus k
End.
When dual-level matrix frequency converter drives three phase alternating current motor, as shown in Fig. 2, common-mode voltage vngFor in threephase load
Voltage between property point n and power ground point g.When the sum of three-phase output electric current is zero, common-mode voltage meets following formula:
V in formulaAg、vBg、vCgRespectively three-phase exports phase voltage；
Fig. 3 is the space vector sector distribution of rectification stage and inverse cascade, I in Fig. 3 (a)1-I9Represent the switch shape of rectification stage
State (I6For, a indicates bridge arm conducting in a phase, and b indicates the conducting of b phase lower bridge arm, and rest switch Guan Jun is not turned on), in Fig. 3 (b)
V0-V7Represent the switch state of inverse cascade (0 indicates lower bridge arm conducting, and 1 indicates upper bridge arm conducting).Rectification stage and inverse cascade are not
The common-mode voltage of same Switch State Combination in Power Systems, generation is also different, if rectification stage switch state is I6, inverse cascade switch state be V0When,
vAg=vBg=vCg=vb, vng=vb, therefore under traditional Double Space Vector Modulation strategy inverse cascade zero vector presence, common mode electricity
Voltage crest value is equal to input phase voltage peak value Vim。
Solution of the present invention is to be in the equivalent inverse cascade zero of effective vector with the shutdown of DC side switching tube, inverse cascade
Vector, and Vector modulation is participated in using equivalent zero vector, DC side electric current is zero at this time, and load is equivalent to for rectification stage
Side open circuit, rectification stage can be to avoid using four_step commutation strategy directly to implement the change of current；Simultaneously because the presence of switch junction capacitance,
Switching tube SPP '、SNN 'Play the role of partial pressure during shutdown, output is avoided directly to be connected with input.Such as when rectification stage is effectively sweared
Measure I1Effect, the shutdown of DC side switching tube, the effective vector V of inverse cascade1When effect, the equivalent circuit diagram of system as shown in figure 4, this
When load-side common-mode voltage are as follows:
Remaining sector is similar, can obtain the load-side common mode during the effective vector effect of inverse cascade when DC side switching tube disconnects
Voltage peak is 0.433Vim, by existing literature it is found that the effective vector effect of inverse cascade under traditional dual-level matrix frequency converter topology
The load-side common-mode voltage peak value of period is 0.577Vim, dual-level matrix frequency converter newly topological DC side switching tube conducting and this
It is equivalent.
Common-mode voltage of the present invention inhibits strategy, and the effective vector of inverse cascade is equivalent to direct current when DC side switching tube turns off
Inverse cascade zero vector when the switch conduction of side becomes the equivalent zero vector of inverse cascade；It is modulated in seven section space vector of inverse cascade
In, zero vector state is replaced with equivalent zero vector switch state, constituting effective vector selection principle in equivalent zero vector is to open
It closes number to minimize, such as V0V1V2V7V7V2V1V0Replace with V1V1V2V2V2V2V1V1, inverse cascade space vector modulation is reduced to three
Segmentation；When effective Vector modulation expectation voltage vector, the conducting of DC side switching tube；Rectification stage, DC side and inverse cascade switching tube
Coordinated control, as shown in figure 5, be specifically divided into following steps implementation: (it is illustrated below, for explaining only the invention, without
It can be construed to limitation of the present invention)
(1) the sector N of rectification stage and inverse cascade is obtained according to Double Space Vector Modulation algorithmc、NvAnd corresponding sector angle
θc、θv, determine inverse cascade modulation ratio mv, switch periods Ts；
(2) vector action time is calculated, the first sector, inverse cascade output voltage arrow are located at rectification stage input current vector
Amount is located at for the second sector, and common-mode voltage of the present invention is discussed in detail and inhibits strategy, it is expected that input current vector passes through
Two adjacent effective current vector (I6、I1) synthesis, it is respectively d that effective current vector, which acts on duty ratio,a、db, such as Fig. 6 (a),
Desired output voltage vector passes through two adjacent effective voltage vector (V1、V2) and the synthesis of equivalent zero vector, effective voltage vector
It is respectively d with equivalent zero vector effect duty ratiom、dn、d0, such as Fig. 6 (b), calculation formula such as formula (3)；
(3) carrier wave is triangular carrier utri, amplitude is [0,1], period Ts；The vector action time for utilizing (3) to calculate
It is compared with triangular carrier, generates gate electrode drive signals, conducting and the pass of control rectification stage, DC side and inverse cascade switching tube
It is disconnected:
Rectification stage: bridge arm switching tube is connected in entire switch periods in rectification stage a phase, pulse PWMaPPerseverance is 1；When
utri<daWhen, the conducting of rectification stage b phase lower bridge arm switching tube, the shutdown of c phase lower bridge arm switching tube, pulse PWMbNIt is 1, PWMcNIt is 0；When
utri>daWhen, the shutdown of rectification stage b phase lower bridge arm switching tube, the conducting of c phase lower bridge arm switching tube, pulse PWMbNIt is 0, PWMcNIt is 1,
Remaining switching tube pulse perseverance is；
DC side: when the equivalent zero vector of inverse cascade participates in modulation, two switching tubes on DC bus are simultaneously turned off
SPP '、SNN ', when the effective vector of inverse cascade participates in modulation, simultaneously turn on SPP '、SNN ', i.e. da(1-dm-dn)/2<utri<da(1+dm+
dn)/2 or (da+db(1-dm-dn)/2)<utri<(da+db(1+dm+dn)/2) when, SPP '、SNN 'It is both turned on, pulse PWMPP '、
PWMNN 'It is 1, remaining moment of switch periods, SPP '、SNN 'It is turned off, pulse PWMPP '、PWMNN 'It is 0；
Inverse cascade: three-stage space vector modulation is used, bridge arm is both turned in inverse cascade A phase in entire switch periods, C
Bridge arm is turned off in phase, trigger pulse PWMAP 'It is 1, PWMCP 'It is 0；Work as da(1+dm-dn)/2<utri<(da+db(1-dm+dn)/2)
When, bridge arm conducting, PWM in B phaseBP 'For 1, ABC three-phase lower bridge arm trigger pulse PWMAN '、PWMBN '、PWMCN 'Respectively with upper bridge arm
Trigger pulse PWMAP '、PWMBP '、PWMCP 'It is complementary.
Claims (3)
1. the new topology and its common-mode voltage of a kind of dual-level matrix frequency converter inhibit strategy, which is characterized in that improve pass first
Dual-level matrix frequency converter of uniting is topological, is then based on new topology and inhibits common mode electric using the Double Space Vector Modulation strategy of optimization
Pressure.
2. a kind of new topology of dual-level matrix frequency converter and its common-mode voltage inhibit strategy, feature as described in claim 1
It is, the new topology of dual-level matrix frequency converter is made of rectification stage, DC side and inverse cascade three parts, and rectification stage is six double
The three-phase bridge circuit being composed to switch unit, each two-way switch by cascode grade two single-way switch pipes series connection and
At single-way switch pipe of respectively connecting on the upper and lower bus of direct current, the switching tube emitter of Up Highway UHW connects inverse cascade, Down Highway
Switching tube emitter connects rectification stage, and inverse cascade is the three-phase bridge circuit being composed of six single-way switch pipes.
3. a kind of new topology of dual-level matrix frequency converter and its common-mode voltage inhibit strategy, feature as described in claim 1
It is, it is constant that the optimization of traditional Double Space Vector Modulation strategy is to maintain rectification stage conventional current space vector modulation, then controls
The modulation of seven section space vector of inverse cascade is optimized for three-stage space vector tune by the conducting and shutdown of DC side switching tube processed
System, specific as follows:
(1) inverse cascade zero vector when the effective vector of inverse cascade is equivalent to DC side switch conduction when DC side switching tube turns off,
It is called the equivalent zero vector of inverse cascade；
(2) in the modulation of seven section space vector of inverse cascade, zero vector is replaced with zero vector equivalent in (1), constitutes equivalent null vector
Effective vector selection principle in amount is on-off times minimum, such as V0V1V2V7V7V2V1V0Replace with V1V1V2V2V2V2V1V1, inverse
Become grade space vector modulation and is reduced to three-stage；When effective Vector modulation expectation voltage vector, the conducting of DC side switching tube.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201910179031.0A CN109873565B (en) | 2019-03-11 | 2019-03-11 | Novel topology of two-stage matrix converter and common-mode voltage suppression strategy thereof |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201910179031.0A CN109873565B (en) | 2019-03-11 | 2019-03-11 | Novel topology of two-stage matrix converter and common-mode voltage suppression strategy thereof |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN109873565A true CN109873565A (en) | 2019-06-11 |
| CN109873565B CN109873565B (en) | 2020-09-08 |
Family
ID=66920123
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201910179031.0A Active CN109873565B (en) | 2019-03-11 | 2019-03-11 | Novel topology of two-stage matrix converter and common-mode voltage suppression strategy thereof |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN109873565B (en) |
Cited By (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN110401355A (en) * | 2019-07-31 | 2019-11-01 | 河北工业大学 | A kind of indirect matrix converter modulator approach inhibiting common-mode voltage |
| CN110445442A (en) * | 2019-07-02 | 2019-11-12 | 华夏天信智能物联股份有限公司 | A kind of three-phase cascade connection type three-level inverter control method |
| CN110581653A (en) * | 2019-09-26 | 2019-12-17 | 中国矿业大学 | common mode voltage suppression strategy under low voltage of two-stage matrix converter |
| CN112350295A (en) * | 2020-09-17 | 2021-02-09 | 许继集团有限公司 | PDM-based direct-current microgrid common-mode voltage suppression method |
| CN113114032A (en) * | 2021-04-28 | 2021-07-13 | 西安工业大学 | SVPWM common mode voltage suppression method based on synthetic mode change |
| CN114362548A (en) * | 2021-12-20 | 2022-04-15 | 中国矿业大学 | Optimal switch sequence model prediction control algorithm of two-stage matrix converter |
Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101860318A (en) * | 2010-05-21 | 2010-10-13 | 中南大学 | Alternating current governing system for twin-stage matrix converter having anti-losing capability |
| CN104578725A (en) * | 2014-12-29 | 2015-04-29 | 南京航空航天大学 | Two-stage matrix converter topological structure being capable of outputting alternating voltage and direct voltage |
| CN105356764A (en) * | 2015-10-30 | 2016-02-24 | 南京航空航天大学 | Z-source two-stage matrix converter with fault-tolerant topology and control method thereof |
| CN106208735A (en) * | 2016-08-24 | 2016-12-07 | 中南大学 | The matrix converter of a kind of third-harmonic zero-sequence voltage and control method |
| US20160372924A1 (en) * | 2009-09-15 | 2016-12-22 | Networked Power Inc. | Smart-Grid Adaptive Power Management Method and System With Power Factor Optimization and Total Harmonic Distortion Reduction |
-
2019
- 2019-03-11 CN CN201910179031.0A patent/CN109873565B/en active Active
Patent Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20160372924A1 (en) * | 2009-09-15 | 2016-12-22 | Networked Power Inc. | Smart-Grid Adaptive Power Management Method and System With Power Factor Optimization and Total Harmonic Distortion Reduction |
| CN101860318A (en) * | 2010-05-21 | 2010-10-13 | 中南大学 | Alternating current governing system for twin-stage matrix converter having anti-losing capability |
| CN104578725A (en) * | 2014-12-29 | 2015-04-29 | 南京航空航天大学 | Two-stage matrix converter topological structure being capable of outputting alternating voltage and direct voltage |
| CN105356764A (en) * | 2015-10-30 | 2016-02-24 | 南京航空航天大学 | Z-source two-stage matrix converter with fault-tolerant topology and control method thereof |
| CN106208735A (en) * | 2016-08-24 | 2016-12-07 | 中南大学 | The matrix converter of a kind of third-harmonic zero-sequence voltage and control method |
Non-Patent Citations (3)
| Title |
|---|
| ZHENG GONG等: "A Low-Cost Phase-Angle Compensation Method for the Indirect Matrix Converters Operating at the Unity Grid Power Factor", 《IEEE TRANSACTIONS ON POWER ELECTRONICS》 * |
| 董亚峰: "双级矩阵变换器双空间矢量调制策略研究", 《科技专论》 * |
| 马钊: "双级矩阵式变换器的控制技术及其应用研究", 《中国优秀硕士学位论文全文数据库工程科技Ⅱ辑》 * |
Cited By (11)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN110445442A (en) * | 2019-07-02 | 2019-11-12 | 华夏天信智能物联股份有限公司 | A kind of three-phase cascade connection type three-level inverter control method |
| CN110401355A (en) * | 2019-07-31 | 2019-11-01 | 河北工业大学 | A kind of indirect matrix converter modulator approach inhibiting common-mode voltage |
| CN110401355B (en) * | 2019-07-31 | 2020-12-22 | 河北工业大学 | Indirect matrix converter modulation method for inhibiting common-mode voltage |
| CN110581653A (en) * | 2019-09-26 | 2019-12-17 | 中国矿业大学 | common mode voltage suppression strategy under low voltage of two-stage matrix converter |
| CN110581653B (en) * | 2019-09-26 | 2021-06-08 | 中国矿业大学 | Common mode voltage suppression strategy under low voltage of two-stage matrix converter |
| CN112350295A (en) * | 2020-09-17 | 2021-02-09 | 许继集团有限公司 | PDM-based direct-current microgrid common-mode voltage suppression method |
| CN112350295B (en) * | 2020-09-17 | 2023-01-17 | 许继集团有限公司 | PDM-based direct-current microgrid common-mode voltage suppression method |
| CN113114032A (en) * | 2021-04-28 | 2021-07-13 | 西安工业大学 | SVPWM common mode voltage suppression method based on synthetic mode change |
| CN113114032B (en) * | 2021-04-28 | 2022-10-04 | 西安工业大学 | SVPWM common-mode voltage suppression method based on synthetic mode change |
| CN114362548A (en) * | 2021-12-20 | 2022-04-15 | 中国矿业大学 | Optimal switch sequence model prediction control algorithm of two-stage matrix converter |
| CN114362548B (en) * | 2021-12-20 | 2023-10-13 | 中国矿业大学 | Optimal switching sequence model predictive control algorithm for two-stage matrix converter |
Also Published As
| Publication number | Publication date |
|---|---|
| CN109873565B (en) | 2020-09-08 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN109873565A (en) | A kind of new topology and its common-mode voltage inhibition strategy of dual-level matrix frequency converter | |
| Wang et al. | Diode-free T-type three-level neutral-point-clamped inverter for low-voltage renewable energy system | |
| CN107070215B (en) | Three-level boost common-ground system and control method thereof | |
| CN106936319B (en) | Isolated three-port bidirectional DC-DC converter | |
| CN110061650B (en) | Single-stage isolated three-phase bidirectional AC/DC converter and control method | |
| CN105162350A (en) | High-efficiency wide-load-range three-phase micro-inverter and control method thereof | |
| CN110581653B (en) | Common mode voltage suppression strategy under low voltage of two-stage matrix converter | |
| WO2017185223A1 (en) | Multiplexed cascade-type photovoltaic power generation system and photovoltaic power generation apparatus | |
| CN102255544A (en) | DC (direct current)/AC (alternating current) inverter circuit | |
| CN110086360A (en) | A kind of five level high efficiency rectifiers | |
| Karthikeyan et al. | A High efficient DAB converter under heavy load conditions using inner phase shift control | |
| Zhang et al. | High voltage gain dual active bridge converter with an extended operation range for renewable energy systems | |
| Yang et al. | Single-phase high-gain bidirectional dc/ac converter based on high step-up/step-down dc/dc converter and dual-input dc/ac converter | |
| CN113507224B (en) | Three-phase buck-boost rectifying converter and control method | |
| CN111711374B (en) | Modular parallel four-level converter system and method | |
| WO2018171769A1 (en) | Z-source network active neutral point clamped five-level photovoltaic grid-connected inverter system | |
| CN102403922A (en) | DC/AC grid connected inverter circuit and power factor adjusting method | |
| Wen | Reactive power loss optimization method for bi-directional isolated DC-DC converters | |
| CN112202351A (en) | Single-stage isolated three-phase AC/DC rectifier of wide-range soft switch | |
| CN208890652U (en) | A kind of new energy interface system based on double active bridge dcdc converters | |
| US11996787B2 (en) | FWS DC-AC grid connected inverter | |
| CN110299861A (en) | Boost active neutral-point-clamped type five-level converter | |
| CN109639169A (en) | A kind of soft switch circuit suitable for the quasi- Z-source inverter of voltage-type | |
| CN113517824B (en) | Single-phase single-stage six-switch double-output split-source boosting inverter | |
| CN206041849U (en) | Little dc -to -ac converter of multichannel photovoltaic power generation with link is kept apart to high frequency |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PB01 | Publication | ||
| PB01 | Publication | ||
| SE01 | Entry into force of request for substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| GR01 | Patent grant | ||
| GR01 | Patent grant |