CN109862651B

CN109862651B - One-line dimming method, circuit, chip and system

Info

Publication number: CN109862651B
Application number: CN201810915653.0A
Authority: CN
Inventors: 李冬超
Original assignee: Shanghai Awinic Technology Co Ltd
Current assignee: Shanghai Awinic Technology Co Ltd
Priority date: 2018-08-13
Filing date: 2018-08-13
Publication date: 2024-03-22
Anticipated expiration: 2038-08-13
Also published as: CN109862651A

Abstract

The embodiment of the application provides a first-line dimming method, a circuit, a chip and a system, wherein the first-line dimming circuit comprises: the pulse input end is used for receiving a line pulse signal; the control input end is used for receiving a control signal, and the control signal is used for controlling the counter to be in a counting state or a counting stopping state; the counter is used for counting according to a line pulse signal when in a counting state, and is used for outputting a counting result when in a counting stopping state; the driving module is used for determining a driving signal according to the counting result so as to adjust light. According to the first-line dimming method, circuit, chip and system, the counter is controlled to be in the counting state or the counting state is stopped through the received control signal, so that the anti-interference capability of the first-line dimming system is improved, and the dimming accuracy is improved.

Description

One-line dimming method, circuit, chip and system

Technical Field

The embodiment of the application relates to the technical field of circuits, in particular to a first-line dimming method, a circuit, a chip and a system.

Background

In the existing one-line dimming technology, an operating system processor is mostly adopted to output one line pulse signal, and then the starting and stopping of dimming, the brightness of light and the like are controlled through the one line pulse signal. However, an interrupt mechanism is commonly applied in the existing operating system, and the interrupt mechanism may interfere with the output line pulse signal when executing, thereby reducing the accuracy of dimming.

Therefore, a technical solution is needed to effectively solve the problem of the decrease of the dimming accuracy caused by the interference of the line pulse signal.

Disclosure of Invention

Accordingly, one of the technical problems to be solved by the embodiments of the present application is to provide a first-line dimming method, circuit, chip and system for solving the above-mentioned problems in the prior art.

An embodiment of the present application provides a one-wire dimming circuit, which includes: pulse input end, control input end, counter and driving module, in which,

the pulse input end is used for receiving a line pulse signal;

the control input end is used for receiving a control signal, and the control signal is used for controlling the counter to be in a counting state or a counting stopping state;

the counter is used for counting according to the first-line pulse signal when in a counting state, and is used for outputting a counting result when in a counting stopping state;

the driving module is used for determining a driving signal according to the counting result so as to adjust light.

Optionally, the level switching of the control signal corresponds to the start or stop of the line pulse signal.

Optionally, the level of the control signal is switched from a first level to a second level corresponding to the start of the line pulse signal; alternatively, the switching of the level of the control signal from the second level to the first level corresponds to termination of the line pulse signal.

Optionally, if the level of the control signal is the first level, the counter is in a counting state; or if the level of the control signal is the second level, the counter is in a stop counting state.

Optionally, when the level of the control signal is switched from the second level to the first level, the counter restarts counting.

Optionally, the counting according to the line pulse signal includes: the counter counts the number of rising edges of the line pulse signal.

Optionally, the driving signal determined by the driving module is a driving current, and the magnitude of the current of the driving current is positively correlated or negatively correlated with the counting result.

The embodiment of the application provides a one-wire dimming chip, which comprises the one-wire dimming circuit.

Optionally, the control signal received by the control input end of the one-line dimming circuit is multiplexed into the start signal of the one-line dimming chip.

An embodiment of the present application provides a first-line dimming system, which includes: a processor, a line dimmer circuit as described above,

the processor includes a pulse output, a control output, and the one-wire dimming circuit includes: pulse input end, control input end, counter and driving module,

the control output end of the processor is connected with the control input end of the first-line dimming circuit and is used for inputting a control signal to the first-line dimming circuit so as to control the counter of the first-line dimming circuit to be in a counting state or a counting stop state through the control signal;

the pulse output end of the processor is connected with the pulse input end of the first-line dimming circuit and is used for inputting a first-line pulse signal to the first-line dimming circuit;

the counter of the one-line dimming circuit is used for counting according to the one-line pulse signal when in a counting state, and is used for outputting a counting result when in a stop counting state;

the driving module of the one-line dimming circuit is used for determining a driving signal according to the counting result of the counter so as to perform dimming.

Optionally, the switching of the high and low level of the control signal corresponds to the start or stop of the line pulse signal.

Optionally, the processor is further configured to determine the control signal according to instruction information, where the instruction information is used to indicate start or stop of the line pulse signal.

The embodiment of the application provides a one-line dimming method, which comprises the following steps:

controlling the counter to be in a counting state or a counting stopping state through the control signal;

the counter counts according to the first line pulse signal when the counter is in a counting state, and outputs a counting result when the counter is in a counting stopping state;

and determining a driving signal according to the counting result of the counter so as to adjust light.

According to the one-line dimming scheme, the counter is controlled to be in the counting state or the counting state is stopped through the received control signal, counting errors caused by an interrupt mechanism of the processor can be avoided, and then the situation of dimming errors is caused, so that the anti-interference capability of the one-line dimming system is improved, the dimming accuracy is improved, and a module for determining the high-level pulse width in the one-line pulse signal can be omitted, so that the one-line dimming circuit is simple in structure.

Drawings

Some specific embodiments of the present application will be described in detail below by way of example and not by way of limitation with reference to the accompanying drawings. The same reference numbers will be used throughout the drawings to refer to the same or like parts or portions. It will be appreciated by those skilled in the art that the drawings are not necessarily drawn to scale. In the accompanying drawings:

fig. 1 is a schematic structural diagram of a first-line dimming circuit according to an embodiment of the present application;

FIG. 2 is a signal timing diagram of a line dimmer circuit of FIG. 1;

FIG. 3 is a timing diagram illustrating a control of the one-wire dimmer circuit of FIG. 1 under interrupt mechanism interference;

FIG. 4 is a timing diagram illustrating another control of the one-wire dimmer circuit of FIG. 1 under interrupt mechanism interference;

fig. 5 is a schematic structural diagram of a first-line dimming system according to an embodiment of the present application;

fig. 6 is a schematic structural diagram of another one-line dimming circuit according to an embodiment of the present disclosure;

fig. 7 is a signal timing diagram of a line dimming circuit of fig. 6.

Detailed Description

It is not necessary for any of the embodiments of the present application to be practiced with all of the advantages described above.

In order to better understand the technical solutions in the embodiments of the present application, the following descriptions will clearly and completely describe the technical solutions in the embodiments of the present application with reference to the drawings in the embodiments of the present application, and it is obvious that the described embodiments are only some embodiments of the present application, but not all embodiments. All other embodiments obtained by a person of ordinary skill in the art based on the embodiments in the embodiments of the present application shall fall within the scope of protection of the embodiments of the present application.

Embodiments of the present application are further described below with reference to the accompanying drawings of embodiments of the present application.

Example 1

Fig. 1 is a schematic structural diagram of a line dimming circuit according to an embodiment of the present application, where the circuit may be a part of a line dimming chip, as shown in fig. 1, and includes: a line pulse input terminal, a deglitch (degli tch) circuit, a counter (CURRENT ADC), a controller, and a CURRENT drain (CURRENT SINK).

A line pulse input for receiving a line pulse signal (1-WIRE PULSES INPUT), the resistor REN being a pull-down resistor of the line pulse input for making the default input of the line pulse input low.

A deglitch circuit for filtering glitches in a line pulse signal (1-WIRE PULSES INPUT). Of course, a deglitch circuit may be omitted, and a line pulse input may be directly connected to the counter, which is not limited in this embodiment.

The counter (CURRENT ADC) starts counting under the triggering of the line pulse signal and counts the number of rising edges of the line pulse signal, and then stops counting under the triggering of the further line pulse signal (1-WIRE PULSES INPUT) and outputs the counting result.

And the driving module is used for providing a driving signal according to the counting result, and the driving signal is used for driving the LED lamp to emit light so as to perform dimming. As shown in fig. 1, the driving optical module may specifically be a CURRENT drain (CURRENT SINK).

The timing diagrams of the line pulse signals 1-WIRE PULSES INPUT, the start signal start_ok of other modules of the line dimmer chip, and the current signals can be shown in fig. 2.

In actual use, a line pulse input begins to receive a line pulse signal. In this embodiment, a line pulse signal is used as the control signal and also used to count the counter.

Specifically, the line pulse signal may have a plurality of rising edges, corresponding to the first rising edge of the line pulse signals 1 to WIRE PULSES INPUT at time t1 in fig. 2, at which time the first rising edge of the line pulse signal triggers the counter CURRENT ADC to start counting as the control signal. Meanwhile, a controller (not shown) in a line dimmer chip may control other modules (e.g., CURRENT leakage CURRENT SINK) in the line dimmer chip to start.

After the start time STARTUP t time is elapsed, the start signal STARTUP_OK is switched from low level to high level at the time t2, and the controller determines that the start of other modules of the line pulse chip is completed.

At times t1-t3, a line pulse signal is used to cause the counter to count.

At time t3-t4, the first line pulse signal is again used as a control signal, the first line pulse signal 1-WIREPULSES INPUT is at a high level, and the pulse width is greater than or equal to the first threshold TON, so that the controller controls the counter CURRENT ADC to stop counting, and the counter CURRENT ADC outputs a counting result after stopping counting.

Specifically, the CURRENT leakage CURRENT SINK may determine a driving signal according to the counting result, the driving signal may be specifically a CURRENT signal of the CURRENT leakage, and a CURRENT value of the CURRENT signal may be proportional to, for example, proportional to or inversely proportional to the counting result. The circuit in which the current leakage current is positioned can be started in a SOFT START SOFT-START mode, a current signal is output as a driving signal, and then the LED lamp is driven to emit light through the current signal. The other end of the LED in fig. 1 is connected to the battery or the output of the DC/CD converter via a POWER LINE to POWER the LED lamp.

In addition, at times t5-t6, a line dimming signal is used as a control signal. The level of the one-line dimming signal is switched from high level to low level, and the pulse width of the low level is greater than or equal to a second threshold, wherein the second threshold can be specifically a turn-off DELAY time shift DOWN DELAY, and other modules of the one-line dimming chip are turned off, so that dimming of the next round is performed.

In this embodiment, the above-mentioned one-line pulse signal may be determined and output by a processor externally connected to the one-line dimming chip, and when the interrupt mechanism is executed, the signal output by the processor will remain unchanged until the interrupt mechanism stops executing, however, because the one-line dimming chip controls and counts only through one-line pulse signal, when the one-line pulse signal is interfered by the interrupt mechanism in the control process, the one-line dimming chip will determine the wrong current value, so that the brightness of the LED is wrong. The following is illustrated in two scenarios in which errors occur.

Scene one

If the interrupt mechanism of the processor is executed when the line pulse signal 1-WIRE PULSES INPUT is at high level, the timing diagrams of the line pulse signal 1-WIRE PULSES INPUT, the start signal start_ok indicating that the other modules of the line dimmer chip are started, and the CURRENT signal LED CURRENT of the LED are shown in fig. 3.

Specifically, as shown in fig. 3, the TIME t1 corresponds to the first rising edge of the line pulse signals 1-WIRE PULSES INPUT, at this TIME, other modules of the line dimming chip start to start, the counter CURRENT ADC starts to count, and after the start TIME period, the start of other modules of the line dimming chip is completed, and the start signal start_ok is switched from low level to high level, corresponding to the TIME t3 in the figure.

At time t2, the line pulse signal 1-WIRE PULSES INPUT is at a high level, and at this time, the interrupt mechanism of the processor starts to execute, so that the line pulse signal 1-WIRE PULSES INPUT is continuously at a high level and the pulse width is TH (corresponding to t2-t5 in the figure), and TH is greater than the first threshold TON (corresponding to t2-t4 in the figure). At this time, the other modules of the one-line dimming chip are already started, and at time t3, that is, the one-line pulse signals 1-WIRE PULSES INPUT are continuously high and have pulse width equal to the first threshold TON, the counter CURRENT ADC of the one-line dimming chip stops counting, and the CURRENT value of the CURRENT signal is determined according to the counting result, so as to perform dimming.

However, since the above-mentioned occurrence of the "the first line pulse signal 1-WIRE PULSES INPUT is continuously high and the pulse width is greater than the first threshold TON" is due to the interference of the interrupt mechanism, after the interrupt mechanism stops executing, the processor outputs the correct first line dimming signal again, corresponding to the time t5-t8 in fig. 3, but since the first line dimming chip has already controlled the counter CURRENT ADC to stop counting, the counter CURRENT ADC will not count the rising edges at the time t5-t6, and the counter CURRENT ADC will not count multiple rising edges, i.e. the counting result is wrong, and the brightness of the LED lamp is wrong.

The times t7-t8 in fig. 3 are similar to the times t5-t6 in fig. 2, and are not described in detail herein.

Scene two

If the interrupt mechanism of the processor is executed when the line pulse signals 1-WIRE PULSES INPUT are at low level, the timing diagrams of the line pulse signals 1-WIRE PULSES INPUT, the start signal start_ok indicating that the other modules of the line dimmer chip are started, and the current signals of the LEDs are shown in fig. 4.

Specifically, as shown in fig. 4, the TIME t1 corresponds to the first rising edge of the line pulse signals 1-WIRE PULSES INPUT, at this TIME, other modules of the line dimming chip start to start, the counter CURRENT ADC starts to count, and after the start TIME period, the start of other modules of the line dimming chip is completed, and the start signal start_ok is switched from low level to high level, corresponding to the TIME t3 in the figure.

At time t2, line pulse signals 1-WIRE PULSES INPUT are low, at which time the interrupt mechanism of the processor begins executing such that line pulse signals 1-WIRE PULSES INPUT continue high and pulse width TL is greater than second threshold clut DOWN DELAY. Then at time t4, i.e., when the line pulse signal 1-WIRE PULSES INPUT is continuously low and the pulse width is equal to the second threshold level shutdown, the other blocks of the line dimmer chip are turned off and the counter CURRENT ADC stops counting. At time t5, the first line pulse signals 1-WIRE PULSES INPUT are turned over to high level again, other modules of the first line dimming chip are restarted, the counter CURRENT ADC also restarts counting, and the CURRENT value of the CURRENT signal is determined according to the counting result so as to perform dimming.

However, since the above-mentioned occurrence of the "one-line pulse signal 1-WIRE PULSES INPUT is continuously low and the pulse width is greater than the second threshold value shutdown DELAY" is due to the interference of the interrupt mechanism, after the interrupt mechanism stops executing, the processor will re-output one-line dimming signal corresponding to time t5-t9 in fig. 4, but since the counter CURRENT ADC restarts counting at time t5 and counts the number of rising edges of the one-line pulse signal at time t5-t6, the counter CURRENT ADC loses the counting result at time t1-t2, and the counter CURRENT ADC leaks counting a plurality of rising edges, that is, the counting result is wrong, thereby causing the brightness error of the LED lamp.

The times t6-t9 in fig. 4 are similar to the times t3-t6 in fig. 2, and are not described in detail herein.

In order to avoid the above-mentioned problems, an embodiment of the present application provides a first-line dimming system, as shown in fig. 5, which includes: a processor 51 and a line dimmer circuit 52.

As shown in fig. 5, the processor 51 includes a pulse output terminal and a control output terminal. The one-wire dimming circuit 52 includes: pulse input 521, control input 522, counter 523, and drive module 524.

A control output terminal of the processor 51 is connected to a control input terminal 522 of the one-wire dimming circuit 52, and is used for inputting a control signal send_sig to the one-wire dimming circuit 52; the pulse output terminal of the processor 51 is connected to the pulse input terminal 521 of the one-wire dimming circuit 52 for inputting one-wire pulse signals 1-WIRE PULSES INPUT to the one-wire dimming circuit 52.

Pulse input 521 of one-WIRE dimming circuit 52 is for receiving one-WIRE pulse signal 1-WIRE pulse input;

a control input 522 of the one-wire dimming circuit 52 is configured to receive a control signal send_sig for controlling the counter 523 to be in a counting state or to stop counting state;

the counter 523 of the line dimming circuit 52 is used for counting according to the line pulse signals 1-WIRE PULSES INPUT when in a counting state under the control of the control signal send_sig, and the counter 523 is used for outputting a counting result when in a stop counting state under the control of the control signal send_sig;

the driving module 524 of the one-wire dimming circuit 52 is configured to determine a driving signal according to the count result for dimming.

Specifically, as shown in fig. 5, the driving module 524 in this embodiment may be connected to one end of the LED lamp, and the other end of the LED lamp is connected to the POWER LINE, so as to supply POWER to the LED lamp through the POWER LINE, and the driving module is used for adjusting the brightness of the LED lamp.

In this embodiment, the switching of the high level and the low level of the control signal corresponds to the start or the stop of the line pulse signal.

The processor 51 is further configured to determine the control signal based on instruction information indicating the start or end of the line pulse signal. After the control signal is determined, the control signal is output to a first-line dimming circuit through a control output end.

Since the line pulse signals 1-WIRE PULSES INPUT are output by the processor 51, in actual use, the processor 51 includes instruction information which can be used to indicate the start, interruption, termination, etc. of the line pulse signals 1-WIREPULSES INPUT. In this embodiment, the control signal send_sig may be determined by the processor 51 according to instruction information such that the level switching of the control signal corresponds to the start or stop of the line pulse signal 1-WIRE PULSES INPUT.

In this embodiment, the start and stop of the line pulse signals 1-WIRE PULSES INPUT can be the occurrence and end of the rising edge of the line pulse signals 1-WIRE PULSES INPUT.

Specifically, the beginning of a line pulse signal 1-WIRE PULSES INPUT occurs corresponding to the first rising edge in a line pulse signal 1-WIRE PULSES INPUT, and the ending of a line pulse signal 1-WIRE pulse input corresponds to the end of the last rising edge in a line pulse signal. Of course, the start and stop herein refer to only the start and stop of the line pulse signal during one dimming, and in actual use, the line pulse signal may be output multiple times, for example, a line pulse signal similar to that shown in fig. 7 described below may be repeatedly output multiple times, and the present embodiment is not limited to this.

The control signal may be level switched while the first rising edge of the line pulse signal 1-WIRE PULSES INPUT occurs. The end of the line pulse signal 1-WIRE PULSES INPUT corresponds to the line pulse signal 1-WIRE PULSES INPUT no longer having a rising edge, at which point the control signal SEND SIG may again be level-switched. Since the level switching of the control signal send_sig is not affected by the interrupt mechanism of the processor 51, the counter 523 in the one-wire dimming circuit 52 is also not affected by the interrupt mechanism, so that the occurrence of counting error conditions is reduced, and the anti-interference capability of the one-wire dimming system is increased.

In this embodiment, the determined level of the control signal send_sig may be a first level and a second level, and if the level of the control signal send_sig is the first level, the counter 523 is in a counting state; alternatively, if the level of the control signal send_sig is the second level, the counter 523 is in a stop counting state.

In combination with the level switching of the control signal described above, when the level of the control signal send_sig is switched from the second level to the first level at the occurrence of the first rising edge of the line pulse signal 1 to WIRE PULSES INPUT, the state of the counter is switched to the count state, and the counter 523 resumes the count. That is, the level switching of the control signal send_sig corresponds to the switching of the state of the counter 523; alternatively, when the rising edge of the line pulse signal 1-WIRE PULSES INPUT is no longer present, the level of the control signal send_sig is switched from the first level to the second level, the state of the counter is switched to the stop counting state, and the counter 523 outputs the counting result. In this embodiment, the first level may be a high level, and the second level may be a low level.

In this embodiment, as shown in fig. 6, the counter is specifically a counter CURRENT ADC, and after the control input 522 receives the control signal, the control signal may be transmitted to the enable terminal of the counter CURRENT ADC, so that the counter CURRENT ADC is controlled to be in a counting state or stop counting state by the control signal.

In this embodiment, the driving signal determined by the driving module is a driving current, and the magnitude of the current of the driving current is positively correlated or negatively correlated with the counting result.

Specifically, as shown in fig. 6, the driving module may include a CURRENT leakage CURRENT SINK to control the CURRENT flowing from the LED lamp through the CURRENT leakage CURRENT SINK for dimming. Alternatively, the driving module may also include a CURRENT SOURCE to control the CURRENT flowing into the LED lamp through the CURRENT SOURCE for dimming. The method for controlling the current of the current signal can refer to the prior art, and this embodiment is not repeated.

In this embodiment, as shown in fig. 6, the line dimming circuit 52 further includes a deglitch circuit for filtering glitches in the line pulse signals 1-WIRE PULSES INPUT, wherein an INPUT terminal of the deglitch circuit is used for inputting the line pulse signals 1-WIRE PULSES INPUT, and REN is a pull-down resistor of the line pulse INPUT terminal for making a default INPUT of the line pulse INPUT terminal be low.

The output of the deglitch circuit is connected to the count INPUT of the counter CURRENT ADC, so that the counter CURRENT ADC counts in the count state according to the line pulse signal 1-wire.

Specifically, in this embodiment, the counter CURRENT ADC is used to count the number of rising edges of the line pulse signals 1-WIRE PULSES INPUT. Of course, in other implementations, the counter CURRENTADC may also be used to count the number of falling edges, or the number of high and low levels in the line pulse signals 1-WIRE PULSES INPUT, which is not limited in this embodiment.

Further, in this embodiment, if the above-mentioned one-line dimming circuit 52 is a part of the circuit in the one-line dimming chip, the one-line dimming chip may further include a controller (not shown in the figure) for controlling other modules in the one-line dimming chip, such as a driving module, except for the counter CURRENT ADC, to be started. The control signal received by the control input terminal of the one-line dimming circuit may be multiplexed into the start signal of the one-line dimming chip, that is, when the level of the control signal send_sig is switched to the first level, the controller may control other modules to start starting.

When the level of the control signal send_sig is switched to the second level, the counter CURRENT ADC stops counting, and when the one-line dimming signal is at the low level and the pulse width thereof is greater than the second threshold, the controller controls other modules in the one-line dimming chip to be turned off.

After adding the control signals, a timing chart of the line pulse signals 1-WIRE PULSES INPUT, the control signal, the start signal start_ok, and the current signals of the LEDs is shown in fig. 7.

Specifically, at time t1, a first rising edge occurs in the line pulse signals 1-WIRE PULSES INPUT, and the corresponding control signal send_sig is switched to a high level, at which time the counter CURRENT ADC counts the number of rising edges of the line pulse again.

At times t1-t2, the control signal send_sig continues to be high, and at this time, even if the interrupt mechanism of the processor 51 is executed, the interrupt mechanism may be executed corresponding to TH or TL in the line pulse signal 1-WIRE pulse input in the figure, and the counter CURRENT ADC still counts correctly, i.e. the counter CURRENT ADC counts the number of rising edges of the line pulse signal 1-WIRE PULSES INPUT at times t1-t 2. And, at time t1-t2, the other modules in the one-line dimming chip are started and completed, and the start signal STARTUP_OK is switched to a high level.

At time t2, the rising edge is not included in the line pulse signals 1-WIRE PULSES INPUT, i.e. the line pulse signals 1-WIRE PULSES INPUT are terminated, at this time, the control signal send_sig is switched to a low level, the counter CURRENT ADC stops counting, and the counting result is output, so that the driving module determines the driving signal, i.e. the CURRENT signal LED CURRENT of the LED, according to the counting result, to perform dimming.

At time t3, the control signal send_sig is at a low level, and the line pulse signal 1-WIRE pulse is switched to a low level, and the pulse width is equal to the second threshold value shutdown DELAY, at this time, the start signal start_ok is switched to a low level, and the other blocks in the line dimming chip are turned off, i.e., the CURRENT signal LED CURRENT of the LED is also switched to a low level.

According to the first-line dimming system, the counter is controlled to be in the counting state or the counting state is stopped by the received control signal, counting errors caused by an interrupt mechanism of the processor can be avoided, and further the situation of brightness errors of the LED lamp is avoided, so that the anti-interference capability of the first-line dimming system is improved, and the first-line dimming system can be widely applied to multiple dimming schemes such as single dimming, cycle counting dimming and continuous dimming.

Meanwhile, in the one-line dimming circuit in the present embodiment, since the control signal is added, the one-line dimming circuit does not need to determine the pulse width of the high level of the one-line pulse signal, and the area of the one-line dimming circuit can be reduced. Meanwhile, when a line dimming circuit belongs to a line dimming chip, since the control input end is added in the scheme provided by the application, in order not to increase the pins of the line dimming chip, the control input end in the embodiment can multiplex other pins of the line dimming chip, so that the pin resources occupied by the line dimming circuit are reduced, and the normal use of the line dimming chip is not influenced. Similarly, a control output terminal is added to the above processor, and other pins can be multiplexed as well, which is not described herein.

Another embodiment of the present application provides a one-line dimming method, including:

Specifically, in the present embodiment, the switching of the high and low levels of the control signal corresponds to the start or stop of the one-line pulse signal. Specifically, the one-line dimming method is similar to the method applied in the one-line dimming system in the above embodiment, and will not be repeated here.

The apparatus embodiments described above are merely illustrative, wherein the modules illustrated as separate components may or may not be physically separate, and the components shown as modules may or may not be physical, i.e., may be located in one place, or may be distributed over a plurality of network modules. Some or all of the modules may be selected according to actual needs to achieve the purpose of the solution of this embodiment. Those of ordinary skill in the art will understand and implement the present invention without undue burden.

From the above description of the embodiments, it will be apparent to those skilled in the art that the embodiments may be implemented by means of software plus necessary general hardware platforms, or of course may be implemented by means of hardware. Based on such understanding, the foregoing technical solutions may be embodied essentially or in part in the form of a software product that may be stored in a computer-readable storage medium including any mechanism for storing or transmitting information in a form readable by a computer (e.g., a computer). For example, a machine-readable medium includes read-only memory (ROM), random-access memory (RAM), magnetic disk storage media, optical storage media, flash-memory media, electrical, optical, acoustical or other form of propagated signals (e.g., carrier waves, infrared signals, digital signals, etc.), and the computer software product includes instructions to cause a computer device (which may be a personal computer, server, or network device, etc.) to perform the various embodiments or portions of the methods described herein.

Finally, it should be noted that: the above embodiments are only for illustrating the technical solutions of the embodiments of the present application, and are not limited thereto; although the present application has been described in detail with reference to the foregoing embodiments, it should be understood by those of ordinary skill in the art that: the technical scheme described in the foregoing embodiments can be modified or some technical features thereof can be replaced by equivalents; such modifications and substitutions do not depart from the spirit and scope of the corresponding technical solutions.

It will be apparent to those skilled in the art that embodiments of the present application may be provided as a method, apparatus (device), or computer program product. Accordingly, the present embodiments may take the form of an entirely hardware embodiment, an entirely software embodiment or an embodiment combining software and hardware aspects. Furthermore, embodiments of the present application may take the form of a computer program product on one or more computer-usable storage media (including, but not limited to, disk storage, CD-ROM, optical storage, etc.) having computer-usable program code embodied therein.

Embodiments of the present application are described with reference to flowchart illustrations and/or block diagrams of methods, apparatus (devices) and computer program products according to embodiments of the application. It will be understood that each flow and/or block of the flowchart illustrations and/or block diagrams, and combinations of flows and/or blocks in the flowchart illustrations and/or block diagrams, can be implemented by computer program instructions. These computer program instructions may be provided to a processor of a general purpose computer, special purpose computer, embedded processor, or other programmable data processing apparatus to produce a machine, such that the instructions, which execute via the processor of the computer or other programmable data processing apparatus, create means for implementing the functions specified in the flowchart flow or flows and/or block diagram block or blocks.

These computer program instructions may also be stored in a computer-readable memory that can direct a computer or other programmable data processing apparatus to function in a particular manner, such that the instructions stored in the computer-readable memory produce an article of manufacture including instruction means which implement the function specified in the flowchart flow or flows and/or block diagram block or blocks.

These computer program instructions may also be loaded onto a computer or other programmable data processing apparatus to cause a series of operational steps to be performed on the computer or other programmable apparatus to produce a computer implemented process such that the instructions which execute on the computer or other programmable apparatus provide steps for implementing the functions specified in the flowchart flow or flows and/or block diagram block or blocks.

Claims

1. A one-wire dimming circuit, comprising: pulse input end, control input end, counter and driving module, in which,

the pulse input end is used for receiving a line pulse signal;

the counter counts according to the first-line pulse signal when in a counting state, and is used for outputting a counting result when in a counting stopping state;

the driving module is used for determining a driving signal according to the counting result so as to adjust light;

the level switching of the control signal corresponds to the start or stop of the one-line pulse signal;

the level of the control signal is switched from a first level to a second level, and corresponds to the start of the line pulse signal; alternatively, the switching of the level of the control signal from the second level to the first level corresponds to termination of the line pulse signal.

2. The one-wire dimming circuit of claim 1, wherein the counter is in a count state if the level of the control signal is a first level; or if the level of the control signal is the second level, the counter is in a stop counting state.

3. The one-wire dimming circuit of claim 2, wherein the counter restarts counting when the level of the control signal is switched from the second level to the first level.

4. A line dimming circuit as claimed in claim 1, wherein the counting in accordance with the line pulse signal comprises: the counter counts the number of rising edges of the line pulse signal.

5. A line dimming circuit as claimed in claim 1, wherein the driving signal determined by the driving module is a driving current, and the magnitude of the driving current is positively or negatively correlated with the counting result.

6. A line dimming chip comprising a line dimming circuit according to any of claims 1-5.

7. The one-wire dimming chip of claim 6, wherein the control signal received at the control input of the one-wire dimming circuit is multiplexed as the start signal of the one-wire dimming chip.

8. A one-wire dimming system, comprising: a processor, a line dimmer circuit as claimed in any one of claims 1 to 5,

9. The one-wire dimming system of claim 8, wherein the high-low level switching of the control signal corresponds to the start or stop of the one-wire pulse signal.

10. The one-wire dimming system of claim 8, wherein the processor is further configured to determine the control signal based on instruction information indicating a start or a stop of the one-wire pulse signal.