CN109855661A - A kind of incremental encoder signal processing method and system - Google Patents
A kind of incremental encoder signal processing method and system Download PDFInfo
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- CN109855661A CN109855661A CN201811414448.2A CN201811414448A CN109855661A CN 109855661 A CN109855661 A CN 109855661A CN 201811414448 A CN201811414448 A CN 201811414448A CN 109855661 A CN109855661 A CN 109855661A
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Abstract
The invention discloses a kind of incremental encoder signal processing method and system, it the described method comprises the following steps: the code-disc signal of signal processing module reception incremental encoder, and processing and Subdividing Processing are amplified to the code-disc signal, obtain the first data information;Digital signal processor receives the first data information, and carries out calculation process to first data information, obtains the second data information, and export the second data information by serial port chip;Programmable gate array receives the second data information, and second data information transfer to display module is shown.The present invention is amplified and is segmented by independent code device signal processing module, to encoder code disc original signal, then directly exports subdivision's signal by signal processing module, circuit is simple, fast response time, high reliablity, the contradiction being able to solve between photoelectric encoder miniaturization and high resolution.
Description
Technical field
The present invention relates to photoelectric coding field of signal processing, in particular to a kind of incremental encoder signal processing method and
System.
Background technique
Photoelectric precision tracking technique is a core technology in national defence, wherein tracking servo system is crucial
One link.
The basic principle of photoelectricity incremental encoder work is to Moire fringe interpolation.The divided method of Moire fringe is light
Learn subdivision, mechanical subdivision and electronics subdivision.Wherein, electronics divided method has precision height, is easily achieved measurement and data
The advantages that automation for the treatment of process, thus be widely used.Common electronics divided method includes hardware subdivision
With two kinds of digital subdividing.Digital subdividing is that photosignal is become digital signal by A/D converter, then again by digital signal
It is input in CPU, is calculated by programming, tables look-up with interpolation and complete, although this method has high-resolution
Feature, but subdivision accuracy is influenced by A/D sampling and the fluctuation of speed of encoder shaft.Hardware subdivision precision is not then by encoder
The shaft fluctuation of speed influence, have many advantages, such as conversion rate it is fast, it is simple and reliable for structure, be easily achieved.
However, to realize quickly accurate target positioning, accurately and reliably angle measuring system is needed, this is for photoelectric coding
Device is put forward higher requirements.In certain servo-systems, due to being limited by factors such as encoder volume, grating ruling radiuses, pass
The hardware subdivision circuit level of system is low, and the resolving power of incremental encoder is caused to be unable to satisfy system requirements.
Summary of the invention
The present invention is intended to provide a kind of technical solution of incremental encoder signal processing, overcomes hardware in the prior art
Divided method integrated level is low, encoder resolution is unable to satisfy requirement
To achieve the above object, the invention adopts the following technical scheme:
On the one hand, a kind of incremental encoder signal processing system is inventor provided, the system comprises signal processings
Module, digital signal processor, programmable gate array, serial port chip and display module;The signal processing module and number are believed
The connection of number processor, the digital signal processor are connect with programmable gate array, the programmable gate array and display module
Connection, the digital signal processor are connect with serial port chip;
The signal processing module is used to receive the code-disc signal of incremental encoder, and puts to the code-disc signal
Big processing and Subdividing Processing, obtain the first data information;
The digital signal processor carries out at operation for receiving the first data information, and to first data information
Reason obtains the second data information, and exports the second data information by serial port chip;
The programmable gate array is for receiving the second data information, and by second data information transfer to showing mould
Block is shown.
Further, the code-disc signal includes the original signal of incremental encoder, and the original signal is 90 ° of difference
Sinusoidal signal, cosine signal and zero signal.
Further, the signal processing module includes analog-digital converter, signal correction controller, subdivision chip and 3
A adjustable amplifier;
3 adjustable amplifiers are respectively used to amplify processing to the sinusoidal signal, cosine signal, zero signal;
The analog-digital converter is used to amplified signal being converted to digital signal;
The signal correction controller passes through subdivision chip to revised for being modified to the digital signal
Digital signal is finely divided operation.
On the other hand, inventor additionally provides a kind of incremental encoder signal processing method, and the method is applied to increase
Amount formula code device signal processing system, the system comprises signal processing module, digital signal processor, programmable gate array,
Serial port chip and display module;The signal processing module is connect with digital signal processor, the digital signal processor with
Programmable gate array connection, the programmable gate array are connect with display module, the digital signal processor and serial port chip
Connection;It the described method comprises the following steps:
Signal processing module receive incremental encoder code-disc signal, and to the code-disc signal amplify processing and
Subdividing Processing obtains the first data information;
Digital signal processor receives the first data information, and carries out calculation process to first data information, obtains
Second data information, and the second data information is exported by serial port chip;
Programmable gate array receives the second data information, and second data information transfer to display module is shown
Show.
Further, the code-disc signal includes the original signal of incremental encoder, and the original signal is 90 ° of difference
Sinusoidal signal, cosine signal and zero signal.
Further, the signal processing module includes analog-digital converter, signal correction controller, subdivision chip and 3
A adjustable amplifier;The described method includes:
3 adjustable amplifiers amplify processing to the sinusoidal signal, cosine signal, zero signal respectively;
Amplified signal is converted to digital signal by analog-digital converter;
Signal correction controller is modified the digital signal, and by subdivision chip to revised digital signal
It is finely divided operation.
It is different from the prior art, incremental encoder signal processing method and system, described described in above-mentioned technical proposal
Method is the following steps are included: signal processing module receives the code-disc signal of incremental encoder, and carries out to the code-disc signal
Enhanced processing and Subdividing Processing obtain the first data information;Digital signal processor receives the first data information, and to described the
One data information carries out calculation process, obtains the second data information, and export the second data information by serial port chip;It can compile
Journey gate array receives the second data information, and second data information transfer to display module is shown.The present invention is logical
Independent code device signal processing module is crossed, encoder code disc original signal is amplified and segmented, then by signal processing
Module directly exports subdivision's signal, and circuit is simple, fast response time, high reliablity, be able to solve photoelectric encoder miniaturization and
Contradiction between high resolution.
Detailed description of the invention
Fig. 1 is the schematic diagram for the incremental encoder signal processing system that one embodiment of the invention is related to;
Fig. 2 is the schematic diagram for the original signal that one embodiment of the invention is related to;
Fig. 3 is the schematic diagram for the original signal that another embodiment of the present invention is related to;
Fig. 4 is the schematic diagram for the output signal that one embodiment of the invention is related to;
Fig. 5 is the structural schematic diagram for the signal processing module that one embodiment of the invention is related to;
Fig. 6 is the flow chart for the incremental encoder signal processing method that one embodiment of the invention is related to;
Description of symbols:
1, incremental encoder;
2, incremental encoder signal processing system;
21, signal processing module;22, digital signal processor;23, programmable gate array;24, serial port chip;25, it shows
Module.
Specific embodiment
In order to make the objectives, technical solutions, and advantages of the present invention clearer, below in conjunction with attached drawing and specific implementation
Example, the present invention will be described in further detail.It should be appreciated that specific embodiment described herein is only to explain this hair
It is bright, but not to limit the present invention.
As shown in Figure 1, the system 2 includes letter for the present invention provides a kind of incremental encoder signal processing system
Number processing module 21, digital signal processor 22, programmable gate array 23, serial port chip 24 and display module 25;The signal
Processing module 21 is connect with digital signal processor 22, and the digital signal processor 22 is connect with programmable gate array 23, institute
It states programmable gate array 23 to connect with display module 25, the digital signal processor 22 is connect with serial port chip 24;
The signal processing module 21 is used to receive the code-disc signal of incremental encoder, and carries out to the code-disc signal
Enhanced processing and Subdividing Processing obtain the first data information.In the present embodiment, the code-disc signal includes increment type coding
The original signal of device, the original signal are sinusoidal signal, cosine signal and the zero signal for differing 90 °.Original signal is shown
It is intended to as shown in Figure 2,3 respectively.
The digital signal processor 22 carries out operation for receiving the first data information, and to first data information
Processing obtains the second data information, and exports the second data information by serial port chip.In the present embodiment, the number
Word signal processor uses the TMS320F28335 with powerful floating-point operation function for center processor, can save code
Time and memory space are executed, has many advantages, such as precision height, small power consumption, while there is special enhancing quadrature coding pulse module
Interface ensure that the rapidity and correctness of signal-obtaining.
The programmable gate array 23 is extremely shown for receiving the second data information, and by second data information transfer
Module is shown.Second data information, that is, output signal, output signal are as shown in Figure 4.Programmable gate array (FPGA)
It is a kind of driven by program logical device, just as a microprocessor, controls program and be stored in memory, after power-up, program is certainly
It is dynamic to be loaded into chip execution.Programmable gate array is generally made of 2 programmable modules and storage SRAM.CLB is programmable patrols
Block is collected, is the core component of field programmable gate array, is the basic unit for realizing logic function, mainly by logical function
The Digital Logical Circuits such as generator, trigger, data selector are constituted.In the present embodiment, the display module is LED light
Group, the LED light group include the LED light of multiple array arrangements, and LED light board shows corresponding code value with hexadecimal.
As shown in figure 5, the signal processing module includes analog-digital converter, signal correction controller, subdivision chip and 3
A adjustable amplifier.3 adjustable amplifiers are respectively used to amplify place to the sinusoidal signal, cosine signal, zero signal
Reason;The analog-digital converter is used to amplified signal being converted to digital signal;The signal correction controller is used for institute
It states digital signal to be modified, and be finely divided operation to revised digital signal by segmenting chip.Specifically, amplifier
A is used to amplify sinusoidal signal processing, and amplifier B is used to amplify cosine signal processing, and amplifier C is used for zero
Position signal amplifies processing.
In the present embodiment, it includes: so that each digital signal that signal correction controller, which is modified digital signal,
Amplitude difference less than 10%.100~2048 subdivisions can be carried out to signal by segmenting the proprietary port of chip, export for two-way it is orthogonal
Pulse A and B, be connected with the enhancing quadrature coding pulse module interface of DSP, encoder zero signal Z then with the I/O of DSP mouth
It is connected.
Referring to Fig. 6, inventor additionally provides a kind of incremental encoder signal processing method, the method is applied to increase
Amount formula code device signal processing system, the system comprises signal processing module, digital signal processor, programmable gate array,
Serial port chip and display module;The signal processing module is connect with digital signal processor, the digital signal processor with
Programmable gate array connection, the programmable gate array are connect with display module, the digital signal processor and serial port chip
Connection;It the described method comprises the following steps:
The code-disc signal that step S601 signal processing module receives incremental encoder is initially entered, and the code-disc is believed
Number processing and Subdividing Processing are amplified, obtains the first data information;
Then enter step S602 digital signal processor receive the first data information, and to first data information into
Row calculation process obtains the second data information, and exports the second data information by serial port chip;
It then enters step S603 programmable gate array and receives the second data information, and by second data information transfer
It is shown to display module.
In certain embodiments, the signal processing module includes analog-digital converter, signal correction controller, subdivision chip
And 3 adjustable amplifiers;The described method includes: 3 adjustable amplifiers are respectively to the sinusoidal signal, cosine signal, zero-bit
Signal amplifies processing;Amplified signal is converted to digital signal by analog-digital converter;Signal correction controller is to described
Digital signal is modified, and is finely divided operation to revised digital signal by segmenting chip.
In actual application, it after system electrification, is detected and is increased by the I/O mouth of DSP (i.e. digital signal processor)
Amount formula encoder zero pulse signal Z, when detecting zero pulse signal Z, then the position is encoder zero-bit, and in program
In set.Encoder shaft rotation direction is judged according to the phase relation of A and B simultaneously, acquires signal processing mould
The data of block, obtain the angle value between the position and zero-bit by data processing, are sent to host computer by serial port chip, together
When be sent to FPGA (i.e. programmable gate array) by data line, and by LED light arrange display encoder angle-data.
The present invention uses independent signal processing module, and hardware design is simple, the direct output coder subdivision's signal of module,
No longer need to carry out digital subdividing, the code device signal after encoder subdivision is stable, resolving power is high, the revolving speed measured is accurate, not by
The influence of velocity interval improves the stability and reliability of system, can solve the contradiction of miniaturization encoder and high resolution,
The requirement of servo-control system can be met.
Described a specific embodiment of the invention, is not intended to limit the scope of the present invention..It is any according to this hair
Any other various changes and modifications made by bright technical concept should be included in the protection model of the claims in the present invention
In enclosing.
Claims (6)
1. a kind of incremental encoder signal processing system, which is characterized in that the system comprises signal processing modules, number letter
Number processor, programmable gate array, serial port chip and display module;The signal processing module and digital signal processor connect
It connects, the digital signal processor is connect with programmable gate array, and the programmable gate array is connect with display module, the number
Word signal processor is connect with serial port chip;
The signal processing module is used to receive the code-disc signal of incremental encoder, and amplifies place to the code-disc signal
Reason and Subdividing Processing, obtain the first data information;
The digital signal processor carries out calculation process for receiving the first data information, and to first data information,
The second data information is obtained, and the second data information is exported by serial port chip;
The programmable gate array for receive the second data information, and by second data information transfer to display module into
Row display.
2. incremental encoder signal processing system as described in claim 1, which is characterized in that the code-disc signal includes increasing
The original signal of amount formula encoder, the original signal are sinusoidal signal, cosine signal and the zero signal for differing 90 °.
3. incremental encoder signal processing system as claimed in claim 2, which is characterized in that the signal processing module packet
Include analog-digital converter, signal correction controller, subdivision chip and 3 adjustable amplifiers;
3 adjustable amplifiers are respectively used to amplify processing to the sinusoidal signal, cosine signal, zero signal;
The analog-digital converter is used to amplified signal being converted to digital signal;
The signal correction controller passes through subdivision chip to revised number for being modified to the digital signal
Signal is finely divided operation.
4. a kind of incremental encoder signal processing method, which is characterized in that the method is applied to incremental encoder signal
Processing system, the system comprises signal processing module, digital signal processor, programmable gate array, serial port chip and displays
Module;The signal processing module is connect with digital signal processor, and the digital signal processor and programmable gate array connect
It connects, the programmable gate array is connect with display module, and the digital signal processor is connect with serial port chip;The method packet
Include following steps:
Signal processing module receives the code-disc signal of incremental encoder, and amplifies processing and subdivision to the code-disc signal
Processing, obtains the first data information;
Digital signal processor receives the first data information, and carries out calculation process to first data information, obtains second
Data information, and the second data information is exported by serial port chip;
Programmable gate array receives the second data information, and second data information transfer to display module is shown.
5. incremental encoder signal processing method as claimed in claim 4, which is characterized in that the code-disc signal includes increasing
The original signal of amount formula encoder, the original signal are sinusoidal signal, cosine signal and the zero signal for differing 90 °.
6. incremental encoder signal processing method as claimed in claim 5, which is characterized in that the signal processing module packet
Include analog-digital converter, signal correction controller, subdivision chip and 3 adjustable amplifiers;The described method includes:
3 adjustable amplifiers amplify processing to the sinusoidal signal, cosine signal, zero signal respectively;
Amplified signal is converted to digital signal by analog-digital converter;
Signal correction controller is modified the digital signal, and is carried out by subdivision chip to revised digital signal
Segment operation.
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Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN113587963A (en) * | 2021-07-06 | 2021-11-02 | 吉林建筑大学 | Method for subdividing Moire fringe signal |
CN113686363A (en) * | 2021-08-25 | 2021-11-23 | 武汉珞珈伊云光电技术有限公司 | Measuring method, system, electronic device and storage medium based on encoder |
Citations (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6898744B1 (en) * | 2001-11-01 | 2005-05-24 | Louis J. Jannotta | Apparatus and methods for monitoring encoder signals |
CN1641316A (en) * | 2004-01-10 | 2005-07-20 | 中国科学院长春光学精密机械与物理研究所 | Full digital addition processing circuit for incremental photoelectric shaft-position encoder |
CN202041221U (en) * | 2011-03-02 | 2011-11-16 | 西安交通大学 | Subdividing device of sine/cosine encoder |
CN202171461U (en) * | 2011-08-24 | 2012-03-21 | 上海三一精机有限公司 | High-power high-speed subdivision unit of encoder |
CN203116757U (en) * | 2013-03-16 | 2013-08-07 | 长春机械科学研究院有限公司 | Optical-electricity encoder and grating orthogonal waveform subdividing functional circuit |
CN204027519U (en) * | 2014-03-14 | 2014-12-17 | 上海宇航系统工程研究所 | Photoelectric encoder position measurement instrument |
CN104567955A (en) * | 2014-12-29 | 2015-04-29 | 昆明理工大学 | Grating subdivision device and method based on FPGA |
-
2018
- 2018-11-26 CN CN201811414448.2A patent/CN109855661A/en active Pending
Patent Citations (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6898744B1 (en) * | 2001-11-01 | 2005-05-24 | Louis J. Jannotta | Apparatus and methods for monitoring encoder signals |
CN1641316A (en) * | 2004-01-10 | 2005-07-20 | 中国科学院长春光学精密机械与物理研究所 | Full digital addition processing circuit for incremental photoelectric shaft-position encoder |
CN202041221U (en) * | 2011-03-02 | 2011-11-16 | 西安交通大学 | Subdividing device of sine/cosine encoder |
CN202171461U (en) * | 2011-08-24 | 2012-03-21 | 上海三一精机有限公司 | High-power high-speed subdivision unit of encoder |
CN203116757U (en) * | 2013-03-16 | 2013-08-07 | 长春机械科学研究院有限公司 | Optical-electricity encoder and grating orthogonal waveform subdividing functional circuit |
CN204027519U (en) * | 2014-03-14 | 2014-12-17 | 上海宇航系统工程研究所 | Photoelectric encoder position measurement instrument |
CN104567955A (en) * | 2014-12-29 | 2015-04-29 | 昆明理工大学 | Grating subdivision device and method based on FPGA |
Non-Patent Citations (3)
Title |
---|
常海涛,叶孝佑,孙双花,高宏堂,张晓: "基于FPGA的正交信号细分系统研究", 《计量学报》 * |
杨宁,万秋华,张泽宇,刘长岭: "基于TMS320F2812的高精度编码器电路设计", 《长春理工大学学报(自然科学版)》 * |
杨宁,刘长岭,王恒坤: "基于GC-IP2000获取高分辨力增量式编码器的研究", 《长春理工大学学报(自然科学版)》 * |
Cited By (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN113587963A (en) * | 2021-07-06 | 2021-11-02 | 吉林建筑大学 | Method for subdividing Moire fringe signal |
CN113587963B (en) * | 2021-07-06 | 2024-04-19 | 吉林建筑大学 | Subdivision method of Moire fringe signal |
CN113686363A (en) * | 2021-08-25 | 2021-11-23 | 武汉珞珈伊云光电技术有限公司 | Measuring method, system, electronic device and storage medium based on encoder |
CN113686363B (en) * | 2021-08-25 | 2023-11-07 | 武汉珞珈伊云光电技术有限公司 | Encoder-based measurement method, system, electronic device and storage medium |
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