CN109850840A - MEMS device and its manufacturing method - Google Patents
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- CN109850840A CN109850840A CN201811646106.3A CN201811646106A CN109850840A CN 109850840 A CN109850840 A CN 109850840A CN 201811646106 A CN201811646106 A CN 201811646106A CN 109850840 A CN109850840 A CN 109850840A
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- 238000004519 manufacturing process Methods 0.000 title claims abstract description 24
- 239000004065 semiconductor Substances 0.000 claims abstract description 59
- 239000000758 substrate Substances 0.000 claims abstract description 59
- 230000001939 inductive effect Effects 0.000 claims abstract description 24
- 238000000034 method Methods 0.000 claims description 39
- 238000005530 etching Methods 0.000 claims description 36
- 238000000926 separation method Methods 0.000 claims description 26
- KRHYYFGTRYWZRS-UHFFFAOYSA-N Fluorane Chemical compound F KRHYYFGTRYWZRS-UHFFFAOYSA-N 0.000 claims description 14
- OKKJLVBELUTLKV-UHFFFAOYSA-N Methanol Chemical compound OC OKKJLVBELUTLKV-UHFFFAOYSA-N 0.000 claims description 9
- LFQSCWFLJHTTHZ-UHFFFAOYSA-N Ethanol Chemical compound CCO LFQSCWFLJHTTHZ-UHFFFAOYSA-N 0.000 claims description 8
- 238000006056 electrooxidation reaction Methods 0.000 claims description 8
- BDERNNFJNOPAEC-UHFFFAOYSA-N propan-1-ol Chemical compound CCCO BDERNNFJNOPAEC-UHFFFAOYSA-N 0.000 claims description 8
- KFZMGEQAYNKOFK-UHFFFAOYSA-N Isopropanol Chemical compound CC(C)O KFZMGEQAYNKOFK-UHFFFAOYSA-N 0.000 claims description 4
- 239000011259 mixed solution Substances 0.000 claims description 4
- 239000000203 mixture Substances 0.000 claims description 4
- 239000004020 conductor Substances 0.000 claims description 3
- 235000019441 ethanol Nutrition 0.000 claims description 3
- 239000000243 solution Substances 0.000 claims description 3
- 230000001133 acceleration Effects 0.000 abstract description 6
- 230000000694 effects Effects 0.000 abstract description 4
- 230000015572 biosynthetic process Effects 0.000 abstract 1
- 150000002500 ions Chemical class 0.000 description 17
- 239000002019 doping agent Substances 0.000 description 12
- 238000005516 engineering process Methods 0.000 description 8
- 238000000206 photolithography Methods 0.000 description 7
- 239000002904 solvent Substances 0.000 description 6
- 238000005229 chemical vapour deposition Methods 0.000 description 5
- 238000000137 annealing Methods 0.000 description 4
- 239000007788 liquid Substances 0.000 description 4
- 238000012545 processing Methods 0.000 description 4
- WGTYBPLFGIVFAS-UHFFFAOYSA-M tetramethylammonium hydroxide Chemical compound [OH-].C[N+](C)(C)C WGTYBPLFGIVFAS-UHFFFAOYSA-M 0.000 description 4
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 2
- 238000004380 ashing Methods 0.000 description 2
- 230000000295 complement effect Effects 0.000 description 2
- 238000005260 corrosion Methods 0.000 description 2
- 230000007797 corrosion Effects 0.000 description 2
- 238000004090 dissolution Methods 0.000 description 2
- 238000009413 insulation Methods 0.000 description 2
- 238000005468 ion implantation Methods 0.000 description 2
- 229910044991 metal oxide Inorganic materials 0.000 description 2
- 150000004706 metal oxides Chemical class 0.000 description 2
- 238000012986 modification Methods 0.000 description 2
- 230000004048 modification Effects 0.000 description 2
- QPJSUIGXIBEQAC-UHFFFAOYSA-N n-(2,4-dichloro-5-propan-2-yloxyphenyl)acetamide Chemical compound CC(C)OC1=CC(NC(C)=O)=C(Cl)C=C1Cl QPJSUIGXIBEQAC-UHFFFAOYSA-N 0.000 description 2
- 230000035945 sensitivity Effects 0.000 description 2
- 229910052814 silicon oxide Inorganic materials 0.000 description 2
- 238000000992 sputter etching Methods 0.000 description 2
- 229910052581 Si3N4 Inorganic materials 0.000 description 1
- 229910003818 SiH2Cl2 Inorganic materials 0.000 description 1
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 1
- 239000012670 alkaline solution Substances 0.000 description 1
- 238000003486 chemical etching Methods 0.000 description 1
- 238000010276 construction Methods 0.000 description 1
- 239000013078 crystal Substances 0.000 description 1
- 125000004122 cyclic group Chemical group 0.000 description 1
- 238000011161 development Methods 0.000 description 1
- 238000000407 epitaxy Methods 0.000 description 1
- 230000003628 erosive effect Effects 0.000 description 1
- 230000010354 integration Effects 0.000 description 1
- 239000000463 material Substances 0.000 description 1
- 238000005259 measurement Methods 0.000 description 1
- 229910021421 monocrystalline silicon Inorganic materials 0.000 description 1
- 238000001259 photo etching Methods 0.000 description 1
- 229910052710 silicon Inorganic materials 0.000 description 1
- 239000010703 silicon Substances 0.000 description 1
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 description 1
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Abstract
This application discloses a kind of MEMS device and its manufacturing methods.The manufacturing method includes: to form cavity in the semiconductor substrate；Structure sheaf is formed on cavity；At least one inductive reactance is formed in structure sheaf；And the second opening for reaching cavity is formed via structure sheaf, wherein structure sheaf forms mass block with the second adjacent part of opening, and the part formation cantilever that structure sheaf is connected with semiconductor substrate and mass block respectively, inductive reactance is located in cantilever.The application forms mass block and cantilever by the structure sheaf above the cavity in semiconductor substrate, so as to form movable structure, and by forming inductive reactance in cantilever, to incude the variation that cantilever is generated by the activity of mass block, can be used for manufacturing acceleration transducer.
Description
Technical field
This disclosure relates to technical field of semiconductors, more particularly, to a kind of MEMS device and its manufacturing method.
Background technique
With the development of MEMS (Micro-Electro-Mechanical System, MEMS) technology, utilize
Acceleration transducer, gyroscope, the higher device of angular-rate sensor equally accurate of MEMS technology manufacture are widely applied
It has arrived in the field of automotive field and consumer electronics.Wherein, such as the inertial sensors such as accelerometer and angular speed meter all have
Movable mass.
Accelerometer with movable mass generally utilizes piezoresistive effect to measure acceleration.This sensor is in silicon substrate
There is movable mass, movable mass, fixed frame are connected by cantilever beam, in the suitable of cantilever beam in stationary frame structure chamber
When position can manufacture pressure drag.When mass block obtain acceleration when, as elastic construction cantilever beam mass block inertia
The lower deformation of effect, changes pressure drag resistance value, and accelerometer passes through the variation of bridge measurement resistance, to realize the survey to acceleration
Amount.
Since the sensitivity of piezoresistive accelerometer or angular speed meter is lower, Full-span output is smaller, it is therefore desirable to larger
Mass block.In the prior art, in order to realize biggish mass block, generally using body processing deep etching and bonding technology.
However this manufacturing method is difficult to and complementary metal oxide semiconductor (Complementary Metal Oxide
Semiconductor, CMOS) circuit integration.Simultaneously as the introducing of semiconductor body processing deep etching and bonding technology, greatly
Big reduces production efficiency, increases manufacturing cost.
Summary of the invention
In view of this, the object of the present invention is to provide a kind of MEMS device and its manufacturing methods, wherein served as a contrast using semiconductor
The structure sheaf above cavity in bottom forms mass block and cantilever, so as to form movable structure.
One side according to an embodiment of the present invention provides a kind of manufacturing method of MEMS device, comprising: serves as a contrast in semiconductor
Cavity is formed in bottom；Structure sheaf is formed on the cavity；At least one inductive reactance is formed in the structure sheaf；And warp
The second opening for reaching the cavity is formed by the structure sheaf, wherein the structure sheaf portion adjacent with second opening
To divide and forms mass block, the part that the structure sheaf is connected with the semiconductor substrate and the mass block respectively forms cantilever,
The inductive reactance is located in the cantilever.
Preferably, the step of forming the cavity includes: to form well region in the semiconductor substrate, and the well region surrounds first
Region；The first doped region is formed in the first area；It is formed in the first area around first doped region
Second doped region；And institute is removed relative to the well region, first doped region and second doped region using etching
The a part for stating semiconductor substrate forms the cavity in the first area.
Preferably, first doped region and second doped region are located at the top of the cavity, first doping
Area and second doped region include multiple first openings for reaching the cavity.
Preferably, first doped region and second doped region are mesh shape, the multiple first opening conduct
The mesh of the grid.
Preferably, the step for removing a part of the semiconductor substrate includes: using electrochemical corrosion by described first
Regions transform is at porous layer, wherein the well region, first doped region and second doped region are separately connected electrode；
And it is gone using etching relative to the semiconductor substrate, the well region, first doped region and second doped region
Except the porous layer.
Preferably, the etchant solution used in electrochemical corrosion include hydrofluoric acid with selected from methanol, ethyl alcohol, propyl alcohol and different
The mixed solution of at least one of propyl alcohol composition.
Preferably, the step of forming the structure sheaf include first doped region with it is rectangular on second doped region
At epitaxial layer, wherein first doped region and the second doped region horizontal extension close first opening.
Preferably, before the step of forming the described second opening, further includes: form separation layer on said epitaxial layer there；
And wiring layer is formed on the separation layer, the wiring layer passes through the separation layer and connect with the inductive reactance.
Preferably, in the step of forming the first doped region and the second doped region, by controlling first doped region
Junction depth controls the thickness of the cantilever to control the thickness of the mass block, and the junction depth by controlling second doped region
Degree.
Preferably, the junction depth of first doped region is less than the depth of the cavity, and the junction depth of second doped region is small
In the junction depth of first doped region, the junction depth of the well region is greater than or equal to the depth of the cavity.
Preferably, the step of forming the described second opening includes: using etching relative to the first doped region removal portion
Divide second doped region, the part epitaxial layer and the part separation layer.
Preferably, the well region, first doped region, second doped region and the epitaxial layer are identical mix
Miscellany type.
According to another aspect of an embodiment of the present invention, a kind of MEMS device is provided, comprising: semiconductor substrate；Cavity, position
In the semiconductor substrate；Structure sheaf, above the cavity；At least one inductive reactance is located in the structure sheaf；With
And second opening, the cavity is reached via the structure sheaf, wherein the structure sheaf and the adjacent part of second opening
Mass block is formed, the part that the structure sheaf is connected with the semiconductor substrate and the mass block respectively forms cantilever, institute
Inductive reactance is stated to be located in the cantilever.
Preferably, further include well region, be located in the semiconductor substrate and surround the cavity.
Preferably, the structure sheaf includes: the first doped layer；Second doped layer, at least partially surrounding first doping
Layer；And epitaxial layer, on first doped layer and second doped layer, wherein first doped region and described second
Doped region includes multiple first openings, and epitaxial layer closing the multiple first is open.
Preferably, first doped region and second doped region are mesh shape, the multiple first opening conduct
The mesh of the grid.
Preferably, the thickness of the mass block corresponds to the junction depth of first doped region and the thickness of the cantilever
Junction depth corresponding to second doped region.
Preferably, the junction depth of first doped region is less than the depth of the cavity, and the junction depth of second doped region is small
In the junction depth of first doped region, the junction depth of the well region is greater than or equal to the depth of the cavity.
Preferably, the well region, first doped region, second doped region and the epitaxial layer are identical mix
Miscellany type.
Preferably, further includes: separation layer is located on the epitaxial layer；And wiring layer, it is located on the separation layer, institute
Wiring layer is stated to connect across the separation layer with the inductive reactance.
MEMS device and its manufacturing method according to an embodiment of the present invention, pass through the knot above the cavity in semiconductor substrate
Structure layer forms mass block and cantilever, outstanding to incude so as to form movable structure, and by forming inductive reactance in cantilever
The variation that arm is generated by the activity of mass block, can be used for manufacturing acceleration transducer, and compared with prior art, the present invention is implemented
Example forms cavity in the semiconductor substrate, and forms mass block using the structure sheaf above the cavity in semiconductor substrate and hang
Arm, instead of the mass block that the prior art is formed using deep etching processing technology and bonding technology, to increase mass block
Quality, improve device sensitivity, reduce manufacturing cost.
MEMS device and its manufacturing method according to an embodiment of the present invention, by the first doped region and the second doped region and
Epitaxial layer forms structure sheaf, so as to form the movable structure with mass block and cantilever, compared with prior art, according to this hair
The doping process and epitaxy technique that bright embodiment uses can be compatible with CMOS technology.
In a preferred embodiment, by the junction depth of control doped region, it can control the thickness of mass block and cantilever, thus
The yield and reliability of MEMS device can be improved.
Therefore, the manufacturing process of MEMS device and the manufacturing process of cmos circuit are compatible in the method for the present invention, manufacturing method
Simply, manufacturing cost is low.
Detailed description of the invention
By referring to the drawings to the description of the embodiment of the present invention, above-mentioned and other purposes of the invention, feature and
Advantage will be apparent from, in the accompanying drawings:
Fig. 1 shows the schematic cross-section of MEMS device according to an embodiment of the present invention.
The section that Fig. 2 a to 2j shows a part of stage in the manufacturing method of MEMS device according to an embodiment of the present invention shows
It is intended to.
Specific embodiment
Hereinafter reference will be made to the drawings, and the present invention will be described in more detail.In various figures, identical element is using similar attached
Icon is remembered to indicate.For the sake of clarity, the various pieces in attached drawing are not necessarily to scale.Furthermore, it is possible to be not shown certain
Well known part.
Many specific details of the invention, such as structure, material, size, the processing work of device is described hereinafter
Skill and technology, to be more clearly understood that the present invention.But it just as the skilled person will understand, can not press
The present invention is realized according to these specific details.
The present invention can be presented in a variety of manners, some of them example explained below.
Fig. 1 shows the schematic cross-section of MEMS device according to an embodiment of the present invention.
As shown in Figure 1, MEMS device 100 includes: semiconductor substrate 101, well region 102, cavity 104, structure sheaf 110, sense
Resistance 141, wiring layer 142, separation layer 150 and the second opening 160 are answered, structure sheaf 110 includes: the first doped region 103a, the
Two doped region 103b and epitaxial layer 111.Wherein, semiconductor substrate 101 is the first doping type, and well region 102, first adulterates
Area 103a, the second doped region 103b and epitaxial layer 111 are the second doping type, and the first doping type is selected from p-type doping or N-type
One of doping, another kind of second doping type in p-type doping or n-type doping, in the present embodiment, the second doping
Type is n-type doping.
In the present embodiment, cavity 104 is located in semiconductor substrate 101.Well region 102 is located in semiconductor substrate 101, and
Surrounding cavity 104.Structure sheaf 110 is located at 104 top of cavity, is connected with substrate 101.Wherein, the junction depth of well region 102 is greater than or waits
In the depth of cavity 104.
In structure sheaf 110, at least partly the second doped layer 103b surrounds the first doped layer 103a, and epitaxial layer 111 is located at
On first doped layer 103a and the second doped layer 103b, wherein the first doped region 103a and the second doped region 103b includes multiple
First opening, and epitaxial layer 111 closes multiple first openings, wherein and the first doped region 103a is with the second doped region 103b
Mesh shape, mesh of multiple first openings as grid.Wherein, the junction depth of the first doped region 103a is less than the depth of cavity 104
Degree, junction depth of the junction depth less than the first doped region 103a of the second doped region 103b.
Second opening 160 passes through separation layer 150 and structure sheaf 110 reaches cavity 104.Structure sheaf 110 and the second opening 160
Adjacent part forms mass block 10, and the part that structure sheaf 110 is connected with semiconductor substrate 101 and mass block 10 respectively is formed
Cantilever 20, inductive reactance 141 are located in the epitaxial layer 111 of cantilever 20.Wherein, the thickness of mass block 10 corresponds to the first doped region
The junction depth of 103a and the thickness of cantilever 20 correspond to the junction depth of the second doped region 103b.
Separation layer 150 is located on epitaxial layer 111.Patterned wiring layer 142 is located on separation layer 150, and pass through every
Absciss layer 150 is connect with inductive reactance 141.
The section that Fig. 2 a to 2j shows a part of stage in the manufacturing method of MEMS device according to an embodiment of the present invention shows
It is intended to.
As shown in Figure 2 a, in semiconductor substrate 101, well region 102 is formed using ion implanting.
The step uses photolithography method patterned resist layer to form Etching mask for example including resist layer is formed
PR1, and ion implanting is carried out via Etching mask PR1.Etching mask PR1 has opening 131, in the ion implanting phase
Between, dopant reaches via opening 131 and forms well region 102 in semiconductor substrate 101.In alternate embodiments, it can be formed
Patterned oxide layer is as hard mask, to replace Etching mask PR1.The oxide layer is, for example, 100 to 1000 nanometers of thickness
Silicon oxide layer.Preferably, high annealing is carried out after ion implantation to activate dopant.After forming well region 102, adopt
The method for being dissolved or being ashed with solvent removes Etching mask PR1.
Semiconductor substrate 101 is, for example, the monocrystalline substrate of<100>crystal orientation, and resistivity is, for example, 5 to 10 ohmcms, and half
The doping type of conductor substrate 101 is p-type doping, and dopant is, for example, B ion.Well region 102 is for example doping to N-type, dopant
For example, P ion.In final device, well region 102 will be used to limit the periphery of cavity, i.e. first area where cavity
Periphery.Well region 102 extends downward into predetermined depth from the surface of semiconductor substrate 101, so that the junction depth of well region 102 is greater than or waits
In the depth of cavity, for example, 5 to 15 microns.The well region 102 for example extends in semiconductor substrate 101, is formed cyclic annular.In shape
In the step of cavity, the part that semiconductor substrate 101 is located at annular internal will act as sacrificial layer.
Further, the first insulating layer 121 and second insulating layer 122 are sequentially formed in semiconductor substrate 101 and are opened
Mouth 132, as shown in Figure 2 b.
In this step, be used to form the first insulating layer 121 and 122 technique of second insulating layer for example including thermal oxide, splash
It penetrates or chemical vapor deposition, is used to form the technique of opening 132 for example including photoetching and etching.Forming second insulating layer 122
Later, the mask with opening is formed using photolithography method.During etching, etchant is via opening successively the second insulation of removal
The expose portion of the 122, first insulating layer 121 of layer.Due to the selectivity of etchant, which can stop at semiconductor substrate
101 surface, to form opening 132.
In this embodiment, the first insulating layer 121 is, for example, silicon oxide layer, and second insulating layer 122 is, for example, silicon nitride layer.
The thickness of first insulating layer 121 is, for example, less thanPreferablyThe thickness of second insulating layer is, for example,ExtremelyNanometer.Opening 132 runs through the first insulating layer 121 and second insulating layer 122, also, the periphery of opening 132 and well region
102 are overlapped, thus the common surrounding cavity region of the two.
Further, in semiconductor substrate 101, the first doped region 103a is formed using ion implanting, as shown in Figure 2 c.
The step uses photolithography method patterned resist layer to form Etching mask for example including resist layer is formed
PR2, and ion implanting is carried out via Etching mask PR2.Etching mask PR2 has opening 133, in the ion implanting phase
Between, dopant reaches in semiconductor substrate 101 via opening 133 and forms the first doped region 103a.Preferably, ion implanting it
Carry out high annealing afterwards to activate dopant.After forming the first doped region 103a, using method solvent dissolution or be ashed
Remove Etching mask PR2.
First doped region 103a is for example doping to N-type, and dopant is, for example, P ion.First doped region 103a is, for example, to connect
Continuous mesh shape, wherein each grid cell surrounds a part of region of semiconductor substrate 101.Wherein, pass through control first
The junction depth of doped region 103a controls the thickness of mass block, and specifically, the first doped region 103a is from the surface of semiconductor substrate 101
It extends downwardly, so that the first doped region 103a junction depth is less than the junction depth of well region 102.
Further, in semiconductor substrate 101, the second doped region 103b is formed using ion implanting, as shown in Figure 2 d.
The step uses photolithography method patterned resist layer to form Etching mask for example including resist layer is formed
PR3, and ion implanting is carried out via Etching mask PR3.Etching mask PR2 has opening 134, in the ion implanting phase
Between, dopant reaches in semiconductor substrate 101 via opening 134 and forms the second doped region 103b.Preferably, ion implanting it
Carry out high annealing afterwards to activate dopant.After forming the second doped region 103b, using method solvent dissolution or be ashed
Remove Etching mask PR3.
Second doped region 103b is for example doping to N-type, and dopant is, for example, P ion.Second doped region 103b is, for example, to connect
Continuous mesh shape, wherein each grid cell surrounds the first doped region 103a.By the junction depth for controlling the second doped region 103b
The thickness of cantilever is controlled, specifically, the second doped region 103b is extended downwardly from the surface of semiconductor substrate 101, so that second
Junction depth of the doped region 103b junction depth less than the first doped region 103a.
Further, semiconductor substrate 101 is partially converted by what well region 102 surrounded by porous layer using electrochemical corrosion
105, as shown in Figure 2 e.
The step include well region 102, the first doped region 103a and the second doped region 103b are respectively connected to anode and
Cathode, to carry out electrochemical corrosion using corrosive liquid in the case of passing to electric current.In this embodiment, semiconductor substrate
101 be monocrystalline substrate, and well region 102, the first doped region 103a and the second doped region 103b are respectively N-doped zone.Accordingly
Ground, the corrosive liquid of use are, for example, hydrofluoric acid (HF) and ethyl alcohol (C2H5OH mixed solution), volume ratio for example HF
(50%): C2H5OH=1:1.However, the invention is not limited thereto, corrosive liquid can be hydrofluoric acid and methanol, hydrofluoric acid and propyl alcohol,
Any mixed solution of hydrofluoric acid and isopropanol.During electrochemical corrosion, electric current flows through in semiconductor substrate 101 region
It is transformed into porous layer 105, well region 102, the first doped region 103a and the second doped region 103b are then not affected by corrosion.First insulation
Layer 121 and second insulating layer 122 are used to protect semiconductor substrate 101 during electrochemical corrosion, so that only surrounding in well region 102
Region in form porous layer.
Porosity of porous layer 105 etc. can be realized by control corrosion rate liquid concentration, size of current.In this embodiment,
The size of 105 mesoporous of porous layer is nanometer scale, and porosity is, for example, 10% to 80%, and thickness is, for example, 3 to 10 microns.
Further, porous layer 105 is removed using chemical etching, forms cavity 104, as shown in figure 2f.
The step includes using suitable etchant, relative to semiconductor substrate 101, well region 102, the first doped region 103a
And second doped region 103b be optionally removed porous layer 105.In this embodiment, etchant is, for example, to be selected from alkaline solution
(SC1) and any one of tetramethyl ammonium hydroxide solution (TMAH).First insulating layer 121 and second insulating layer 122 are etching
Period is used to protect semiconductor substrate 101, so that only forming cavity in the region that well region 102 surrounds.
In the etch process, porous layer 105 is as the sacrificial layer for forming cavity 104.Therefore, cavity 104 is from semiconductor
The depth that the surface of substrate 101 extends downwardly is corresponding with the thickness of porous layer 105.
After forming cavity 104, above cavity 104, the first doped region 103a and the second doped region 103b
Still it is left continuous mesh shape, forms the first opening 135 being connected to cavity 104 in the mesh of grid.Using erosion
Carving method removes the first insulating layer 121 and second insulating layer 122, thus the surface of exposing semiconductor substrate 101 again.
Further, it is formed on the surface of semiconductor substrate 101, the first doped region 103a and the first doped region 103b
Epitaxial layer 111, as shown in Figure 2 g.
The step uses chemical vapor deposition growth epitaxial layer 111.For example, the gas source used in chemical vapor deposition for
SiH2Cl2, epitaxial temperature is 900 to 1100 degrees Celsius.The epitaxial layer 111 is, for example, monocrystalline silicon layer.
During forming epitaxial layer 111, due to the characteristic of epitaxial growth, which is not only served as a contrast in semiconductor
Vertical-growth on the surface at bottom 101, the first doped region 103a and the second doped region 103b, and in the first doped region 103a and
The mesh inner wall cross growth in waffle-like pattern that two doped region 103b are formed, to fill up mesh (the first opening), closing
Cavity 104.
Further, inductive reactance 141 is formed in the epitaxial layer 111 above the second doped region 103b, as shown in fig. 2h.
The step for example including resist layer is formed on epitaxial layer 111, use photolithography method patterned resist layer with
Etching mask is formed, and carries out ion implanting via Etching mask.Etching mask has opening, in the ion implanting phase
Between, dopant is reached via opening forms inductive reactance 141 in epitaxial layer 111, which is monocrystalline pressure drag.It is preferred that
Ground carries out high annealing after ion implantation to activate dopant.After forming inductive reactance 141, dissolved using solvent
Or the method for ashing removes Etching mask.
Further, patterned separation layer 150 is formed on epitaxial layer 111, as shown in fig. 2i.
The step forms resist on separation layer 150 for example including chemical vapor deposition growth separation layer 150 is used
Layer uses photolithography method patterned resist layer to form Etching mask, and etch separation layer via Etching mask
150, with exposure at least partly inductive reactance 141.Etching stop when reaching inductive reactance 141, later, using solvent dissolve or
The method of ashing removes Etching mask.
Further, form patterned wiring layer 142 on separation layer 150, wiring layer 142 pass through separation layer 150 with
Inductive reactance 141 connects, as shown in figure 2j.
The step forms resist on wiring layer 142 for example including chemical vapor deposition growth wiring layer 142 is used
Layer uses photolithography method patterned resist layer to form Etching mask, and etch wiring layer via Etching mask
142, with exposure at least partly separation layer 150.Later, the method for being dissolved or being ashed using solvent removes Etching mask.
Further, part the second doped region 103b and corresponding partial epitaxial layer 111 and separation layer 150 are removed with shape
At the second opening, a part of the first doped region 103a and epitaxial layer 111 forms mass block, the second doped region 103b and epitaxial layer
111 another part forms cantilever, ultimately forms MEMS device as shown in Figure 1.
The step removes the part-structure layer above cavity using any one of ion etching or BOSCH technique, with
Form mass block and cantilever, wherein ion etching passes through SF6Or O2It realizes.
It should be noted that herein, relational terms such as first and second and the like are used merely to a reality
Body or operation are distinguished with another entity or operation, are deposited without necessarily requiring or implying between these entities or operation
In any actual relationship or order or sequence.Moreover, the terms "include", "comprise" or its any other variant are intended to
Non-exclusive inclusion, so that the process, method, article or equipment including a series of elements is not only wanted including those
Element, but also including other elements that are not explicitly listed, or further include for this process, method, article or equipment
Intrinsic element.In the absence of more restrictions, the element limited by sentence "including a ...", it is not excluded that
There is also other identical elements in process, method, article or equipment including the element.
It is as described above according to the embodiment of the present invention, these embodiments details all there is no detailed descriptionthe, also not
Limiting the invention is only the specific embodiment.Obviously, as described above, can make many modifications and variations.This explanation
These embodiments are chosen and specifically described to book, is principle and practical application in order to better explain the present invention, thus belonging to making
Technical field technical staff can be used using modification of the invention and on the basis of the present invention well.The present invention is only by right
The limitation of claim and its full scope and equivalent.
Claims (20)
1. a kind of manufacturing method of MEMS device, comprising:
Cavity is formed in the semiconductor substrate；
Structure sheaf is formed on the cavity；
At least one inductive reactance is formed in the structure sheaf；And
The second opening for reaching the cavity is formed via the structure sheaf,
Wherein, the structure sheaf and the adjacent part of second opening form mass block, and the structure sheaf is respectively with described half
The part that conductor substrate and the mass block are connected forms cantilever, and the inductive reactance is located in the cantilever.
2. according to the method described in claim 1, wherein, the step of forming the cavity, includes:
Well region is formed in the semiconductor substrate, and the well region surrounds first area；
The first doped region is formed in the first area；
The second doped region for surrounding first doped region is formed in the first area；And
The semiconductor substrate is removed relative to the well region, first doped region and second doped region using etching
A part, the cavity is formed in the first area.
3. according to the method described in claim 2, wherein, first doped region and second doped region are located at the cavity
Top,
First doped region and second doped region include multiple first openings for reaching the cavity.
4. first doped region and second doped region are mesh shape according to the method described in claim 3, wherein,
Mesh of the multiple first opening as the grid.
5. according to the method described in claim 2, wherein, the step for removing a part of the semiconductor substrate includes:
The first area is transformed by porous layer using electrochemical corrosion, wherein the well region, first doped region and
Second doped region is separately connected electrode；And
It is gone using etching relative to the semiconductor substrate, the well region, first doped region and second doped region
Except the porous layer.
6. according to the method described in claim 5, wherein, the etchant solution used in electrochemical corrosion includes hydrofluoric acid and choosing
The mixed solution formed from least one of methanol, ethyl alcohol, propyl alcohol and isopropanol.
7. according to the method described in claim 3, wherein, the step of forming the structure sheaf be included in first doped region with
Epitaxial layer is formed above second doped region,
Wherein, first doped region and the second doped region horizontal extension close first opening.
8. according to the method described in claim 7, before the step of forming the described second opening, further includes:
Separation layer is formed on said epitaxial layer there；And
Wiring layer is formed on the separation layer, the wiring layer passes through the separation layer and connect with the inductive reactance.
9. according to any method of claim 2-8, wherein in the step of forming the first doped region and the second doped region
In, the thickness of the mass block is controlled by controlling the junction depth of first doped region, and mix by control described second
The junction depth in miscellaneous area controls the thickness of the cantilever.
10. according to the method described in claim 9, wherein, the junction depth of first doped region is less than the depth of the cavity, institute
The junction depth for stating the second doped region is less than the junction depth of first doped region, and the junction depth of the well region is greater than or equal to the cavity
Depth.
11. according to the method described in claim 8, wherein, the step of forming the described second opening include: using etching relative to
First doped region removal part, second doped region, the part epitaxial layer and the part separation layer.
12. according to the method described in claim 7, wherein, the well region, first doped region, second doped region with
And the epitaxial layer is identical doping type.
13. a kind of MEMS device, comprising:
Semiconductor substrate；
Cavity is located in the semiconductor substrate；
Structure sheaf, above the cavity；
At least one inductive reactance is located in the structure sheaf；And
Second opening reaches the cavity via the structure sheaf,
Wherein, the structure sheaf and the adjacent part of second opening form mass block, and the structure sheaf is respectively with described half
The part that conductor substrate and the mass block are connected forms cantilever, and the inductive reactance is located in the cantilever.
14. MEMS device according to claim 13 further includes well region, it is located in the semiconductor substrate and around described
Cavity.
15. MEMS device according to claim 14, wherein the structure sheaf includes:
First doped layer；
Second doped layer, at least partially surrounding first doped layer；And
On epitaxial layer, first doped layer and second doped layer,
Wherein, first doped region and second doped region include multiple first openings, and the epitaxial layer closes institute
State multiple first openings.
16. MEMS device according to claim 15, wherein first doped region is grid with second doped region
Shape, mesh of the multiple first opening as the grid.
17. MEMS device according to claim 15, wherein the thickness of the mass block corresponds to first doped region
Junction depth and the cantilever thickness correspond to second doped region junction depth.
18. MEMS device according to claim 15, wherein the junction depth of first doped region is less than the depth of the cavity
Degree, the junction depth of second doped region are less than the junction depth of first doped region, and the junction depth of the well region is greater than or equal to described
The depth of cavity.
19. MEMS device according to claim 15, wherein the well region, first doped region, second doping
Area and the epitaxial layer are identical doping type.
20. MEMS device according to claim 15, further includes:
Separation layer is located on the epitaxial layer；And
Wiring layer is located on the separation layer, and the wiring layer passes through the separation layer and connect with the inductive reactance.
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