CN109842284A - A kind of multipotency amount fusion booster circuit applied to energy collecting system - Google Patents

A kind of multipotency amount fusion booster circuit applied to energy collecting system Download PDF

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Publication number
CN109842284A
CN109842284A CN201910168006.2A CN201910168006A CN109842284A CN 109842284 A CN109842284 A CN 109842284A CN 201910168006 A CN201910168006 A CN 201910168006A CN 109842284 A CN109842284 A CN 109842284A
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nmos tube
cmn
capacitor
connect
voltage clamp
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CN109842284B (en
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韦保林
韩怀宇
韦雪明
徐卫林
段吉海
岳宏卫
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Guilin University of Electronic Technology
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Guilin University of Electronic Technology
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Abstract

The present invention discloses a kind of multipotency amount fusion booster circuit applied to energy collecting system, including 2 multipotency amount boosting units;Each multipotency amount boosting unit is respectively made of 1 high voltage clamp circuit, 1 low-voltage clamper branch and 1 output circuit.2 high voltage clamp circuits respectively include 1 capacitor and 1 NMOS tube.2 low-voltage clamp circuits respectively include 1 capacitor and 1 NMOS tube.2 output circuits respectively include 1 PMOS tube and 1 NMOS tube.The present invention is integrated by the energy to two kinds of forms, and it is harsh to solve the problems, such as that the prior art requires single energy, reduces lowest starting voltage.Use scope of the present invention is wide, can be widely used in energy collecting system, reduces the required voltage value of self-starting.

Description

A kind of multipotency amount fusion booster circuit applied to energy collecting system
Technical field
The present invention relates to technical field of integrated circuits, and in particular to a kind of multipotency amount fusion applied to energy collecting system Booster circuit.
Background technique
As wireless charging technology develops very fast, people require equipment to have lower starting voltage at work.Energy Collection system core technology first is that low pressure self-start circuit design.Made under lower input by low pressure self-start circuit be Control circuit of uniting work, to start the work of entire energy collecting system.Low pressure self-starting technology determines that system starts work The minimum of work, since the micro-energy energized to energy collecting system is lower, it is desirable to further decrease lowest starting voltage very It is difficult.Currently, the prior art realizes system generally in such a way that single energy realizes self-starting, such as using RF energy Self-starting, or boosted using temperature difference energy etc..Self-start circuit is energized jointly if two kinds of energy combined, is reached One complementary effect, it will improve boost effect, reduce the voltage value of lowest starting voltage.
Summary of the invention
To be solved by this invention is the lowest starting voltage value of existing energy collecting system mesolow self-start circuit Higher problem provides a kind of multipotency amount fusion booster circuit applied to energy collecting system.
To solve the above problems, the present invention is achieved by the following technical solutions:
A kind of multipotency amount fusion booster circuit applied to energy collecting system, including 2 multipotency amount boosting units;Each Multipotency amount boosting unit is respectively made of 1 high voltage clamp circuit, 1 low-voltage clamper branch and 1 output circuit;
First high voltage clamp circuit includes capacitor C1With NMOS tube CMN1;NMOS tube CMN1Substrate connect its drain electrode;Difference Radio-frequency input signals RF- connection capacitor C1Upper step;Capacitor C1Lower step connect NMOS tube CMN1Source electrode, and form the The output end of one high voltage clamp circuit;NMOS tube CMN1Drain and gate connect direct current signal DC+ simultaneously;
First low-voltage clamp circuit includes capacitor C2With NMOS tube CMN2;NMOS tube CMN2Substrate connect its drain electrode;Difference Radio-frequency input signals RF- connection capacitor C2Upper step;Capacitor C2Lower step connect NMOS tube CMN2Drain and gate, and shape At the output end of the first low-voltage clamp circuit;NMOS tube CMN2Source electrode connects direct current signal DC-;
First output circuit includes NMOS tube MN1With PMOS tube MP1;NMOS tube MN1Substrate connect its source electrode;PMOS tube MP1 Substrate connect its source electrode;PMOS tube MP1Source electrode connect the output end of the first high voltage clamp circuit;NMOS tube MN1Source electrode connect The output end of one low-voltage clamp circuit;Differential radio frequency input signal RF+ connects NMOS tube MN simultaneously1With PMOS tube MP1Grid Pole;NMOS tube MN1With PMOS tube MP1Drain electrode be connected, and output difference output signal Out-;
Second high voltage clamp circuit includes capacitor C3With NMOS tube CMN3;NMOS tube CMN3Substrate connect its drain electrode;Difference Radio-frequency input signals RF+ connection capacitor C3Upper step;Capacitor C3Lower step connect NMOS tube CMN3Source electrode, and form the The output end of two high voltage clamp circuits;NMOS tube CMN3Drain and gate connect direct current signal DC+ simultaneously;
Second low-voltage clamp circuit includes capacitor C4With NMOS tube CMN4;NMOS tube CMN4Substrate connect its drain electrode;Difference Radio-frequency input signals RF+ connection capacitor C4Upper step;Capacitor C4Lower step connect NMOS tube CMN4Drain and gate, and shape At the output end of the second low-voltage clamp circuit;NMOS tube CMN4Source electrode connects direct current signal DC-;
Second output circuit includes NMOS tube MN2With PMOS tube MP2;NMOS tube MN2Substrate connect its source electrode;PMOS tube MP2 Substrate connect its source electrode;PMOS tube MP2Source electrode connect the output end of the second high voltage clamp circuit;NMOS tube MN2Source electrode connect The output end of two low-voltage clamp circuits;Differential radio frequency input signal RF+ connects NMOS tube MN simultaneously2With PMOS tube MP2Grid Pole;NMOS tube MN2With PMOS tube MP2Drain electrode be connected, and output difference output signal Out+.
In above scheme, capacitor C1~C4Parameter it is identical.
In above scheme, NMOS tube CMN1~CMN4Parameter it is identical.
In above scheme, PMOS tube MP1Breadth length ratio is NMOS tube MN13 times of breadth length ratio.
In above scheme, PMOS tube MP2Breadth length ratio is NMOS tube MN23 times of breadth length ratio.
Compared with prior art, the present invention has a characteristic that
1, AC energy (RF energy) and DC energy (temperature difference energy etc.) are combined, the two cooperates, can To reduce the demand of lowest starting voltage.
2, AC energy is mutually coordinated with DC energy, to the higher need of single energy when reducing conventional acquisition single energy It asks.It is lower to RF energy demand when DC energy is higher;When RF energy is sufficiently high, DC energy can be down to 0.
3, there is very strong practicability, can be widely applied in energy collecting system.In VDC=100mV, RF power be- It is higher by about 30% than input amplitude that peak value is exported when 11dBm;When RF power is -9.5dBm, VDCDemand can be down to 0V, so that output Range is more than input amplitude about 15%.
4, circuit output range is adjustable, and connecting corresponding regulator rectifier circuit in its output end can be obtained the direct current of needs Voltage value.
Detailed description of the invention
Fig. 1 is a kind of circuit diagram of multipotency amount fusion booster circuit applied to energy collecting system.
Fig. 2 is input difference waveform C:(VRF+And VRF-) and output difference partial wave B:(Out+ and Out-) shape comparison diagram.
Specific embodiment
To make the objectives, technical solutions, and advantages of the present invention clearer, below in conjunction with specific example, and referring to attached Figure, the present invention is described in more detail.
Referring to Fig. 1, a kind of multipotency amount fusion booster circuit applied to energy collecting system utilizes energy boost more than 2 Unit constitutes Differential Input and difference output structure, realizes to multipotency amount boost function.The connection of first multipotency amount boosting unit is poor Divide radio-frequency input signals RF- as AC energy source, connects direct current signal DC+ and DC- as DC energy source, it is poor to connect Divide radio-frequency input signals RF+ as control signal.Second multipotency amount boosting unit connects differential radio frequency input signal RF+ as friendship Stream energy source, connection direct current signal DC+ and DC- connect differential radio frequency input signal RF- as control as DC energy source Signal processed.
First multipotency amount boosting unit and the second multipotency amount boosting unit are respectively by 1 high voltage clamp circuit, 1 low-voltage Clamp circuit and 1 output circuit are constituted.
2 high voltage clamp circuits respectively include 1 capacitor and 1 NMOS tube.NMOS tube functions as one and is inputted The switch of signal control, to improve capacitor bottom crown current potential, to obtain a high potential output.
First high voltage clamp circuit includes capacitor C1With NMOS tube CMN1, wherein capacitor C1Capacitance is 5p, CMN1Having a size of 55u/0.18um.NMOS tube CMN1Substrate connect its drain electrode.Differential radio frequency input signal RF- connection capacitor C1Upper step.Capacitor C1Lower step connect NMOS tube CMN1Source electrode, and formed the first high voltage clamp circuit output end.NMOS tube CMN1Leakage Pole and grid connect direct current signal DC+ simultaneously.
In the first high voltage clamp circuit, when RF- is low, capacitor C1Top crown is low, capacitor C1Bottom crown is also It is low, CMN1Grid voltage is higher than CMN1Source voltage, CMN1Conducting, DC+ flow of charge capacitor C1, so that C1Bottom crown voltage Equal to VDC, C at this time1Voltage difference of the two ends is VDC+VRF, A point current potential is VDC.When RF- is high, capacitor C1Top crown is height, capacitor C1Bottom crown is also high, CMN1Grid voltage is lower than CMN1Source voltage, CMN1Cut-off, capacitor C1On voltage difference remain unchanged, C1Bottom crown voltage is VDC+2VRF, A point current potential is V at this timeDC+2VRFTherefore, pass through the input control of differential radio frequency input signal RF- System, obtains A point potential range (VDC, VDC+2VRF)。
Second high voltage clamp circuit includes capacitor C3With NMOS tube CMN3, wherein capacitor C3Capacitance is 5p, CMN3Having a size of 55um/0.18um.NMOS tube CMN3Substrate connect its drain electrode.Differential radio frequency input signal RF+ connection capacitor C3Upper step.Electricity Hold C3Lower step connect NMOS tube CMN3Source electrode, and formed the second high voltage clamp circuit output end.NMOS tube CMN3's Drain and gate connects direct current signal DC+ simultaneously.
In the second high voltage clamp circuit, when RF+ is low, capacitor C3Top crown is low, capacitor C3Bottom crown is also It is low, CMN3Grid voltage is higher than CMN3Source voltage, CMN3Conducting, DC+ flow of charge capacitor C3, so that C3Bottom crown voltage Equal to VDC, C at this time3Voltage difference of the two ends is VDC+VRF, C point current potential is VDC.When RF+ is high, capacitor C3Top crown is height, capacitor C3Bottom crown is also high, CMN3Grid voltage is lower than CMN3Source voltage, CMN3Cut-off, capacitor C3On voltage difference remain unchanged, C3Bottom crown voltage is VDC+2VRF, C point current potential is V at this timeDC+2VRFTherefore, pass through the input control of differential radio frequency input signal RF+ System, obtains C point potential range (VDC, VDC+2VRF)。
2 low-voltage clamp circuits respectively include 1 capacitor and 1 NMOS tube.NMOS tube functions as one and is inputted The switch of signal control, to reduce capacitor bottom crown current potential, to obtain a low potential output.
First low-voltage clamp circuit includes capacitor C2With NMOS tube CMN2, wherein capacitor C2Capacitance is 5p, CMN2Having a size of 55u/0.18um.NMOS tube CMN2Substrate connect its drain electrode.Differential radio frequency input signal RF- connection capacitor C2Upper step.Capacitor C2Lower step connect NMOS tube CMN2Drain and gate, and form the output end of the first low-voltage clamp circuit.NMOS tube CMN2 Source electrode connects direct current signal DC-.
In the first low-voltage clamp circuit, when RF- is low, capacitor C2Top crown is low, capacitor C2Bottom crown is also It is low, CMN2Grid voltage is lower than CMN2Source voltage, CMN2Cut-off, capacitor C2On voltage difference remain unchanged, by next point Analysis is it is found that C2Upper voltage difference is VDC+VRF, therefore, B electric potential is-(V at this timeDC+2VRF).When RF- is high, capacitor C2Upper pole Plate is height, and bottom crown is also high, CMN2Grid voltage is higher than CMN2Source voltage, CMN2Conducting, capacitor C2Upper flow of charge DC-, So that C2Bottom crown voltage gradually decrease and be equal to-VDC, C at this time2Voltage difference of the two ends is VDC+VRF, C at this time2Bottom crown current potential For-VDC, i.e. B point current potential is-VDC.Therefore B point potential range (- VDC,-(VDC+2VRF))。
Second low-voltage clamp circuit includes capacitor C4With NMOS tube CMN4, wherein capacitor C4Capacitance is 5p, CMN4Having a size of 55u/0.18um.Differential radio frequency input signal RF+ connection capacitor C4Upper step.Capacitor C4Lower step connect NMOS tube CMN4 Drain and gate, and form the output end of the second low-voltage clamp circuit.NMOS tube CMN4Source electrode connects direct current signal DC-.
In the second low-voltage clamp circuit, when RF+ is low, capacitor C4Top crown is low, capacitor C4Bottom crown is also It is low, CMN4Grid voltage is lower than CMN4Source voltage, CMN4Cut-off, capacitor C4On voltage difference remain unchanged, by next point Analysis is it is found that C4Upper voltage difference is VDC+VRF, therefore, D electric potential is-(V at this timeDC+2VRF).When RF+ is high, capacitor C4Upper pole Plate is height, and bottom crown is also high, CMN4Grid voltage is higher than CMN4Source voltage, CMN4Conducting, capacitor C4Upper flow of charge DC-, So that C4Bottom crown voltage gradually decrease and be equal to-VDC, C at this time4Voltage difference of the two ends is VDC+VRF, C at this time4Bottom crown current potential For-VDC, i.e. D point current potential is-VDC.Therefore D point potential range (- VDC,-(VDC+2VRF))。
2 output circuits respectively include 1 PMOS tube and 1 NMOS tube.The effect of 2 metal-oxide-semiconductors is by input signal Control, selects high potential and low potential in four voltage clamp circuits to be exported, and obtains the difference with bigger output area Differential output signal Out- and Out+.
First output circuit includes NMOS tube MN1With PMOS tube MP1, wherein MN1Having a size of 3um/0.18um, MP1Having a size of 9um/0.18um.NMOS tube MN1Substrate connect its source electrode.PMOS tube MP1Substrate connect its source electrode.PMOS tube MP1Source electrode connect The output end of one high voltage clamp circuit.NMOS tube MN1Source electrode connect the output end of the first low-voltage clamp circuit.Differential radio frequency Input signal RF+ connects NMOS tube MN simultaneously1With PMOS tube MP1Grid.NMOS tube MN1With PMOS tube MP1Drain electrode be connected, And output difference output signal Out-.
In the first output circuit, when control differential radio frequency input signal RF+ is high, MN1Conducting, MP1Cut-off, output electricity Press VOut-Equal to B point voltage, i.e. VOut-=-(VDC+2VRF).When control differential radio frequency input signal RF+ is low, MN1Cut-off, MP1 Conducting, output voltage VOut-Equal to A point voltage, i.e. VOut-=VDC+2VRF.I.e. output area is (- (VDC+2VRF), VDC+2VRF)。
Second output circuit includes NMOS tube MN2With PMOS tube MP2, wherein MN2Having a size of 3um/0.18um, MP2Having a size of 9um/0.18um.NMOS tube MN2Substrate connect its source electrode.PMOS tube MP2Substrate connect its source electrode.PMOS tube MP2Source electrode connect The output end of two high voltage clamp circuits.NMOS tube MN2Source electrode connect the output end of the second low-voltage clamp circuit.Differential radio frequency Input signal RF+ connects NMOS tube MN simultaneously2With PMOS tube MP2Grid.NMOS tube MN2With PMOS tube MP2Drain electrode be connected, And output difference output signal Out+.
In the second output circuit, when control differential radio frequency input signal RF- is high, MN2Conducting, MP2Cut-off, output electricity Press VOut+Equal to D point voltage, i.e. VOut+=-(VDC+2VRF).When control differential radio frequency input signal RF- is low, MN2Cut-off, MP2 Conducting, output voltage VOut+Equal to C point voltage, i.e. VOut+=VDC+2VRF.I.e. output area is (- (VDC+2VRF), VDC+2VRF)。
Fig. 2 is input difference waveform C:(VRF+And VRF-) and output difference partial wave B:(Out+ and Out-) shape comparison diagram.According to Different input difference radio-frequency input signals RF+, A, B, C and D the point electrical potential information and output signal V that RF- is obtainedOut-、VOut+Electricity Position relationship is as shown in table 1:
Table 1
RF+ RF- A B C D Out- Out+ Out+-Out-
L H VDC+2VRF -VDC VDC -VDC-2VRF VDC+2VRF -VDC-2VRF -2VDC-4VRF
H L VDC -VDC-2VRF VDC+2VRF -VDC -VDC-2VRF VDC+2VRF 2VDC+4VRF
In table: H indicates control voltage high level;L indicates control signal low level.If A column the third line indicates that in RF+ be H, When RF- is L, A point current potential is VDC, and so on;The voltage relationship obtained according to the actual situation is VRF>VDC>0>-VDC>-VRF
The present invention is integrated by the energy to two kinds of forms, is solved the prior art and is required harsh ask to single energy Topic reduces lowest starting voltage.Use scope of the present invention is wide, can be widely used in energy collecting system, reduces self-starting institute The voltage value of demand.
It should be noted that although the above embodiment of the present invention be it is illustrative, this be not be to the present invention Limitation, therefore the invention is not limited in above-mentioned specific embodiment.Without departing from the principles of the present invention, all The other embodiment that those skilled in the art obtain under the inspiration of the present invention is accordingly to be regarded as within protection of the invention.

Claims (5)

1. a kind of multipotency amount applied to energy collecting system merges booster circuit, characterized in that including energy boost list more than 2 Member;Each multipotency amount boosting unit is respectively by 1 high voltage clamp circuit, 1 low-voltage clamper branch and 1 output circuit structure At;
First high voltage clamp circuit includes capacitor C1With NMOS tube CMN1;NMOS tube CMN1Substrate connect its drain electrode;Differential radio frequency Input signal RF- connection capacitor C1Upper step;Capacitor C1Lower step connect NMOS tube CMN1Source electrode, and formed first high The output end of voltage clamp circuit;NMOS tube CMN1Drain and gate connect direct current signal DC+ simultaneously;
First low-voltage clamp circuit includes capacitor C2With NMOS tube CMN2;NMOS tube CMN2Substrate connect its drain electrode;Differential radio frequency Input signal RF- connection capacitor C2Upper step;Capacitor C2Lower step connect NMOS tube CMN2Drain and gate, and form the The output end of one low-voltage clamp circuit;NMOS tube CMN2Source electrode connects direct current signal DC-;
First output circuit includes NMOS tube MN1With PMOS tube MP1;NMOS tube MN1Substrate connect its source electrode;PMOS tube MP1Lining Bottom connects its source electrode;PMOS tube MP1Source electrode connect the output end of the first high voltage clamp circuit;NMOS tube MN1Source electrode to connect first low The output end of voltage clamp circuit;Differential radio frequency input signal RF+ connects NMOS tube MN simultaneously1With PMOS tube MP1Grid; NMOS tube MN1With PMOS tube MP1Drain electrode be connected, and output difference output signal Out-;
Second high voltage clamp circuit includes capacitor C3With NMOS tube CMN3;NMOS tube CMN3Substrate connect its drain electrode;Differential radio frequency Input signal RF+ connection capacitor C3Upper step;Capacitor C3Lower step connect NMOS tube CMN3Source electrode, and formed second high The output end of voltage clamp circuit;NMOS tube CMN3Drain and gate connect direct current signal DC+ simultaneously;
Second low-voltage clamp circuit includes capacitor C4With NMOS tube CMN4;NMOS tube CMN4Substrate connect its drain electrode;Differential radio frequency Input signal RF+ connection capacitor C4Upper step;Capacitor C4Lower step connect NMOS tube CMN4Drain and gate, and form the The output end of two low-voltage clamp circuits;NMOS tube CMN4Source electrode connects direct current signal DC-;
Second output circuit includes NMOS tube MN2With PMOS tube MP2;NMOS tube MN2Substrate connect its source electrode;PMOS tube MP2Lining Bottom connects its source electrode;PMOS tube MP2Source electrode connect the output end of the second high voltage clamp circuit;NMOS tube MN2Source electrode to connect second low The output end of voltage clamp circuit;Differential radio frequency input signal RF+ connects NMOS tube MN simultaneously2With PMOS tube MP2Grid; NMOS tube MN2With PMOS tube MP2Drain electrode be connected, and output difference output signal Out+.
2. a kind of multipotency amount applied to energy collecting system according to claim 1 merges booster circuit, characterized in that Capacitor C1~C4Parameter it is identical.
3. a kind of multipotency amount applied to energy collecting system according to claim 1 merges booster circuit, characterized in that NMOS tube CMN1~CMN4Parameter it is identical.
4. a kind of multipotency amount applied to energy collecting system according to claim 1 merges booster circuit, characterized in that PMOS tube MP1Breadth length ratio is NMOS tube MN13 times of breadth length ratio.
5. a kind of multipotency amount applied to energy collecting system according to claim 1 merges booster circuit, characterized in that PMOS tube MP2Breadth length ratio is NMOS tube MN23 times of breadth length ratio.
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