CN109830199B - Display panel peripheral circuit, display panel and detection method - Google Patents
Display panel peripheral circuit, display panel and detection method Download PDFInfo
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Abstract
The application discloses a display panel peripheral circuit, a display panel and a detection method. The display panel peripheral circuit comprises at least one group of wiring detection units, wherein the wiring detection units comprise: the grid electrodes of the first data selector, the second data selector, the third data selector and the fourth data selector are connected with the wiring detection signal end; the first poles of the first data selector and the second data selector are connected with the first wiring detection data end, and the first poles of the third data selector and the fourth data selector are connected with the second wiring detection data end: the second pole of each of the at least four data selectors respectively outputs display data for wiring detection to the first display data line, the second display data line, the third display data line and the fourth display data line under the control of the wiring detection signal received by the second pole; the first wire detection data end and the second wire detection data end are respectively connected with a first selection signal end and a second selection signal end of the display drive control unit.
Description
Technical Field
The present disclosure relates generally to the field of display, and more particularly, to a display panel peripheral circuit, a display panel and a detection method.
Background
A conventional display panel peripheral circuit includes a detection circuit, a drive control circuit, and the like. With the improvement of display indexes such as display resolution, the complexity of a plurality of peripheral circuits is higher and higher, and the space around the display panel is denser and denser. How to optimize the layout of the peripheral circuits is a problem that needs to be solved urgently.
Disclosure of Invention
In view of the above-mentioned drawbacks and deficiencies of the prior art, it is desirable to provide a display panel peripheral circuit, a display panel and a detection method that reduce the number of signals.
In a first aspect, a peripheral circuit of a display panel is provided, which includes at least one set of trace detection units, where the trace detection units include at least four data selectors;
the grid electrodes of the first data selector, the second data selector, the third data selector and the fourth data selector are connected with the wiring detection signal end, and at least four data selectors are switching tubes;
the first poles of the first data selector and the second data selector are connected with the first wiring detection data end, and the first poles of the third data selector and the fourth data selector are connected with the second wiring detection data end:
the second pole of each of the at least four data selectors respectively outputs display data for wiring detection to the first display data line, the second display data line, the third display data line and the fourth display data line under the control of the wiring detection signal received by the second pole;
The first routing detection data end and the second routing detection data end are respectively connected with a first selection signal end and a second selection signal end of the display drive control unit.
In one or more embodiments of the present application, at least one set of display drive control units is included, the display drive control units including at least two data selectors,
the grid electrodes of the fifth data selector and the sixth data selector are respectively connected with the first selection signal end and the second selection signal end, and at least two data selectors are switching tubes;
the first pole of the fifth data selector is connected with the first pole of the sixth data selector, and the connection point receives a data channel signal from the display driving chip;
and under the control of the selection signal received by the second pole of each of the at least two data selectors, the second pole outputs corresponding display data to the first display data line and the second display data line in a time-sharing way, so that multiplexing of data channel signals is realized.
In one or more embodiments of the present application, the display device further comprises at least one group of pixel detection units, and the pixel detection units comprise at least three data selectors:
the grid electrode of the seventh data selector is connected with the first pixel detection signal end, and the first pole of the seventh data selector is connected with the first pixel detection data end;
The grid electrode of the eighth data selector is connected with the second pixel detection signal end, and the first pole of the eighth data selector is connected with the second pixel detection data end;
the second poles of the seventh data selector and the eighth data selector are connected, and the display data for pixel detection transmitted by the first pixel detection data end and the second pixel detection data end are output to the first display data line in time-sharing manner under the control of the first pixel detection signal and the second pixel detection signal respectively;
the grid electrode of the ninth data selector is connected with the third pixel detection signal end, the first pole of the ninth data selector is connected with the third pixel detection data end, the second pole of the ninth data selector outputs display data transmitted by the third pixel detection data end to the second display data line under the control of the third pixel detection signal, and at least three data selectors are all switching tubes.
In one or more embodiments of the present application, the display device further comprises at least one group of pixel detection units, and the pixel detection units comprise at least three data selectors:
the grid electrode of the seventh data selector is connected with the first pixel detection signal end, and the first pole of the seventh data selector is connected with the first pixel detection data end;
the grid electrode of the eighth data selector is connected with the second pixel detection signal end, and the first pole of the eighth data selector is connected with the second pixel detection data end;
The grid electrode of the ninth data selector is connected with the signal end of the third pixel detection, and the first pole of the ninth data selector is connected with the data end of the third pixel detection;
and second poles of the seventh data selector, the eighth data selector and the ninth data selector respectively output the pixel detection display data transmitted by the first pixel detection data end, the second pixel detection data end and the third pixel detection data end to the first display data line, the second display data line and the third display data line under the control of the first pixel detection signal, the second pixel detection signal and the third pixel detection signal, and at least three data selectors are switching tubes.
In one or more embodiments of the present application,
when the wiring detection is performed, the wiring detection signal end outputs a detection effective signal, so that the first data selector, the second data selector, the third data selector and the fourth data selector are switched on, the first wiring detection data end and the second wiring detection data end output different level signals, and any one of the fifth data selector and the sixth data selector is cut off.
In one or more embodiments of the present application,
when pixel detection is carried out, the wiring detection signal end outputs a detection invalid signal, so that the first data selector, the second data selector, the third data selector and the fourth data selector are cut off, and the first wiring detection data end and the second wiring detection data end output high-level signals, so that the fifth data selector and the sixth data selector are cut off.
In one or more embodiments of the present application, the switch tube may be an N-type switch tube or a P-type switch tube.
In a second aspect, a display panel is provided, where the display panel includes the peripheral circuit of the display panel provided in the embodiments of the present application.
In a third aspect, a method for detecting a display panel is provided, including:
a wiring detection time period: the wiring detection signal end outputs a detection effective signal, so that the first data selector, the second data selector, the third data selector and the fourth data selector are switched on, and the first wiring detection data end and the second wiring detection data end output different level signals, so that any one data selector in the fifth data selector and the sixth data selector is switched off.
In one or more embodiments of the present application, further comprising:
pixel detection period: the wiring detection signal end outputs a detection invalid signal, so that the first data selector, the second data selector, the third data selector and the fourth data selector are cut off, and the first wiring detection data end and the second wiring detection data end both output high-level signals, so that the fifth data selector and the sixth data selector are both cut off.
According to the technical scheme provided by the embodiment of the application, the number of the signal ends can be reduced by sharing the signals between the wiring detection data end of the wiring detection unit and the selection signal end of the display driving control unit. Furthermore, according to some embodiments of the present application, the level of the data end is detected by controlling the trace of the trace detection unit during detection, so that the problem of signal interference caused by a common signal line can be solved, and a normal detection effect can be obtained without adding other circuits.
Drawings
Other features, objects and advantages of the present application will become more apparent upon reading of the following detailed description of non-limiting embodiments thereof, made with reference to the accompanying drawings in which:
FIG. 1 is a block diagram illustrating an exemplary configuration of a peripheral circuit of a display panel according to an embodiment of the present application;
FIG. 2 is a schematic diagram illustrating an exemplary switch state of a switch tube of the peripheral circuit of the display panel of FIG. 1 in a trace detection state;
FIG. 3 is a block diagram illustrating an exemplary configuration of a peripheral circuit of a display panel according to another embodiment of the present application;
FIG. 4 is a block diagram illustrating an exemplary configuration of a peripheral circuit of a display panel according to another embodiment of the present application;
fig. 5 is a schematic diagram showing exemplary switching states of the switching tubes in the pixel detection state of the display panel peripheral circuit of fig. 3.
Detailed Description
The present application will be described in further detail with reference to the drawings and examples. It is to be understood that the specific embodiments described herein are merely illustrative of the relevant invention and not restrictive of the invention. It should be noted that, for convenience of description, only the portions related to the present invention are shown in the drawings.
It should be noted that the embodiments and features of the embodiments in the present application may be combined with each other without conflict. The present application will be described in detail below with reference to the embodiments with reference to the attached drawings.
The following description is made with reference to fig. 1 and 2. Fig. 1 is a block diagram showing an exemplary configuration of a peripheral circuit of a display panel according to an embodiment of the present application; FIG. 2 is a schematic diagram illustrating an exemplary switch state of the switch tube in the trace detection state of the peripheral circuit of the display panel of FIG. 1. As shown in fig. 1, a peripheral circuit of a display panel includes at least one set of trace detection units 101, where the trace detection units include at least four data selectors;
the gates of the first data selector T1, the second data selector T2, the third data selector T3 and the fourth data selector T4 are connected to the trace detection signal terminal SWD, and at least four data selectors are switching tubes;
The first poles of the first data selector T1 and the second data selector T2 are connected to the first trace detection data terminal D1, and the first poles of the third data selector T3 and the fourth data selector T4 are connected to the second trace detection data terminal D2:
the second pole of each of the at least four data selectors respectively outputs display data for trace detection to the first display data line Out1, the second display data line Out2, the third display data line Out3 and the fourth display data line Out4 under the control of the trace detection signal received by the second pole of each of the at least four data selectors;
the first trace detection data terminal D1 and the second trace detection data terminal D2 are respectively connected to the first selection signal terminal MUX1 and the second selection signal terminal MUX2 of the display driving control unit 102.
The first trace detection data terminal D1 and the second trace detection data terminal D2 provide a trace detection signal for the display data line, and the trace detection signal terminal SWD is used for controlling the on/off of at least four data selectors.
In this embodiment, the trace detection data terminal of the trace detection unit 101 and the selection signal terminal of the display drive control unit 102 share a signal, so that the problem of reducing the number of signal terminals can be solved, and the peripheral circuit of the display panel is simplified.
It should be noted that, in this application, only an example having 8 display data lines is provided. In practical applications, the number of the display data lines is not limited.
As shown in fig. 1, further comprises at least one group of display drive control unit 102, the display drive control unit comprises at least two data selectors,
the gates of the fifth data selector T5 and the sixth data selector T6 are respectively connected to the first selection signal terminal MUX2 and the second selection signal terminal MUX1, and at least two data selectors are switching tubes;
a first pole of the fifth data selector T5 is connected with a first pole of the sixth data selector T6, and a connection point receives a data channel signal data1 from the display driving chip;
under the control of the selection signal received by the second pole of each of the at least two data selectors, the second pole outputs corresponding display data to the first display data line Out1 and the second display data line Out2 in time division, so that multiplexing of data channel signals is realized.
The first selection signal terminal MUX2 and the second selection signal terminal MUX1 output corresponding selection signals respectively, and control the on/off of the fifth data selector and the sixth data selector in different time periods. When the third display data line and the fourth display data line exist, the other group of display drive control units 103 outputs the display data for line detection to the third display data line Out3 and the fourth display data line Out4 in a time-interval manner.
When performing trace detection, as shown in fig. 2, the trace detection signal terminal SWD outputs a detection valid signal, so that the first data selector T1, the second data selector T2, the third data selector T3 and the fourth data selector T4 are turned on, and the first trace detection data terminal D1 and the second trace detection data terminal D2 output level signals different from each other, so that any one of the fifth data selector T5 and the sixth data selector T6 is turned off. At this time, one of the fifth and sixth data selectors is turned off, so that a connection point a of the first data selector T1 and the first display data line Out1 is disconnected from a connection point B of the second data selector T2 and the second display data line Out2, thereby preventing interference between signals. In fig. 2, an x-shaped icon indicates that the switching tube is in an off state, i.e., in an on state, and an icon that is not indicated indicates that the switching tube is in an on state, i.e., in an off state.
Fig. 3 is a block diagram illustrating an exemplary configuration of a peripheral circuit of a display panel according to another embodiment of the present application. As shown in fig. 3, the display device further includes at least one group of pixel detection units 105, and the pixel detection units 105 include at least three data selectors:
a gate of the seventh data selector T7 is connected to the first pixel detection signal terminal SWR, and a first pole thereof is connected to the first pixel detection data terminal CTDR;
A gate of the eighth data selector T8 is connected to the second pixel detection signal terminal SWB, and a first pole thereof is connected to the second pixel detection data terminal CTDB;
the second poles of the seventh data selector T7 and the eighth data selector T8 are connected, and the display data for pixel detection transmitted from the first pixel detection data terminal CTDR and the second pixel detection data terminal CTDB are output to the first display data line Out1 in a time-sharing manner under the control of the first pixel detection signal and the second pixel detection signal, respectively.
The gate of the ninth data selector T9 is connected to the third pixel detection signal terminal SWG, the first pole thereof is connected to the third pixel detection data terminal CTDG, and the second pole of the ninth data selector outputs the display data transmitted from the third pixel detection data terminal CTDG to the second display data line Out2 under the control of the third pixel detection signal. It is understood that the first pixel detection signal terminal SWR, the second pixel detection signal terminal SWB, and the third pixel detection signal terminal SWG are used for transmitting a first pixel detection signal, a second pixel detection signal, and a third pixel detection signal, respectively. The pixel detection signal can be a control signal for turning on the switch tube or a control signal for turning off the switch tube.
In this embodiment, the second poles of the seventh data selector T7 and the eighth data selector T8 are both connected to the first display data line Out1, and when performing pixel detection, the first pixel detection signal terminal SWR and the second pixel detection signal terminal SWB output corresponding first pixel detection signals and second pixel detection signals in a time-sharing manner to control the output of corresponding pixel detection data to the first display data line Out 1. Specifically, in the first period, the first pixel detection signal terminal SWR outputs the first pixel detection signal for turning on the switching tube to turn on the seventh data selector T7, so that the pixel detection data for displaying red color is output to the first display data line Out1, and at this time, the second pixel detection signal terminal SWB outputs the second pixel detection signal for turning off the switching tube to turn off the eighth data selector T8, thereby avoiding interference with the transmission of the pixel detection data for red color; in the second period, the second pixel detection signal terminal SWB outputs the second pixel detection signal so that the pixel detection data displaying blue is output to the first display data line Out1, and at this time, the first pixel detection signal terminal SWR outputs the first pixel detection signal of the off switching tube to turn off the seventh data selector T7, thereby avoiding interference with transmission of the pixel detection data displaying blue.
The pixel detection data is gradation data required for displaying a certain color, and when red is to be displayed, for example, the pixel detection data is red gradation data; when blue is required to be displayed, the pixel detection data is blue gray scale data.
When there are the third display data line Out3 and the fourth display data line Out4, the other group of pixel detection units 106 outputs display data for pixel detection to the third display data line and the fourth display data line.
Fig. 4 is a block diagram illustrating an exemplary configuration of a peripheral circuit of a display panel according to another embodiment of the present application. As shown in fig. 4, at least one group of pixel detection units 108 is further included, and the pixel detection units include at least three data selectors:
a gate of the seventh data selector T7 is connected to the first pixel detection signal terminal SWR, and a first pole thereof is connected to the first pixel detection data terminal CTDR;
a gate of the eighth data selector T8 is connected to the second pixel detection signal terminal SWB, and a first pole thereof is connected to the second pixel detection data terminal CTDB;
a gate of the ninth data selector T9 is connected to the third pixel detection signal terminal SWG, and a first pole thereof is connected to the third pixel detection data terminal CTDG;
the second poles of the seventh data selector T7, the eighth data selector T8, and the ninth data selector T9 output the pixel detection display data transmitted from the first pixel detection data terminal CTDR, the second pixel detection data terminal CTDB, and the third pixel detection data terminal CTDG to the first display data line Out1, the second display data line Out2, and the third display data line Out3, respectively, under the control of the first pixel detection signal, the second pixel detection signal, and the third pixel detection signal, respectively.
It is to be understood that when the fourth display data line Out4, the fifth display data line Out5, and the sixth display data line Out6 exist, the other group of pixel detection units 109 output display data for pixel detection to the fourth display data line Out4, the fifth display data line Out5, and the sixth display data line Out 6.
Fig. 5 is a schematic diagram illustrating an exemplary switching state of a switching tube of the peripheral circuit of the display panel of fig. 3 in a trace detection state. As shown in fig. 5, when pixel detection is performed, the trace detection signal terminal SWD outputs a detection disable signal, so that the first data selector T1, the second data selector T2, the third data selector T3 and the fourth data selector T4 are turned off, the first trace detection data terminal D1 and the second trace detection data terminal D2 each output a high-level signal, and so that the fifth data selector T5 and the sixth data selector T6 are turned off. At this time, the fifth data selector and the sixth data selector are turned off, and the connection point between the seventh data selector T7 and the first display data line Out1 and the connection point between the ninth data selector T9 and the second display data line Out are disconnected, thereby preventing interference between signals. Similarly, since the fifth data selector and the sixth data selector are turned off, the connection point between the eighth data selector T8 and the first display data line Out1 is disconnected from the connection point between the ninth data selector T9 and the second display data line Out2, thereby preventing interference between signals. Meanwhile, the first data selector T1 and the second data selector T2 are cut off, so that signal interference of the first trace detection data end D1 and the second trace detection data end D2 on the pixel detection data end is prevented.
Similarly, when performing pixel detection on the peripheral circuit of the display panel shown in fig. 4, the trace detection signal terminal SWD outputs a detection disable signal, so that the first data selector T1, the second data selector T2, the third data selector T3 and the fourth data selector T4 are turned off, the first trace detection data terminal D1 and the second trace detection data terminal D2 both output high level signals, and the fifth data selector T5 and the sixth data selector T6 are turned off. And will not be described in detail herein.
The application also discloses a display panel, which comprises the display panel peripheral circuit provided by the embodiments of the application.
The application also discloses a detection method of the display panel, which is characterized by comprising the following steps:
a wiring detection time period: the trace detection signal terminal SWD outputs a detection valid signal to turn on the first data selector T1, the second data selector T2, the third data selector T3 and the fourth data selector T4, and the first trace detection data terminal D1 and the second trace detection data terminal D2 output level signals different from each other to turn off any one of the fifth data selector T5 and the sixth data selector T6. It can be understood that whether the detection valid signal of the trace detection signal terminal is at a high level or a low level is determined by the type of the switch tube used. When an N-type switching tube is adopted, detecting that the effective signal is a high level; when the P-type switch tube is adopted, the effective signal is detected to be low level.
In some embodiments, the method for detecting a display panel further includes:
pixel detection period: the trace detection signal terminal SWD outputs a detection disable signal to disable the first data selector T1, the second data selector T2, the third data selector T3 and the fourth data selector T4, and the first trace detection data terminal D1 and the second trace detection data terminal D2 each output a high level signal to disable the fifth data selector T5 and the sixth data selector T6. In this embodiment, the switch tube is a P-type switch tube. In practical application, an N-type switch tube may be used according to circumstances, and details are not described here.
The above description is only a preferred embodiment of the application and is illustrative of the principles of the technology employed. It will be appreciated by a person skilled in the art that the scope of the invention as referred to in the present application is not limited to the embodiments with a specific combination of the above-mentioned features, but also covers other embodiments with any combination of the above-mentioned features or their equivalents without departing from the inventive concept. For example, the above features may be replaced with (but not limited to) features having similar functions disclosed in the present application.
Claims (7)
1. A display panel peripheral circuit is characterized by comprising at least one group of wiring detection units and at least one group of pixel detection units, wherein each wiring detection unit comprises at least four data selectors;
the grid electrodes of the first data selector, the second data selector, the third data selector and the fourth data selector are connected with the wiring detection signal end, and the at least four data selectors are all switching tubes;
the first poles of the first data selector and the second data selector are connected with a first wiring detection data end, and the first poles of the third data selector and the fourth data selector are connected with a second wiring detection data end:
the second pole of each of the at least four data selectors respectively outputs display data for wiring detection to the first display data line, the second display data line, the third display data line and the fourth display data line under the control of the wiring detection signal received by the second pole;
the first wiring detection data end and the second wiring detection data end are respectively connected with a first selection signal end and a second selection signal end of the display drive control unit;
wherein the pixel detection unit comprises at least three data selectors:
The grid electrode of the seventh data selector is connected with the first pixel detection signal end, and the first pole of the seventh data selector is connected with the first pixel detection data end;
the grid electrode of the eighth data selector is connected with the second pixel detection signal end, and the first pole of the eighth data selector is connected with the second pixel detection data end;
second poles of the seventh data selector and the eighth data selector are connected, and the seventh data selector and the eighth data selector output the display data for pixel detection transmitted by the first pixel detection data end and the second pixel detection data end to the first display data line in time-sharing under the control of the first pixel detection signal and the second pixel detection signal respectively;
a gate of the ninth data selector is connected with the third pixel detection signal end, a first pole of the ninth data selector is connected with the third pixel detection data end, a second pole of the ninth data selector outputs display data transmitted by the third pixel detection data end to the second display data line under the control of the third pixel detection signal, and the at least three data selectors are all switching tubes; alternatively, the first and second electrodes may be,
the pixel detection unit includes at least three data selectors:
the grid electrode of the seventh data selector is connected with the first pixel detection signal end, and the first pole of the seventh data selector is connected with the first pixel detection data end;
The grid electrode of the eighth data selector is connected with the second pixel detection signal end, and the first pole of the eighth data selector is connected with the second pixel detection data end;
the grid electrode of the ninth data selector is connected with the third pixel detection signal end, and the first pole of the ninth data selector is connected with the third pixel detection data end;
second poles of the seventh data selector, the eighth data selector, and the ninth data selector respectively output the display data for pixel detection transmitted by the first pixel detection data terminal, the second pixel detection data terminal, and the third pixel detection data terminal to the first display data line, the second display data line, and the third display data line under the control of the first pixel detection signal, the second pixel detection signal, and the third pixel detection signal, and the at least three data selectors are switching tubes.
2. The display panel peripheral circuit according to claim 1, comprising at least one set of display drive control unit comprising at least two data selectors,
the grid electrodes of the fifth data selector and the sixth data selector are respectively connected with the first selection signal end and the second selection signal end, and the at least two data selectors are switching tubes;
A first pole of the fifth data selector is connected with a first pole of the sixth data selector, and a connection point receives a data channel signal from a display driving chip;
and the second pole of each of the at least two data selectors outputs corresponding display data to the first display data line and the second display data line in a time-sharing manner under the control of the selection signal received by the second pole of each of the at least two data selectors, so that multiplexing of data channel signals is realized.
3. The display panel peripheral circuit according to claim 2,
when the routing detection is performed, the routing detection signal end outputs a detection effective signal, so that the first data selector, the second data selector, the third data selector and the fourth data selector are turned on, and the first routing detection data end and the second routing detection data end output different level signals, so that any one of the fifth data selector and the sixth data selector is turned off.
4. The display panel peripheral circuit according to claim 2,
when pixel detection is performed, the trace detection signal end outputs a detection invalid signal, so that the first data selector, the second data selector, the third data selector and the fourth data selector are cut off, and the first trace detection data end and the second trace detection data end both output high level signals, so that the fifth data selector and the sixth data selector are both cut off.
5. The peripheral circuit of any of claims 1 to 4, wherein the switch transistors are N-type switch transistors or P-type switch transistors.
6. A display panel comprising the display panel peripheral circuit according to any one of claims 1 to 5.
7. A method for detecting a display panel is characterized by comprising the following steps:
routing detection time period: the wiring detection signal end outputs a detection effective signal to enable the first data selector, the second data selector, the third data selector and the fourth data selector to be switched on, and the first wiring detection data end and the second wiring detection data end output different level signals to enable any one of the fifth data selector and the sixth data selector to be switched off;
pixel detection period: the wire detection signal end outputs a detection invalid signal, so that the first data selector, the second data selector, the third data selector and the fourth data selector are cut off, and the first wire detection data end and the second wire detection data end both output high level signals, so that the fifth data selector and the sixth data selector are both cut off.
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| KR102047005B1 (en) * | 2013-05-31 | 2019-11-21 | 삼성디스플레이 주식회사 | Organic Light Emitting Display Panel |
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| CN104464597B (en) * | 2014-12-23 | 2018-01-05 | 厦门天马微电子有限公司 | Multiplexer circuit and display device |
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| CN108335663A (en) * | 2018-05-14 | 2018-07-27 | 京东方科技集团股份有限公司 | The driving method and display panel of display panel, display device |
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