CN109814437B - Zero-power consumption standby wake-up circuit and electrical equipment - Google Patents
Zero-power consumption standby wake-up circuit and electrical equipment Download PDFInfo
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Abstract
The invention discloses a zero-power consumption standby wake-up circuit and electrical equipment, wherein the circuit comprises: the first end of the first switch is connected with an external power supply, and a first resistor is connected between the first end and the control end; a second resistor is connected between the first end of the second switch and the control end of the first switch, and the second end of the second switch is connected with a ground wire; the input end of the voltage stabilizing module is connected with the second end of the first switch; the first end of the third resistor is connected with the control end of the first switch, and the second end of the third resistor is connected with the starting signal; the power supply input end of the controller is connected with the output end of the voltage stabilizing module, and the voltage locking signal output end is connected with the second switch control end. When the circuit is in a standby state, the whole circuit is awakened by a starting signal, and the controller power supply is locked after the controller power supply is powered on; after the controller finishes the control operation, the controller enters a standby state, the controller controls the voltage locking signal output end to output a low-level signal, the whole circuit enters the standby state, all components are in a power-off state, the output power consumption is zero, and the power consumption is reduced.
Description
Technical Field
The invention relates to the technical field of electric appliances, in particular to a zero-power standby wake-up circuit and electric equipment.
Background
In order to realize low power consumption, a plurality of household appliances can enter a standby state after the normal use mode is finished, and the control is realized through a singlechip. As shown in fig. 1, a conventional power control system of a single-chip microcomputer, the power control system 200 includes: the internal voltage stabilizing source module 203 is connected with the single chip microcomputer inner core 201 (the single chip microcomputer inner core 201 and the internal voltage stabilizing source module 203 form the single chip microcomputer 207 together) and is used for supplying normal current to the single chip microcomputer inner core 201 when the single chip microcomputer 207 is in a normal mode and entering a low power consumption state or a closed state according to an instruction of the single chip microcomputer inner core 201 when the single chip microcomputer inner core enters a power saving mode; the external voltage stabilizing source module 209 is respectively connected with the external power supply and the internal voltage stabilizing source module 203, and is used for providing the voltage of the external power supply to the internal voltage stabilizing source module 203 after the voltage of the external power supply is increased; a wake-up button 213, configured to be pressed down when the singlechip 207 needs to wake up from the power saving mode to enter the normal mode, and generate a wake-up instruction; the power control module 205 is respectively connected with the single-chip microcomputer inner core 201, the external voltage stabilizing source module 209, the internal voltage stabilizing source module 203 and the wake-up key 213, and is used for closing the external voltage stabilizing source module 209 according to an instruction of the single-chip microcomputer inner core 201 when entering a power saving mode, opening the internal voltage stabilizing source module 203 and the external voltage stabilizing source module 209 according to a wake-up instruction of the wake-up key 213 when entering a normal mode, and notifying the single-chip microcomputer inner core 201 to be ready to enter the normal mode; and the unidirectional conduction module 211 is respectively connected with the singlechip core 201 and an external power supply and is used for supplying low-voltage power to the singlechip core 201, and maintaining the work of a part of circuits in the singlechip core 201 after the singlechip 207 enters the power-saving mode so as to wait for the singlechip 207 to be awakened into the normal mode.
In the above power control system 200, since the power control module 205 and the unidirectional conduction module 211 are in a charged state in the whole process, they consume a certain amount of electric energy, and after the single chip microcomputer 207 enters the power saving mode, a part of circuits in the single chip microcomputer core 201 are still in a working state to wait for being awakened, even in the low power consumption mode, the electric energy still needs to be consumed, and the standby power consumption of the single chip microcomputer and the whole single chip microcomputer circuit system cannot be further reduced.
Disclosure of Invention
In view of the above, the embodiment of the invention provides a zero-power standby wake-up circuit and electrical equipment, so as to solve the problem of high power consumption of the electrical equipment in the prior art.
According to a first aspect, an embodiment of the present invention provides a zero power standby wake-up circuit, including: a first resistor; the first end of the first switch is connected with an external power supply, and the first resistor is connected between the first end of the first switch and the control end of the first switch; a second resistor; the second resistor is connected between the first end of the second switch and the control end of the first switch, and the second end of the second switch is connected with the ground wire; the input end of the voltage stabilizing module is connected with the second end of the first switch; the first end of the third resistor is connected with the control end of the first switch, and the second end of the third resistor is connected with the starting signal; and the power input end of the controller is connected with the output end of the voltage stabilizing module, and the voltage locking signal output end of the controller is connected with the control end of the second switch.
Optionally, the method further comprises: the cathode of the diode is connected with the second end of the third resistor; the anode is connected with a counting signal detection end of the controller.
Optionally, the method further comprises: the first filtering module is connected in parallel between the input end of the voltage stabilizing module and the ground wire; and/or the second filtering module is connected in parallel between the output end of the voltage stabilizing module and the ground wire.
Optionally, the method further comprises: and one end of the voltage reducing module is connected with the second end of the first switch, and the other end of the voltage reducing module is connected with the input end of the voltage stabilizing module.
Optionally, the method further comprises: the pull-down resistor is connected between the control end of the second switch and the ground wire; and/or, a current limiting resistor is connected in series between the voltage locking signal output end and the control end of the second switch.
Optionally, the method further comprises: the overcurrent protection module is connected in series between the external power supply and the first end of the first switch.
Optionally, the method further comprises: and the first end of the sixth resistor is connected with the PWM signal, and the second end of the sixth resistor is connected with the PWM signal input end of the controller.
Optionally, the method further comprises: and the input end of the voltage acquisition module is connected with the PWM signal, and the output end of the voltage acquisition module is connected with the voltage detection end of the controller.
Optionally, the voltage acquisition module includes: the first end of the seventh resistor is connected with the PWM signal, and the second end of the seventh resistor is connected with the voltage detection end of the controller; and the first end of the eighth resistor is connected with the second end of the seventh resistor, and the second end of the eighth resistor is connected with the ground wire.
Optionally, the voltage acquisition module further includes: and the third filtering module is connected in parallel between the second end of the seventh resistor and the ground wire.
According to a second aspect, an embodiment of the present invention provides an electrical device, including a zero power standby wake-up circuit according to any one of the first aspects of the present invention.
The technical scheme of the invention has the following advantages:
The zero power consumption standby wake-up circuit provided by the invention comprises: a first resistor; the first end of the first switch is connected with an external power supply, and the first resistor is connected between the first end of the first switch and the control end of the first switch; a second resistor; the second resistor is connected between the first end of the second switch and the control end of the first switch, and the second end of the second switch is connected with the ground wire; the input end of the voltage stabilizing module is connected with the second end of the first switch; the first end of the third resistor is connected with the control end of the first switch, and the second end of the third resistor is connected with the starting signal; and the power input end of the controller is connected with the output end of the voltage stabilizing module, and the voltage locking signal output end of the controller is connected with the control end of the second switch. According to the zero-power-consumption standby awakening circuit, when the circuit is in a standby state, the whole circuit is awakened through the starting signal, the starting signal controls the conduction of the first switch and the second switch, the conduction of the voltage stabilizing module is controlled, the voltage output by the voltage stabilizing module after the conduction is supplied to the controller to enable the power supply of the controller to be powered on, the controller outputs the voltage locking signal to lock the power supply of the whole circuit, the controller can realize corresponding logic control, the standby state is needed to be entered after the controller finishes the control operation, when the controller controls the voltage locking signal output end to output a low-level signal, the whole circuit enters the standby state, at the moment, all components in the whole circuit are in a power-off state, the output power consumption of the whole circuit in the standby state is zero, and the power consumption is reduced.
Drawings
In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings that are needed in the description of the embodiments or the prior art will be briefly described, and it is obvious that the drawings in the description below are some embodiments of the present invention, and other drawings can be obtained according to the drawings without inventive effort for a person skilled in the art.
FIG. 1 is a schematic diagram of a specific example of a power control system of a singlechip in the prior art;
FIG. 2 is a schematic diagram of a specific example of a zero power standby wake-up circuit according to an embodiment of the present invention;
FIG. 3 is a schematic diagram of another specific example of a zero power standby wake-up circuit according to an embodiment of the present invention;
FIG. 4 is a schematic diagram of another specific example of a zero power standby wake-up circuit according to an embodiment of the present invention;
FIG. 5 is a schematic diagram of another specific example of a zero power standby wake-up circuit according to an embodiment of the present invention;
FIG. 6 is a schematic diagram of another specific example of a zero power standby wake-up circuit according to an embodiment of the present invention;
fig. 7 is a schematic diagram of another specific example of a zero power standby wake-up circuit according to an embodiment of the present invention.
Reference numerals:
Q7, a first switch; q9, a second switch; u, voltage stabilizing module; C. a controller; r33 is a first resistor; r36, second resistance; r34, third resistance; r7, a fourth resistor; r8, fifth resistance; r31, sixth resistance; r26, seventh resistance; r30, eighth resistor; r28, a protection resistor; c10, a first filter capacitor; c13, a second filter capacitor; c14, a third filter capacitor; c29, a fourth filter capacitor; r46, current limiting resistor; r47, pull-down resistor; d5, a diode.
Detailed Description
For the purpose of making the objects, technical solutions and advantages of the embodiments of the present invention more apparent, the technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings in the embodiments of the present invention, and it is apparent that the described embodiments are some embodiments of the present invention, but not all embodiments of the present invention. All other embodiments, which can be made by those skilled in the art based on the embodiments of the invention without making any inventive effort, are intended to fall within the scope of the invention.
In the description of the present invention, it should be noted that the directions or positional relationships indicated by the terms "center", "upper", "lower", "left", "right", "vertical", "horizontal", "inner", "outer", etc. are based on the directions or positional relationships shown in the drawings, are merely for convenience of describing the present invention and simplifying the description, and do not indicate or imply that the devices or elements referred to must have a specific orientation, be configured and operated in a specific orientation, and thus should not be construed as limiting the present invention. Furthermore, the terms "first," "second," and "third" are used for descriptive purposes only and are not to be construed as indicating or implying relative importance.
In the description of the present invention, it should be noted that, unless explicitly specified and limited otherwise, the terms "mounted," "connected," and "connected" are to be construed broadly, and may be either fixedly connected, detachably connected, or integrally connected, for example; can be mechanically or electrically connected; can be directly connected or indirectly connected through an intermediate medium, and can be communication between two elements. The specific meaning of the above terms in the present invention will be understood in specific cases by those of ordinary skill in the art.
In addition, the technical features of the different embodiments of the present invention described below may be combined with each other as long as they do not collide with each other.
The embodiment of the invention provides a zero-power standby wake-up circuit, which can be applied to electrical equipment such as dust collectors, sweeping robots and the like, realizes zero-power standby of the electrical equipment, reduces the power consumption of the electrical equipment, and comprises the following steps as shown in fig. 2: the device comprises a first resistor R33, a first switch Q7, a second resistor R36, a second switch Q9, a voltage stabilizing module U, a third resistor R34 and a controller C.
The first end of the first switch Q7 is connected with an external power supply P, and a first resistor R33 is connected between the first end of the first switch Q7 and the control end of the first switch Q7; a second resistor R36 is connected between the first end of the second switch Q9 and the control end of the first switch Q7, and the second end of the second switch Q9 is connected with the ground GND; the input end of the voltage stabilizing module U is connected with the second end of the first switch Q7; the first end of the third resistor R34 is connected with the control end of the first switch Q7, and the second end of the third resistor R34 is connected with the starting signal ON/OFF; the power input end of the controller C is connected with the output end of the voltage stabilizing module U, and the voltage locking signal output end LOCK_power of the controller C is connected with the control end of the second switch Q9.
In an embodiment, the first switch Q7 and the second switch Q9 are transistors, specifically, the first switch Q7 is a PNP transistor, and the second switch Q9 is an NPN transistor. Of course, in other embodiments, the switch may be a switching device such as a MOS transistor or an IGBT, and may be reasonably set according to needs, which is not limited in this embodiment.
In an embodiment, the voltage stabilizing module U may be a voltage stabilizing chip, for example, a 78M05 chip; of course, in other embodiments, other voltage stabilizing circuits in the prior art may be adopted, and this embodiment is not limited in any way, and may be set reasonably according to needs.
In an embodiment, the controller C may be a single chip Microcomputer (MCU), and this embodiment is only schematically illustrated, but not limited thereto.
According to the zero-power-consumption standby awakening circuit, when the circuit is in a standby state, the whole circuit is awakened through the starting signal, the starting signal controls the conduction of the first switch and the second switch, the conduction of the voltage stabilizing module is controlled, the voltage output by the voltage stabilizing module after the conduction is supplied to the controller to enable the power supply of the controller to be powered on, the controller outputs the voltage locking signal to lock the power supply of the whole circuit, the controller can realize corresponding logic control, the standby state is needed to be entered after the controller finishes the control operation, when the controller controls the voltage locking signal output end to output a low-level signal, the whole circuit enters the standby state, at the moment, all components in the whole circuit are in a power-off state, the output power consumption of the whole circuit in the standby state is zero, and the power consumption is reduced.
In an embodiment, as shown in fig. 3, the zero power standby wake-up circuit further includes: and the cathode K of the diode D5 is connected with the second end of the third resistor R34, the anode A of the diode D5 is connected with the counting signal detection end KEY of the controller C and is used for counting KEY signals input by the counting signal detection end, and the controller realizes logic control according to the counting signals.
It should be noted that, in this embodiment, the anode of the diode is also connected with a pull-up resistor, which may be a pull-up resistor inside the controller, when the ON/OFF connection of the start signal is at a low level, the diode D5 is turned ON, the KEY signal input from the count signal detection end becomes at a low level, and the controller counts according to the number of low levels. Of course, in other embodiments, the external pull-up resistor may be provided as needed, and the embodiment is not limited in any way.
In an embodiment, the zero power standby wake-up circuit further comprises: the first filtering module is connected in parallel between the input end of the voltage stabilizing module U and the ground GND and is used for filtering out the electric signal interference input into the voltage stabilizing module and stabilizing the input voltage; the second filtering module is connected in parallel between the output end of the voltage stabilizing module U and the ground wire GND and is used for filtering out electric signal interference of the output end of the voltage stabilizing module and stabilizing output voltage.
Specifically, as shown in fig. 3, the first filtering module may be a first filtering capacitor C10, and the filtering circuit is simple; of course, in other embodiments, the first filtering module may also be other filtering circuits in the prior art, such as RLC filtering or RC filtering, and the like, and may be reasonably set according to needs. The second filtering module can be a second filtering capacitor C13 and a third filtering capacitor C14 which are connected in parallel, one filters high-frequency signals, the other filters low-frequency signals, the filtering effect is good, and the filtering circuit is simple; of course, in other embodiments, the second filtering module may also be other filtering circuits in the prior art, such as RLC filtering or RC filtering, and the like, and may be reasonably set according to needs.
In other alternative embodiments, the zero power standby wake-up circuit may only include the first filtering module or the second filtering module, which is not limited in this embodiment, and may be set reasonably according to practical situations.
In an embodiment, the zero power standby wake-up circuit further comprises: and one end of the voltage reducing module is connected with the second end of the first switch, and the other end of the voltage reducing module is connected with the input end of the voltage stabilizing module. Specifically, as shown in fig. 3, the voltage reducing module may be a voltage reducing resistor, where the voltage reducing resistor includes a fourth resistor R7 and a fifth resistor R8 connected in parallel, and one end of the voltage reducing resistor after being connected in parallel is connected to the second end of the first switch Q7, and the other end of the voltage reducing resistor is connected to the input end of the voltage stabilizing module U, so as to reduce the voltage at the second end of the first switch Q7 to be within a range allowed by the input end of the voltage stabilizer.
In an embodiment, as shown in fig. 3, the zero power standby wake-up circuit further includes: a pull-down resistor R47 connected between the control end of the second switch Q9 and the ground GND; the circuit is used for stabilizing the input voltage of the control end of the second switch Q9, realizing effective pull-down when the voltage of the control end is in low potential, ensuring that the second switch is not turned on by mistake and improving the reliability of the whole circuit.
In an embodiment, as shown in fig. 3, the zero power standby wake-up circuit further includes: the current limiting resistor R46 is connected in series between the voltage locking signal output end LOCK_power and the control end of the second switch Q9, and is used for limiting the current value input into the second switch by the controller, preventing the second switch from being damaged due to overcurrent, and protecting the second switch.
In an embodiment, the zero power standby wake-up circuit further comprises: the overcurrent protection module is connected in series between the external power supply P and the first end of the first switch Q7. Specifically, as shown in fig. 3, the overcurrent protection module may be a protection resistor R28, which is connected in series between the external power source P and the first end of the first switch Q7, where the protection resistor R28 is used to fuse when the circuit at the later stage is short-circuited, to protect the circuit at the later stage, and to limit current when the circuit is powered on, so as to inhibit large current generated during the power-on. Of course, in other embodiments, the overcurrent protection module may be implemented by other protection devices in the prior art, such as a FUSE (FUSE), and the like, and may be appropriately set as needed.
In an embodiment, as shown in fig. 3, the zero power standby wake-up circuit further includes: the first end of the sixth resistor R31 is connected with the PWM signal, and the second end of the sixth resistor R31 is connected with the PWM signal input end of the controller C; so that the controller C receives the PWM signal and performs PWM control accordingly according to the received PWM signal.
In an embodiment, the zero power standby wake-up circuit further comprises: and the input end of the voltage acquisition module is connected with the PWM signal, and the output end of the voltage acquisition module is connected with the voltage detection end SPEED of the controller C. Specifically, as shown in fig. 3, the voltage acquisition module includes: a seventh resistor R26 and an eighth resistor R30; the first end of the seventh resistor R26 is connected with the PWM signal, and the second end of the seventh resistor R26 is connected with the voltage detection end seed of the controller C; the first end of the eighth resistor R30 is connected to the second end of the seventh resistor R26, and the second end of the eighth resistor R30 is connected to the ground GND. Of course, in other embodiments, the voltage acquisition module may also adopt other voltage acquisition devices in the prior art, and may be reasonably set according to needs, which is not limited in this embodiment.
In an alternative embodiment, the voltage acquisition module further comprises: the third filtering module is connected in parallel between the second end of the seventh resistor R26 and the ground GND. Specifically, as shown in fig. 3, the third filtering module may be a fourth filtering capacitor C29, and the filtering circuit is simple; of course, in other embodiments, the third filtering module may also be other filtering circuits in the prior art, such as RLC filtering or RC filtering, and the like, and may be reasonably set according to needs.
The zero-power consumption standby wake-up circuit not only can realize zero power consumption and wake-up in a standby state, but also can realize control in various different modes, and the control mode is more flexible and diversified, and the application occasion is wider.
In an embodiment, as shown in fig. 4, the zero power standby wake-up circuit can realize single-KEY control, the standby state Q7 is not conducted, when ON/OFF is connected to GND through a control switch (for example, a touch KEY), Q7 is conducted, the system is electrified, the MCU sets high level to lock_power, the system power is locked, the detection signal KEY, counting the low level of the KEY signal can realize different logic control, and the logic MCU sets high-low level system to power down to enter zero power consumption.
The specific working process is as follows: in the standby state, the first switch Q7 is not conducted, the output voltage of the output VD end of the voltage stabilizing module U is 0V, the power supply of the controller C is 0V, the controller does not work, the controller is in a zero power consumption state, the second switch Q9 is not conducted, and the whole circuit is in the zero power consumption state. The touch button is connected with the ON/OFF end of the interface J3, the touch switch is pressed down, the ON/OFF end is connected to GND, the first switch Q7 is conducted, the output end of the voltage stabilizing module U outputs a voltage value to enable the controller U to be electrified, the output end LOCK_power is set to be high level after the controller is electrified, the second switch Q9 is conducted to pull down the control end voltage of the first switch Q7 to be low level, the control end voltage of the first switch Q7 is locked by the second switch Q9, the system power supply is locked, and the state of the touch switch can be reasonably set according to actual needs. After the touch switch is pressed down, the ON/OFF end is connected to GND, the diode D5 is conducted, the KEY end outputs a low level, after the touch switch is released, the ON/OFF end is connected to a high level, the diode D5 is not conducted, and the KEY end outputs a high level. The circuit can realize different logic control by detecting the signal KEY and counting the low level of the KEY signal, and power is turned off to enter zero power consumption according to the logic MCU to the LOCK_power high-low level system.
In another embodiment, as shown in fig. 5, the zero power standby wake-up circuit can realize double-KEY control, in a standby state, the first switch Q7 is not turned ON, when ON/OFF is connected to GND through a light touch KEY, the first switch Q7 is turned ON, the system is electrified, the MCU sets a high level to lock_power, the system is locked, a signal KEY is detected, counting of low level of the KEY signal can realize different logic control, and the logic MCU powers down the lock_power set high-low level system to enter zero power consumption. The other touch button is input through PWM/VSP, MCU detects PWM, realize logic control. The double-key control is to add a touch key on the basis of the single-key control, the touch key is connected with a PWM/VSP port of the interface J3, PWM waveforms are generated through the touch key, the PWM waveforms can be detected by a PWM detection port of the MCU after the system power is locked, and logic control is realized according to the PWM waveforms, for example, the MCU generates other control output signals according to the PWM waveforms to control working states of other modules.
In another embodiment, as shown in fig. 5, the zero power standby wake-up circuit can also realize single key+pwm control, the standby state, the first switch Q7 is not turned ON, when ON/OFF is connected to GND through a touch KEY, the first switch Q7 is turned ON, the system is electrified, the MCU sets a high level to lock_power, the system is locked, the detection signal KEY is locked, and counting of low levels of KEY signals can realize different logic control. PWM is input through PWM/VSP, MCU detects PWM signal, realizes logic control, and goes into zero consumption to lock_power setting high-low level system power down according to logic MCU. On the basis of the single-key control, a digital signal PWM pulse signal is input to a PWM/VSP port of the interface J3, and the MCU receives the PWM pulse control signal and performs logic control according to the PWM pulse control signal.
In another embodiment, as shown in fig. 6, the zero power standby wake-up circuit can realize PWM control, specifically, in a standby state, the first switch Q7 is not turned ON, an external PWM signal needs to be made into an OC circuit, the ON/OFF port of the interface J3 is accessed, when the system is started, the PWM signal gives a high level for a preset time (for example, about 300 ms), the first switch Q7 is turned ON, the system is electrified, the MCU sets a high level for lock_power, and the system power is locked. MCU detects KEY port state, reads PWM value. Meanwhile, logic control is realized, and the power of the LOCK_power high-low level system is turned off to enter zero power consumption according to the logic MCU.
In another embodiment, as shown in fig. 7, the zero power standby wake-up circuit can realize single key+external analog signal control, specifically, in a standby state, the first switch Q7 is not turned ON, when the ON/OFF port is connected to GND through a light KEY, the first switch Q7 is turned ON, the system is electrified, the MCU sets a high level to lock_power, the system is locked, the detection signal KEY, counting of low level of the KEY signal can realize different logic control, and the logic MCU sets a high-low level system to power down to enter zero power consumption. The MCU detects the SPEED port voltage to realize logic control at the PWM/VSP port of the external analog access interface J3.
The zero-power standby wake-up circuit in the embodiment can realize the wake-up of a system power supply by inputting various signals and realize logic control; the integration level is improved, the reliability is improved, and the system cost is reduced. And in standby mode the whole circuit is in zero power consumption.
The embodiment of the invention also provides an electrical device, which comprises the zero-power standby wake-up circuit according to any one of the above embodiments. The electric equipment adopts the zero-power consumption standby wake-up circuit in the embodiment, so that the power consumption of the zero-power consumption standby wake-up circuit in a standby state is zero, and the power consumption of the electric equipment is reduced.
In an embodiment, the electrical apparatus may be an electric cooker, an oven, a dust collector, an air conditioner, a television, etc., which is only schematically illustrated, but not limited thereto.
Although embodiments of the present invention have been described in connection with the accompanying drawings, various modifications and variations may be made by those skilled in the art without departing from the spirit and scope of the invention, and such modifications and variations are within the scope of the invention as defined by the appended claims.
Claims (6)
1. A zero power standby wake-up circuit, comprising:
a first resistor (R33);
The first end of the first switch (Q7) is connected with an external power supply, and the first resistor (R33) is connected between the first end of the first switch (Q7) and the control end of the first switch (Q7);
a second resistor (R36);
The second resistor (R36) is connected between the first end of the second switch (Q9) and the control end of the first switch (Q7), and the second end of the second switch (Q9) is connected with the ground wire;
the input end of the voltage stabilizing module (U) is connected with the second end of the first switch (Q7);
the first end of the third resistor (R34) is connected with the control end of the first switch (Q7), and the second end of the third resistor (R34) is connected with a starting signal;
The power input end of the controller (C) is connected with the output end of the voltage stabilizing module (U), and the voltage locking signal output end of the controller (C) is connected with the control end of the second switch (Q9);
zero-power standby wake-up circuit, still include:
A diode (D5) having a cathode connected to the second end of the third resistor (R34); the anode is connected with a counting signal detection end of the controller (C);
A sixth resistor (R31), wherein a first end of the sixth resistor (R31) is connected with the PWM signal, and a second end of the sixth resistor (R31) is connected with the PWM signal input end of the controller (C);
The input end of the voltage acquisition module is connected with the PWM signal, and the output end of the voltage acquisition module is connected with the voltage detection end of the controller (C);
the voltage acquisition module includes:
A seventh resistor (R26), wherein a first end of the seventh resistor (R26) is connected with the PWM signal, and a second end of the seventh resistor (R26) is connected with a voltage detection end of the controller (C);
An eighth resistor (R30), wherein a first end of the eighth resistor (R30) is connected with a second end of the seventh resistor (R26), and a second end of the eighth resistor (R30) is connected with a ground line;
the third filtering module is connected in parallel between the second end of the seventh resistor (R26) and the ground wire;
The zero-power standby wake-up circuit can realize control in a plurality of different modes;
the zero power standby wake-up circuit can realize single key control and comprises:
When in a standby state, the first switch (Q7) is not conducted, the output voltage of the output end of the voltage stabilizing module (U) is 0V, the power supply of the controller (C) is 0V, the controller (C) does not work and is in a zero power consumption state, the second switch (Q9) is not conducted, and the whole circuit is in the zero power consumption state; the touch button is connected with the ON/OFF end of the interface J3, the touch button switch is pressed down, the ON/OFF end is connected to GND, the first switch (Q7) is conducted, the output end of the voltage stabilizing module (U) outputs a voltage value to enable the controller (C) to be electrified, the output end of the voltage locking signal is set at a high level after the controller (C) is electrified, the second switch (Q9) is conducted, the control end voltage of the first switch (Q7) is pulled down to a low level, the control end voltage of the first switch (Q7) is locked by the second switch (Q9), and the system power supply is locked; after the light touch key switch is pressed down, the ON/OFF end is connected to GND, the diode (D5) is conducted, the counting signal detection end outputs a low level, after the light touch switch is released, the ON/OFF end is connected to a high level, the diode (D5) is not conducted, and the counting signal detection end outputs a high level;
The zero power standby wake-up circuit can realize double-key control and comprises:
When the switch is in a standby state, the first switch (Q7) is not conducted, when the ON/OFF end is connected to GND through a touch key, the first switch (Q7) is conducted, the system is electrified, the controller (C) sets a high level ON the output end of the voltage locking signal, the system is locked by a power supply, signals of the counting signal detection end are detected, different logic control can be realized ON counting of the low level of the signals of the counting signal detection end, the voltage locking signal output end is set to be high or low level according to the logic controller (C), and the system is powered down to enter zero power consumption; the other touch key is input through a PWM/VSP end, and a controller (C) detects PWM to realize logic control;
the zero power consumption standby wake-up circuit can realize single-key PWM control and comprises the following steps:
When the switch is in a standby state, the first switch (Q7) is not conducted, when the ON/OFF end is connected to GND through a touch key, the first switch (Q7) is conducted, the system is electrified, the controller (C) sets a high level ON the output end of the voltage locking signal, the system is locked by a power supply, and a signal of the counting signal detection end is detected; PWM is input through a PWM/VSP end, a controller (C) detects PWM signals to realize logic control, and a high-low level system arranged at the output end of a voltage locking signal is powered down to enter zero power consumption according to the logic controller (C);
The zero power standby wake-up circuit can realize PWM control, and comprises:
When in a standby state, the first switch (Q7) is not conducted, an external PWM signal is required to be made into an OC circuit, the OC circuit is connected to an ON/OFF port of the interface J3, when the power-ON state is started, the PWM signal gives a high level for a preset time, the first switch (Q7) is conducted, the system is electrified, the controller (C) sets a high level for the output end of the voltage locking signal, and the system power supply is locked; the controller (C) detects the state of the counting signal detection end, reads the PWM value, realizes logic control at the same time, and powers down the high-low level system arranged at the voltage locking signal output end according to the logic controller (C) to enter zero power consumption;
The zero power consumption standby wake-up circuit can realize single-key plus external analog signal control and comprises:
When the switch is in a standby state, the first switch (Q7) is not conducted, when the ON/OFF port is connected to GND through a touch key, the first switch (Q7) is conducted, the system is electrified, the controller (C) sets a high level ON the output end of the voltage locking signal, the system is locked, signals of the counting signal detection end are detected, different logic control can be realized ON counting of the low level of the signals of the counting signal detection end, and the system with high and low levels arranged ON the output end of the voltage locking signal is powered down according to the logic controller (C) to enter zero power consumption; the controller (C) detects the voltage of the voltage detection terminal to realize logic control at the PWM/VSP port of the external analog access interface J3.
2. The zero power standby wake-up circuit of claim 1, further comprising:
the first filtering module is connected in parallel between the input end of the voltage stabilizing module (U) and the ground wire; and/or the number of the groups of groups,
The second filtering module is connected in parallel between the output end of the voltage stabilizing module (U) and the ground wire.
3. The zero power standby wake-up circuit of claim 1, further comprising:
And one end of the voltage reducing module is connected with the second end of the first switch (Q7), and the other end of the voltage reducing module is connected with the input end of the voltage stabilizing module (U).
4. The zero power standby wake-up circuit of claim 1, further comprising:
a pull-down resistor (R47) connected in parallel between the control end of the second switch (Q9) and ground; and/or the number of the groups of groups,
And a current limiting resistor (R46) connected in series between the voltage locking signal output end and the control end of the second switch (Q9).
5. The zero power standby wake-up circuit of claim 1, further comprising:
the overcurrent protection module is connected in series between the external power supply and the first end of the first switch (Q7).
6. An electrical device comprising a zero power standby wake-up circuit as claimed in any one of claims 1 to 5.
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| CN113282159A (en) * | 2021-07-22 | 2021-08-20 | 深圳市视晶无线技术有限公司 | Switch control system for zero current standby of embedded controller |
| CN219322135U (en) * | 2022-12-28 | 2023-07-07 | 深圳市每开创新科技有限公司 | Low-power consumption power supply control circuit and electric equipment |
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| CN209215905U (en) * | 2018-12-28 | 2019-08-06 | 苏州市纽莱克电子科技有限公司 | Zero-power-consumption standby wake-up circuit and electrical equipment |
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| CN204031319U (en) * | 2014-08-06 | 2014-12-17 | Tcl集团股份有限公司 | A kind of TV of zero stand-by power consumption |
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| CN104410891A (en) * | 2014-11-18 | 2015-03-11 | 青岛海信电器股份有限公司 | Electronic equipment |
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| CN206272282U (en) * | 2016-11-30 | 2017-06-20 | 深圳拓邦股份有限公司 | A kind of standby zero power consumption circuit |
| CN209215905U (en) * | 2018-12-28 | 2019-08-06 | 苏州市纽莱克电子科技有限公司 | Zero-power-consumption standby wake-up circuit and electrical equipment |
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