CN109803499B - Method for preparing electronic circuit on substrate - Google Patents
Method for preparing electronic circuit on substrate Download PDFInfo
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- CN109803499B CN109803499B CN201910249688.XA CN201910249688A CN109803499B CN 109803499 B CN109803499 B CN 109803499B CN 201910249688 A CN201910249688 A CN 201910249688A CN 109803499 B CN109803499 B CN 109803499B
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- substrate
- electronic circuit
- base material
- chemical plating
- lds
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- 239000000758 substrate Substances 0.000 title claims abstract description 58
- 238000000034 method Methods 0.000 title claims abstract description 38
- 238000007747 plating Methods 0.000 claims abstract description 61
- 239000000126 substance Substances 0.000 claims abstract description 43
- 239000000463 material Substances 0.000 claims abstract description 31
- 239000000654 additive Substances 0.000 claims abstract description 22
- 230000000996 additive effect Effects 0.000 claims abstract description 22
- 230000008569 process Effects 0.000 claims abstract description 13
- 230000004913 activation Effects 0.000 claims abstract description 8
- 230000003213 activating effect Effects 0.000 claims abstract description 5
- 238000004140 cleaning Methods 0.000 claims description 20
- 238000004519 manufacturing process Methods 0.000 claims description 13
- 239000003365 glass fiber Substances 0.000 claims description 9
- 239000002253 acid Substances 0.000 claims description 5
- 238000007772 electroless plating Methods 0.000 claims description 4
- 238000002360 preparation method Methods 0.000 claims description 4
- 239000011241 protective layer Substances 0.000 claims description 4
- 238000005507 spraying Methods 0.000 claims description 3
- 239000002184 metal Substances 0.000 description 11
- 229910052751 metal Inorganic materials 0.000 description 11
- 239000002923 metal particle Substances 0.000 description 8
- 239000004033 plastic Substances 0.000 description 8
- 238000005554 pickling Methods 0.000 description 5
- 230000009471 action Effects 0.000 description 4
- 239000010949 copper Substances 0.000 description 4
- 150000001875 compounds Chemical class 0.000 description 3
- 239000010410 layer Substances 0.000 description 3
- JPVYNHNXODAKFH-UHFFFAOYSA-N Cu2+ Chemical compound [Cu+2] JPVYNHNXODAKFH-UHFFFAOYSA-N 0.000 description 2
- VEXZGXHMUGYJMC-UHFFFAOYSA-N Hydrochloric acid Chemical compound Cl VEXZGXHMUGYJMC-UHFFFAOYSA-N 0.000 description 2
- QAOWNCQODCNURD-UHFFFAOYSA-N Sulfuric acid Chemical compound OS(O)(=O)=O QAOWNCQODCNURD-UHFFFAOYSA-N 0.000 description 2
- 239000002671 adjuvant Substances 0.000 description 2
- 229910001431 copper ion Inorganic materials 0.000 description 2
- 238000010586 diagram Methods 0.000 description 2
- 230000008439 repair process Effects 0.000 description 2
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical group [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 1
- 229910021578 Iron(III) chloride Inorganic materials 0.000 description 1
- 239000003054 catalyst Substances 0.000 description 1
- 238000000151 deposition Methods 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- RBTARNINKXHZNM-UHFFFAOYSA-K iron trichloride Chemical compound Cl[Fe](Cl)Cl RBTARNINKXHZNM-UHFFFAOYSA-K 0.000 description 1
- 238000003754 machining Methods 0.000 description 1
- 230000008092 positive effect Effects 0.000 description 1
- 229920001169 thermoplastic Polymers 0.000 description 1
- 238000005406 washing Methods 0.000 description 1
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- Manufacturing Of Printed Wiring (AREA)
- Chemically Coating (AREA)
Abstract
The invention discloses a method for preparing an electronic circuit on a substrate, which comprises the following steps: s1, removing part or all of the LDS additive on the surface of the substrate; s2, activating the base material by using an LDS process, wherein the activation area of the base material is a chemical plating area of a preset electronic circuit; and S3, carrying out chemical plating treatment on the base material to obtain the electronic circuit. The method for preparing the electronic circuit can avoid the phenomenon of excessive plating of the prepared small-spacing electronic circuit.
Description
Technical Field
The invention belongs to the technical field of electrochemical machining, and particularly relates to a method for preparing an electronic circuit on a substrate.
Background
In the current electronic products, after a circuit substrate is subjected to LDS (Laser Direct Structuring) process, a chemical plating method is used to deposit a metal plating layer on the surface of the substrate to form a circuit.
In a common chemical plating process, the gap (gap) between each circuit is at least 0.3mm, so that the quality of chemical plating can be ensured, the circuit short circuit caused by excessive plating is avoided, at present, more and more small gaps are required, the conventional LDS and chemical plating method cannot be used for normal production, and the circuit short circuit is often caused when the gap is less than 0.3 mm.
Disclosure of Invention
The technical purpose of the invention is to provide a method for preparing an electronic circuit on a substrate, which can avoid the phenomenon of overflow plating of the prepared electronic circuit with small spacing.
In order to solve the problems, the technical scheme of the invention is as follows:
a method of fabricating an electronic circuit on a substrate, comprising:
removing part or all of the LDS additive from the surface of the substrate;
activating the base material by using an LDS process, wherein the activation area of the base material is a preset chemical plating area of the electronic circuit;
and carrying out chemical plating treatment on the base material to obtain the electronic circuit.
According to an embodiment of the present invention, the removing the LDS additive on the substrate further comprises:
and cleaning the surface of the substrate activated by the LDS process by using a cleaning solution to clean the LDS additive on the surface of the substrate.
According to an implementation of the present invention, the cleaning the substrate surface activated by the LDS process using the cleaning solution further comprises:
and cleaning the surface of the substrate activated by the LDS process by using an acid cleaning solution to clean the LDS additive on the surface of the substrate.
According to an embodiment of the present invention, the plating the substrate to obtain the electronic circuit further includes:
a1, putting the base material into a chemical plating bath for chemical plating;
a2, spraying a protective layer in the circuit preparation area after electroless plating.
In accordance with one embodiment of the present invention, a method for fabricating an electronic circuit on a substrate further comprises: injecting glass fibers into the substrate, the glass fibers running in the same direction as the electronic circuitry.
Due to the adoption of the technical scheme, compared with the prior art, the invention has the following advantages and positive effects:
in the method for preparing the electronic circuit in the embodiment of the invention, part or all of the LDS additive on the surface of the base material is removed, then activation and chemical plating treatment are carried out, and some LDS additive on the surface of the base material is cleaned, so that metal particles are not easy to accumulate on the surface of the base material during chemical plating, the excessive plating condition among the circuits is improved, and the excessive plating phenomenon of the prepared small-distance electronic circuit can be avoided.
Drawings
FIG. 1 is a method of fabricating electronic circuits on a substrate according to example 1 of the present invention;
FIG. 2 is a partial layout at 0.25 mm pitch made using the prior art;
FIG. 3 is a partial circuit diagram of an electronic circuit fabricated using the method of the present invention;
FIG. 4 is a sample of a substrate and its elemental content prior to pickling;
FIG. 5 is a sample of the substrate after pickling and its elemental content;
FIG. 6 is a partial circuit diagram of a prior art fabrication at a 0.15mm pitch;
FIG. 7 is a partial layout at 0.15mm pitch made using the method of the present invention;
fig. 8 is a method of fabricating electronic circuitry on a substrate in accordance with example 2 of the present invention.
Description of reference numerals:
1: a substrate; 2: an electronic circuit; 3: and an overflow plating area.
Detailed Description
The present invention provides a method for fabricating electronic circuits on a substrate, which is described in further detail below with reference to the accompanying drawings and specific examples. Advantages and features of the present invention will become apparent from the following description and from the claims.
Example 1
Referring to fig. 1, a method of fabricating an electronic circuit 2 on a substrate 1 comprises:
s1, removing part or all of the LDS additive on the surface of the substrate 1;
s2, activating the substrate 1 by using an LDS process, wherein the activation area of the substrate 1 is a preset chemical plating area of the electronic circuit 2;
and S3, performing chemical plating treatment on the substrate 1 to obtain the electronic circuit 2. The structure of the product prepared in this step is shown in fig. 2.
The substrate 1 in this embodiment may be a plastic material containing a metal element, the metal element is usually present in the form of a compound (LDS additive), the plastic material containing the metal element generates metal particles embedded in the plastic material under the action of the high-energy laser, and the metal particles are used as a basis for chemical plating, and a metal plating layer is generated in a laser-irradiated area (a predetermined chemical plating area of the electronic circuit 2) to form the electronic circuit 2.
In the method for preparing the electronic circuit 2 in the embodiment of the invention, part or all of the LDS additive on the surface of the base material 1 is removed, then activation and chemical plating treatment are carried out, and some LDS additive on the surface of the base material 1 is cleaned, so that metal particles are not easy to accumulate on the surface of the base material 1 during chemical plating, the overflow plating condition between circuits is improved, and the overflow plating phenomenon of the prepared small-distance electronic circuit 2 can be avoided.
In the LDS process, a laser beam exposes the LDS plastic adjuvant, thereby depositing it on the surface of the thermoplastic polymer and releasing the metal core from the LDS plastic adjuvant. So that the irradiated areas are metallized and there is a build-up of metal, the unexposed areas being left intact. Specifically, under the action of laser, divalent copper ions in the compound are changed into copper atoms under the action of laser, so that a chemical plating line is formed on the basis of the divalent copper ions in the chemical plating process.
Further, removing the LDS additive on the substrate 1 further comprises:
and cleaning the surface of the substrate 1 by using a cleaning solution to clean the LDS additive on the surface of the substrate 1.
Specifically, the cleaning the surface of the substrate 1 activated by the LDS process by using the cleaning solution further comprises: and cleaning the surface of the substrate 1 by using an acid cleaning solution to clean the LDS additive on the surface of the substrate 1. Specifically, 5-20% sulfuric acid or hydrochloric acid solution can be used.
Further, the step of subjecting the substrate 1 to chemical plating to obtain the electronic circuit 2 further includes:
a1, putting the base material 1 into a chemical plating bath for chemical plating; the chemical plating bath generally contains ferric chloride solution with pH value of about 12, and also contains some catalyst and complex. After the chemical plating in the chemical plating bath, cleaning and baking are carried out.
And A2, spraying a protective layer on the circuit preparation area after electroless plating. The protective layer is mainly sprayed and solidified on the surface of the product to form a closed area, so that the substrate 1 with metal particles is prevented from directly contacting with the chemical plating solution, and the possibility of overflow plating is reduced.
The small distance in this embodiment may refer to a case where a gap (gap) between each line is smaller than 0.3mm, and for a demand of more and more small gaps, referring to fig. 3, the current LDS and chemical plating method cannot be used for normal production, and for a case where the gap is smaller than 0.3mm, an excessive plating area 3 may exist, and a case of line short circuit often occurs. The method provided by the embodiment can avoid the situation of short circuit of the line. It should be noted that the method in this embodiment is also applicable to the case where the gap is larger than 0.3 mm.
To verify the feasibility of this method, the Cu elements before and after pickling were compared, and the bright areas in fig. 4 and 5 represent the Cu elements, and the Cu element content on the surface of the substrate sample before pickling (fig. 4) was significantly higher than the Cu element content after pickling (fig. 5), with a decrease of about 50%. FIGS. 4 and 5 are obtained under a scanning electron microscope at 10000 times magnification. In order to compare the chemical treatment effects of the materials, samples with the gaps of 0.15mm in the chemical plating line are used for chemical plating, and one method is to use the samples without acid washing, obtain gaps with different widths, generate the condition of excessive plating, need manual repair and cannot realize mass production, as shown in fig. 6; the other is the sample after acid cleaning (fig. 7), the gap is kept the same, the line boundary is clear, and the manual repair is not needed after chemical plating, so that the requirement of mass production is met.
Example 2
Referring to fig. 8, a method of fabricating an electronic circuit 2 on a substrate 1, comprises:
b1, injecting glass fibers into the base material 1, wherein the direction of the glass fibers is consistent with the direction of the preset electronic circuit 2;
b2, removing part or all of the LDS additive on the surface of the substrate 1;
b3, activating the substrate 1 by using an LDS process, wherein the activation area of the substrate 1 is a preset chemical plating area of the electronic circuit 2;
and B4, performing chemical plating treatment on the substrate 1 to obtain the electronic circuit 2. The structure of the product prepared in this step is shown in fig. 2.
The substrate 1 in this embodiment may be a plastic material containing a metal element, the metal element is usually present in the form of a compound (LDS additive), the plastic material containing the metal element generates metal particles embedded in the plastic material under the action of the high-energy laser, and the metal particles are used as a basis for chemical plating, and a metal plating layer is generated in a laser-irradiated area (a predetermined chemical plating area of the electronic circuit 2) to form the electronic circuit 2.
In the method for preparing the electronic circuit 2 in the embodiment of the invention, part or all of the LDS additive on the surface of the base material 1 is removed, then activation and chemical plating treatment are carried out, and some LDS additive on the surface of the base material 1 is cleaned, so that metal particles are not easy to accumulate on the surface of the base material 1 during chemical plating, the overflow plating condition between circuits is improved, and the overflow plating phenomenon of the prepared small-distance electronic circuit 2 can be avoided.
In addition, glass fibers are arranged in the circuit preparation area of the substrate 1, and the arrangement direction of the glass fibers is the same as the direction of the preset electronic circuit 2. The arrangement direction of the glass fiber is the same as the direction of the preset electronic circuit 2, so that the phenomenon of overflow plating can be further reduced.
The small distance in this embodiment may refer to a case where a gap (gap) between each line is smaller than 0.3mm, and for a demand of more and more small gaps, referring to fig. 3, the current LDS and chemical plating method cannot be used for normal production, and for a case where the gap is smaller than 0.3mm, an excessive plating area 3 may exist, and a case of line short circuit often occurs. The method provided by the embodiment can avoid the situation of short circuit of the line. It should be noted that the method in this embodiment is also applicable to the case where the gap is larger than 0.3 mm.
The embodiments of the present invention have been described in detail with reference to the accompanying drawings, but the present invention is not limited to the above embodiments. Even if various changes are made to the present invention, it is still within the scope of the present invention if they fall within the scope of the claims of the present invention and their equivalents.
Claims (4)
1. A method of fabricating an electronic circuit on a substrate, comprising:
removing part or all of the LDS additive from the surface of the substrate;
activating the base material by using an LDS process, wherein the activation area of the base material is a preset chemical plating area of the electronic circuit;
carrying out chemical plating treatment on the base material to obtain the electronic circuit; wherein,
injecting glass fibers into the substrate, the glass fibers running in the same direction as the electronic circuitry.
2. The method of fabricating an electronic circuit on a substrate of claim 1, wherein said removing the LDS additive on the substrate further comprises:
and cleaning the surface of the substrate by using a cleaning solution to clean the LDS additive on the surface of the substrate.
3. The method for fabricating electronic circuits on a substrate of claim 2 wherein said cleaning said substrate surface with a cleaning solution further comprises:
and cleaning the surface of the base material by using an acid cleaning solution to clean the LDS additive on the surface of the base material.
4. The method of preparing an electronic circuit on a substrate according to claim 2 or 3, wherein the subjecting the substrate to electroless plating to obtain the electronic circuit further comprises:
a1, putting the base material into a chemical plating bath for chemical plating;
a2, spraying a protective layer in the circuit preparation area after electroless plating.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201910249688.XA CN109803499B (en) | 2019-03-29 | 2019-03-29 | Method for preparing electronic circuit on substrate |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201910249688.XA CN109803499B (en) | 2019-03-29 | 2019-03-29 | Method for preparing electronic circuit on substrate |
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| Publication Number | Publication Date |
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| CN109803499A CN109803499A (en) | 2019-05-24 |
| CN109803499B true CN109803499B (en) | 2021-10-22 |
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| CN201910249688.XA Active CN109803499B (en) | 2019-03-29 | 2019-03-29 | Method for preparing electronic circuit on substrate |
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Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1680621A (en) * | 2004-04-08 | 2005-10-12 | 恩通公司 | Method for treating laser-structured plastic surfaces |
| CN103889153A (en) * | 2014-03-18 | 2014-06-25 | 马瑞利汽车零部件(芜湖)有限公司 | Method for achieving functions of automobile lamp electronic circuit board through MID technology |
| CN107820363A (en) * | 2017-11-27 | 2018-03-20 | 上海安费诺永亿通讯电子有限公司 | Circuit structure preparation method and circuit structure |
Family Cites Families (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| TW201249275A (en) * | 2011-05-16 | 2012-12-01 | Jieng Tai Internat Electric Corp | Method for forming component-mounting device with antenna |
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- 2019-03-29 CN CN201910249688.XA patent/CN109803499B/en active Active
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1680621A (en) * | 2004-04-08 | 2005-10-12 | 恩通公司 | Method for treating laser-structured plastic surfaces |
| CN103889153A (en) * | 2014-03-18 | 2014-06-25 | 马瑞利汽车零部件(芜湖)有限公司 | Method for achieving functions of automobile lamp electronic circuit board through MID technology |
| CN107820363A (en) * | 2017-11-27 | 2018-03-20 | 上海安费诺永亿通讯电子有限公司 | Circuit structure preparation method and circuit structure |
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| CN109803499A (en) | 2019-05-24 |
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