CN109803482A - Multilayer board and the method for making multilayer board - Google Patents
Multilayer board and the method for making multilayer board Download PDFInfo
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- CN109803482A CN109803482A CN201711141923.9A CN201711141923A CN109803482A CN 109803482 A CN109803482 A CN 109803482A CN 201711141923 A CN201711141923 A CN 201711141923A CN 109803482 A CN109803482 A CN 109803482A
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- layer
- reference voltage
- external circuit
- circuit layer
- multilayer board
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Abstract
It includes the first external circuit layer, the second external circuit layer, the first reference voltage layer, the second reference voltage layer and high loss dielectric layer that the present invention, which discloses a kind of multilayer board,.First reference voltage layer is set between the first external circuit layer and the second external circuit layer.First reference voltage layer is to provide the first reference voltage.Second reference voltage layer is set between the first reference voltage layer and the second external circuit layer.Second reference voltage layer is to provide the second reference voltage.Height loss dielectric layer is adjacent between the first reference voltage layer and the second reference voltage layer, to the noise for inhibiting to generate between the first reference voltage layer and the second reference voltage layer.First reference voltage is different with the second reference voltage.
Description
Technical field
The invention relates to a kind of multilayer boards, are that a kind of can reduce signal and be distorted more specifically
Multilayer board.
Background technique
In the prior art, in multilayer board often can comprising be used to provide circuit voltage bus plane and
The ground plane for referring to ground voltage is provided.In general, providing stable voltage for convenience, bus plane and ground plane can be designed
At the flat layer with larger area.However in this way, bus plane, ground plane and dielectric layer therebetween can be considered
Capacity plate antenna causes the methd of power supply random signal being present between bus plane and ground plane that can often transmit via dielectric layer, and by noise quilt
It is coupled to elsewhere.It is wherein affected again with what high-frequency signals were subject to, and often results in signal distortion, cause quality serious
Decline.
For example, it is often connected between different layers plate (layer) using connection column (via) in multilayer board
Conducting wire, due to connection column can through the different circuit layers in multilayer board, if connection column run through electricity
Active layer and ground plane, then methd of power supply random signal present in the flat layer between bus plane and ground plane is just likely to the company of being transferred to
Through post, so that the high-frequency signals transmitted on connection column are affected and are distorted.
Summary of the invention
One embodiment of the invention provides a kind of multilayer board, and multilayer board includes the first external circuit
Layer, the second external circuit layer, the first reference voltage layer, the second reference voltage layer and high loss dielectric layer.
First reference voltage layer is set between the first external circuit layer and the second external circuit layer.First reference voltage layer provides
First reference voltage.Second reference voltage layer is set between the first reference voltage layer and the second external circuit layer.Second with reference to electricity
Pressurized layer provides the second reference voltage.Height loss dielectric layer is adjacent between the first reference voltage layer and the second reference voltage layer, high
Loss dielectric layer inhibits the noise generated between the first reference voltage layer and the second reference voltage layer.First reference voltage and second
Reference voltage is different.
Another embodiment of the present invention provides a kind of method for making multilayer board, and method includes outside setting first
The first reference voltage layer is arranged in circuit layer, and the second reference voltage layer is arranged, and the second external circuit of high loss dielectric layer and setting is arranged
Layer.
First reference voltage layer provides the first reference voltage.Second reference voltage layer provides the second reference voltage.Height loss
Dielectric layer is to be adjacent to the first reference voltage layer and the second reference voltage layer.First reference voltage layer, high loss dielectric layer and the
Two reference voltage layers are set between the first external circuit layer and the second external circuit layer.
In addition, high loss dielectric layer inhibits the noise generated between the first reference voltage layer and the second reference voltage layer, and
First reference voltage is different with the second reference voltage.
Detailed description of the invention
Fig. 1 is the schematic diagram of the multilayer board of one embodiment of the invention.
Fig. 2 is the method flow diagram for making the multilayer board of Fig. 1.
Symbol description:
100 multilayer boards
110 first external circuit layers
120 second external circuit layers
130 first reference voltage layers
140 second reference voltage layers
150 high loss dielectric layers
160, circuit layer in 162
170,172,174,176 dielectric layer
180 connection columns
200 methods
S210 is to S250 step
S210 is to S250 step
Specific embodiment
Fig. 1 is the schematic diagram of the multilayer board 100 of one embodiment of the invention.Multilayer board 100 includes
First external circuit layer 110, the second external circuit layer 120, the first reference voltage layer 130, the second reference voltage layer 140 and high loss are situated between
Electric layer 150.
First reference voltage layer 130 is set between the first external circuit layer 110 and the second external circuit layer 120, the first reference
Voltage layer 130 can provide the first reference voltage.Second reference voltage layer 140 is set to outside the first reference voltage layer 130 and second
Between circuit layer 120, the second reference voltage layer 140 can provide the second reference voltage.In section Example of the invention, first
Reference voltage layer 130 and the second reference voltage layer 140 can have biggish conductive plane structure, to facilitate needed for providing circuit
Burning voltage.
In addition, the first reference voltage and the second reference voltage are two different voltages.For example, the first reference voltage
Required operating voltage when can work for circuit, and the second reference voltage can be then the reference ground voltage in circuit.In this feelings
Under condition, the first reference voltage layer 130 may be, for example, bus plane, and the second reference voltage layer 140 can be then ground connection reference layer.However
The present invention do not limit the first reference voltage layer 130 be bus plane and the second reference voltage layer 140 be ground connection reference layer, at other
Embodiment in, the first reference voltage layer 130 also can for ground connection reference layer, and the second reference voltage layer 140 be bus plane.
In addition, operating voltage needed for circuit may in multilayer board 100 in section Example of the invention
Not only one group, in the case, the first reference voltage layer 130 and the second reference voltage layer 140 also can be to provide different work electricity
Two bus planes of pressure.
It also may include interior circuit layer 160 and 162 in multilayer board 100, interior circuit layer 160 is set to first
Between external circuit layer 110 and the first reference voltage layer 130, and interior circuit layer 162 is then set to the second external circuit layer 120 and second
Between reference voltage layer 140.In addition, multilayer board 100 is also comprising abutting against interior circuit layer 160 and the first external circuit layer
Dielectric layer 170 between 110 abuts against dielectric layer 172 between interior circuit layer 160 and the first reference voltage layer 130, abuts against
Dielectric layer 174 between second reference voltage layer 140 and interior circuit layer 162 and abut against interior circuit layer 162 and the second external circuit
Dielectric layer 176 between layer 120.
In addition, multilayer board 100 also may include connection column 180.Connection column 180 is passed through from the first external circuit layer 110
It wears to the second external circuit layer 120, and the route of the first external circuit layer 110 and the route of interior circuit layer 162 can be coupled to.Namely
Say, connection column 180 can between the first external circuit layer 110 and interior circuit layer 162 transmitting signals.Since connection column 180 can pass through
First reference voltage layer 130 and the second reference voltage layer 140, therefore the signal that transmits may be subjected to the in connection column 180
Methd of power supply random signal between one reference voltage layer 130 and the second reference voltage layer 140 influences, and causes to be distorted.
In order to avoid the methd of power supply random signal between the first reference voltage layer 130 and the second reference voltage layer 140 via the two it
Between dielectric layer be transferred to connection column 180 or multilayer board 100 in other signal paths, multilayer board
100 can be arranged high loss dielectric layer 150 between the first reference voltage layer 130 and the second reference voltage layer 140.
Height loss dielectric layer 150 is adjacent between the first reference voltage layer 130 and the second reference voltage layer 140, due to it
Characteristic with height loss, therefore can be lost and be transmitted to signal therein, and then reduce by the first reference voltage layer 130 and second
Generated noise enters signal path via connection column 180 and signal quality is caused to decline between reference voltage layer 140.
Dielectric layer 150 is lost compared to height, due to dielectric layer 170,172,174 and 176 can with transmit the of general signal
One external circuit layer 110, the second external circuit layer 120 and interior circuit layer 160 and 162 are adjacent, therefore to avoid transmission signal from being damaged
Consumption, dielectric layer 170,172,174 and 176 have the material of high loss characteristic less suitable for selection, and still can be to have general damage
The dielectric material of consumption characteristic carrys out implementation.
In section Example of the invention, correspond to higher frequency, the fissipation factor of height loss dielectric layer 150
(dissipation factor) can substantially be greater than 100 times of the fissipation factor of the dielectric layer with general loss characteristic.Example
Such as also correspond to 10G hertz of frequency, the fissipation factor of height loss dielectric layer 150 may be, for example, 3, and dielectric layer 170,172,
174 and 176 fissipation factor is then, for example, 0.03.However the present invention is not limited thereto, in other embodiments of the invention,
The material with the more lossy factor also may be selected in height loss dielectric layer 150, and the ability for making it that signal be lost is stronger, with further
Reinforce inhibiting the effect of noise.Furthermore the dielectric constant of height loss dielectric layer 150 and dielectric layer 170,172,174 and 176
(dielectric constant, Dk) can be between similar range, for example, 3.5 to 4.5.
In addition, in Fig. 1, although multilayer board 100 includes the first reference voltage layer 130 and the second reference voltage
Layer 140, however the present invention is not limited thereto.In other embodiments of the invention, multilayer board 100 is also possible to wrap
Containing other reference voltage layers, and dielectric layer can also be lost using height between adjacent arbitrary two reference voltage layers
It is obstructed, to inhibit generated noise between two reference voltage layers.
Fig. 2 is the flow chart of the method 200 of the production multilayer board 100 of one embodiment of the invention.Method 200 is wrapped
S210 containing step to S250, but it is not limited to sequence shown in Fig. 2.
S210: the first external circuit layer 110 of setting；
S220: the first reference voltage layer 130 of setting；
S230: the second reference voltage layer 140 of setting；
S240: the high loss dielectric layer 150 of setting；
S250: the second external circuit layer 120 of setting.
In section Example of the invention, dielectric layer 170 may be, for example, the solidification inner plating made by glass or resin,
And in step S210, method 200 for example can be plated conductive material, such as copper foil in the side of dielectric layer 170, and be lost with light shield
The mode at quarter is come route needed for forming the first external circuit layer 110.According to similar mode, method 200 can also be in dielectric layer 170
The other side equally plate conductive material and form the route of interior circuit layer 160 with light shield etching.
Similarly, high loss dielectric layer 150 also can be cured inner plating, and in step S220 and step S230, side
Method 200 through setting copper foil and can be subject to the mode of etching forming the first reference voltage layer 130 and the second reference voltage is arranged
Layer 140.In the case, step S240 may also be completed in advance compared with step S220 and S230.Then, method 200 is also available
The dielectric layer 172 of semi-solid preparation engages interior circuit layer 160 and the first reference voltage layer 130.
However it is cured inner plating that the present invention, which does not limit high loss dielectric layer 150, in section Example of the invention
In, multilayer board 100 may include the circuit layer of other quantity, and the first reference voltage layer 130 and the second reference electricity
Pressurized layer 140 may also be respectively arranged at different solidification inner plating, in the case, then using the high loss dielectric of semi-solid preparation
Layer 150 engages the first reference voltage layer 130 and the second reference voltage layer 140.As long as that is, first with reference to electricity
It is to be separated with the dielectric layer with high loss characteristic between pressurized layer 130 and the second reference voltage layer 140, it will be able to reach
The effect of inhibiting noise.
Through above-mentioned mode, method 200 can further be arranged the second external circuit layer 120, interior circuit layer 162 and be situated between
Electric layer 174 and 176, and each layer circuit after setting completed, setting connection column 180.Due in the first reference voltage layer 130 and
High loss dielectric layer 150 between two reference voltage layers 140 can be by the first reference voltage layer 130 and the second reference voltage layer
The noise generated between 140 is lost, therefore can reduce other signals in the multilayer board that noise is coupled to
Route promotes the transmission quality of high-frequency signals.
In conclusion the method for multilayer board and production multilayer board of the invention can be neighbouring
High loss dielectric layer is set between two reference voltage layers, therefore is able to suppress generated miscellaneous between two reference voltage layers
News, and then promote the transmission quality of high-frequency signals.
The foregoing is merely presently preferred embodiments of the present invention, all equivalent changes done according to scope of the present invention patent with
Modification, should all belong to the covering scope of claims of the present invention.
Claims (10)
1. a kind of multilayer board, characterized by comprising:
One first external circuit layer；
One second external circuit layer；
One first reference voltage layer is set between the first external circuit layer and the second external circuit layer, to provide one first
Reference voltage；
One second reference voltage layer is set between the first reference voltage layer and the second external circuit layer, to provide one
Two reference voltages；And
One high loss dielectric layer, is adjacent between the first reference voltage layer and the second reference voltage layer, to inhibit this
The noise generated between one reference voltage layer and the second reference voltage layer；
Wherein first reference voltage is different with second reference voltage.
2. multilayer board as described in claim 1, which is characterized in that additionally comprise:
Circuit layer in one is set between the second reference voltage layer and the second external circuit layer；And
One dielectric layer is adjacent between the second reference voltage layer and the interior circuit layer.
3. multilayer board as claimed in claim 2, which is characterized in that wherein correspond to a higher frequency, high damage
One fissipation factor of consumption dielectric layer is substantially about 100 times of a fissipation factor of the dielectric layer.
4. multilayer board as claimed in claim 2, which is characterized in that additionally comprise:
One connection column, is through to the second external circuit layer from the first external circuit layer, is coupled to a line of the first external circuit layer
One route of road and the interior circuit layer.
5. multilayer board as described in claim 1, which is characterized in that wherein first reference voltage is for a job
Voltage, second reference voltage are for one with reference to ground voltage.
6. a kind of method for making multilayer board, characterized by comprising:
One first external circuit layer is set；
One first reference voltage layer is set, to provide one first reference voltage；
One second reference voltage layer is set, to provide one second reference voltage；
The high loss dielectric layer of setting one, wherein height loss dielectric layer is to be adjacent to the first reference voltage layer and second reference
Voltage layer；And
One second external circuit layer is set, wherein the first reference voltage layer, height loss dielectric layer and the second reference voltage layer
It is to be set between the first external circuit layer and the second external circuit layer；
Wherein:
Height loss dielectric layer is the noise to inhibit to generate between the first reference voltage layer and the second reference voltage layer；
And
Wherein first reference voltage is different with second reference voltage.
7. the method for production multilayer board as claimed in claim 6, which is characterized in that additionally comprise:
The circuit layer in setting one between the second reference voltage layer and the second external circuit layer；And
One dielectric layer is set, and wherein the dielectric layer is adjacent between the second reference voltage layer and the interior circuit layer.
8. the method for production multilayer board as claimed in claim 7, which is characterized in that it is high again and again wherein to correspond to one
Rate, a fissipation factor of height loss dielectric layer are substantially about 100 times of a fissipation factor of the dielectric layer.
9. the method for production multilayer board as claimed in claim 7, which is characterized in that additionally comprise:
One connection column of setting make the connection column be through to the second external circuit layer from the first external circuit layer, and be coupled to this
One route of one external circuit layer and a route of the interior circuit layer.
10. the method for production multilayer board as claimed in claim 6, which is characterized in that wherein the first reference electricity
Pressure is for an operating voltage, which is for one with reference to ground voltage.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201711141923.9A CN109803482A (en) | 2017-11-17 | 2017-11-17 | Multilayer board and the method for making multilayer board |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201711141923.9A CN109803482A (en) | 2017-11-17 | 2017-11-17 | Multilayer board and the method for making multilayer board |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN109803482A true CN109803482A (en) | 2019-05-24 |
Family
ID=66554712
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201711141923.9A Withdrawn CN109803482A (en) | 2017-11-17 | 2017-11-17 | Multilayer board and the method for making multilayer board |
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| Country | Link |
|---|---|
| CN (1) | CN109803482A (en) |
Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1284835A (en) * | 1999-08-13 | 2001-02-21 | 日本电气株式会社 | Multi-layer printed circuit board |
| WO2004110120A1 (en) * | 2003-06-09 | 2004-12-16 | Fujitsu Limited | Printed board and printed board unit |
| CN1642384A (en) * | 2004-01-09 | 2005-07-20 | 顺德市顺达电脑厂有限公司 | Noise-suppressed dielectric structure and its manufacturing method |
| CN101594741A (en) * | 2008-05-29 | 2009-12-02 | 株式会社东芝 | The printed circuit board (PCB) that assembly embeds is made its method, and the electronic equipment that comprises it |
| CN104717827A (en) * | 2013-12-11 | 2015-06-17 | 鸿富锦精密工业(武汉)有限公司 | Printed circuit board |
-
2017
- 2017-11-17 CN CN201711141923.9A patent/CN109803482A/en not_active Withdrawn
Patent Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1284835A (en) * | 1999-08-13 | 2001-02-21 | 日本电气株式会社 | Multi-layer printed circuit board |
| WO2004110120A1 (en) * | 2003-06-09 | 2004-12-16 | Fujitsu Limited | Printed board and printed board unit |
| CN1642384A (en) * | 2004-01-09 | 2005-07-20 | 顺德市顺达电脑厂有限公司 | Noise-suppressed dielectric structure and its manufacturing method |
| CN101594741A (en) * | 2008-05-29 | 2009-12-02 | 株式会社东芝 | The printed circuit board (PCB) that assembly embeds is made its method, and the electronic equipment that comprises it |
| CN104717827A (en) * | 2013-12-11 | 2015-06-17 | 鸿富锦精密工业(武汉)有限公司 | Printed circuit board |
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Application publication date: 20190524 |