CN109801663A - Shift-register circuit, circuit board, infrared touch frame and infrared touch device - Google Patents

Shift-register circuit, circuit board, infrared touch frame and infrared touch device Download PDF

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Publication number
CN109801663A
CN109801663A CN201910030949.9A CN201910030949A CN109801663A CN 109801663 A CN109801663 A CN 109801663A CN 201910030949 A CN201910030949 A CN 201910030949A CN 109801663 A CN109801663 A CN 109801663A
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CN
China
Prior art keywords
data
shift
circuit
clock signal
clock
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Pending
Application number
CN201910030949.9A
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Chinese (zh)
Inventor
刘军刚
方展航
吴称列
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Guangzhou Hua Xin Electronic Science And Technology Co Ltd
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Guangzhou Hua Xin Electronic Science And Technology Co Ltd
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Priority to CN201910030949.9A priority Critical patent/CN109801663A/en
Publication of CN109801663A publication Critical patent/CN109801663A/en
Pending legal-status Critical Current

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Abstract

The invention discloses a kind of shift-register circuits, end is provided, for the data-signal offer end of outputting data signals and multiple shift register cells connected in cascaded fashion including the clock signal for exporting clock signal, wherein, the data signal input of the shift register cell of the data signal output and next stage of the shift register cell of upper level connects, and data-signal provides end and connect with the data signal input of first order shift register cell;The clock signal input terminal of multiple shift register cells is sequentially connected by cascade sequencing, and clock signal provides end and connect with the clock signal input terminal of afterbody shift register cell.The invention also discloses a kind of circuit board, a kind of infrared touch frame frame and a kind of infrared touch devices, include above-mentioned shift-register circuit.Shift-register circuit disclosed by the invention, it is ensured that data normally export, and reduce data malfunction, reduce the insertion quantity of clock buffer.

Description

Shift-register circuit, circuit board, infrared touch frame and infrared touch device
Technical field
The present invention relates to integrated circuit fields more particularly to a kind of shift-register circuit, circuit board, infrared touch frame and Infrared touch device.
Background technique
With the continuous development of integrated circuit technique, the function that Fundamental Digital Circuit is realized constantly enhances, in chip The requirement of clock system becomes very stringent, because all timing calculating is all on the basis of constant clock signal.For Most of digital integrated electronic circuits, clock signal from the direction of transfer of data-signal provide, next clock significant level or Before person's signal edge arrives, switches and keep stablizing in its correct logic level, so that data-signal can be correct Output makes the behavior of entire circuit system in accordance with default.In the infrared touch frame frame circuit with long clock cabling, such as scheme 1 show shift register portion circuit diagram, and ideally when the clock that experience does not postpone, clock signal is in each displacement Transmitting in register does not postpone, and it is not in malfunction that data, which normally export,.But in practical applications, because of touching box size Larger, shift register quantity is larger, and transmission range is larger, and clock cabling is longer, and clock driving load is increasingly heavier, under making The clock signal of one shift register is slower than previous, clock delay phenomenon occurs, as shown in Fig. 2, clock delay can be generated Td.Meanwhile because there is clock delay phenomenon, the output of data also changes accordingly, when input data is from data receiver side Shift register read in when, the data-out logic of the shift register of data transmission equipment side has changed.In this case, Circuit data malfunctions.So in the infrared touch frame frame circuit with long clock cabling, it can be due to clock delay There is data malfunction, therefore the normal output of data can be guaranteed by reducing clock delay.
Under normal circumstances, the time that a homologous clock reaches the clock end of two adjacent shift registers of sequence has The reason of being postponed, causing this phenomenon has:
1. because of the device parameters of circuit itself, line parameter, for example (,) line resistance, dielectric constant, via resistance, line capacitance Difference.
2. from clock source to the difference of register wire length.
Both reasons can all cause clock to deform because of the continuous exacerbation of load, clock delay phenomenon be caused, to make It is malfunctioned at data, influences the correct output of data.And since the device parameters difference of circuit itself can not be eradicated, therefore shifting In the long clock cabling of register cascade circuit, clock delay phenomenon is always existed, and more next with the growth of clock cabling It is more obvious.
The mode for reducing clock delay at this stage mainly increases multiple clock buffers in the long clock cabling of digital circuit Device buffer circuit.As shown in figure 3, clock buffer buffer circuit includes multiple clock buffer chips and phase inverter, make With being the driving capability for reinforcing clock, to guarantee that the clock end clock delay of each shift register is identical as far as possible, guarantee clock Synchronous transfer.Though such method can reduce clock delay to a certain degree, guarantee the normal output of data, for actually answering For circuit in, it is desirable that circuit power consumption is excessively high, and wiring is complicated, and increases the hardware cost of circuit.
Summary of the invention
In view of the above-mentioned problems, the purpose of the present invention is to provide it is a kind of reduction data malfunction shift-register circuit, Circuit board, infrared touch frame and infrared touch device.
To achieve the goals above, the embodiment of the present invention one provides a kind of shift-register circuit comprising:
Clock signal for exporting clock signal provides end, provides end and more for the data-signals of outputting data signals A shift register cell.
Multiple shift register cells connect in cascaded fashion, and all have clock signal input terminal, data-signal Input terminal and data signal output;
Wherein, the displacement of the data signal output and next stage of the shift register cell of upper level The data signal input of register cell connects, and the data-signal provides the shift register at end and the first order The data signal input of unit connects;
The clock signal input terminal of multiple shift register cells, is sequentially connected by cascade sequencing; The clock signal input terminal that the clock signal provides the shift register cell of end and afterbody connects.
As an improvement of the above scheme, the shift register cell is d type flip flop.
Second embodiment of the present invention provides a kind of circuit boards, are equipped with shift-register circuit as described above.
The embodiment of the present invention three provides a kind of infrared touch frame comprising multiple circuit boards as described above.
The embodiment of the present invention four provides a kind of infrared touch device comprising infrared touch frame as described above.
Compared with the prior art, technical solution provided by the present invention lays particular emphasis on the adjacent block in digital circuit, because In Fundamental Digital Circuit, the time that a homologous clock reaches the clock end of two adjacent shift registers of sequence can be Delay, this phenomenon are permanently present and are not easy to eliminate, cause data to malfunction because clock is asynchronous, be unfavorable for data Normal output.
Shift-register circuit, circuit board, infrared touch frame and infrared touch device provided by the invention, lay particular emphasis on circuit In adjacent block, by by clock signal from contrast to data-signal direction supply, guarantee previous piece of circuit board in shift Register clock arrival time than in latter piece of circuit board shift register it is early, and since clock signal is transmitted from back to front, Subsequent clock signal can data-signal arrival before just all arrive at so that the shift register in circuit when Along the significant level that hits that can be stable, the data in circuit, which export, would not generate malfunction, the driving energy of circuit for clock triggering Power also can opposite enhancing.Compared with the prior art, the embodiment of the present invention is without increasing these electricity of clock buffer buffer circuit Road hardware reduces the complexity of circuit, significantly reduce infrared touch device interlock circuit operation power consumption and hardware at This.
Detailed description of the invention
In order to illustrate more clearly of technical solution of the present invention, attached drawing needed in embodiment will be made below Simply introduce, it should be apparent that, the accompanying drawings in the following description is only some embodiments of the present invention, general for this field For logical technical staff, without creative efforts, it is also possible to obtain other drawings based on these drawings.
Fig. 1 is the electrical block diagram of shift-register circuit in the prior art;
Fig. 2 is the clock output figure of shift register in the prior art;
Fig. 3 is the electrical block diagram for increasing the shift register of buffer in the prior art;
Fig. 4 is a kind of electrical block diagram of shift-register circuit provided in an embodiment of the present invention;
Fig. 5 is a kind of timing diagram of shift-register circuit provided in an embodiment of the present invention.
Specific embodiment
Following will be combined with the drawings in the embodiments of the present invention, and technical solution in the embodiment of the present invention carries out clear, complete Site preparation description, it is clear that described embodiments are only a part of the embodiments of the present invention, instead of all the embodiments.It is based on Embodiment in the present invention, it is obtained by those of ordinary skill in the art without making creative efforts every other Embodiment shall fall within the protection scope of the present invention.
Embodiment one:
The embodiment of the invention provides a kind of shift-register circuits, and referring to Fig. 4 is provided in an embodiment of the present invention one The electrical block diagram of kind shift-register circuit.Fig. 5 is a kind of shift-register circuit that the embodiment of the present invention provides Timing diagram.
Shift-register circuit in the present embodiment includes:
Clock signal for exporting clock signal provides end, provides end and more for the data-signals of outputting data signals A shift register cell.
It should be noted that multiple shift register cells connect in cascaded fashion, and it is defeated to all have clock signal Enter end, data signal input and data signal output.
Wherein, the displacement of the data signal output and next stage of the shift register cell of upper level The data signal input of register cell connects, and the data-signal provides the shift register at end and the first order The data signal input of unit connects;The clock signal input terminal of multiple shift register cells, by grade The sequencing of connection is sequentially connected;The clock signal provide the shift register cell of end and afterbody it is described when The connection of clock signal input part.
In the present embodiment, specifically, the shift register cell is d type flip flop.In the trigger, data letter It number is input to the data signal input D of trigger, for purposes of illustration only, being input to trigger clock signal input terminal CLK's The rising edge of clock signal receives data, provides the output signal Q for generating output.
As shown in figure 4, in trigger FF0In, data-signal Din is input to trigger FF0Data signal input D, so Q is exported from the end data signal output Q afterwards1.In trigger FFn-3In, data signal input D receives a trigger Output signal exports Q from data signal output Qn-3.In trigger FFn-2In, from a upper trigger FFn-3Output Qn-3 It is input to data signal input D and exports Q from the end data signal output Qn-2.In trigger FFn-1In, it is triggered from upper one Device FFn-2Output Qn-2It is input to data signal input D and exports Q from the end data signal output Qn-1.In trigger FFn In, from a upper trigger FFn-1Output Qn-1It is input to data signal input D and is exported from the end data signal output Q Qn.In the shift-register circuit described in the present embodiment, clock signal clk is supplied from the direction in contrast to data-signal, quilt It is directed to trigger FF0, FFn-3, FFn-2, FFn-1And FFnEach clock signal input terminal CLK.In this case, clock is believed Number C1, C2, C3 and C4 are separately input to trigger FFn-3, FFn-2, FFn-1And FFnClock signal input terminal CLK, clock signal Sequence is input to trigger FFn, FFn-1, FFn-2And FFn-3.Shift-register circuit includes on multiple in the present embodiment The trigger stated.
In the present embodiment, when shift-register circuit with such as above-mentioned configuration connection when, just to multiple circuit boards because it is long when Clock delay caused by clock cabling and the data that generate it is wrong for, between the trigger of phase mutual correspondence, trigger FFn-2Clock signal C2 relative to trigger FFn-3Clock signal C1 not due to cascade caused by failure postpone.Cause This, output signal Qn-3Slave flipflop FFn-3Before output, trigger FFn-2Data can correctly be received, clock, which is hit, to be had Imitate level equalization, subsequent trigger FFn-2Trigger FF relative to frontn-3, clock delay is not present, data export Qn-2 Normally.Trigger FFn-1Clock signal C3 relative to trigger FFn-2Clock signal C2 not due to cascade caused by failure Ground delay.Therefore, output signal Qn-2Slave flipflop FFn-2Before output, trigger FFn-1Data can correctly be received, when Clock hits significant level and stablizes, subsequent trigger FFn-1Trigger FF relative to frontn-2, clock delay, data are not present Export Qn-1Normally.Trigger FFnClock signal C4 relative to trigger FFn-1Clock signal C3 not due to cascade cause Failure postpone.Therefore, output signal Qn-1Slave flipflop FFn-1Before output, trigger FFnNumber can correctly be received According to clock hits significant level and stablizes, subsequent trigger FFnTrigger FF relative to frontn-1, clock delay is not present, Data export QnNormally.The shift-register circuit configured in this way, by clock signal from the side in contrast to data-signal To offer, this prevents the output datas of the upper trigger of reception of next trigger mistake, make entire circuit system The data output of system is in accordance with default.
Shift-register circuit described in the embodiment of the present invention one, by by clock signal from the side in contrast to data-signal To supply, so that clock signal just has reached before data-signal is sent, the clock triggering edge of the shift register in circuit can With the stable significant level that hits, the data output of shift-register circuit will not generate malfunction.Compared with the prior art, originally Inventive embodiments reduce the complexity of circuit, greatly without increasing these circuit hardwares of clock buffer buffer circuit Reduce the operation power consumption and hardware cost of infrared touch device interlock circuit.
Embodiment two:
The embodiment of the invention provides a kind of circuit boards comprising the shift-register circuit as described in embodiment one.
Embodiment three:
The embodiment of the invention provides a kind of infrared touch frames comprising multiple circuit boards as described in embodiment two.
Infrared touch frame described in the embodiment of the present invention is compared as using multiple circuit boards as described in embodiment two It in the prior art, will not generate because infrared touch frame circuit board quantity is more, data caused by clock cable run distance is too long are missed Act phenomenon, in previous piece of circuit board shift register clock arrival time than in latter piece of circuit board shift register it is early, The data output of the circuit system of entire infrared touch frame is in accordance with default.
Example IV:
The embodiment of the invention provides a kind of infrared touch devices comprising the infrared touch frame as described in embodiment three.
Infrared touch device described in the embodiment of the present invention, as using the infrared touch frame as described in embodiment three, no It does not only need to increase multiple clock buffer circuits, and the data malfunction in infrared touch device circuit can be effectively reduced Make phenomenon, reduce the production cost of infrared touch device and advantageously reduces power consumption.
Above disclosed is only some preferred embodiments of the present invention, cannot limit the power of the present invention with this certainly Sharp range, those skilled in the art can understand all or part of the processes for realizing the above embodiment, and weighs according to the present invention Benefit requires made equivalent variations, still belongs to the scope covered by the invention.

Claims (5)

1. a kind of shift-register circuit characterized by comprising
Clock signal for exporting clock signal provides end, for the data-signal offer end of outputting data signals and multiple shiftings Bit register unit;
Multiple shift register cells connect in cascaded fashion, and all have clock signal input terminal, data-signal input End and data signal output;
Wherein, the shift LD of the data signal output of the shift register cell of upper level and next stage The data signal input of device unit connects, and the data-signal provides the shift register cell at end and the first order The data signal input connection;
The clock signal input terminal of multiple shift register cells, is sequentially connected by cascade sequencing;It is described The clock signal input terminal that clock signal provides the shift register cell of end and afterbody connects.
2. shift-register circuit according to claim 1, which is characterized in that the shift register cell is D triggering Device.
3. a kind of circuit board, which is characterized in that including being equipped with shift-register circuit as described in claim 1.
4. a kind of infrared touch frame, which is characterized in that including multiple circuit boards as claimed in claim 3.
5. a kind of infrared touch device, which is characterized in that including infrared touch frame as claimed in claim 4.
CN201910030949.9A 2019-01-11 2019-01-11 Shift-register circuit, circuit board, infrared touch frame and infrared touch device Pending CN109801663A (en)

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN114070316A (en) * 2021-11-17 2022-02-18 苏州迅芯微电子有限公司 Multi-phase clock generation circuit and analog-to-digital converter

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN102097132A (en) * 2009-12-14 2011-06-15 群康科技(深圳)有限公司 Shift register and liquid crystal panel driving circuit
CN106849914A (en) * 2017-03-14 2017-06-13 苏州格美芯微电子有限公司 One kind keeps the accurate new structure of sequential logical circuit sequential
CN108022610A (en) * 2016-10-28 2018-05-11 芯成半导体有限公司 Time-controlled type command timing adjustment in synchronous semiconductor integrated circuit
CN108933582A (en) * 2017-05-25 2018-12-04 三星电子株式会社 Equipment for sequence circuit

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN102097132A (en) * 2009-12-14 2011-06-15 群康科技(深圳)有限公司 Shift register and liquid crystal panel driving circuit
CN102097132B (en) * 2009-12-14 2013-11-20 群康科技(深圳)有限公司 Shift register and liquid crystal panel driving circuit
CN108022610A (en) * 2016-10-28 2018-05-11 芯成半导体有限公司 Time-controlled type command timing adjustment in synchronous semiconductor integrated circuit
CN106849914A (en) * 2017-03-14 2017-06-13 苏州格美芯微电子有限公司 One kind keeps the accurate new structure of sequential logical circuit sequential
CN108933582A (en) * 2017-05-25 2018-12-04 三星电子株式会社 Equipment for sequence circuit

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN114070316A (en) * 2021-11-17 2022-02-18 苏州迅芯微电子有限公司 Multi-phase clock generation circuit and analog-to-digital converter

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Application publication date: 20190524