CN109791398B - Debugging device - Google Patents
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- CN109791398B CN109791398B CN201780058657.5A CN201780058657A CN109791398B CN 109791398 B CN109791398 B CN 109791398B CN 201780058657 A CN201780058657 A CN 201780058657A CN 109791398 B CN109791398 B CN 109791398B
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- G05B—CONTROL OR REGULATING SYSTEMS IN GENERAL; FUNCTIONAL ELEMENTS OF SUCH SYSTEMS; MONITORING OR TESTING ARRANGEMENTS FOR SUCH SYSTEMS OR ELEMENTS
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Abstract
A debugging device (100) according to the present invention comprises: a program execution unit (12) that executes commands included in the verification target sequence program (16); a motion verification status determination unit (14) that determines the type of execution of the command executed by the program execution unit (12), the type of execution indicating the relationship between the content of execution of the executed command and the result of execution of the command immediately preceding the executed command; a motion verification status storage unit (15) that stores the presence or absence of execution of the command for each execution type determined by the motion verification status determination unit (14), the execution type, and identification information identifying the executed command in association with each other; and an operation verification status display unit (21) that displays the commands executed by the program execution unit (12) and the types of execution of the executed commands in a visually recognizable manner depending on the presence or absence of execution of the commands.
Description
Technical Field
The present invention relates to a debugging apparatus used for debugging a sequence program.
Background
In general, in the development of a program, a debugging is performed in which operation verification is performed to verify whether or not a created program performs a desired operation, and when a failure is found by the operation verification, the program is corrected to eliminate the failure.
The yield of operation verification of a program is referred to as a coverage, and since a program subjected to operation verification and debugging is regarded as being free from a failure, the coverage is used as a quality index of the program. The coverage is of several kinds, and is typically C0 coverage, which indicates a ratio of all processes constituting a program to processes executed 1 or more times. In addition, the coverage can also be used as an index indicating the progress of the action verification in the program development.
Sequencing programs are used in the field of fa (factory automation) for automating operations in production sites such as factories. The sequence program is configured by combining a plurality of commands of a minimum unit for performing a certain process. The command has an attribute called an execution condition, and whether or not the command needs to be executed is determined by the execution condition and a result of a logical expression (hereinafter, referred to as a precondition) for performing a certain calculation on the immediately preceding command. The case where the precondition is satisfied is referred to as true, and the case where the precondition is not satisfied is referred to as false.
There are a plurality of types of execution conditions, and there are a case where the command is executed only when the pre-condition is true, a case where the command is not executed when the pre-condition is false, a case where the command is executed only when the pre-condition changes from false to true, a case where the command is executed ON a rising edge, and a case where the command is always executed regardless of whether the pre-condition is true or false. The command executed all the time has two execution categories of ON execution and OFF execution, and the execution results of the ON execution and the OFF execution are different. That is, the content of the command executed at all times differs between the case where the preceding condition is true and the case where it is false. The ON execution is executed in a case where the previous condition is true, and the OFF execution is executed in a case where the previous condition is false.
As described above, since there is an execution condition that is not present in a generally used programming language such as C language, for example, in a command constituting a sequence program, such as a constant execution, the action verification required for obtaining the coverage rate is also different from the generally used programming language. For example, assume that the coverage of C0 is 100%. The C0 coverage is an index indicating the ratio of executed processes among all executable processes. In a normal program, since processing is skipped when the condition for executing processing is false, if only the processing executed when the condition for executing processing is true, among commands to be motion verification targets, is evaluated, the coverage of C0 is 100%. On the other hand, in the sequence program, it is necessary to consider the execution conditions of the respective commands. When the command to be verified includes a command to be executed all the time, it is necessary to verify both the ON execution and the OFF execution that are executed all the time in order to set the coverage of C0 to 100%.
Patent document 1: japanese patent laid-open No. 2000-293208
Disclosure of Invention
The technique of visually expressing the coverage of a general programming language and the technique of quantitatively expressing the coverage by a percentage are realized only for a command that is executed when a preceding condition is true. On the other hand, even if the same command is used in the sequence program, the type of execution may vary depending on the precondition, and the coverage cannot be accurately measured only by the verification when the precondition is true. Therefore, there are problems that visualization of the coverage in the sequence program is difficult, and progress management and confirmation of the operation verification are difficult.
The present invention has been made in view of the above problems, and an object of the present invention is to provide a debugging apparatus which improves the work efficiency of debugging.
In order to solve the above problems and achieve the object, a debugging device according to the present invention includes: an execution unit that executes commands included in the sequence program; and a determination unit that determines an execution type of the command executed by the execution unit, the execution type indicating a relationship between an execution content of the executed command and an execution result of a command immediately before the executed command. In addition, the debugging device is provided with: a storage unit that stores the presence or absence of execution of the command for each execution type determined by the determination unit, the execution type, and identification information for identifying the executed command in association with each other; and a display unit that displays the command executed by the execution unit and the execution type of the executed command in a visually recognizable manner according to the presence or absence of the execution of the command. The execution category includes ON execution executed when the execution result of the immediately preceding command is true, and OFF execution executed when the execution result of the immediately preceding command is false.
ADVANTAGEOUS EFFECTS OF INVENTION
The debugging device according to the present invention has an effect of improving the work efficiency of debugging.
Drawings
Fig. 1 is a diagram showing a configuration example of a debugging apparatus according to embodiment 1.
Fig. 2 is a diagram showing an example of an operation verification setting dialog box displayed when the operation verification setting input unit according to embodiment 1 receives an operation verification setting.
Fig. 3 is a diagram showing an example of a sequence program executed by a plc (programmable Logic controller) according to embodiment 1 and commands constituting the sequence program.
Fig. 4 is a diagram showing an example of a format for storing the operation verification statuses collected by the operation verification status determination unit according to embodiment 1.
Fig. 5 is a diagram showing a display example in a case where the operation verification status display unit according to embodiment 1 notifies a user of the status of operation verification by changing the display background of the sequence program.
Fig. 6 is a diagram showing another display example in the case where the operation verification status display unit according to embodiment 1 notifies the user of the status of operation verification by changing the display background of the sequence program.
Fig. 7 is a diagram showing a display example in a case where the operation verification status display unit according to embodiment 1 notifies a user of the status of operation verification by changing a flag displayed in association with each command of the sequence program.
Fig. 8 is a diagram showing a display example in a case where the operation verification status display unit according to embodiment 1 changes the display of the program to show the status of the operation verification.
Fig. 9 is a flowchart showing an operation of the debug apparatus according to embodiment 1 for displaying an operation verification status.
Fig. 10 is a flowchart showing an operation in which the operation verification status display unit according to embodiment 1 displays operation verification statuses based on 1 or more selected from the plurality of operation verification statuses.
Fig. 11 is a diagram showing an example of an operation verification status selection screen displayed on a display device by the operation verification status display unit according to embodiment 1.
Fig. 12 is a diagram showing a hardware configuration of a PLC of the debugging apparatus according to embodiment 1.
Fig. 13 is a diagram showing a configuration example of the debugging apparatus according to embodiment 2.
Detailed Description
Next, a debugging apparatus according to an embodiment of the present invention will be described in detail with reference to the drawings. The present invention is not limited to the embodiment.
Fig. 1 is a diagram showing a configuration example of a debugging apparatus according to embodiment 1 of the present invention. The debugging apparatus 100 according to embodiment 1 includes a Programmable Logic Controller (PLC) 1 and an engineering tool 20 inside a computer 2. The engineering tool 20 is realized by the computer 2 executing a program for operating as the engineering tool 20. The computer 2 includes various hardware such as a processor for executing a program for operating as the engineering tool 20, a memory for storing the program and various data, a display device as a display, an input device as a mouse and a keyboard, and a communication interface. The PLC 1 and the computer 2 are connected via a network cable 3. Further, as for the connection path, wireless may be used.
The PLC 1 includes a program memory 11, a program execution unit 12, and an operation verification result management unit 13. The operation verification result management unit 13 includes an operation verification status determination unit 14 and an operation verification status storage unit 15. The PLC 1 has 2 operation modes, specifically, a normal mode for controlling a controlled device and a debug mode for debugging a sequence program, and is configured so that the operation mode can be selected by a user operating a switching means, such as a switch, not shown. The operation verification result management unit 13 operates when the debug mode is selected.
The program memory 11 is a memory for storing a sequence program for controlling the controlled device, and stores the verification target sequence program 16. The verification target sequence program 16 is a target program for debugging using the debugging apparatus 100. The program execution unit 12 is an execution unit that executes the sequence program stored in the program memory 11. When the debug mode is selected, the program execution unit 12 executes the verification target sequence program 16. The verification target sequence program 16 is a sequence program specified by the user from the sequence programs stored in the program memory 11. The program execution unit 12 has a device memory 17. The device memory 17 is a memory for storing various device values, and if the program execution unit 12 executes the sequence program, the device values are updated according to the execution contents. The device value indicates a value of control information used by the PLC 1 in controlling the device to be controlled. In the field of FA, information identifying control information is referred to as a device, and a device value indicates a state of a control target instrument.
When the program execution unit 12 executes the verification target sequence program 16 in the debug mode, the operation verification status determination unit 14 of the operation verification result management unit 13 acquires a set of information of the type of execution of the command, the presence or absence of execution of the command, and the command as the operation verification status, and stores the operation verification status in the operation verification status storage unit 15. That is, the operation verification status determination unit 14 is a determination unit that determines the command in the verification target sequence program 16 executed by the program execution unit 12 and the execution type of the executed command, and stores the determination result in the operation verification status storage unit 15 in association with the executed command. The type of execution of the command is information such as the ON execution and the OFF execution, and indicates the relationship between the content of the execution of the command and the result of the execution of the command immediately before the command. The operation verification status determination unit 14 obtains the operation verification status by analyzing the device value read from the device memory 17 of the program execution unit 12. The operation verification status determination unit 14 monitors whether or not the specific device value in the device memory 17 is updated, and thereby can know whether or not the command corresponding to the specific device value is executed. The operation verification status determination unit 14 can also know which command in the sequence program the program execution unit 12 is attempting to execute by monitoring the device value in the device memory 17. The execution type and precondition of each command can be known by analyzing the sequence program. The operation verification status storage unit 15 of the operation verification result management unit 13 is a storage unit that receives and stores the operation verification status acquired by the operation verification status determination unit 14.
The engineering tool 20 includes an operation verification status display unit 21, an operation verification setting input unit 22, and an operation verification setting writing unit 23.
The operation verification status display unit 21 is a display unit that displays the progress status of the operation verification of the verification target sequence program 16 on a display device (not shown) of the computer 2 in a manner that the user can visually recognize the progress status based on the operation verification status stored in the operation verification status storage unit 15. The operation verification status display unit 21 also has a function of displaying the sequence program on a display device.
The operation verification setting input unit 22 receives, as operation verification settings, settings of a sequence program to be subjected to operation verification, a setting of the number of executions of the sequence program to be subjected to operation verification, and a setting of an execution type of the sequence program to be subjected to verification from a user. Fig. 2 is a diagram showing an example of an operation verification setting dialog box displayed on the display device when the operation verification setting input unit 22 according to embodiment 1 receives an operation verification setting. The operation verification setting dialog box shown in fig. 2 is configured such that the program name of the verification target and the execution type of the verification target can be set by pull-down, and the number of times of execution of the verification target can be set by inputting a numerical value into the text box. When the OK button is pressed in the state of the contents shown in fig. 2, the operation verification setting input unit 22 receives a command for ON execution included in the sequence program named MAIN, and performs operation verification setting for verifying the contents 10 times in total. The verification target execution type can be selected by designating ON execution and OFF execution individually, and by selecting both ON execution and OFF execution as verification targets. The operation verification setting is not limited to the verification target program name, the verification target execution count, and the verification target execution type shown in fig. 2. Other information may be included in the operation verification setting. In the present embodiment, the operation verification setting input unit 22 receives the input of the operation verification setting from the user, but the engineering tool 20 may acquire the information of the operation verification setting by inputting a file described in a predetermined format.
The operation verification setting writing unit 23 writes the information indicating the operation verification setting received by the operation verification setting input unit 22 into the operation verification situation determination unit 14 of the operation verification result management unit 13, and sets the operation verification situation determination unit 14 so as to operate in accordance with the written information. When the operation verification setting input unit 22 receives the operation verification setting of the contents shown in fig. 2 and the operation verification setting writing unit 23 writes information corresponding to the received operation verification setting into the operation verification situation determination unit 14, the operation verification situation determination unit 14 monitors whether or not the command executed ON is executed until 10 times of execution of the sequence program when the sequence program named MAIN is executed by the program execution unit 12. In this case, the operation verification status determination unit 14 writes the monitoring result until the sequence program is executed 10 times, as the operation verification status, in the operation verification status storage unit 15.
Fig. 3 is a diagram showing an example of a sequence program executed by the PLC 1 according to embodiment 1 and commands constituting the sequence program. The sequence program shown in fig. 3 is created by a program creation unit, not shown, of the engineering tool 20. After the sequence program is converted into a code executable by the PLC 1, the sequence program is transferred from the engineering tool 20 to the PLC 1 and written into the program memory 11 of the PLC 1. Fig. 3 shows an example of a sequencer program created by the ladder language. The "(0)", "(2)", "(4)" and "(6)" shown in fig. 3 are step numbers.
Fig. 4 is a diagram showing an example of a format in which the operation verification status collected by the operation verification status determination unit 14 according to embodiment 1 from the program execution unit 12 is stored in the operation verification status storage unit 15. As shown in fig. 4, the operation verification status includes a step number (step number) indicating the command, a run type (run type) indicating the execution condition of the command, an ON execution completion flag, and an OFF execution completion flag. The step number is identification information of the command. The identification information is information for specifying which command has been executed from the executed sequence program. The operation type is '0' and the operation type is '1' and indicates an execution condition that is not always executed. The operation verification status determination unit 14 checks which step number command is executed and the precondition when the command is executed by reading the device value stored in the device memory 17 of the program execution unit 12, and checks the ON execution completion flag or the OFF execution completion flag according to the result of the check. The operation verification status shown in fig. 4 indicates that the ON execution of the command corresponding to the step number '0' is performed, the OFF execution of the command corresponding to the step number '2' is performed, the ON execution and the OFF execution of the command corresponding to the step number '4' are performed, and the ON execution and the OFF execution of the command corresponding to the step number '8' are performed. The form of saving the action verification status is not limited to the form shown in fig. 4. If it is known which command is executed under which execution condition, the command may be stored in the form of binary data, text data, or the like.
Next, a description will be given of a mode in which the operation verification status display unit 21 of the engineering tool 20 displays the operation verification status on the display device, with reference to fig. 5 to 8.
Fig. 5 is a diagram showing a display example in a case where the operation verification status display unit 21 according to embodiment 1 notifies a user of the status of operation verification by changing the display background of the sequence program. Fig. 5 shows an example in which the display background of the sequence program shown in fig. 3 is changed in accordance with the execution status of each command included in the sequence program. A typical example of the method of changing the display background is changing the color. For example, blue is set when both ON execution and OFF execution are performed, orange is set as the background color when only ON execution is performed, yellow is set as the background color when only OFF execution is performed, and white is set as the background color when both ON execution and OFF execution are not performed.
Fig. 6 is a diagram showing another display example in the case where the operation verification status display unit 21 according to embodiment 1 notifies the user of the status of operation verification by changing the display background of the sequence program. In the example shown in fig. 6, the command for executing both the ON execution and the OFF execution is not displayed in addition to the change of the background color. By not displaying the command for executing both the ON execution and the OFF execution, the user can easily know how many commands for which the operation verification is not completed remain. In the example shown in fig. 6, since the ON execution and the OFF execution are executed with respect to the command of step number 4, the command of step number 4 is not shown.
Fig. 7 is a diagram showing a display example in a case where the operation verification status display unit 21 according to embodiment 1 notifies the user of the status of operation verification by changing the flag displayed in association with each command of the sequence program. Fig. 7 shows an example in which the execution status of each command included in the sequence program shown in fig. 3 is represented by a black circle (●), a white circle (o), and a double circle (circleincircle). Specifically, the command in which only ON execution is performed is given '●', the command in which only OFF execution is performed is given 'o', and the command in which both ON execution and OFF execution are performed is given 'excellent'.
Fig. 8 is a diagram showing an example of display in a case where the operation verification status display unit 21 according to embodiment 1 changes the display of the program to show the status of operation verification. Fig. 8 shows an example of a state of operation verification by changing the display of the path and the command that have been ON-executed at least once. As a method of changing the display of the path and the command that have been ON-executed, a method of changing the display to the display with the solid line when the ON-execution is performed is conceivable, as indicated by the broken line when the ON-execution is not performed. Further, a method of changing the display color between a state in which ON execution is not performed and a state in which ON execution is performed is also conceivable. The method of changing the display may be any method as long as it is known that the ON execution is performed.
In fig. 5 to 8, the coverage rate is displayed by color division or the like, but may be simply displayed as "implement o%". Such a display may also be displayed on the ladder program of fig. 5 to 8 together. Further, the display based on color separation or the like and the display based on numerical value may be performed simultaneously. The rate of coverage is calculated by the operation verification status display unit 21 based on the operation verification status stored in the operation verification status storage unit 15. Further, the operation verification status display unit 21 calculates the acceptance rate of the coverage rate as the completion of the operation verification of the command when both the ON execution and the OFF execution are executed for the command whose execution condition is the execution condition of the constant execution.
Next, an operation of the debugging apparatus 100 for displaying the operation verification status will be described with reference to fig. 9. Fig. 9 is a flowchart showing an operation of the debug device 100 according to embodiment 1 for displaying an operation verification status.
In the operation of the debugging apparatus 100 for displaying the operation verification status, the operation verification status determination unit 14 collects the device values from the device memory 17 for each step while the program execution unit 12 is executing the sequence program 16 to be verified, and determines whether or not to execute the command based on the collected device values (step S11). In addition, a conventional technique for monitoring a sequence program can be used to determine whether or not a command is executed. The type of execution of the command can be determined based on the type of the execution condition of the corresponding command and the precondition. The operation verification status determination unit 14 determines the presence or absence of execution of the command and the execution type based on the collected device values.
Then, the operation verification status determination unit 14 stores the determination result, i.e., the presence or absence of execution of the command and the execution type, in the operation verification status storage unit 15 in association with the step number (step S12). The operation verification status shown in fig. 4 is obtained by associating the step number with the execution type and the presence or absence of execution of the command.
Then, the operation verification status display unit 21 displays the execution status and the execution type of each command of the verification target sequence program 16 on the display device based on the operation verification status stored in the operation verification status storage unit 15 (step S13).
In step S13 shown in fig. 9, the operation verification status display unit 21 displays a screen showing an example of the contents shown in fig. 5 to 8. In addition, when the operation verification status storage unit 15 stores a plurality of operation verification statuses, the operation verification status display unit 21 generates a display screen based on 1 or more operation verification statuses selected by the user from the plurality of operation verification statuses. In general, in a debugging operation of a program, the program is executed based on a plurality of operating conditions while changing the setting of the operating conditions of the program, and the presence or absence of a failure is checked. Therefore, the operation verification results corresponding to the plurality of operation conditions are obtained. In the case of the debugging apparatus 100 according to the present embodiment, the operation verification setting described with reference to fig. 2 corresponds to the operation condition of the program, and the operation verification status described with reference to fig. 4 corresponds to the operation verification result of the program. That is, the operation verification status storage unit 15 stores a plurality of operation verification statuses.
Fig. 10 is a flowchart showing an operation in which the operation verification status display unit 21 according to embodiment 1 displays operation verification statuses based on 1 or more selected from the plurality of operation verification statuses.
When the operation verification status display unit 21 displays the operation verification status in step S13 shown in fig. 9, first, a screen for selecting the operation verification status is displayed on the display device (step S21). The display in step S21 can be a screen as shown in fig. 11. Fig. 11 is a diagram showing an example of an operation verification status selection screen displayed on a display device by the operation verification status display unit 21 according to embodiment 1. The screen display example shown in fig. 11 includes a list of file names (operation verification status _ 001, operation verification status _ 002, …) of the operation verification status stored in the operation verification status storage unit 15, a checkbox for selecting each file, a display start button, and a cancel button. The user selects the operation verification situation desired to be displayed by making a check in the check box, and starts the display of the operation verification situation by pressing the display start button. That is, after executing step S21 to display the screen shown in fig. 11 on the display device, the operation verification status display unit 21 selects 1 or more operation verification status files and waits for the display start button to be pressed.
If the display start button is pressed in a state where 1 or more operation verification statuses are selected, the operation verification status display unit 21 displays a screen showing one of the contents examples shown in fig. 5 to 8 on the display device based on the selected operation verification status (step S22). When step S22 is executed in a state where a plurality of operation verification statuses are selected, the operation verification status display unit 21 merges the contents of the selected operation verification statuses, and displays the merged operation verification statuses.
As an example, consider a case where the operation verification status _ 001 and the operation verification status _ 002 are selected, the operation verification status _ 001 being a result of execution of only ON, and the operation verification status _ 002 being a result of execution of only OFF. In this case, the operation verification status display unit 21 analyzes the operation verification status _ 001 and the operation verification status _ 002, thereby grasping whether both ON execution and OFF execution of a certain command are executed, and if not, grasping whether either ON execution or OFF execution is not executed or both ON execution and OFF execution are not executed, and displays a screen (a screen of any one of fig. 5 to 8) showing a content in which the execution statuses of ON execution and OFF execution of each command are visually recognizable ON the display device.
As another example, a case is considered in which the operation verification status _ 001 and the operation verification status _ 002 are selected, the operation verification status _ 001 includes information indicating that ON execution of a command (hereinafter, referred to as a command a) indicating the step number XX that is always executed has been executed but OFF execution has not been executed, and the operation verification status _ 002 includes information indicating that ON execution of the command a has not been executed but OFF execution has been executed. In this case, the operation verification status display unit 21 analyzes the operation verification status _ 001 and the operation verification status _ 002, and thereby recognizes that both the ON execution and the OFF execution of the command a are executed, that is, verified. Therefore, the operation verification status display unit 21 displays a screen ON which the contents of verification can be visually recognized for the ON execution and the OFF execution of the command a ON the display device.
Next, a hardware configuration of the PLC 1 will be described, and the PLC 1 constitutes the debugging apparatus 100 according to embodiment 1. The PLC 1 shown in fig. 1 can be realized by the processor 201, the memory 202, and the communication interface 203 shown in fig. 12. The processor 201 may be a Processing device, an arithmetic device, a microprocessor, a microcomputer, a cpu (central Processing unit), a dsp (digital Signal processor), or the like. Here, the memory 202 is a nonvolatile or volatile semiconductor memory such as a ram (random Access memory), a rom (read Only memory), a flash memory, an eprom (erasable Programmable rom), or an eeprom (electrically eprom), a magnetic disk, a flexible disk, an optical disk, a compact disk, a mini disk, or a dvd (digital Versatile disc). The memory 202 may be a combination of 2 or more kinds of memory devices.
The program memory 11 of the PLC 1 is realized by the memory 202. The program execution unit 12 of the PLC 1 is realized by the processor 201 and the memory 202. The operation verification result management unit 13 of the PLC 1 is realized by the processor 201 and the memory 202. That is, the operation verification status determination unit 14 is realized by storing a program that operates as the operation verification status determination unit 14 in advance in the memory 202, and reading and executing the program from the memory 202 by the processor 201. The operation verification status storage unit 15 is realized by the memory 202. The communication interface 203 shown in fig. 12 is used for communication with the computer 2 that implements the engineering tool 20. As described above, the engineering tool 20 is realized by the computer 2 executing a program for operating as the engineering tool 20.
As described above, the debugging apparatus 100 according to the present embodiment includes: a program execution unit 12 that executes a sequence program; a motion verification status determination unit 14 that determines the command executed by the program execution unit 12, the type of execution of the executed command, and the precondition, based on the device value stored in the device memory 17; and a motion verification status storage unit 15 that stores the result of the determination by the motion verification status determination unit 14 as a motion verification status. This eliminates the need for the user to confirm the type of execution of the executed command, and reduces the workload on the user. Therefore, the work efficiency of debugging the sequence program can be improved. Further, the operation verification status display unit 21 is provided, and the operation verification status display unit 21 displays the progress status of the operation verification of the sequence program in a form that can be visually recognized by the user. This makes it possible for the user to easily know the progress of the operation verification, and the work efficiency of the debugging can be further improved.
In the present embodiment, ON execution and OFF execution are used as the execution types, but the execution types are not limited to these, and any execution content of the program may be defined.
In embodiment 1, the debugging apparatus having the configuration in which the PLC 1 includes the operation verification result management unit 13 has been described, but the computer 2 including the engineering tool 20 may include the operation verification result management unit 13.
Fig. 13 is a diagram showing a configuration example of the debugging apparatus according to embodiment 2. The debugging apparatus 100a according to embodiment 2 includes a PLC 1a, a computer 2a that realizes the operation verification result management unit 13 described in embodiment 1, and the engineering tool 20. The PLC 1a is a PLC in which the operation verification result management unit 13 is deleted from the PLC 1 described in embodiment 1. The computer 2 includes the engineering tool 20 described in embodiment 1, and an operation verification result management unit 13 that determines the command and the execution type executed by the program execution unit 12 and stores the result thereof described in embodiment 1. The program memory 11 and the program execution unit 12 of the PLC 1a are the same as the program memory 11 and the program execution unit 12 of the PLC 1 described in embodiment 1, and therefore, the description thereof is omitted. The engineering tool 20 and the operation verification result management unit 13 of the computer 2a are the same as the engineering tool 20 and the operation verification result management unit 13 of the PLC 1 of the computer 2 described in embodiment 1, and therefore, the description thereof is omitted.
In addition, although the engineering tool 20 and the operation verification result management unit 13 are separately configured in the above manner, the engineering tool 20 may be configured to include the operation verification result management unit 13.
The configurations described in the above embodiments are merely examples of the contents of the present invention, and may be combined with other known techniques, and a part of the configurations may be omitted or modified without departing from the scope of the present invention.
Description of the reference numerals
1. 1a PLC, 2a computers, 3 network cables, 11 program memories, 12 program execution units, 13 operation verification result management units, 14 operation verification status determination units, 15 operation verification status storage units, 16 verification target sequence programs, 17 device memories, 20 engineering tools, 21 operation verification status display units, 22 operation verification setting input units, 23 operation verification setting writing units, and 100, 100a debugging devices.
Claims (5)
1. A debugging device is characterized by comprising:
an execution unit that executes commands included in the sequence program;
a determination unit that determines an execution type of a command executed by the execution unit, the execution type indicating a relationship between an execution content of the executed command and an execution result of a command immediately preceding the executed command;
a storage unit that stores the presence or absence of execution of the command for each execution type determined by the determination unit, the execution type, and identification information for identifying the executed command in association with each other; and
a display unit that displays the command executed by the execution unit and the execution type of the executed command in a visually recognizable manner according to the presence or absence of execution of the command,
the execution category includes ON execution executed if the execution result is true, and OFF execution executed if the execution result is false.
2. The debugging apparatus according to claim 1,
the display unit displays the executed command and the execution type in comparison with the sequence program executed by the execution unit.
3. The debugging device according to claim 1 or 2,
the display unit displays a ratio of the commands executed by the execution unit to all the commands included in the sequence program.
4. The debugging apparatus according to claim 1,
the determination unit is configured to be capable of determining the command executed by the execution unit and the type of execution of the executed command in accordance with a plurality of operation verification settings, and the determination unit performs the determination in accordance with different operation verification settings to generate a plurality of determination results,
the display unit displays the plurality of determination results on 1 screen.
5. The debugging apparatus according to claim 4,
the display unit displays, on 1 screen, a determination result specified by a user among the plurality of determination results.
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| PCT/JP2017/023623 WO2019003313A1 (en) | 2017-06-27 | 2017-06-27 | Debugging device |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN109791398A CN109791398A (en) | 2019-05-21 |
| CN109791398B true CN109791398B (en) | 2020-12-18 |
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| CN201780058657.5A Active CN109791398B (en) | 2017-06-27 | 2017-06-27 | Debugging device |
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| JP (1) | JP6351906B1 (en) |
| CN (1) | CN109791398B (en) |
| WO (1) | WO2019003313A1 (en) |
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| Publication number | Priority date | Publication date | Assignee | Title |
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| JP7173928B2 (en) * | 2019-06-05 | 2022-11-16 | ファナック株式会社 | Numerical controller |
| WO2021005691A1 (en) * | 2019-07-08 | 2021-01-14 | 三菱電機株式会社 | Control device, program monitoring method, and program |
| CN115104088B (en) * | 2020-02-14 | 2024-02-06 | 三菱电机株式会社 | Program providing device, program providing method, and program providing system |
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| JPH03204004A (en) * | 1989-12-29 | 1991-09-05 | Sharp Corp | Programmable controller |
| JP2000293208A (en) * | 1999-04-02 | 2000-10-20 | Hitachi Ltd | Sequence control system |
| CN1690978A (en) * | 2004-04-26 | 2005-11-02 | 三菱电机株式会社 | Program execution control mode |
| CN1869952A (en) * | 2005-05-27 | 2006-11-29 | 松下电器产业株式会社 | Instruction actuating equipment, debugging method, debugging device, and debugging program |
| CN104063321A (en) * | 2014-06-27 | 2014-09-24 | 北京控制工程研究所 | Test verifying system and test verifying method for microblaze soft-core program |
| WO2016166876A1 (en) * | 2015-04-16 | 2016-10-20 | 三菱電機株式会社 | Program diagnosis device, program diagnosis method and program diagnosis program |
-
2017
- 2017-06-27 JP JP2018505755A patent/JP6351906B1/en active Active
- 2017-06-27 WO PCT/JP2017/023623 patent/WO2019003313A1/en active Application Filing
- 2017-06-27 CN CN201780058657.5A patent/CN109791398B/en active Active
Patent Citations (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH03204004A (en) * | 1989-12-29 | 1991-09-05 | Sharp Corp | Programmable controller |
| JP2000293208A (en) * | 1999-04-02 | 2000-10-20 | Hitachi Ltd | Sequence control system |
| CN1690978A (en) * | 2004-04-26 | 2005-11-02 | 三菱电机株式会社 | Program execution control mode |
| CN1869952A (en) * | 2005-05-27 | 2006-11-29 | 松下电器产业株式会社 | Instruction actuating equipment, debugging method, debugging device, and debugging program |
| CN104063321A (en) * | 2014-06-27 | 2014-09-24 | 北京控制工程研究所 | Test verifying system and test verifying method for microblaze soft-core program |
| WO2016166876A1 (en) * | 2015-04-16 | 2016-10-20 | 三菱電機株式会社 | Program diagnosis device, program diagnosis method and program diagnosis program |
Also Published As
| Publication number | Publication date |
|---|---|
| WO2019003313A1 (en) | 2019-01-03 |
| JPWO2019003313A1 (en) | 2019-06-27 |
| JP6351906B1 (en) | 2018-07-04 |
| CN109791398A (en) | 2019-05-21 |
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