CN109787716A - Data transmission method and device - Google Patents

Data transmission method and device Download PDF

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Publication number
CN109787716A
CN109787716A CN201811559201.XA CN201811559201A CN109787716A CN 109787716 A CN109787716 A CN 109787716A CN 201811559201 A CN201811559201 A CN 201811559201A CN 109787716 A CN109787716 A CN 109787716A
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data
clock signal
signal
current potential
clock
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CN201811559201.XA
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CN109787716B (en
Inventor
王明良
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HKC Co Ltd
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HKC Co Ltd
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Priority to CN201811559201.XA priority Critical patent/CN109787716B/en
Publication of CN109787716A publication Critical patent/CN109787716A/en
Priority to PCT/CN2019/122791 priority patent/WO2020125408A1/en
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    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00Arrangements for detecting or preventing errors in the information received

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  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Dc Digital Transmission (AREA)

Abstract

The application discloses a data transmission method, which comprises the following steps: when a data signal is detected, acquiring a clock signal corresponding to the data signal; acquiring the potential of the clock signal in real time within a time interval, wherein the time interval is less than or equal to half a clock period of the clock signal; and increasing the output amplitude of the clock signal when the acquired potential is lower than a preset threshold. The application also discloses a data transmission device. After the output amplitude of the clock signal is increased, the clock signal accords with the new output amplitude, and the electric potential corresponding to the time point of which the electric potential is lower than the preset threshold value is increased, so that a rising edge or a falling edge cannot occur near the time point, and the data is effectively prevented from being captured by mistake.

Description

The transmission method and device of data
Technical field
This application involves field of communication technology more particularly to the transmission methods and device of data.
Background technique
As LCD TV size is increasing, resolution is higher and higher, and the data for needing to transmit are also increasing, difference Signal is popularized as a kind of transport protocol of high speed.During being carried out data transmission with differential signal, data-signal (Data) along with clock signal, and data-signal is relatively stable in rising edge clock signal or failing edge, at this point, receiving end Get the target data in data-signal.
However, in a practical situation, due to transmitting the inconsistency of cabling characteristic impedance, signal during transmission can Reflex is encountered, reflected signal is overlapped with initial signal again, causes actual signal waveform uneven. Therefore when clock signal is reflected influence, the clock signal actually generated is uneven, when the current potential at bumps is lower, Receiving end is easy accidentally using the fluctuation near the bumps wave as rising edge or failing edge, and according to the rising edge or failing edge of misidentification Transmission data are obtained, data acquisition mistake is caused.
Apply for content
The main purpose of the application is to provide the transmission method and device of a kind of data, it is intended to solve when clock signal by Lead to the technical problem of data acquisition mistake to reflections affect.
To achieve the above object, the application provides a kind of transmission method of data, the transmission method of the data include with Lower step:
When detecting data-signal, the corresponding clock signal of the data-signal is obtained;
Obtain the current potential of the clock signal in real time in the time interval, wherein the time interval is less than or equal to institute State half of clock cycle of clock signal;
And when the current potential of acquisition is lower than preset threshold, increase the output amplitude of the clock signal.
Optionally, the step of output amplitude for increasing the clock signal includes:
Obtain the initial magnitude of the clock signal in the clock cycle;
Target amplitude is determined according to the initial magnitude, and the output amplitude of the clock signal is increased into the target Amplitude.
Optionally, after described the step of obtaining the data-signal corresponding clock signal, further includes:
The current potential of clock signal described in real-time monitoring is the zero volt time point of zero volt;
When postponing preset duration at the zero volt time point, when obtaining described in real time as start time point using current point in time Between be spaced in the clock signal current potential.
Optionally, after described the step of obtaining the data-signal corresponding clock signal, further includes:
Obtain the clock cycle of the clock signal.
Optionally, the step of clock cycle for obtaining the clock signal includes:
The frequency for obtaining the clock signal, according to the clock cycle of clock signal described in the frequency acquisition;
Alternatively, obtain the zero volt time point of the clock signal, according between the two neighboring zero volt time point when Between clock signal described in interval acquiring clock cycle.
Optionally, after the step of output amplitude for increasing the clock signal, further includes:
The clock signal after being increased according to output amplitude obtains the data of the data-signal.
Optionally, it is described increased according to output amplitude after the clock signal obtain the data-signal data step Suddenly include:
Obtain the rising edge and failing edge of the clock signal after the output amplitude increases;
Determine time point corresponding with the rising edge and the failing edge in the data-signal;
And grab the corresponding data of time point described in the data-signal.
In addition, to achieve the above object, the application also provides a kind of transmission method of data, which is characterized in that the number According to transmission method the following steps are included:
When detecting data-signal, the corresponding clock signal of the data-signal is obtained;
Obtain the clock cycle of the clock signal;
The current potential of the clock signal in half of clock cycle is obtained in real time;
And when the current potential of acquisition is lower than preset threshold, the output amplitude of the clock signal is increased to pre- If amplitude.
Optionally, described real-time the step of obtaining the current potential of the clock signal in half of clock cycle, includes:
The current potential for monitoring the clock signal is the zero volt time point of zero volt;
The current potential of the clock signal in half of clock cycle after the zero volt time point is obtained in real time.
In addition, to achieve the above object, the application also provides a kind of transmitting device of data, which is characterized in that the number According to transmitting device include: memory, processor and be stored in the number that can be run on the memory and on the processor According to transfer program, the transfer program of the data realizes the transmission method of data as described above when being executed by the processor The step of.
The transmission method and device for a kind of data that the embodiment of the present application proposes are opened when detecting the presence of data transmission Begin to obtain the corresponding clock signal of data-signal.And determine the current potential of the clock signal in time interval, wherein between the time Every less than or equal to half of clock cycle.There are current potentials to be less than preset threshold in detecting the time interval clock signal When, the too low signal of feedback magnitude to clock signal transmitting terminal (for example, Timing driver chip), for the transmission of clock signal End increases the output amplitude of clock signal.After the output amplitude of clock signal obtains increase, clock signal be meet it is new defeated Amplitude out, current potential are enhanced lower than the time point corresponding current potential of preset threshold, thus near this time point being not in Edge or failing edge are risen, the mistake crawl of data is efficiently avoided.
Detailed description of the invention
Fig. 1 is the terminal structure schematic diagram for the hardware running environment that the example scheme of the application is related to;
Fig. 2 is the flow diagram of an embodiment of the transmission method of the application data;
Fig. 3 is a waveform diagram of the transmission method of the application data;
Fig. 4 is another waveform diagram of the transmission method of the application data;
Fig. 5 is the flow diagram of another embodiment of the transmission method of the application data;
Fig. 6 is the flow diagram of the another embodiment of the transmission method of the application data.
The embodiments will be further described with reference to the accompanying drawings for realization, functional characteristics and the advantage of the application purpose.
Specific embodiment
It should be appreciated that specific embodiment described herein is only used to explain the application, it is not used to limit the application.
The primary solutions of the embodiment of the present application are:
When detecting data-signal, the corresponding clock signal of the data-signal is obtained;
Obtain the current potential of the clock signal in real time in the time interval, wherein the time interval is less than or equal to institute State half of clock cycle of clock signal;
And when the current potential of acquisition is lower than preset threshold, increase the output amplitude of the clock signal.
Electricity since when clock signal is reflected influence, the clock signal actually generated is uneven, at bumps When position is lower, receiving end is easy accidentally using the fluctuation near the bumps wave as rising edge or failing edge, and according to the rising of misidentification Edge or failing edge obtain transmission data, lead to data acquisition mistake.
The application provides a solution, and when detecting the presence of data transmission, it is corresponding to start acquisition data-signal Clock signal.And determine the current potential of the clock signal in time interval, wherein the time interval is less than or equal to half of clock Period.When being less than preset threshold there are current potential in detecting the time interval clock signal, the too low letter of feedback magnitude Number give clock signal transmitting terminal (for example, Timing driver chip), for clock signal transmitting terminal increase clock signal it is defeated Amplitude out.After the output amplitude of clock signal obtains increase, clock signal is to meet new output amplitude, and current potential is lower than default The time point of threshold value, corresponding current potential was enhanced, to be not in rising edge or failing edge near this time point, effectively Avoid the mistake crawl of data.
As shown in Figure 1, Fig. 1 is the terminal structure schematic diagram for the hardware running environment that the embodiment of the present application scheme is related to.
The embodiment of the present application terminal can be a kind of data extraction device of data-signal, be also possible to television set, can also To be computer.
As shown in Figure 1, the terminal may include: processor 1001, such as CPU, and memory 1002, communication bus 1003, Data driver (Data Driver) 1004, Timing driver chip (TCON IC) 1005.Wherein, communication bus 1003 is set as Realize the connection communication in the terminal between each building block.Memory 1002 can be high-speed random access memory, can also To be stable memory (non-volatile memory), such as magnetic disk storage.Memory 1002 optionally can also be Independently of the storage device of aforementioned processor 1001.Data driver 1004 carries out the processing of data-signal, can be including frequency At least one of rate judging unit, current potential judging unit and internal processing modules.Timing driver chip 1005, for generating simultaneously Send data-signal and clock signal.
It will be understood by those skilled in the art that the structure of terminal shown in Fig. 1 was not constituted to the embodiment of the present application end The restriction at end may include perhaps combining certain components or different component layouts than illustrating more or fewer components.
As shown in Figure 1, as may include the transmission journey for passing data in a kind of memory 1002 of computer storage medium Sequence.
In server shown in Fig. 1, processor 1001 can be used for calling the biography of the data stored in memory 1002 Defeated program, and execute following operation:
When measuring data-signal, the corresponding clock signal of the data-signal is obtained;
Obtain the current potential of the clock signal in real time in the time interval, wherein the time interval is less than the clock Half of clock cycle of signal;
And when the current potential of acquisition is lower than preset threshold, increase the output amplitude of the clock signal.
Further, processor 1001 can call the transfer program of the data stored in memory 1002, also execute with Lower operation:
Obtain the initial magnitude of the clock signal in the clock cycle;
Target amplitude is determined according to the initial magnitude, and the output amplitude of the clock signal is increased into the target Amplitude.
Further, processor 1001 can call the transfer program of the data stored in memory 1002, also execute with Lower operation:
The current potential of clock signal described in real-time monitoring is the zero volt time point of zero volt;
When postponing preset duration at the zero volt time point, when obtaining described in real time as start time point using current point in time Between be spaced in the clock signal current potential.
Further, processor 1001 can call the transfer program of the data stored in memory 1002, also execute with Lower operation:
Obtain the clock cycle of the clock signal.
Further, processor 1001 can call the transfer program of the data stored in memory 1002, also execute with Lower operation:
The frequency for obtaining the clock signal, according to the clock cycle of clock signal described in the frequency acquisition;
Alternatively, obtain the zero volt time point of the clock signal, according between the two neighboring zero volt time point when Between clock signal described in interval acquiring clock cycle.
Further, processor 1001 can call the transfer program of the data stored in memory 1002, also execute with Lower operation:
The clock signal after being increased according to output amplitude obtains the data of the data-signal.
Further, processor 1001 can call the transfer program of the data stored in memory 1002, also execute with Lower operation:
Obtain the rising edge and failing edge of the clock signal after the output amplitude increases;
Determine time point corresponding with the rising edge and the failing edge in the data-signal;
And grab the corresponding data of time point described in the data-signal.
Further, processor 1001 can call the transfer program of the data stored in memory 1002, also execute with Lower operation:
When detecting data-signal, the corresponding clock signal of the data-signal is obtained;
Obtain the clock cycle of the clock signal;
The current potential of the clock signal in half of clock cycle is obtained in real time;
And when the current potential of acquisition is lower than preset threshold, the output amplitude of the clock signal is increased to pre- If amplitude.
Further, processor 1001 can call the transfer program of the data stored in memory 1002, also execute with Lower operation:
The current potential for monitoring the clock signal is the zero volt time point of zero volt;
The current potential of the clock signal in half of clock cycle after the zero volt time point is obtained in real time.
Reference Fig. 2, one embodiment of transmission method of the application data, the transmission method of the data include:
Step S10 when detecting data-signal, obtains the corresponding clock signal of the data-signal.
Step S20 obtains the current potential of the clock signal in real time in the time interval, wherein the time interval is less than Or half of clock cycle equal to the clock signal.
In life now, as the communication technology is more and more flourishing, more and more come real by the way of signal transmission The transmission of existing data.By taking the technical field of DTV as an example, as LCD TV size is increasing, resolution is increasingly Height, the data for needing to transmit are also increasing, and differential signal just obtains extensively as the transport protocol of high speed a kind of in data-signal It is general universal.But in data-signal during actual transmissions, due to transmitting the inconsistency of cabling characteristic impedance, data-signal Reflex can be encountered during transmission, and it is folded that reflected data-signal carries out signal with initial clock signal again Add, causes the waveform of the clock signal actually obtained uneven phenomenon occur, if at this moment again directly according to the clock signal Go the data of extraction data-signal, it is possible to the data of mistake can be extracted.
As shown in figure 3, top is the waveform of data-signal in figure, lower section is the waveform that clock signal generates.When clock is believed When number being reflected influence, the shape of clock signal changes, such as the B point of the A point for occurring being recessed in Fig. 3 and respective protrusions, When the current potential of A point is less than certain value, when signal identification, it is easy the current potential of the point being considered as negative value, at this point, the shape on the right side of A point The data in data-signal are grabbed at rising edge, and then according to the rising edge of generation, abnormal crawl phenomenon occurs, data is caused to be grabbed Take mistake.Likewise, forming failing edge on the right side of B point, with the data in this failing edge crawl data-signal, lead to data Grab mistake.When receiving end receives the data of mistake, data is be easy to cause to show the appearance of exception or noise.
In order to avoid the phenomenon that above-mentioned abnormal crawl data occurs, the application provides a kind of transmission method of data, is examining Measure that there are when data transmission, start to obtain the corresponding clock signal of data-signal.And determine the clock signal in time interval Current potential, wherein current potential direction of the clock signal within half of clock cycle is identical, thus the clock cycle be half of clock Period, therefore, the time interval is a period of time in half of clock cycle.It is added at data driver (Data Driver) There is current potential judging unit, after data driver gets clock signal, clock signal can be obtained by current potential judging unit The corresponding current potential of various time points.
Further, after the zero volt time point delay certain predetermined duration when the current potential for detecting clock signal is 0V, Start the current potential of the clock signal in time interval described in real-time detection.As shown in figure 4, detection clock signal is between the Δ t time Every interior current potential.It is easily understood that clock signal drops after being increased with output amplitude current potential in the half period of clock signal It is low be in sinusoidal, begin to ramp up and approach decline terminate in deposit within a certain period of time, current potential lesser time point, can Preset threshold can be lower than, therefore, the time interval of acquisition clock signal current potential is the partial time period in half period in real time, I.e. deduct half period start after a period of time and half period terminate before a period of time.It avoids to causing abnormal to grab point The erroneous judgement of (C point) increases output amplitude, when increasing on foot when output amplitude can satisfy the normal data crawl of clock signal The workload of clock signal sending end.
Step S30 increases the output amplitude of the clock signal when the current potential of acquisition is lower than preset threshold.
When being less than preset threshold there are current potential in detecting the time interval clock signal, show that the current potential is corresponding Time point negative voltage may be mistakenly considered by signal receiving end, be easy to produce rising edge or failing edge at this time point, into And using rising edge or failing edge as data grabber point.For the data grabber point for avoiding the formation of mistake, it is lower than getting current potential When preset threshold, the too low signal of feedback magnitude to clock signal transmitting terminal (for example, Timing driver chip), for clock letter Number transmitting terminal increase clock signal output amplitude.After the output amplitude of clock signal obtains increase, clock signal is symbol New output amplitude is closed, current potential is enhanced lower than the time point corresponding current potential of preset threshold, thus near this time point not It will appear rising edge or failing edge, efficiently avoid the mistake crawl of data.Wherein, preset threshold is the critical of signal judgement Value, usually desirable 0-0.3V.
In addition, data-signal is transmitted with sinusoidal waveform, the current potential in signal wave at various time points it is positive and negative be it is opposite, Above-mentioned can be considered illustrates by taking first half cycle as an example.When being the later half period when detection, judge it is contrary, i.e., when getting electricity When position is higher than preset threshold, increase the output amplitude of clock signal, preset threshold is negative value at this time;Either, second half is changed The current potential direction of phase after taking opposite number to become positive value the current potential in later half period, then carries out whether current potential is lower than preset threshold Judgement.
As shown in figure 4, the current potential in detection clock signal in the Δ t period, when the current potential for detecting C point is less than 0.3V When, the feedback information for increasing amplitude is fed back to clock signal output terminal, clock signal output terminal increases the defeated of subsequent clock signal Amplitude out forms the corresponding clock signal wave of solid line (dotted line is the clock signal wave before output amplitude increases) below, at this point, with The C point period current potential of corresponding D point is improved, and receives the clock signal after amplitude increases in data driver, correct to know Other high level or low level, D point will not nearby generate the rising edge or failing edge of erroneous judgement again, avoid the mistake crawl of data.
Further, the initial magnitude of the initial clock signal sent due to each clock signal transmitting terminal is different, so When the output amplitude to clock signal increases, initial magnitude is first obtained, determines target amplitude further according to initial magnitude, when by this The output amplitude of clock signal increases to target amplitude.For example, show when initial magnitude is 0.5V using 0.5V as output amplitude, Point is grabbed in the presence of abnormal, it is determined that target amplitude 0.8, i.e., it is subsequent to generate and send clock signal by output amplitude of 0.8V; If initial magnitude is 0.4V, target amplitude can be 0.6V.The increasing degree of specific amplitude is determined by experiment, is only for example herein Explanation.
In the present embodiment, when detecting the presence of data transmission, start to obtain the corresponding clock signal of data-signal.And Determine the current potential of clock signal time interval Nei, wherein less than half clock cycle of the time interval.It is described detecting When being less than preset threshold there are current potential in time interval clock signal, transmission of the too low signal of feedback magnitude to clock signal It holds (for example, Timing driver chip), so that the transmitting terminal of clock signal increases the output amplitude of clock signal.In clock signal After output amplitude obtains increase, clock signal is to meet new output amplitude, and current potential is corresponding lower than the time point of preset threshold Current potential is enhanced, to be not in rising edge or failing edge near this time point, the mistake for efficiently avoiding data is grabbed It takes.
Further, referring to Fig. 5, another embodiment of the transmission method of the application data is based on an above-mentioned embodiment, described After step S10, further includes:
Step S40 obtains the clock cycle of the clock signal.
It is provided with frequency judging unit in data driver (Data Driver), can be obtained by frequency judging unit Since the period is reciprocal each other with frequency, therefore clock signal can be obtained according to the frequency got in the frequency for taking clock signal Clock cycle.
In addition, clock letter can be got by the current potential judging unit being arranged in data driver (Data Driver) Current potential is the zero volt time point of 0V in number, and the time interval in clock signal between two adjacent zero volt time points is half of clock Period, therefore, the clock cycle can be obtained according to two adjacent zero volt time points.Clock letter can also be obtained by other means Number clock cycle, will no longer repeat one by one again.
In the present embodiment, after getting clock signal, the clock cycle is obtained according to clock signal, in order to subsequent Described in the presence or absence of the judgement time interval of the abnormal crawl of data, that is, being determined in clock cycle determining detection clock signal Time interval helps to disappear to data exception crawl point to obtain the current potential of the clock signal in real time in the time interval It removes, avoids data acquisition mistake.
Further, referring to Fig. 6, another embodiment of the transmission method of the application data is based on above-mentioned each embodiment, institute After stating step S30, further includes:
Step S50, the clock signal after being increased according to output amplitude obtain the data of the data-signal.
Although the output amplitude of clock signal is increased, the period of the clock signal and frequency do not receive and change Become, therefore the clock signal after being increased according to output amplitude still can effectively grab the corresponding data letter of the clock signal Valid data in number.And clock signal, after the increase of output amplitude, some previously existing abnormal crawl points are gone It removes, therefore, the data in data-signal can be accurately grabbed according to this clock signal, improve the accuracy of data grabber.
By amplitude increase after clock signal grab data when, obtain the clock signal rising edge and/or under Edge is dropped, determines time point corresponding with the rising edge or the failing edge in the corresponding data-signal, and when determining Between data in data-signal are grabbed at point.
In the present embodiment, when the clock signal after increasing by amplitude grabs data, the clock signal is obtained Rising edge and/or failing edge determine time point corresponding with the rising edge or the failing edge in the corresponding data-signal, And the data in data-signal are grabbed at determining time point.It, should although the output amplitude of clock signal is increased The period of clock signal and frequency do not receive change, therefore the clock signal after being increased according to output amplitude still can Effectively grab the valid data in the corresponding data-signal of the clock signal.And clock signal is after the increase of output amplitude, Some previously existing abnormal crawl points are removed, therefore, the number in data-signal can be accurately grabbed according to this clock signal According to improving the accuracy of data grabber.
In addition, the embodiment of the present application also proposes a kind of transmission method of data, when detecting the presence of data transmission, start The corresponding clock signal of data-signal is obtained, and obtains the clock cycle of the clock signal.Due to half of complete clock week Phase inner potential direction is identical, so the current potential of clock signal is obtained in real time, when there are current potentials to be less than preset threshold in clock signal When, show that the current potential corresponding time point may be mistakenly considered negative voltage by signal receiving end, is easy to produce at this time point Rising edge or failing edge, and then using rising edge or failing edge as data grabber point.To avoid the formation of wrong data grabber point, When getting current potential lower than preset threshold, the too low signal of feedback magnitude to clock signal transmitting terminal (for example, Timing driver Chip), so that the transmitting terminal of clock signal increases the output amplitude of clock signal.Default amplitude is obtained, by the defeated of clock signal Amplitude increases to the default amplitude out.After the output amplitude of clock signal obtains increase, clock signal is to meet new output Amplitude, current potential are enhanced lower than the time point corresponding current potential of preset threshold, to be not in rise near this time point Edge or failing edge efficiently avoid the mistake crawl of data.
Further, the acquisition time section to make the current potential of clock signal is complete half of clock cycle, when detection The current potential of clock signal is the zero volt time point of zero volt, and is enlightenment time point with the zero volt time point, obtains half of clock week The current potential of phase clock signal
In addition, the embodiment of the present application also proposes that a kind of transmitting device of data, the transmitting device of the data include: storage Device, processor and the transfer program for being stored in the data that can be run on the memory and on the processor, the data The transfer program the step of transmission method of data described in as above each embodiment is realized when being executed by the processor.
In addition, the application can also include a kind of computer readable storage medium, on the computer readable storage medium It is stored with the transfer program of data, the transfer program of the data is for realizing as above each embodiment institute when being executed by processor The step of transmission method for the data stated.
It should be noted that, in this document, the terms "include", "comprise" or its any other variant are intended to non-row His property includes, so that the process, method, article or the system that include a series of elements not only include those elements, and And further include other elements that are not explicitly listed, or further include for this process, method, article or system institute it is intrinsic Element.In the absence of more restrictions, the element limited by sentence "including a ...", it is not excluded that including being somebody's turn to do There is also other identical elements in the process, method of element, article or system.
Above-mentioned the embodiment of the present application serial number is for illustration only, does not represent the advantages or disadvantages of the embodiments.
Through the above description of the embodiments, those skilled in the art can be understood that above-described embodiment side Method can be realized by means of software and necessary general hardware platform, naturally it is also possible to by hardware, but in many cases The former is more preferably embodiment.Based on this understanding, the technical solution of the application substantially in other words does the prior art The part contributed out can be embodied in the form of software products, which is stored in one as described above In storage medium (such as ROM/RAM, magnetic disk, CD), including some instructions are used so that terminal device (it can be mobile phone, Computer, server, air conditioner or network equipment etc.) execute method described in each embodiment of the application.
The above is only preferred embodiment of the present application, are not intended to limit the scope of the patents of the application, all to utilize this Shen Please equivalent structure or equivalent flow shift made by specification and accompanying drawing content, be applied directly or indirectly in other relevant skills Art field similarly includes in the scope of patent protection of the application.

Claims (10)

1. a kind of transmission method of data, which is characterized in that the transmission methods of the data the following steps are included:
When detecting data-signal, the corresponding clock signal of the data-signal is obtained;
Obtain the current potential of the clock signal in real time in the time interval, wherein when the time interval is less than or equal to described Half of clock cycle of clock signal;
And when the current potential of acquisition is lower than preset threshold, increase the output amplitude of the clock signal.
2. the transmission method of data as described in claim 1, which is characterized in that the output width for increasing the clock signal The step of value includes:
Obtain the initial magnitude of the clock signal in the clock cycle;
Target amplitude is determined according to the initial magnitude, and the output amplitude of the clock signal is increased into the target width Value.
3. the transmission method of data as described in claim 1, which is characterized in that it is described obtain the data-signal it is corresponding when After the step of clock signal, further includes:
The current potential of clock signal described in real-time monitoring is the zero volt time point of zero volt;
When postponing preset duration at the zero volt time point, obtained in real time using current point in time as start time point between the time Every the current potential of the interior clock signal.
4. the transmission method of data as described in claim 1, which is characterized in that it is described obtain the data-signal it is corresponding when After the step of clock signal, further includes:
Obtain the clock cycle of the clock signal.
5. the transmission method of data as claimed in claim 4, which is characterized in that the clock week for obtaining the clock signal The step of phase includes:
The frequency for obtaining the clock signal, according to the clock cycle of clock signal described in the frequency acquisition;
Alternatively, the zero volt time point of the clock signal is obtained, according between the time between the two neighboring zero volt time point Every the clock cycle for obtaining the clock signal.
6. the transmission method of data a method as claimed in any one of claims 1 to 5, which is characterized in that the increase clock signal After the step of output amplitude, further includes:
The clock signal after being increased according to output amplitude obtains the data of the data-signal.
7. the transmission method of data as claimed in claim 6, which is characterized in that it is described increased according to output amplitude after described in Clock signal obtains the step of data of the data-signal and includes:
Obtain the rising edge and failing edge of the clock signal after the output amplitude increases;
Determine time point corresponding with the rising edge and the failing edge in the data-signal;
And grab the corresponding data of time point described in the data-signal.
8. a kind of transmission method of data, which is characterized in that the transmission methods of the data the following steps are included:
When detecting data-signal, the corresponding clock signal of the data-signal is obtained;
Obtain the clock cycle of the clock signal;
The current potential of the clock signal in half of clock cycle is obtained in real time;
And when the current potential of acquisition is lower than preset threshold, the output amplitude of the clock signal is increased into default width Value.
9. the transmission method of data as claimed in claim 8, which is characterized in that half of clock cycle of the real-time acquisition The step of current potential of the interior clock signal includes:
The current potential for monitoring the clock signal is the zero volt time point of zero volt;
The current potential of the clock signal in half of clock cycle after the zero volt time point is obtained in real time.
10. a kind of transmitting device of data, which is characterized in that the transmitting device of the data includes: memory, processor and deposits The transfer program for the data that can be run on the memory and on the processor is stored up, the transfer program of the data is by institute State the step of realizing the transmission method of data as described below when processor executes:
When detecting data-signal, the corresponding clock signal of the data-signal is obtained;
Obtain the current potential of the clock signal in real time within the clock cycle of the clock signal;
And when the current potential of acquisition is lower than preset threshold, increase the output amplitude of the clock signal.
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CN109787716B CN109787716B (en) 2020-12-29

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