CN109787602A - Floating level field effect transistor or transistor driving circuit based on coupling capacitor - Google Patents
Floating level field effect transistor or transistor driving circuit based on coupling capacitor Download PDFInfo
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- CN109787602A CN109787602A CN201811601147.0A CN201811601147A CN109787602A CN 109787602 A CN109787602 A CN 109787602A CN 201811601147 A CN201811601147 A CN 201811601147A CN 109787602 A CN109787602 A CN 109787602A
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- 239000003990 capacitor Substances 0.000 title claims abstract description 50
- 230000005669 field effect Effects 0.000 title claims abstract description 8
- 230000008878 coupling Effects 0.000 title abstract 5
- 238000010168 coupling process Methods 0.000 title abstract 5
- 238000005859 coupling reaction Methods 0.000 title abstract 5
- 238000000034 method Methods 0.000 claims description 16
- 239000003381 stabilizer Substances 0.000 claims description 3
- 230000006978 adaptation Effects 0.000 description 6
- 238000013461 design Methods 0.000 description 6
- 238000010586 diagram Methods 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
- 230000005611 electricity Effects 0.000 description 2
- 238000012986 modification Methods 0.000 description 2
- 230000004048 modification Effects 0.000 description 2
- 238000007796 conventional method Methods 0.000 description 1
- 238000012938 design process Methods 0.000 description 1
- 238000004870 electrical engineering Methods 0.000 description 1
- 238000012545 processing Methods 0.000 description 1
Classifications
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02E—REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
- Y02E60/00—Enabling technologies; Technologies with a potential or indirect contribution to GHG emissions mitigation
- Y02E60/10—Energy storage using batteries
Abstract
The invention discloses a floating level field effect transistor or transistor driving circuit based on a coupling capacitor, which comprises a FET driving circuit and a BJT driving circuit; the FET driving circuit comprises n groups of FETs, n coupling capacitors and n resistors, wherein each group of FETs comprises at least one FET; the sources of the group of FETs are at the same level; for the ith group of FETs: the switch signal terminal is connected with the gate of each FET of the group through a coupling capacitor Ci, and is connected with the source of the FET through a resistor Ri; i is a natural number from 1 to n. The BJT drive circuit comprises n groups of BJTs, wherein each group of BJTs comprises at least one BJT; the emitters of the BJTs are at the same level; for the ith group of BJTs: the switch signal terminal is connected with the base of each BJT of the group through a coupling capacitor Ci ', and the switch signal terminal is connected with the emitter of the BJT through a resistor Ri'.
Description
Technical field
The invention belongs to Electronics and Information Engineering and electrical engineering technical field more particularly to a kind of floating based on coupled capacitor
Dynamic level field-effect tube or transistor driver circuit.
Background technique
In Switching Power Supply, the fields such as signal processing need to go using switching signal (can be the waveforms such as square wave, PWM wave)
Opening and closing of the control in elements such as other level MOSFET, BJT, it is desirable that driving signal can cross over different electricity
It is flat, in addition, needing to open or close multiple transistors simultaneously there are also in certain applications, and it is possible to multiple transistors and is located at not
On same level, these are all that the design of driving circuit proposes higher difficulty.
The conventional method for solving above-mentioned transistor driving makes using charge pump or dedicated driving chip, circuit is complicated, at
This height, so needing a kind of succinct, low cost drive scheme across level.
Summary of the invention
In view of the drawbacks of the prior art, the present invention provides a kind of float level FET or BJT driving electricity based on coupled capacitor
Road.
It is of the present invention the specific technical proposal is:
The goal of the invention of this patent is to provide a kind of float level field-effect tube or transistor driving based on coupled capacitor
Circuit, including FET driving circuit and BJT driving circuit；Wherein:
The FET driving circuit includes n group FET, and every group of FET includes at least one FET；It is directed to i-th group of FET: switch
Signal terminal is connect by coupled capacitor Ci with the grid of each FET of the group, and the switching signal terminal passes through a resistance
The source electrode of Ri and FET connects；The natural number that i is 1 to n；
It is directed to the choosing method of coupled capacitor are as follows:
Coupled capacitor between i-th group of FET and switching signal terminal is labeled as Ci；
The grid and source capacitance of each FET in the corresponding FET group of coupled capacitor Ci are detected from FET handbook first
CGS-ij；
Then the corresponding coupled capacitor Ci of i-th group of FET meets following formula:
Wherein: miFor the quantity of i-th group of FET；
It is directed to the choosing method of divider resistance are as follows:
Divider resistance between i-th group of FET and switching signal terminal is labeled as Ri；The period indicia of switching signal is
TS；The maximum duration of adaptation level is labeled as TV；TVGreater than 10 times TS；Resistance RiValue range are as follows:
The BJT driving circuit includes n group BJT, and every group of BJT includes at least one BJT；It is directed to i-th group of BJT: switch
Signal terminal is connect by coupled capacitor Ci ' with the base stage of each BJT of the group, and the switching signal terminal passes through a resistance
Ri ' is connect with the emitter of each BJT；The natural number that i is 1 to n；
It is directed to the choosing method of coupled capacitor are as follows:
Coupled capacitor between i-th group of BJT and switching signal terminal is labeled as Ci '；
Consumed when being opened according to transistor electric current label, will this group BJT corresponding with coupled capacitor Ci ' j-th of BJT
Base current be labeled as IB-ij；The period of switching signal is TS', then coupled capacitor Ci ' value range is
Wherein: miFor the quantity of i-th group of BJT；
It is directed to the choosing method of resistance are as follows:
It is Ri ' by the resistance mark between the emitter and switching signal terminal of i-th group of BJT；The period of switching signal marks
It is denoted as TS'；The maximum duration of adaptation level is labeled as TV'；Resistance Ri' value range are as follows:
Further, the source electrode of each FET is connect by voltage-stabiliser tube with the grid of the FET；Each coupled capacitor Ci passes through limit
The connection of the grid of leakage resistance and FET.
Advantages of the present invention and good effect are as follows:
By using above-mentioned technical proposal, the present invention using coupled capacitor realize to multiple FET in varying level with
BJT drive control, simplifies circuit structure.Suitable for fields such as small-power switching power-supply, circuit of battery pack balancing, according to than tradition
Using the mode of special driving chip, cost has been saved, has reduced circuit complexity, has reduced power consumption.
Detailed description of the invention
Fig. 1 is the first embodiment circuit diagram of FET driving circuit in the present invention；
Fig. 2 is the second embodiment circuit diagram of FET driving circuit in the present invention；
Fig. 3 is BJT driving circuit in the present invention；
Specific embodiment
In order to further understand the content, features and effects of the present invention, the following examples are hereby given, and cooperate attached drawing
Detailed description are as follows.
Structure of the invention is explained in detail with reference to the accompanying drawing.
It please refers to Fig.1 to Fig.3: a kind of float level field-effect tube or transistor driver circuit based on coupled capacitor, packet
Include FET driving circuit and BJT driving circuit；Wherein:
The FET driving circuit includes n group FET as shown in Figure 1:, and every group of FET includes at least one FET；It is directed to i-th
The source electrode of FET: this group FET of group is located at unified level；Switching signal terminal passes through coupled capacitor Ci's and each FET of the group
Grid connection, the switching signal terminal are connected by the source electrode of resistance Ri and FET；The natural number that i is 1 to n；
It is directed to the choosing method of coupled capacitor capacitance are as follows:
Coupled capacitor between i-th group of FET grid and switching signal terminal is labeled as Ci；
The grid and source capacitance of each FET in the corresponding FET group of coupled capacitor Ci are detected from FET handbook first
CGS-ij；
Then the corresponding coupled capacitor Ci of i-th group of FET meets following formula:
Wherein: miFor the quantity of i-th group of FET；
It is directed to the choosing method of divider resistance are as follows:
It is Ri by the resistance mark between i-th group of FET source and switching signal terminal；The period indicia of switching signal is
TS；The maximum duration of adaptation level is labeled as TV；TVGreater than 10 times TS；Resistance RiValue range are as follows:
Furthermore it is also possible to increase current-limiting resistance and voltage-stabiliser tube in the topology of FET driving circuit, as shown in Figure 2.
As shown in Figure 3: the BJT driving circuit includes n group BJT, and every group of BJT includes at least one BJT；It is directed to i-th
The emitting stage of BJT: this group BJT of group is in uniform level；Switching signal terminal passes through each BJT of coupled capacitor Ci ' and the group
Base stage connection, the switching signal terminal connect by resistance Ri ' with the emitter of BJT；The natural number that i is 1 to n；
It is directed to the choosing method of coupled capacitor are as follows:
Coupled capacitor between i-th group of BJT and switching signal terminal is labeled as Ci '；
Consumed when being opened according to transistor electric current label, will this group BJT corresponding with coupled capacitor Ci ' j-th of BJT
Base current be labeled as IB-ij；The period of switching signal is TS', then coupled capacitor Ci ' value range is
miFor the quantity of i-th group of BJT；
It is directed to the choosing method of divider resistance are as follows:
It is Ri ' by the resistance mark between i-th group of BJT emitter and switching signal terminal；The period indicia of switching signal
For TS'；The maximum duration of adaptation level is labeled as TV'；Resistance Ri' value range are as follows:
The design process of foregoing circuit is illustrated in detail below:
It is comprised the steps of: first against the design method of the driving circuit of FET
1st, circuit topological structure is designed
Circuit shown in Fig. 1 is used to the circuit design for driving multiple FET.In figure, level where FET is divided into GND-1, GND-
2 ... ..., GND-i ... ..., GND-n are based on each level, can drive multiple FET devices simultaneously, can such as drive and be in
The level FET of GND-i includes Qia, Qib ... ..., Qij ... ..., Qimi。
2nd, component value in FET driving circuit is calculated
2.1st, the selection of capacitance
(grid and source capacitance of such as Qij is denoted as C to the grid and source capacitance for detecting FET from FET handbookGS-ij)。
With the i-th row of Fig. 1 CiCalculating for illustrate the value range selection of capacitor, value should meet
And capacitance is the bigger the better.
2.2nd, the calculating of the selection range of resistance value
Still with the i-th row of Fig. 1 RiCalculating for illustrate resistance value range selection, value should be according to Ci, switching signal
Period (is denoted as TS), the maximum duration (T of adaptation levelV) require to determine range (note: the maximum duration (T of adaptation levelV) be
When referring to that the level where the FET changes, it is desirable to which how long driving circuit is with tracking upper new level, TVIt should be greater than 10 times
TS).This resistance RiValue range be
Similar with the i-th row for the capacitor of other rows, resistance value calculating process in Fig. 1, this will not be repeated here.
Secondly, being comprised the steps of: for the design method of the driving circuit of BJT
1st, design circuit topological structure
BJT number of driving is needed in level number according to actual needs and each level, according to Fig. 3 design circuit topology knot
Structure.
2nd, the component value range of resistance capacitance in counting circuit
2.1st, calculate the component value range of coupled capacitor
(base current of the BJT of serial number Qij is I to the electric current consumed when being opened according to each transistorB-ij), and it is false
If the period of switching signal is TS', then the coupled capacitor Ci value range of the i-th row is
2.2nd, calculate the component value range of resistance
Assuming that the time for tracking level is T after level changesV', still with the i-th behavior example, the value range of Ri '
It is
The above is only the preferred embodiments of the present invention, and is not intended to limit the present invention in any form,
Any simple modification made to the above embodiment according to the technical essence of the invention, equivalent variations and modification, belong to
In the range of technical solution of the present invention.
Claims (2)
1. a kind of float level field-effect tube or transistor driver circuit based on coupled capacitor, it is characterised in that: driven including FET
Dynamic circuit and BJT driving circuit；Wherein:
The FET driving circuit includes n group FET, n coupled capacitor and n resistance, and every group of FET includes at least one FET；Needle
Same level is in for the source electrode of i-th group of FET: this group FET；Switching signal terminal passes through each of coupled capacitor Ci and the group
The grid of FET connects, the source electrode connection of switching signal the terminal resistance Ri and FET；The natural number that i is 1 to n；
It is directed to the choosing method of coupled capacitor are as follows:
Coupled capacitor between i-th group of FET and switching signal terminal is labeled as Ci；
The grid and source capacitance C of each FET in the corresponding FET group of coupled capacitor Ci are detected from FET handbook firstGS-ij；
Then the corresponding coupled capacitor Ci of i-th group of FET meets following formula:
Wherein: miFor the quantity of i-th group of FET；
It is directed to the choosing method of divider resistance are as follows:
It is Ri by the resistance mark between i-th group of FET source and switching signal terminal；The period indicia of switching signal is TS；It adapts to
The maximum duration of level is labeled as TV；TVGreater than 10 times TS；Resistance RiValue range are as follows:
The BJT driving circuit includes n group BJT, and every group of BJT includes at least one BJT；It is directed to i-th group of BJT: this group BJT's
Emitter is in same level；Switching signal terminal is connect by coupled capacitor Ci ' with the base stage of each BJT of the group, described
Switching signal terminal is connect by resistance Ri ' with the emitter of BJT；The natural number that i is 1 to n；
It is directed to the choosing method of coupled capacitor are as follows:
Coupled capacitor between i-th group of BJT and switching signal terminal is labeled as Ci '；
The base current of j-th of BJT is labeled as I in i-th group when being opened according to transistorB-ij, coupled capacitor Ci '；Switching signal
Period is TS', then coupled capacitor Ci ' value range is
Wherein: miFor the quantity of i-th group of BJT；
It is directed to the choosing method of divider resistance are as follows:
Divider resistance between i-th group of BJT and switching signal terminal is labeled as Ri '；The period indicia of switching signal is TS'；It is suitable
Answer the maximum duration of level labeled as TV'；Resistance Ri' value range are as follows:
2. the float level field-effect tube or transistor driver circuit according to claim 1 based on coupled capacitor, special
Sign is: the source electrode of each FET is connect by voltage-stabiliser tube with the grid of the FET；Each coupled capacitor Ci by current-limiting resistance with
The grid of FET connects.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201811601147.0A CN109787602B (en) | 2018-12-26 | 2018-12-26 | Floating level field effect transistor or transistor driving circuit based on coupling capacitor |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201811601147.0A CN109787602B (en) | 2018-12-26 | 2018-12-26 | Floating level field effect transistor or transistor driving circuit based on coupling capacitor |
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| CN109787602A true CN109787602A (en) | 2019-05-21 |
| CN109787602B CN109787602B (en) | 2023-02-28 |
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Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2012103711A1 (en) * | 2011-01-31 | 2012-08-09 | Tsinghua University | Vertically foldable memory array structure |
| US9780746B1 (en) * | 2016-04-13 | 2017-10-03 | Macom Technology Solutions Holdings, Inc. | N-stacked field effect transistor based traveling wave power amplifier for monolithic microwave integrated circuits |
| US20180175851A1 (en) * | 2016-12-21 | 2018-06-21 | Qorvo Us, Inc. | Transistor-based radio frequency (rf) switch |
-
2018
- 2018-12-26 CN CN201811601147.0A patent/CN109787602B/en active Active
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2012103711A1 (en) * | 2011-01-31 | 2012-08-09 | Tsinghua University | Vertically foldable memory array structure |
| US9780746B1 (en) * | 2016-04-13 | 2017-10-03 | Macom Technology Solutions Holdings, Inc. | N-stacked field effect transistor based traveling wave power amplifier for monolithic microwave integrated circuits |
| US20180175851A1 (en) * | 2016-12-21 | 2018-06-21 | Qorvo Us, Inc. | Transistor-based radio frequency (rf) switch |
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| Publication number | Publication date |
|---|---|
| CN109787602B (en) | 2023-02-28 |
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Effective date of registration: 20211118 Address after: 300384 No. 6 Huake No. 7 Road, Binhai New Area, Tianjin Binhai High-tech Industrial Development Zone Applicant after: CETC Energy Co.,Ltd. Address before: 300384 No. 6 Huake No. 7 Road, Binhai New Area, Tianjin Binhai High-tech Industrial Development Zone Applicant before: The 18th Research Institute of China Electronics Technology Group Corporation |
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Address after: 300384 No. 6 Huake No. 7 Road, Binhai New Area, Tianjin Binhai High-tech Industrial Development Zone Patentee after: CETC Blue Sky Technology Co.,Ltd. Address before: 300384 No. 6 Huake No. 7 Road, Binhai New Area, Tianjin Binhai High-tech Industrial Development Zone Patentee before: CETC Energy Co.,Ltd. |
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