CN109785812A - Driving method, display equipment and the storage medium of display panel - Google Patents
Driving method, display equipment and the storage medium of display panel Download PDFInfo
- Publication number
- CN109785812A CN109785812A CN201910098357.0A CN201910098357A CN109785812A CN 109785812 A CN109785812 A CN 109785812A CN 201910098357 A CN201910098357 A CN 201910098357A CN 109785812 A CN109785812 A CN 109785812A
- Authority
- CN
- China
- Prior art keywords
- pixel
- sub
- gate drive
- signal
- voltage
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Landscapes
- Control Of Indicators Other Than Cathode Ray Tubes (AREA)
Abstract
The invention discloses a kind of driving method of display panel, display equipment and storage medium, the present invention is switched by the gate of the odd column pixel unit of same one-row pixels unit and the even column pixels unit of adjacent rows pixel unit and shares the first gate drive line signal；Gate with the odd column pixel unit of the even column pixels unit and adjacent rows pixel unit of one-row pixels unit switchs shared second gate drive line signal, the driving of height equivalent voltage just can be formed with a line adjacent subpixels unit, to reach the difference of the charging of high voltage sub-pixel with the charging of low-voltage sub-pixel, and then solves visual angle colour cast, naked eyes will not obviously tell the difference of high voltage sub-pixel Yu low-voltage sub-pixel, and the defect of resolution decline is avoided, the user experience is improved.
Description
Technical field
The present invention relates to field of liquid crystal more particularly to a kind of driving method of display panel, display equipment and deposit
Storage media.
Background technique
Large scale liquid crystal display panel mostly uses greatly minus vertical orientation (VerticalAlignment, VA) formula or total
Plane switches (InPanelSwitching, IPS) formula.There are higher productions compared to IPS liquid crystal technology for VA type liquid crystal technology
, then there is obvious optical property defect in the advantage of efficiency and low manufacturing cost, but compared to IPS liquid crystal technology, such as
When wide-angle image is presented, VA type liquid crystal display panel can have colour cast.When performing image display, the brightness of pixel is in ideal
In the case of should be as linear variation is presented in the variation of voltage, the driving voltage of such pixel can accurately indicate pixel
Grayscale, and embodied by brightness.When as shown in Figure 1a, using VA type liquid crystal technology, is watched and being shown with lesser visual angle
When face (such as facing), the brightness of pixel can meet ideal situation, i.e., linear change is presented with voltage, such as the ideal in Fig. 1 a
Shown in curve；But when watching display surface with biggish visual angle (such as with display surface in 160 degree or more), due to VA type liquid crystal skill
Art principle is limited, and the brightness of pixel is rapidly saturated as voltage shows, then slowly varying situation, such as the reality in Fig. 1 a
Shown in curve.So, under big visual angle, there is serious deviation, that is, occurs in the grayscale that driving voltage should be presented originally
Colour cast.It is that each sub-pixel is sub-divided into a main pixel and sub-pixel that being conventionally used to, which improves the mode of colour cast, then
Main pixel is driven with relatively high driving voltage, the relatively low driving voltage of use drives sub-pixel, and main pixel and sub-pixel are together
Show a sub-pixel.And the relatively high driving voltage and relatively low driving voltage are driving main pixel and sub-pixel
When, the brightness and the relationship of corresponding grayscale being able to maintain that under front viewing angle are constant.It generally, is using side as shown in Figure 1 b
Formula, the front half section of grayscale, main pixel with relatively high driving voltage drive display, sub-pixel do not show, entire sub-pixel it is bright
Degree is exactly the half of main pixel intensity；In the second half section of grayscale, main pixel drives display, sub-pixel with relatively high driving voltage
Display is driven with relatively low driving voltage, the brightness of entire sub-pixel is exactly that the brightness of main pixel adds the brightness of sub-pixel
The half of sum.After synthesizing in this way, the actual curve in brightness curve such as Fig. 1 b under big visual angle, closer to ideal curve, because
Colour cast situation under this big visual angle makes moderate progress.
But the above method the problem is that, need to increase new metal routing and film crystal
(ThinFilmTransistor, TFT) drives sub-pixel, will cause light-permeable open region sacrifice, influence panel light transmission rate, directly
It connects and causes backlight cost also higher.
Summary of the invention
It is a primary object of the present invention to propose a kind of driving method of display panel, display equipment and storage medium, purport
It is solving that light-permeable open region can be sacrificed in the prior art, is influencing panel light transmission rate, backlight cost also higher problem.
To achieve the above object, the present invention provides a kind of driving method of display panel, the driving side of the display panel
Method the following steps are included:
It is characterized in that, the display panel includes array of display, the array of display includes the pixel being arranged in array
Unit, the pixel unit include the first sub-pixel, the second sub-pixel and third sub-pixel on line direction, each pixel unit
Three sub-pixels be aligned in a column direction according to the sequence of arrangement；The driving method includes:
With the gate of the even column pixels unit of the odd column pixel unit and adjacent rows pixel unit of one-row pixels unit
It switchs and shares the first gate drive line signal；With the even column pixels unit and adjacent rows pixel units of one-row pixels unit
The gate of odd column pixel unit, which switchs, shares the second gate drive line signal；
Using the first gate drive line signal as main switch pole driving signal, the second gate drive route is believed
Number as time gate drive signal, by controlling main switch pole driving signal the combination data driving in the driver' s timing of main switch pole
Signal carries out charge volume control to each sub-pixel, the control secondary gate drive signal combination institute in He Ci gate drive timing
State data driving signal and charge volume control carried out to each sub-pixel, wherein main switch pole driver' s timing be former row gate sequentially
The timing of driving, the secondary gate drive timing are the ibid corresponding gate drive timing of an adjacent high voltage sub-pixel.
Optionally, described using the first gate drive line signal as main switch pole driving signal, by second lock
Pole driver circuit signal is as time gate drive signal, by controlling main switch pole driving signal in the driver' s timing of main switch pole
Charge volume control is carried out to each sub-pixel in conjunction with data driving signal, the control secondary gate drives in He Ci gate drive timing
Dynamic signal carries out charge volume control to each sub-pixel in conjunction with the data driving signal, specifically includes:
Using the first gate drive line signal as main switch pole driving signal, the second gate drive route is believed
Number as time gate drive signal；
When current timing is the first default timing, the first gate is used to the high voltage sub-pixel in each column pixel unit
Corresponding first predeterminated voltage of driver circuit signal is driven, and uses second to the low-voltage sub-pixel in each column pixel unit
Corresponding second predeterminated voltage of gate drive line signal is driven；By controlling the main switch in the driver' s timing of main switch pole
Pole driving signal combination data driving signal carries out charge volume control to each sub-pixel, by first time gate drive timing and
The control secondary gate drive signal carries out each sub-pixel in conjunction with the data driving signal in second of gate drive timing
Charge volume control, the first time gate drive timing are less than main switch pole driver' s timing and second of gate drive
Timing；
When the data drive signal for receiving data drive circuit input carries out timing reversion, by first gate drive
Line signal and the second gate drive line signal carry out periodic inversion；
When current timing is the second default timing, the first gate is used to the high voltage sub-pixel in each column pixel unit
Corresponding first predeterminated voltage of driver circuit signal is driven, and uses second to the low-voltage sub-pixel in each column pixel unit
Corresponding second predeterminated voltage of gate drive line signal is driven.
Optionally, described using the first gate drive line signal as main switch pole driving signal, by second lock
Pole driver circuit signal is as time gate drive signal, by controlling main switch pole driving signal in the driver' s timing of main switch pole
Charge volume control is carried out to each sub-pixel in conjunction with data driving signal, the control secondary gate drives in He Ci gate drive timing
Before dynamic signal carries out charge volume control to each sub-pixel in conjunction with the data driving signal, the driving method of the display panel
Further include:
Any two adjacent pixel unit of column direction is chosen, the first adjacent subpixels unit and the second adjacent sub- picture are obtained
The voltage status of plain unit；
It is high voltage, the electricity of the second adjacent subpixels unit in the voltage status of the first adjacent subpixels unit
When pressure condition is low-voltage, the second sub-pixel in the first adjacent subpixels unit is carried out using positive polarity driving signal
Driving drives the second sub-pixel in the second adjacent subpixels unit using negative polarity driving signal；
It is low-voltage, the electricity of the second adjacent subpixels unit in the voltage status of the first adjacent subpixels unit
When pressure condition is high voltage, the second sub-pixel in the first adjacent subpixels unit is carried out using negative polarity driving signal
Driving drives the second sub-pixel in the second adjacent subpixels unit using positive polarity driving signal.
Optionally, it is described choose column direction any two adjacent pixel unit, obtain the first adjacent subpixels unit and
After the voltage status of second adjacent subpixels unit, the driving method of the display panel further include:
When the predeterminated voltage meets preset condition, to the high voltage sub-pixel and low electricity in the sub-pixel of the selection
The equivalent driving voltage of pressure sub-pixel is driven using preset data driving signal, and the preset data driving signal is original
The average signal of the driving signal of the adjacent two sub-pixels of same row.
Optionally, described using the first gate drive line signal as main switch pole driving signal, by second lock
Pole driver circuit signal is as time gate drive signal, by controlling main switch pole driving signal in the driver' s timing of main switch pole
Charge volume control is carried out to each sub-pixel in conjunction with data driving signal, the control secondary gate drives in He Ci gate drive timing
After dynamic signal carries out charge volume control to each sub-pixel in conjunction with the data driving signal, the driving method of the display panel
Further include:
The adjacent two sub-pixels of same row, the equivalent drive to the high voltage sub-pixel in the sub-pixel of selection are chosen respectively
The equivalent driving voltage of low-voltage sub-pixel in sub-pixel of the dynamic voltage to be greater than the selection is driven.
It is optionally described using the first gate drive line signal as main switch pole driving signal, by second gate
After driver circuit signal is as time gate drive signal, the driving method further include:
When current timing is the first default timing, the first gate is used to the high voltage sub-pixel in each column pixel unit
Corresponding first predeterminated voltage of driver circuit signal is driven, and uses second to the low-voltage sub-pixel in each column pixel unit
Corresponding second predeterminated voltage of gate drive line signal is driven；By controlling the main switch in the driver' s timing of main switch pole
Pole driving signal combination data driving signal carries out charge volume control to each sub-pixel, by first time gate drive timing and
The control secondary gate drive signal carries out each sub-pixel in conjunction with the data driving signal in second of gate drive timing
Charge volume control, the first time gate drive timing are less than main switch pole driver' s timing and second of gate drive
Timing；
Optionally, it is described choose column direction any two adjacent pixel unit, obtain the first adjacent subpixels unit and
After the voltage status of second adjacent subpixels unit, the driving method of the display panel further include:
It is high voltage, the electricity of the second adjacent subpixels unit in the voltage status of the first adjacent subpixels unit
When pressure condition is low-voltage, the second sub-pixel in the first adjacent subpixels unit is carried out using positive polarity driving signal
Driving, in the first adjacent subpixels unit the first sub-pixel and third sub-pixel using negative polarity driving signal progress
Driving is driven the second sub-pixel in the second adjacent subpixels unit using negative polarity driving signal, to described
The first sub-pixel and third sub-pixel in second adjacent subpixels unit are driven using positive polarity driving signal；
It is low-voltage, the electricity of the second adjacent subpixels unit in the voltage status of the first adjacent subpixels unit
When pressure condition is high voltage, the second sub-pixel in the first adjacent subpixels unit is carried out using negative polarity driving signal
Driving, in the first adjacent subpixels unit the first sub-pixel and third sub-pixel using positive polarity driving signal progress
Driving is driven the second sub-pixel in the second adjacent subpixels unit using positive polarity driving signal, to described
The first sub-pixel and third sub-pixel in second adjacent subpixels unit are driven using negative polarity driving signal.
In addition, to achieve the above object, the present invention also proposes a kind of display equipment, which is characterized in that the display equipment
Include: display panel, memory, processor and is stored in the display surface that can be run on the memory and on the processor
The driver of plate, the display panel include array of display, and the array of display includes the pixel unit being arranged in array, institute
Stating pixel unit includes the first sub-pixel, the second sub-pixel and the third sub-pixel on line direction, and three of each pixel unit
Sub-pixel is aligned in a column direction according to the sequence of arrangement；The driver deployment of the display panel is to realize as described above
Display panel driving method the step of.
In addition, to achieve the above object, the present invention also proposes a kind of computer readable storage medium, which is characterized in that institute
The driver that display panel is stored on computer readable storage medium is stated, the driver of the display panel is by processor
The step of driving method of display panel as described above is realized when execution.
The driving method of display panel proposed by the present invention passes through the odd column pixel unit and phase of same one-row pixels unit
The gate of the even column pixels unit of adjacent rows pixel unit, which switchs, shares the first gate drive line signal；Same one-row pixels unit
Even column pixels unit and adjacent rows pixel unit odd column pixel unit gate switch share the second gate drive line
Road signal；Using the first gate drive line signal as main switch pole driving signal, the second gate drive route is believed
Number as time gate drive signal, by controlling main switch pole driving signal the combination data driving in the driver' s timing of main switch pole
Signal carries out charge volume control to each sub-pixel, the control secondary gate drive signal combination institute in He Ci gate drive timing
It states data driving signal and charge volume control is carried out to each sub-pixel, just can form the equivalent electricity of height with a line adjacent subpixels unit
Pressure driving to reach the difference of the charging of high voltage sub-pixel with the charging of low-voltage sub-pixel, and then solves visual angle colour cast, naked eyes
The difference of high voltage sub-pixel Yu low-voltage sub-pixel will not be obviously told, and avoid the defect of resolution decline, mentioned
User experience is risen.
Detailed description of the invention
Fig. 1 a is the relationship of colour cast curve and ideal curve before improving；
Fig. 1 b is the relationship of colour cast curve and ideal curve after improving；
Fig. 2 is the display device structure schematic diagram for the hardware running environment that the embodiment of the present invention is related to；
Fig. 3 is that the invention shows the flow diagrams of the driving method first embodiment of panel；
Fig. 4 is that the invention shows the driving method pixel drivers of panel to arrange schematic diagram；
Fig. 5 is that the invention shows the driving method pixel drivers first of panel to preset time diagram；
Fig. 6 is that the invention shows the driving method pixel drivers second of panel to preset time diagram.
The embodiments will be further described with reference to the accompanying drawings for the realization, the function and the advantages of the object of the present invention.
Specific embodiment
It should be appreciated that the specific embodiments described herein are merely illustrative of the present invention, it is not intended to limit the present invention.
The solution of the embodiment of the present invention is mainly: by the odd column pixel unit of same one-row pixels unit and adjacent
The gate of the even column pixels unit of row pixel unit, which switchs, shares the first gate drive line signal；With one-row pixels unit
The gate of the odd column pixel unit of even column pixels unit and adjacent rows pixel unit, which switchs, shares the second gate drive route
Signal；Using the first gate drive line signal as main switch pole driving signal, by the second gate drive line signal
As secondary gate drive signal, by controlling the main switch pole driving signal combination data driving letter in the driver' s timing of main switch pole
Number charge volume control is carried out to each sub-pixel, the control secondary gate drive signal is in conjunction with described in He Ci gate drive timing
Data driving signal carries out charge volume control to each sub-pixel, just can form height equivalent voltage with a line adjacent subpixels unit
Driving to reach the difference of the charging of high voltage sub-pixel with the charging of low-voltage sub-pixel, and then solves visual angle colour cast, and naked eyes are not
The difference of high voltage sub-pixel Yu low-voltage sub-pixel can be obviously told, and avoid the defect of resolution decline, promoted
User experience, solution can sacrifice light-permeable open region in the prior art, influence panel light transmission rate, backlight cost is also higher to ask
Topic.
Referring to Fig. 2, Fig. 2 is the display device structure schematic diagram for the hardware running environment that the embodiment of the present invention is related to.
As shown in Fig. 2, the display equipment may include: processor 1001, such as CPU, communication bus 1002, user interface
1003, display panel 1004 and memory 1005.Wherein, communication bus 1002 is logical for realizing the connection between these components
Letter.User interface 1003 may include display screen (Display), input unit such as keyboard (Keyboard), and optional user connects
Mouth 1003 can also include standard wireline interface and wireless interface.Memory 1005 can be high speed RAM memory, can also be with
It is stable memory (non-volatile-memory), such as magnetic disk storage.Memory 1005 optionally can also be only
The storage device of aforementioned processor 1001 is stood on, it can also be that other can be real that the display panel 1004, which can be liquid crystal display panel,
The display panel of existing same or similar function.
It will be understood by those skilled in the art that display device structure shown in Figure 2 does not constitute the limit to display equipment
It is fixed, it may include perhaps combining certain components or different component layouts than illustrating more or fewer components.
As shown in Fig. 2, as the driving that in a kind of memory 1005 of computer storage medium may include display panel
Program.
The invention shows processor 1001, the memories 1005 in equipment can be set in the display device, the display
Equipment calls the driver of the display panel stored in memory 1005 by processor 1001, and executes following operation:
With the gate of the even column pixels unit of the odd column pixel unit and adjacent rows pixel unit of one-row pixels unit
It switchs and shares the first gate drive line signal；With the even column pixels unit and adjacent rows pixel units of one-row pixels unit
The gate of odd column pixel unit, which switchs, shares the second gate drive line signal；
Using the first gate drive line signal as main switch pole driving signal, the second gate drive route is believed
Number as time gate drive signal, by controlling main switch pole driving signal the combination data driving in the driver' s timing of main switch pole
Signal carries out charge volume control to each sub-pixel, the control secondary gate drive signal combination institute in He Ci gate drive timing
State data driving signal and charge volume control carried out to each sub-pixel, wherein main switch pole driver' s timing be former row gate sequentially
The timing of driving, the secondary gate drive timing are the ibid corresponding gate drive timing of an adjacent high voltage sub-pixel.
Further, processor 1001 can call the driver of the display panel stored in memory 1005, also hold
The following operation of row:
Using the first gate drive line signal as main switch pole driving signal, the second gate drive route is believed
Number as time gate drive signal；
When current timing is the first default timing, the first gate is used to the high voltage sub-pixel in each column pixel unit
Corresponding first predeterminated voltage of driver circuit signal is driven, and uses second to the low-voltage sub-pixel in each column pixel unit
Corresponding second predeterminated voltage of gate drive line signal is driven；By controlling the main switch in the driver' s timing of main switch pole
Pole driving signal combination data driving signal carries out charge volume control to each sub-pixel, by first time gate drive timing and
The control secondary gate drive signal carries out each sub-pixel in conjunction with the data driving signal in second of gate drive timing
Charge volume control, the first time gate drive timing are less than main switch pole driver' s timing and second of gate drive
Timing；
When the data drive signal for receiving data drive circuit input carries out timing reversion, by first gate drive
Line signal and the second gate drive line signal carry out periodic inversion；
When current timing is the second default timing, the first gate is used to the high voltage sub-pixel in each column pixel unit
Corresponding first predeterminated voltage of driver circuit signal is driven, and uses second to the low-voltage sub-pixel in each column pixel unit
Corresponding second predeterminated voltage of gate drive line signal is driven.
Further, processor 1001 can call the driver of the display panel stored in memory 1005, also hold
The following operation of row:
Any two adjacent pixel unit of column direction is chosen, the first adjacent subpixels unit and the second adjacent sub- picture are obtained
The voltage status of plain unit；
It is high voltage, the electricity of the second adjacent subpixels unit in the voltage status of the first adjacent subpixels unit
When pressure condition is low-voltage, the second sub-pixel in the first adjacent subpixels unit is carried out using positive polarity driving signal
Driving drives the second sub-pixel in the second adjacent subpixels unit using negative polarity driving signal；
It is low-voltage, the electricity of the second adjacent subpixels unit in the voltage status of the first adjacent subpixels unit
When pressure condition is high voltage, the second sub-pixel in the first adjacent subpixels unit is carried out using negative polarity driving signal
Driving drives the second sub-pixel in the second adjacent subpixels unit using positive polarity driving signal.
Further, processor 1001 can call the driver of the display panel stored in memory 1005, also hold
The following operation of row:
When the predeterminated voltage meets preset condition, to the high voltage sub-pixel and low electricity in the sub-pixel of the selection
The equivalent driving voltage of pressure sub-pixel is driven using preset data driving signal, and the preset data driving signal is original
The average signal of the driving signal of the adjacent two sub-pixels of same row.
Further, processor 1001 can call the driver of the display panel stored in memory 1005, also hold
The following operation of row:
The adjacent two sub-pixels of same row, the equivalent drive to the high voltage sub-pixel in the sub-pixel of selection are chosen respectively
The equivalent driving voltage of low-voltage sub-pixel in sub-pixel of the dynamic voltage to be greater than the selection is driven.
Further, processor 1001 can call the driver of the display panel stored in memory 1005, also hold
The following operation of row:
When current timing is the first default timing, the first gate is used to the high voltage sub-pixel in each column pixel unit
Corresponding first predeterminated voltage of driver circuit signal is driven, and uses second to the low-voltage sub-pixel in each column pixel unit
Corresponding second predeterminated voltage of gate drive line signal is driven；By controlling the main switch in the driver' s timing of main switch pole
Pole driving signal combination data driving signal carries out charge volume control to each sub-pixel, by first time gate drive timing and
The control secondary gate drive signal carries out each sub-pixel in conjunction with the data driving signal in second of gate drive timing
Charge volume control, the first time gate drive timing are less than main switch pole driver' s timing and second of gate drive
Timing.
Further, processor 1001 can call the driver of the display panel stored in memory 1005, also hold
The following operation of row:
It is high voltage, the electricity of the second adjacent subpixels unit in the voltage status of the first adjacent subpixels unit
When pressure condition is low-voltage, the second sub-pixel in the first adjacent subpixels unit is carried out using positive polarity driving signal
Driving, in the first adjacent subpixels unit the first sub-pixel and third sub-pixel using negative polarity driving signal progress
Driving is driven the second sub-pixel in the second adjacent subpixels unit using negative polarity driving signal, to described
The first sub-pixel and third sub-pixel in second adjacent subpixels unit are driven using positive polarity driving signal；
It is low-voltage, the electricity of the second adjacent subpixels unit in the voltage status of the first adjacent subpixels unit
When pressure condition is high voltage, the second sub-pixel in the first adjacent subpixels unit is carried out using negative polarity driving signal
Driving, in the first adjacent subpixels unit the first sub-pixel and third sub-pixel using positive polarity driving signal progress
Driving is driven the second sub-pixel in the second adjacent subpixels unit using positive polarity driving signal, to described
The first sub-pixel and third sub-pixel in second adjacent subpixels unit are driven using negative polarity driving signal.
The present embodiment passes through the odd column pixel unit of same one-row pixels unit and the even column picture of adjacent rows pixel unit
The gate of plain unit, which switchs, shares the first gate drive line signal；With the even column pixels unit of one-row pixels unit and adjacent
The gate of the odd column pixel unit of row pixel unit, which switchs, shares the second gate drive line signal；First gate is driven
Dynamic line signal leads to as main switch pole driving signal using the second gate drive line signal as time gate drive signal
It crosses in the driver' s timing of main switch pole and controls the main switch pole driving signal combination data driving signal and charge to each sub-pixel
Amount control, the interior control secondary gate drive signal of He Ci gate drive timing is in conjunction with the data driving signal to each sub- picture
Element carries out charge volume control, just can form the driving of height equivalent voltage with a line adjacent subpixels unit, to reach high voltage
The difference of pixel charging and the charging of low-voltage sub-pixel, and then solve visual angle colour cast, it visually will not obviously tell high voltage
The difference of sub-pixel and low-voltage sub-pixel, and the defect of resolution decline is avoided, the user experience is improved.
Based on above-mentioned hardware configuration, propose that the invention shows the driving method embodiments of panel.
It is that the invention shows the flow diagrams of the driving method first embodiment of panel referring to Fig. 3, Fig. 3.
In the first embodiment, the display panel driving method the following steps are included:
Step S10, with the even column pixels list of the odd column pixel unit of one-row pixels unit and adjacent rows pixel unit
The gate of member, which switchs, shares the first gate drive line signal；With the even column pixels unit and adjacent rows picture of one-row pixels unit
The gate of the odd column pixel unit of plain unit, which switchs, shares the second gate drive line signal.
It should be noted that the pixel design of the liquid crystal display panel in the present embodiment is that a red green and blue sub-pixels are
One pixel unit, i.e., described first sub-pixel, second sub-pixel and the third sub-pixel respectively correspond as red son
Pixel, green sub-pixels and blue subpixels, and the red sub-pixel, green sub-pixels and blue subpixels are different
Polarity sub-pixel, each pixel unit are driven same using the interspersed driving arrangement mode of high-low voltage according to the first gate drive signal
The gate of the even column pixels unit of the odd column pixel unit and adjacent rows pixel unit of one-row pixels unit switchs；According to
Two gate drive signals drive with the even column pixels unit of one-row pixels unit and the odd column pixel of adjacent rows pixel unit
The gate of unit switchs；The polarity of the driving signal of sub-pixel corresponding to the first gate scan line is swept with second gate
The polarity of the driving signal of sub-pixel corresponding to line is retouched on the contrary, a white sub-pixels can also be added in the implementation, with four sub- pictures
Element is a pixel unit by the interspersed arrangement of high-low voltage, and the present embodiment is without restriction to this.
Step S20, using the first gate drive line signal as main switch pole driving signal, second gate is driven
Dynamic line signal is combined as time gate drive signal by controlling main switch pole driving signal in the driver' s timing of main switch pole
Data driving signal carries out charge volume control to each sub-pixel, the control secondary gate drive letter in He Ci gate drive timing
Number charge volume control is carried out to each sub-pixel in conjunction with the data driving signal, wherein main switch pole driver' s timing is former row
The timing that gate is sequentially driven, the secondary gate drive timing be ibid an adjacent high voltage sub-pixel corresponding gate drive when
Sequence.
It is understood that main switch pole driver' s timing and the secondary gate drive timing are pre-set timing,
In general, by controlling the main switch pole driving signal combination data driving signal in the driver' s timing of main switch pole to each sub-pixel
Charge volume control is carried out, the control secondary gate drive signal is in conjunction with the data driving signal in He Ci gate drive timing
Charge volume control is carried out to each sub-pixel；The timing of main switch pole driving signal driving is the timing that former row gate is sequentially driven, main
Data signal corresponding to gate drive is the corresponding data driving signal of the sub-pixel, and it is ibid one that secondary gate drive, which obtains timing,
The corresponding gate drive timing of adjacent high voltage sub-pixel and data driver' s timing.First with secondary gate drive switch to low-voltage
Pixel first bestows adjacent upper high voltage sub-pixel data driving signal, then opens main switch pole driving switch to low-voltage sub-pixel
Bestow the corresponding driving signal of the sub-pixel；The pole of data polarity and high voltage sub-pixel the data driving of the low-voltage sub-pixel
Property is opposite；So that the charging charge of low-voltage sub-pixel first and second gate drive of decline equivalent compared to high voltage sub-pixel
Sub-pixel on route is different for the charging charge storage capacity of same drive voltage, passes through high voltage pixel unit and low-voltage
The problem of driving of the interspersed arrangement of pixel unit can solve visual angle colour cast.
Further, the step S20 specifically includes the following steps:
Using the first gate drive line signal as main switch pole driving signal, the second gate drive route is believed
Number as time gate drive signal；
When current timing is the first default timing, the first gate is used to the high voltage sub-pixel in each column pixel unit
Corresponding first predeterminated voltage of driver circuit signal is driven, and uses second to the low-voltage sub-pixel in each column pixel unit
Corresponding second predeterminated voltage of gate drive line signal is driven；By controlling the main switch in the driver' s timing of main switch pole
Pole driving signal combination data driving signal carries out charge volume control to each sub-pixel, by first time gate drive timing and
The control secondary gate drive signal carries out each sub-pixel in conjunction with the data driving signal in second of gate drive timing
Charge volume control, the first time gate drive timing are less than main switch pole driver' s timing and second of gate drive
Timing；
When the data drive signal for receiving data drive circuit input carries out timing reversion, by first gate drive
Line signal and the second gate drive line signal carry out periodic inversion；
When current timing is the second default timing, the first gate is used to the high voltage sub-pixel in each column pixel unit
Corresponding first predeterminated voltage of driver circuit signal is driven, and uses second to the low-voltage sub-pixel in each column pixel unit
Corresponding second predeterminated voltage of gate drive line signal is driven.
It should be noted that Fig. 4 is that the invention shows the arrangements of the driving method pixel driver of panel to show referring to Fig. 4 and Fig. 5
It is intended to；Fig. 5 is that the invention shows the driving method pixel drivers first of panel to preset time diagram；The first default timing
For Frame1, the second default timing is Frame2, and data charging signals are Vgd, and the first gate drive signal is Vg1, the
Two gate drive signals are Vg2；Vg1 is that a line odd column unit pixel and adjacent a line even column unit pixel are total to gate drive
Route and driving signal；Vg2 is that same Vg1 is that a line odd column unit pixel and adjacent a line even column unit pixel are total to gate drive
Moving-wire road and driving signal, R indicate red sub-pixel, and B indicates that blue subpixels, G indicate green sub-pixels ,+indicate the sub- picture
The polarity of element is anode ,-indicating that the polarity of the sub-pixel is cathode, VL indicates that the sub-pixel is low-voltage pixel, and VH is indicated should
Sub-pixel is high voltage pixel.
It should be understood that referring to Fig. 5, sub-pixel positive polarity driving signal Vgd=VG1, VG2, VG3 ... .. of G row, son
Pixel negative polarity moves signal Vgd=VG1 ', VG2 ', VG3 ' ....Data driving signal be sequentially sub-pixel VGd_1, VGd_2,
VGd_3 ..., sub-pixel voltage driving signal are VG1, VG1 ', VG2, VG2 ' ..., gate voltage successively by sub-pixel VGd_1,
VGd_2, VGd_3 ... bestow voltage and open and charge, and the gate voltage of high voltage sub-pixel VGd_1 is Vg1, low-voltage sub-pixel
The gate voltage of VGd_2 is Vg2 and Vg2 ', and the gate voltage of high voltage sub-pixel VGd_1 is Vg1, high voltage appearance sub-pixel
The gate voltage of VGd_1 is that Vg1 is opened while the gate voltage of low-voltage sub-pixel VGd_2 is Vg2 ' also while opening；Low electricity
The gate voltage for pressing sub-pixel VGd_2 is that Vg2 is different from the gate voltage opening time of Vg2 ', low-voltage sub-pixel VGd_2's
Gate voltage is that Vg2 opening time T2 can be with the gate voltage Vg1 opening time T1 of high voltage sub-pixel VGd_1, that is, T1
=T2 can also adjust the gate switch time that T2 is not equal to T1, can adjust according to element charging charge storage capacity；Low electricity
T2 ' is then less than the gate voltage of high voltage sub-pixel VGd_1 when the gate pre-charge voltage of sub-pixel VGd_2 being pressed to be Vg2 ' unlatching
The gate voltage of Vg1 opening time T1 and low-voltage sub-pixel VGd_2 are Vg2 opening time T2, that is, T2 ' < T1 and T2 ' <
T2。
It is understood that (R red and B blue row sub-pixel are homogeneous for picture frame G green rows sub-pixel in figure referring to Fig. 5
Together) the corresponding gate drive voltage of high voltage sub-pixel VGd_1, VGd_3, VGd_5 be Vg1 and low-voltage sub-pixel VGd_2,
The corresponding gate drive voltage of VGd_4, VGd_6 is Vg2, when wherein Vg1 gate switching sequence charges for data driving signal
Between be T1, two period of Vg2 gate switching sequence, a period be corresponding to the upper adjacent subpixels gate voltage Vg1 period, this when
Section Vg2 ' the gate charging voltage time is T2 ', and wherein T2 ' is less than T1 and T2 charge cycle.Another period is that data is driven
It with Vg1 gate switching sequence is that T1 can be identical for the data driving signal charging time that the dynamic signal charging time, which is T2, also may be used
To adjust the gate switch time that T2 is not equal to T1, can be adjusted according to element charging charge storage capacity.
It is understood that Fig. 6 is when presetting the invention shows the driving method pixel driver second of panel referring to Fig. 6
Sequence schematic diagram, sub-pixel positive polarity driving signal Vgd=VG1, VG2, VG3 ... .. of G row, sub-pixel negative polarity move signal Vgd
=VG1 ', VG2 ', VG3 ' ..., data driving signal are sequentially sub-pixel VGd_1, VGd_2, VGd_3 ..., sub-pixel voltage driving
Signal is VG1 ', VG1, VG2 ', VG2 ... .., sub-pixel VGd_1, VGd_2, VGd_3 ... successively bestow voltage and opened by gate voltage
It opens and charges, the gate voltage of low-voltage sub-pixel VGd_3 is Vg1 and Vg1 ', and the gate voltage of high voltage sub-pixel VGd_2 is
Vg2.The gate voltage of low-voltage sub-pixel VGd_3 is that Vg1 is different from the gate voltage opening time of Vg1 ', low-voltage sub-pixel
The gate voltage of VGd_3 is gate voltage Vg2 opening time T1 of the Vg1 opening time T2 with high voltage sub-pixel VGd_2, that is,
T1=T2 can also adjust the gate switch time that T2 is not equal to T1, can adjust according to element charging charge storage capacity.It is low
The gate voltage of voltage sub-pixel VGd_3 is the gate voltage Vg2 that T2 ' is then less than high voltage sub-pixel VGd_2 when Vg1 ' is opened
Opening time T1, that is, T2 ' < T1.Wherein the gate voltage of low-voltage sub-pixel VGd_3 is Vg1 ' unlatching.
It should be understood that high voltage sub-pixel VGd_2 is charged as positive polarity data driving signal Vgd=VG1 and Vg2 lock
Pole switching sequence T1 charges for high voltage sub-pixel VGd_2.A secondary adjacent low-voltage sub-pixel VGd_3 charge step is divided to two
Period, first charge period are that ibid high voltage sub-pixel VGd_2 charging gate opens timing T1, data driving at this time
When signal is that high voltage sub-pixel VGd_2 is charged as positive polarity data driving signal Vgd=VG1, sub-pixel VGd_3 opens gate
Driving voltage Vg1 ' is pre-charged sub-pixel VGd_3, the gate drive voltage Vg1 ' with correspond to high voltage sub-pixel
VGd_2 gate drive voltage Vg2 is opened charge to sub-pixel VGd_2 simultaneously, and carries out preliminary filling to sub-pixel VGd_3
Electricity, while T2 ' is less than gate drive voltage Vg1, Vg2 opening time T1 and T2 when designing the unlatching of gate drive voltage Vg1 '.
Second charge period be then negative polarity driving voltage Vgd=VG2 ' and Vg1 gate switching sequence T2 to sub-pixel VGd_3 into
Row charging.Charging voltage of the low-voltage sub-pixel VGd_3 in the first charging time is positive polarity voltage VG1, control grid voltage
Vg1 ' charging time T2 ' is less than gate voltage Vg1 charging time T2, so that equivalent low-voltage charges as VGd_3 positive polarity
Voltage VG1 " < VG, that is, the equivalent charging voltage of low-voltage sub-pixel VGd_3 | VG1 "-Vcom | be less than | VG1-Vcom |.Low electricity
Pressing charging voltage of the sub-pixel VGd_3 in the second charging time is reverse voltage VG2 ', due to being pre-charged positive polarity voltage
VG ", then the charge control gate voltage Vg1 charging time T2 in the second charging time, so that last low-voltage sub-pixel VGd_3
Equivalent charging voltage is less than | VG2 '-Vcom |, it is ensured that low-voltage sub-pixel VGd_3 charging voltage is less than sub-pixel VGd_4 high
Voltage sub-pixel | VG2-Vcom |.The driving of height equivalent voltage just can be formed with a line adjacent subpixels unit, to reach high electricity
The difference of sub-pixel charging with the charging of low-voltage sub-pixel is pressed, and then reaches the effect while high voltage sub-pixel of color bias improvement
The gate voltage of VGd_2 is Vg2 unlatching.
Further, further comprising the steps of before the step S20:
Any two adjacent pixel unit of column direction is chosen, the first adjacent subpixels unit and the second adjacent sub- picture are obtained
The voltage status of plain unit；
It is high voltage, the electricity of the second adjacent subpixels unit in the voltage status of the first adjacent subpixels unit
When pressure condition is low-voltage, the second sub-pixel in the first adjacent subpixels unit is carried out using positive polarity driving signal
Driving, in the first adjacent subpixels unit the first sub-pixel and third sub-pixel using negative polarity driving signal progress
Driving is driven the second sub-pixel in the second adjacent subpixels unit using negative polarity driving signal, to described
The first sub-pixel and third sub-pixel in second adjacent subpixels unit are driven using positive polarity driving signal；
It is low-voltage, the electricity of the second adjacent subpixels unit in the voltage status of the first adjacent subpixels unit
When pressure condition is high voltage, the second sub-pixel in the first adjacent subpixels unit is carried out using negative polarity driving signal
Driving, in the first adjacent subpixels unit the first sub-pixel and third sub-pixel using positive polarity driving signal progress
Driving is driven the second sub-pixel in the second adjacent subpixels unit using positive polarity driving signal, to described
The first sub-pixel and third sub-pixel in second adjacent subpixels unit are driven using negative polarity driving signal.
It is understood that Vcom is the original common-battery pole tension referring to the pixel driver timing of Fig. 5；VGd_1 picture
Element is high-voltage anode driving signal VG1, and it is vg1 which, which corresponds to gate drive signal, and data charging signals are VG1；
VGd_2 sub-pixel is low-voltage negative polarity driving signal, and sub-pixel charging is divided into two timing, and a timing first corresponds to lock
Pole driving signal is vg2 ', and data charging signals are then upper sub-pixel VGd_1 positive polarity charging voltage VG1, and the sub-pixel is pre-
First charge positive polarity voltage, and it is vg2 that next timing, which corresponds to gate drive signal, and data charging signals are then the low-voltage sub- picture
The negative polarity charging voltage VG1 ' of plain VGd_2, wherein the polarity of VG1 ' and VG1 be on the contrary, i.e. VG1 ' is less than common-battery pole tension Vcom,
VG1 is greater than common-battery pole tension Vcom, and | VG1-Vcom |=| VG1 '-Vcom |.
It should be understood that charging by preparatory positive polarity, target negative polarity charging signals VG1 ' is allowed to become VG1 ", due to
Data charging signals become positive negativity by positive polarity, and gate drive voltage vg2 ' the switch T2 ' for controlling positive polarity charging is less than
The gate drive voltage vg2 switch T2 of negative polarity charging, so that the negative polarity charging signals VG1 " that the low-voltage sub-pixel is last
Relative to common-battery pole tension Vcom | VG1 "-Vcom | be less than | VG1 '-Vcom |, i.e., the low-voltage sub-pixel charge equivalent voltage |
VG1 "-Vcom | it is less than high voltage sub-pixel charging equivalent voltage | VG1-Vcom |.It just can be formed with a line adjacent subpixels unit
The driving of height equivalent voltage to reach the difference of the charging of high voltage sub-pixel with the charging of low-voltage sub-pixel, and then reaches colour cast
Improved effect.
Further, the step chooses any two adjacent pixel unit of column direction, obtains the first adjacent subpixels
After the voltage status of unit and the second adjacent subpixels unit, the driving method of the display panel further include:
When the predeterminated voltage meets preset condition, to the high voltage sub-pixel and low electricity in the sub-pixel of the selection
The equivalent driving voltage of pressure sub-pixel is driven using preset data driving signal, and the preset data driving signal is original
The average signal of the driving signal of the adjacent two sub-pixels of same row.
It is understood that the preset condition is state when predeterminated voltage is driven, such as it is in predeterminated voltage
Positive polarity driving voltage is driven, and the polarity driven voltage that can also be negative for predeterminated voltage is driven, and is receiving data-driven
When the data drive signal of circuit input carries out timing reversion, the polarity of the predeterminated voltage is opposite.
It should be noted that gate switch switches data driving signal charging timing in Fig. 6, that is, Vg1 gate is opened
It closes two period of timing, a period was corresponding to the upper adjacent subpixels data driving signal period, and period Vg1 ' gate is pre-
The charging voltage time is T2 ', and wherein T2 ' is less than T1/T2 charge cycle.When another period is charges for data driving signal
Between be T2 with Vg2 gate switching sequence be that T1 can be identical for the data driving signal charging time, T2 etc. can also be adjusted
In the gate switch time of T1, can be adjusted according to element charging charge storage capacity.Different picture frame timing may be implemented in this way
Different high-low voltage signal sub-pixels visually can would not obviously see the difference of high voltage sub-pixel Yu low-voltage sub-pixel
It is different, the defect of resolution decline is not had.Wherein the sub-pixel VGd_1 and VGd_2 equivalent voltage of G row is driven respectively with positive polarity
Voltage Vgd=VG1 and negative polarity driving voltage Vgd=VG1 ' drives, positive polarity driving voltage VG1 and negative polarity driving voltage
VG1 ' can then be chosen as original image frame picture element signal Gd1 and Gd2 signal average signal (be 0 for 8bit driving signal~
255 signals), that is, the corresponding positive polarity driving voltage VG1 of G1=(Gd1+Gd2)/2, G1 signal and negative polarity driving voltage
VG1'.VGd_3 and VGd_4 equivalent voltage are respectively with positive polarity driving voltage Vgd=VG2 and negative polarity driving voltage Vgd=
VG2 ' driving can then be chosen as the average signal of original image frame picture element signal Gd3 and Gd4 signal (for 8bit driving signal
For 0~255 signal), that is, the corresponding positive polarity driving voltage VG2 of G2=(Gd3+Gd4)/2, G2 signal and negative polarity driving electricity
Press VG2 '.
Further, after the step S20, the driving method of the display panel further include:
The adjacent two sub-pixels of same row, the equivalent drive to the high voltage sub-pixel in the sub-pixel of selection are chosen respectively
The equivalent driving voltage of low-voltage sub-pixel in sub-pixel of the dynamic voltage to be greater than the selection is driven.
It should be understood that high voltage sub-pixel VGd_1 is charged as positive polarity data driving signal Vgd=VG1 and Vg1 lock
Pole switching sequence T1 charges for high voltage sub-pixel VGd_1.A secondary adjacent low-voltage sub-pixel VGd_2 charge step is divided to two
Period, first charge period are that ibid high voltage sub-pixel VGd_1 charging gate opens timing T1, data driving at this time
When signal is that high voltage sub-pixel VGd_1 is charged as positive polarity data driving signal Vgd=VG1, sub-pixel VGd_2 opens gate
Driving voltage Vg2 ' charges to sub-pixel VGd_2, the gate drive voltage Vg2 ' with correspond to high voltage sub-pixel VGd_1
Gate drive voltage Vg1 is opened charge to sub-pixel VGd_1 simultaneously, and is pre-charged to sub-pixel VGd_2, simultaneously
T2 ' is less than gate drive voltage Vg1/Vg2 opening time T1/T2 when designing the unlatching of gate drive voltage Vg2 '.Second is filled
The electric period is then that the gate switching sequence T2 of negative polarity driving voltage Vgd=VG1 ' and Vg2 charges to sub-pixel VGd_2.
Charging voltage of the low-voltage sub-pixel VGd_2 in the first charging time is positive polarity voltage VG1, control grid voltage Vg2 ' charging
Time T2 ' be less than gate voltage Vg2 charging time T2 so that equivalent low-voltage as VGd_2 positive polarity charging voltage VG1 " <
VG, that is, the equivalent charging voltage of low-voltage sub-pixel VGd_2 | VG1 "-Vcom | be less than | VG1-Vcom |.Low-voltage sub-pixel
Charging voltage of the VGd_2 in the second charging time is reverse voltage VG1 ', due to being pre-charged positive polarity voltage VG ", then second
The charge control gate voltage Vg2 charging time T2 in charging time, so that the equivalent charging electricity of last low-voltage sub-pixel VGd_2
Pressure is less than | VG1 '-Vcom |, it is ensured that low-voltage sub-pixel VGd_2 charging voltage is less than sub-pixel VGd_1 high voltage sub-pixel |
VG1-Vcom|.The driving of height equivalent voltage just can be formed with a line adjacent subpixels unit, to reach the charging of high voltage sub-pixel
The difference to charge with low-voltage sub-pixel, and then reach the effect of color bias improvement.
The present embodiment passes through the odd column pixel unit of same one-row pixels unit and the even column picture of adjacent rows pixel unit
The gate of plain unit, which switchs, shares the first gate drive line signal；With the even column pixels unit of one-row pixels unit and adjacent
The gate of the odd column pixel unit of row pixel unit, which switchs, shares the second gate drive line signal；First gate is driven
Dynamic line signal leads to as main switch pole driving signal using the second gate drive line signal as time gate drive signal
It crosses in the driver' s timing of main switch pole and controls the main switch pole driving signal combination data driving signal and charge to each sub-pixel
Amount control, the interior control secondary gate drive signal of He Ci gate drive timing is in conjunction with the data driving signal to each sub- picture
Element carries out charge volume control, just can form the driving of height equivalent voltage with a line adjacent subpixels unit, to reach high voltage
The difference of pixel charging and the charging of low-voltage sub-pixel, and then solve visual angle colour cast, it visually will not obviously tell high voltage
The difference of sub-pixel and low-voltage sub-pixel, and the defect of resolution decline is avoided, the user experience is improved.
In addition, the embodiment of the present invention also proposes a kind of computer readable storage medium, the computer readable storage medium
On be stored with the driver of display panel, following operation is realized when the driver of the display panel is executed by processor:
With the gate of the even column pixels unit of the odd column pixel unit and adjacent rows pixel unit of one-row pixels unit
It switchs and shares the first gate drive line signal；With the even column pixels unit and adjacent rows pixel units of one-row pixels unit
The gate of odd column pixel unit, which switchs, shares the second gate drive line signal；
Using the first gate drive line signal as main switch pole driving signal, the second gate drive route is believed
Number as time gate drive signal, by controlling main switch pole driving signal the combination data driving in the driver' s timing of main switch pole
Signal carries out charge volume control to each sub-pixel, the control secondary gate drive signal combination institute in He Ci gate drive timing
State data driving signal and charge volume control carried out to each sub-pixel, wherein main switch pole driver' s timing be former row gate sequentially
The timing of driving, the secondary gate drive timing are the ibid corresponding gate drive timing of an adjacent high voltage sub-pixel.
Further, following operation is also realized when the driver of the display panel is executed by processor:
Using the first gate drive line signal as main switch pole driving signal, the second gate drive route is believed
Number as time gate drive signal；
When current timing is the first default timing, the first gate is used to the high voltage sub-pixel in each column pixel unit
Corresponding first predeterminated voltage of driver circuit signal is driven, and uses second to the low-voltage sub-pixel in each column pixel unit
Corresponding second predeterminated voltage of gate drive line signal is driven；By controlling the main switch in the driver' s timing of main switch pole
Pole driving signal combination data driving signal carries out charge volume control to each sub-pixel, by first time gate drive timing and
The control secondary gate drive signal carries out each sub-pixel in conjunction with the data driving signal in second of gate drive timing
Charge volume control, the first time gate drive timing are less than main switch pole driver' s timing and second of gate drive
Timing；
When the data drive signal for receiving data drive circuit input carries out timing reversion, by first gate drive
Line signal and the second gate drive line signal carry out periodic inversion；
When current timing is the second default timing, the first gate is used to the high voltage sub-pixel in each column pixel unit
Corresponding first predeterminated voltage of driver circuit signal is driven, and uses second to the low-voltage sub-pixel in each column pixel unit
Corresponding second predeterminated voltage of gate drive line signal is driven.
Further, following operation is also realized when the driver of the display panel is executed by processor:
When the predeterminated voltage meets preset condition, to the high voltage sub-pixel and low electricity in the sub-pixel of the selection
The equivalent driving voltage of pressure sub-pixel is driven using preset data driving signal, and the preset data driving signal is original
The average signal of the driving signal of the adjacent two sub-pixels of same row.
Further, following operation is also realized when the driver of the display panel is executed by processor:
The adjacent two sub-pixels of same row, the equivalent drive to the high voltage sub-pixel in the sub-pixel of selection are chosen respectively
The equivalent driving voltage of low-voltage sub-pixel in sub-pixel of the dynamic voltage to be greater than the selection is driven.
Further, processor 1001 can call the driver of the display panel stored in memory 1005, also hold
The following operation of row:
Any two adjacent pixel unit of column direction is chosen, the first adjacent subpixels unit and the second adjacent sub- picture are obtained
The voltage status of plain unit；
It is high voltage, the electricity of the second adjacent subpixels unit in the voltage status of the first adjacent subpixels unit
When pressure condition is low-voltage, the second sub-pixel in the first adjacent subpixels unit is carried out using positive polarity driving signal
Driving, in the first adjacent subpixels unit the first sub-pixel and third sub-pixel using negative polarity driving signal progress
Driving is driven the second sub-pixel in the second adjacent subpixels unit using negative polarity driving signal, to described
The first sub-pixel and third sub-pixel in second adjacent subpixels unit are driven using positive polarity driving signal；
It is low-voltage, the electricity of the second adjacent subpixels unit in the voltage status of the first adjacent subpixels unit
When pressure condition is high voltage, the second sub-pixel in the first adjacent subpixels unit is carried out using negative polarity driving signal
Driving, in the first adjacent subpixels unit the first sub-pixel and third sub-pixel using positive polarity driving signal progress
Driving is driven the second sub-pixel in the second adjacent subpixels unit using positive polarity driving signal, to described
The first sub-pixel and third sub-pixel in second adjacent subpixels unit are driven using negative polarity driving signal.
The present embodiment passes through the odd column pixel unit of same one-row pixels unit and the even column picture of adjacent rows pixel unit
The gate of plain unit, which switchs, shares the first gate drive line signal；With the even column pixels unit of one-row pixels unit and adjacent
The gate of the odd column pixel unit of row pixel unit, which switchs, shares the second gate drive line signal；First gate is driven
Dynamic line signal leads to as main switch pole driving signal using the second gate drive line signal as time gate drive signal
It crosses in the driver' s timing of main switch pole and controls the main switch pole driving signal combination data driving signal and charge to each sub-pixel
Amount control, the interior control secondary gate drive signal of He Ci gate drive timing is in conjunction with the data driving signal to each sub- picture
Element carries out charge volume control, just can form the driving of height equivalent voltage with a line adjacent subpixels unit, to reach high voltage
The difference of pixel charging and the charging of low-voltage sub-pixel, and then solve visual angle colour cast, it visually will not obviously tell high voltage
The difference of sub-pixel and low-voltage sub-pixel, and the defect of resolution decline is avoided, the user experience is improved.
It should be noted that, in this document, the terms "include", "comprise" or its any other variant are intended to non-row
His property includes, so that the process, method, article or the system that include a series of elements not only include those elements, and
And further include other elements that are not explicitly listed, or further include for this process, method, article or system institute it is intrinsic
Element.In the absence of more restrictions, the element limited by sentence "including a ...", it is not excluded that including being somebody's turn to do
There is also other identical elements in the process, method of element, article or system.
The serial number of the above embodiments of the invention is only for description, does not represent the advantages or disadvantages of the embodiments.
Through the above description of the embodiments, those skilled in the art can be understood that above-described embodiment side
Method can be realized by means of software and necessary general hardware platform, naturally it is also possible to by hardware, but in many cases
The former is more preferably embodiment.Based on this understanding, technical solution of the present invention substantially in other words does the prior art
The part contributed out can be embodied in the form of software products, which is stored in one as described above
In storage medium (such as ROM/RAM, magnetic disk, CD), including some instructions are used so that terminal device (it can be mobile phone,
Computer, equipment, air conditioner or network equipment etc.) execute method described in each embodiment of the present invention.
The above is only alternative embodiments of the invention, are not intended to limit the scope of the invention, all to utilize this hair
Equivalent structure or equivalent flow shift made by bright specification and accompanying drawing content is applied directly or indirectly in other relevant skills
Art field, is included within the scope of the present invention.
Claims (9)
1. a kind of driving method of display panel, which is characterized in that the display panel includes array of display, the array of display
Including the pixel unit being arranged in array, the pixel unit include the first sub-pixel on line direction, the second sub-pixel and
Three sub-pixels of third sub-pixel, each pixel unit are aligned in a column direction according to the sequence of arrangement；The driving method packet
It includes:
With the gate switch of the even column pixels unit of the odd column pixel unit and adjacent rows pixel unit of one-row pixels unit
Share the first gate drive line signal；With the even column pixels unit of one-row pixels unit and the odd number of adjacent rows pixel unit
The gate of column pixel unit, which switchs, shares the second gate drive line signal；
Using the first gate drive line signal as main switch pole driving signal, the second gate drive line signal is made
For secondary gate drive signal, by controlling the main switch pole driving signal combination data driving signal in the driver' s timing of main switch pole
Charge volume control is carried out to each sub-pixel, the control secondary gate drive signal is in conjunction with the money in He Ci gate drive timing
Expect that driving signal carries out charge volume control to each sub-pixel, wherein main switch pole driver' s timing is that former row gate is sequentially driven
Timing, the secondary gate drive timing is divided into two sections of timing, and one section of timing is that ibid an adjacent high voltage sub-pixel is corresponding
Gate drive timing, another section of timing are the timing that former row gate is sequentially driven.
2. the driving method of display panel as described in claim 1, which is characterized in that described by the first gate drive line
Road signal is as main switch pole driving signal, using the second gate drive line signal as time gate drive signal, by
The control main switch pole driving signal combination data driving signal carries out charge volume control to each sub-pixel in the driver' s timing of main switch pole
System, in He Ci gate drive timing the control secondary gate drive signal in conjunction with the data driving signal to each sub-pixel into
The control of row charge volume, specifically includes:
Using the first gate drive line signal as main switch pole driving signal, the second gate drive line signal is made
For secondary gate drive signal；
When current timing is the first default timing, the high voltage sub-pixel in each column pixel unit is driven using the main switch pole
Dynamic corresponding first predeterminated voltage of signal is driven, and uses the secondary gate to the low-voltage sub-pixel in each column pixel unit
Corresponding second predeterminated voltage of driving signal is driven；By controlling the main gate drive letter in the driver' s timing of main switch pole
Number combine data driving signal to each sub-pixel carry out charge volume control, by first time gate drive timing and second of lock
The control secondary gate drive signal carries out charge volume control to each sub-pixel in conjunction with the data driving signal in the driver' s timing of pole
System, the first time gate drive timing are less than main switch pole driver' s timing and second of gate drive timing；
When the data drive signal for receiving data drive circuit input carries out timing reversion, by the first gate drive route
Signal and the second gate drive line signal carry out periodic inversion；
When current timing is the second default timing, the first gate drive is used to the high voltage sub-pixel in each column pixel unit
Corresponding first predeterminated voltage of line signal is driven, and uses the second gate to the low-voltage sub-pixel in each column pixel unit
Corresponding second predeterminated voltage of driver circuit signal is driven.
3. the driving method of display panel as claimed in claim 2, which is characterized in that described by the first gate drive line
Road signal is as main switch pole driving signal, using the second gate drive line signal as time gate drive signal, by
The control main switch pole driving signal combination data driving signal carries out charge volume control to each sub-pixel in the driver' s timing of main switch pole
System, in He Ci gate drive timing the control secondary gate drive signal in conjunction with the data driving signal to each sub-pixel into
Before the control of row charge volume, the driving method of the display panel further include:
Any two adjacent pixel unit of column direction is chosen, the first adjacent subpixels unit and the second adjacent subpixels list are obtained
The voltage status of member；
It is high voltage, the voltage shape of the second adjacent subpixels unit in the voltage status of the first adjacent subpixels unit
When state is low-voltage, the second sub-pixel in the first adjacent subpixels unit is driven using positive polarity driving signal
It is dynamic, the second sub-pixel in the second adjacent subpixels unit is driven using negative polarity driving signal；
It is low-voltage, the voltage shape of the second adjacent subpixels unit in the voltage status of the first adjacent subpixels unit
When state is high voltage, the second sub-pixel in the first adjacent subpixels unit is driven using negative polarity driving signal
It is dynamic, the second sub-pixel in the second adjacent subpixels unit is driven using positive polarity driving signal.
4. the driving method of display panel as claimed in claim 3, which is characterized in that any two for choosing column direction
It is described aobvious after the voltage status of adjacent pixel unit, the first adjacent subpixels unit of acquisition and the second adjacent subpixels unit
Show the driving method of panel further include:
When the predeterminated voltage meets preset condition, to the high voltage sub-pixel and low-voltage in the sub-pixel of the selection
The equivalent driving voltage of pixel is driven using preset data driving signal, and the preset data driving signal is original same
Arrange the average signal of the driving signal of adjacent two sub-pixels.
5. the driving method of display panel according to any one of claims 1 to 4, which is characterized in that described by described
One gate drive line signal is as main switch pole driving signal, using the second gate drive line signal as time gate drive
Signal, by controlled in the driver' s timing of main switch pole the main switch pole driving signal combination data driving signal to each sub-pixel into
The control of row charge volume, the interior control secondary gate drive signal of He Ci gate drive timing is in conjunction with the data driving signal pair
After each sub-pixel carries out charge volume control, the driving method of the display panel further include:
The adjacent two sub-pixels of same row are chosen respectively, to the equivalent driving electricity of the high voltage sub-pixel in the sub-pixel of selection
The equivalent driving voltage of low-voltage sub-pixel in sub-pixel of the pressure to be greater than the selection is driven.
6. the driving method of display panel as claimed in claim 4, which is characterized in that described by the first gate drive line
Road signal as main switch pole driving signal, using the second gate drive line signal as time gate drive signal after, institute
State driving method further include:
When current timing is the first default timing, the first gate drive is used to the high voltage sub-pixel in each column pixel unit
Corresponding first predeterminated voltage of line signal is driven, and uses the second gate to the low-voltage sub-pixel in each column pixel unit
Corresponding second predeterminated voltage of driver circuit signal is driven；It is driven by controlling the main switch pole in the driver' s timing of main switch pole
The dynamic joint material driving signal of signal node carries out charge volume control to each sub-pixel, by first time gate drive timing and second
The control secondary gate drive signal charges to each sub-pixel in conjunction with the data driving signal in secondary gate drive timing
Amount control, when the first time gate drive timing is less than main switch pole driver' s timing and second of gate drive
Sequence.
7. the driving method of display panel as claimed in claim 6, which is characterized in that any two for choosing column direction
It is described aobvious after the voltage status of adjacent pixel unit, the first adjacent subpixels unit of acquisition and the second adjacent subpixels unit
Show the driving method of panel further include:
It is high voltage, the voltage shape of the second adjacent subpixels unit in the voltage status of the first adjacent subpixels unit
When state is low-voltage, the second sub-pixel in the first adjacent subpixels unit is driven using positive polarity driving signal
It is dynamic, in the first adjacent subpixels unit the first sub-pixel and third sub-pixel driven using negative polarity driving signal
It is dynamic, the second sub-pixel in the second adjacent subpixels unit is driven using negative polarity driving signal, to described the
The first sub-pixel and third sub-pixel in two adjacent sub-pixel units are driven using positive polarity driving signal；
It is low-voltage, the voltage shape of the second adjacent subpixels unit in the voltage status of the first adjacent subpixels unit
When state is high voltage, the second sub-pixel in the first adjacent subpixels unit is driven using negative polarity driving signal
It is dynamic, in the first adjacent subpixels unit the first sub-pixel and third sub-pixel driven using positive polarity driving signal
It is dynamic, the second sub-pixel in the second adjacent subpixels unit is driven using positive polarity driving signal, to described the
The first sub-pixel and third sub-pixel in two adjacent sub-pixel units are driven using negative polarity driving signal.
8. a kind of display equipment, which is characterized in that the display equipment includes: display panel, memory, processor and is stored in
On the memory and the driver of display panel that can run on the processor, the display panel includes display battle array
Column, the array of display include the pixel unit being arranged in array, the pixel unit include the first sub-pixel on line direction,
Three sub-pixels of the second sub-pixel and third sub-pixel, each pixel unit are aligned in a column direction according to the sequence of arrangement；
The driver deployment of the display panel is to realize the driving side of the display panel as described in any one of claims 1 to 7
The step of method.
9. a kind of storage medium, which is characterized in that be stored with the driver of display panel, the display on the storage medium
The driving side of the display panel as described in any one of claims 1 to 7 is realized when the driver of panel is executed by processor
The step of method.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201910098357.0A CN109785812B (en) | 2019-01-30 | 2019-01-30 | Display panel driving method, display device, and storage medium |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201910098357.0A CN109785812B (en) | 2019-01-30 | 2019-01-30 | Display panel driving method, display device, and storage medium |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN109785812A true CN109785812A (en) | 2019-05-21 |
| CN109785812B CN109785812B (en) | 2021-04-16 |
Family
ID=66503950
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201910098357.0A Active CN109785812B (en) | 2019-01-30 | 2019-01-30 | Display panel driving method, display device, and storage medium |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN109785812B (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN111367126A (en) * | 2020-03-19 | 2020-07-03 | Tcl华星光电技术有限公司 | Array substrate and display panel |
| CN116991007A (en) * | 2023-09-27 | 2023-11-03 | 惠科股份有限公司 | Array substrate and display panel |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR20080044397A (en) * | 2006-11-16 | 2008-05-21 | 엘지디스플레이 주식회사 | A liquid crystal display device |
| CN107741660A (en) * | 2017-11-30 | 2018-02-27 | 深圳市华星光电半导体显示技术有限公司 | Pixel driving framework, display panel and display device |
| CN108831405A (en) * | 2018-09-13 | 2018-11-16 | 重庆惠科金渝光电科技有限公司 | Driving method, device, equipment and the storage medium of display panel |
-
2019
- 2019-01-30 CN CN201910098357.0A patent/CN109785812B/en active Active
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR20080044397A (en) * | 2006-11-16 | 2008-05-21 | 엘지디스플레이 주식회사 | A liquid crystal display device |
| CN107741660A (en) * | 2017-11-30 | 2018-02-27 | 深圳市华星光电半导体显示技术有限公司 | Pixel driving framework, display panel and display device |
| CN108831405A (en) * | 2018-09-13 | 2018-11-16 | 重庆惠科金渝光电科技有限公司 | Driving method, device, equipment and the storage medium of display panel |
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN111367126A (en) * | 2020-03-19 | 2020-07-03 | Tcl华星光电技术有限公司 | Array substrate and display panel |
| CN111367126B (en) * | 2020-03-19 | 2023-12-01 | Tcl华星光电技术有限公司 | Array substrate and display panel |
| CN116991007A (en) * | 2023-09-27 | 2023-11-03 | 惠科股份有限公司 | Array substrate and display panel |
| CN116991007B (en) * | 2023-09-27 | 2023-12-29 | 惠科股份有限公司 | Array substrate and display panel |
Also Published As
| Publication number | Publication date |
|---|---|
| CN109785812B (en) | 2021-04-16 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN107886923B (en) | The driving method and display device of display panel | |
| CN101944338B (en) | Image displaying device and image displaying system | |
| CN108831405A (en) | Driving method, device, equipment and the storage medium of display panel | |
| US10510315B2 (en) | Display panel, driving method thereof and display device | |
| CN101960371B (en) | Active matrix substrate, liquid crystal panel, liquid crystal display device, liquid crystal display unit, and television receiver | |
| CN109036319A (en) | Driving method, device, equipment and the storage medium of display panel | |
| TWI460518B (en) | Array substrate and pixel unit of display panel | |
| CN106842724B (en) | Liquid crystal display device and driving method thereof | |
| CN103728746B (en) | The display packing of a kind of display panels, driving means and liquid crystal indicator | |
| CN109872702B (en) | Display driving method of liquid crystal display panel and liquid crystal display panel | |
| CN106531096A (en) | Driving method of RGBW four-primary-color display panel | |
| CN109671405A (en) | A kind of array substrate, display panel and its driving method | |
| CN108107634A (en) | The driving method and display device of display panel | |
| CN106097955A (en) | The driving method of a kind of display floater, MUX and display floater | |
| CN107978287B (en) | The driving method and display device of display panel | |
| CN105825830B (en) | The driving method of liquid crystal display panel | |
| CN104050885B (en) | Display panel and driving method thereof | |
| CN102314842A (en) | Lcd | |
| CN109188749A (en) | Display device | |
| CN104952407B (en) | The source electrode driver and its driving method of a kind of liquid crystal panel | |
| CN104204929B (en) | Display element and display device | |
| CN107863082B (en) | The driving method and display device of display panel | |
| CN109671410A (en) | Driving method, device, equipment and the storage medium of display panel | |
| CN107564483A (en) | A kind of drive device of display panel, driving method and display device | |
| CN109785812A (en) | Driving method, display equipment and the storage medium of display panel |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PB01 | Publication | ||
| PB01 | Publication | ||
| SE01 | Entry into force of request for substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| GR01 | Patent grant | ||
| GR01 | Patent grant |