CN109783404A - Solid storage device with asymmetric channel - Google Patents

Abstract

This application discloses the solid storage devices with asymmetric channel.The solid storage device of the application includes control unit, and control unit is coupled to NVM chip by multiple channels；Each channel couples one or more NVM chip, NVM chip includes one or more logic units, each of multiple logic units provide physical block, the quantity for the logic unit that the NVM chip that the quantity for the logic unit that the NVM chip of one or more first passage couplings provides is greater than one or more second channel couplings provides for bulk.

Description

Solid storage device with asymmetric channel

Technical field

This application involves solid storage devices, and in particular, in the solid storage device with asymmetric channel Data organization.

Background technique

Fig. 1 illustrates the block diagram of solid storage device.Solid storage device 102 is coupled with host, for mentioning for host For storage capacity.Host can be coupled in several ways between solid storage device 102, and coupled modes include but is not limited to For example, by SATA (Serial Advanced Technology Attachment, Serial Advanced Technology Attachment), SCSI (Small Computer System Interface, small computer system interface), SAS (Serial Attached SCSI, Serial Attached SCSI (SAS)), IDE (Integrated Drive Electronics, integrated drive electronics), USB (Universal Serial Bus, universal serial bus), PCIE (Peripheral Component Interconnect Express, PCIe, high speed peripheral component interconnection), NVMe (NVM Express, high speed non-volatile memory), Ethernet, optical fiber it is logical Road, cordless communication network etc. connect host and solid storage device 102.Host, which can be, to be set through the above way with storage The standby information processing equipment communicated, for example, personal computer, tablet computer, server, portable computer, network exchange Machine, router, cellular phone, personal digital assistant etc..Storing equipment 102 includes interface 103, control unit 104, one or more A NVM chip 105 and DRAM (Dynamic Random Access Memory, dynamic RAM) 110.

Nand flash memory, phase transition storage, FeRAM (Ferroelectric RAM, ferroelectric memory), MRAM (Magnetic Random Access Memory, magnetoresistive memory), RRAM (Resistive Random Access Memory, resistance-change memory Device) etc. be common NVM.

Interface 103 can be adapted to for example, by the side such as SATA, IDE, USB, PCIE, NVMe, SAS, Ethernet, optical-fibre channel Formula and host exchanging data.

Control unit 104 is used to control the data transmission between interface 103, NVM chip 105 and DRAM 110, also For storage management, host logical address to flash memory physical address map, erasure balance, bad block management etc..Control unit 104 can It is realized by the various ways of software, hardware, firmware or combinations thereof, for example, control unit 104 can be FPGA (Field- Programmable gate array, field programmable gate array), ASIC (Application Specific Integrated Circuit, application specific integrated circuit) or a combination thereof form.Control unit 104 also may include place Device or controller are managed, software is executed in processor or controller and carrys out the hardware of manipulation and control component 104 to handle IO (Input/Output) it orders.Control unit 104 is also coupled to DRAM 110, and may have access to the data of DRAM 110.? DRAM can store the data of the I/O command of FTL table and/or caching.

Control unit 104 includes flash interface controller (or being Media Interface Connector controller, flash memory channel controller), is dodged It deposits interface controller and is coupled to NVM chip 105, and sent out in a manner of the interface protocol to follow NVM chip 105 to NVM chip 105 It orders out, to operate NVM chip 105, and receives the command execution results exported from NVM chip 105.Known NVM chip connects Mouth agreement includes " Toggle ", " ONFI " etc..

Memory target (Target) is shared CE (, Chip Enable, chip enabled) signal in nand flash memory encapsulation One or more logic units (LUN, Logic UNit).It may include one or more tube cores (Die) in nand flash memory encapsulation. Typically, logic unit (LUN) corresponds to single tube core.Logic unit may include multiple planes (Plane).In logic unit Multiple planes can with parallel access, and multiple logic units in nand flash memory chip can execute independently of one another order and Report state.Can be from http://www.micron.com/~/media/Documents/Products/Other% " the Open NAND Flash Interface Specification that 20Documents/ONFI3_0Gold.ashx is obtained In (Revision 3.0) ", provide about target (target), logic unit, LUN, plane (Plane) meaning, be A part of the prior art.

Data are usually stored and read on storage medium by page.And data are erased in blocks.Block (also referred to as physical block) packet Containing multiple pages.Block includes multiple pages.Page (referred to as Physical Page) on storage medium has fixed size, such as 17664 bytes. Physical Page also can have other sizes.

In solid storage device, safeguarded using FTL (Flash Translation Layer, flash translation layer (FTL)) from Map information of the logical address to physical address.Logical address constitutes the solid-state that the upper layer software (applications)s such as operating system are perceived and deposits Store up the memory space of equipment.Physical address is the address for accessing the physical memory cell of solid storage device.In related skill Also implement address of cache using intermediate address form in art.Such as logical address is mapped as intermediate address, and then will be intermediate Address is further mapped as physical address.

The table structure for storing the map information from logical address to physical address is referred to as FTL table.FTL table is that solid-state is deposited Store up the important metadata in equipment.The data item of usual FTL table has recorded the ground in solid storage device as unit of data page Location mapping relations.

FTL table includes multiple FTL table clauses (or list item).In one case, one is had recorded in each FTL table clause The corresponding relationship of a logical page address and a Physical Page.In another case, it is had recorded in each FTL table clause continuous The corresponding relationship of multiple logical page addresses and continuous multiple Physical Page.In still another case, it is recorded in each FTL table clause The corresponding relationship of logical block address and physical block address.In the case that still another, in FTL table record logical block address with The mapping relations and/or logical page address of physical block address and the mapping relations of physical page address.

Bulk includes coming from multiple logic units (LUN), also referred to as the physical block of each of logic unit group.Each logic Unit can provide a physical block for bulk.For example, in the schematic diagram of bulk out shown in Fig. 2, in every 16 logic lists Bulk is constructed on first (LUN).Each bulk includes 16 physical blocks respectively from 16 logic units (LUN).In the example of Fig. 2 In son, bulk 0 includes the physical block 0 of each logic unit in 16 logic units (LUN), and bulk 1 includes coming from The physical block 1 of each logic unit (LUN).Bulk can also be constructed in many other ways.

For example, constructing page band in bulk, the Physical Page of each interior same physical address of logic unit (LUN) is constituted " page band ".In Fig. 2, Physical Page P0-0, Physical Page P0-1 ... and Physical Page P0-x constitute page band 0, wherein Physical Page P0-0, Physical Page P0-1 ... Physical Page P0-14 are for storing user data, and Physical Page P0-x is for storing according in band The verification data that are calculated of all customer data.Similarly, in Fig. 2, Physical Page P2-0, Physical Page P2-1 ... and physics Page P2-x constitutes page band 2.Physical Page for storing verification data can be located at any position in page band.As again One example, to the correlation of Fig. 3 A in Fig. 3 A and its specification application No. is 201710752321.0 Chinese patent application In description, another make of bulk is provided.

Summary of the invention

In order to provide specified memory capacity, under some cases, solid storage device uses asymmetric channel.Couple NVM Each of multiple channels of chip are provided with NVM chip, tube core, LUN and/or the memory capacity of different number.It is asymmetric logical Road cause random write access according to when, each channel data volume to be transmitted has differences, some channels become performance bottleneck.According to Embodiments herein attempts to solve one or more technical problems and other technologies problem above-mentioned.

According to a first aspect of the present application, the first solid storage device according to the application first aspect is provided, including Control unit, control unit are coupled to NVM chip by multiple channels；Each channel couples one or more NVM chip, NVM Chip includes one or more logic units, and each of multiple logic units provide physical block, one or more first for bulk The NVM chip that the quantity for the logic unit that the NVM chip of channel coupling provides is greater than one or more second channel couplings provides Logic unit quantity.

The first solid storage device according to a first aspect of the present application, provides second according to the application first aspect The check block of solid storage device, bulk is provided by the NVM chip of first passage to coupling.

First or second solid storage device according to a first aspect of the present application, provides according to the application first aspect Third solid storage device, the check block of the first bulk is provided by the NVM chip of second channel to coupling and first passage It is not used for one or more physical blocks that the first bulk provides.

Third solid storage device according to a first aspect of the present application, provides the 4th according to the application first aspect Solid storage device, first passage are that one or more of physical blocks that the first bulk provides are marked as bad block.

Third or the 4th solid storage device according to a first aspect of the present application, provide according to the application first aspect The 5th solid storage device, bad block is spontaneous or by artificially by available physical block labeled as bad block.

Third according to a first aspect of the present application provides one of to the 5th solid storage device according to the application first 6th solid storage device of aspect, if in the physical block that first passage provides for the first bulk, there is one or more productions naturally Available physical blocks handmarking need not be then bad block by raw bad block.

Third according to a first aspect of the present application provides one of to the 5th solid storage device according to the application first 7th solid storage device of aspect, if in the physical block that first passage provides for bulk first, there is no spontaneous bad Handmarking in one or more available physical blocks is then bad block by block.

One of first to the 7th solid storage device according to a first aspect of the present application is provided according to the application first 8th solid storage device of aspect, the position of the check block of bulk are recorded in the metadata of bulk.

One of first to the 8th solid storage device according to a first aspect of the present application is provided according to the application first 9th solid storage device of aspect, one or more physical blocks of the NVM chip of first passage meet the first bulk of construction Condition, but it is not used for constructing the first bulk.

One of first to the 9th solid storage device according to a first aspect of the present application is provided according to the application first Tenth solid storage device of aspect, logic unit include multiple planes, provide multiple logic lists of physical block for the first bulk In member, the first most logic unit of the physical block provided for the first bulk is selected as the first bulk and provides check block.

The tenth solid storage device according to a first aspect of the present application, provides the tenth according to the application first aspect One solid storage device, if the first logic unit is not belonging to first passage, first passage is the physical block quilt that the first bulk provides It is set as bad block.

The first solid storage device according to a first aspect of the present application, provides the tenth according to the application first aspect The check block of two solid storage devices, the first bulk is provided by the NVM chip of first passage to coupling；The check block of second bulk It is provided by the NVM chip of second channel to coupling；And the NVM chip of first passage is the one or more that the second bulk provides Physical block is not used.

One of first to the 12nd solid storage device according to a first aspect of the present application is provided according to the application The NVM number of chips of 13rd solid storage device of one side, one or more first passage couplings is greater than one or more The NVM number of chips of second channel coupling.

One of first to the 13rd solid storage device according to a first aspect of the present application is provided according to the application Multiple NVM chips of 14th solid storage device of one side, one or more channel couplings have the logic of different number Unit.

According to a second aspect of the present application, providing according to the first of the application second aspect is bulk selection check block Method, comprising: the first passage that most logic units are provided from multiple channels is selected as the first bulk and provides check block First logic unit, and check block of the physical block as the first bulk for selecting the first logic unit to provide for the first bulk.

First according to a second aspect of the present application is the method for bulk selection check block, is provided according to the application second The second of aspect is the method for bulk selection check block, if the first logic unit is that the physical block that the first bulk provides is unsatisfactory for making For the condition of check block, the logic unit for being selected differently from other channels of first passage is the physical block that provides of bulk as the A bulk of check block.

Second according to a second aspect of the present application is the method for bulk selection check block, is provided according to the application second The third of aspect is the method for bulk selection check block, if the physics for selecting the logic unit in other channels to provide for bulk First logic unit is that one or more physical blocks that the first bulk provides are labeled as not by check block of the block as the first bulk It is used.

First according to a second aspect of the present application to third is one of the method for bulk selection check block, provides basis The 4th of the application second aspect is the method for bulk selection check block, selects one that the first logic unit provides for the first bulk Check block of a or multiple physical blocks as the first bulk.

First to fourth according to a second aspect of the present application is one of the method for bulk selection check block, provides basis The 5th of the application second aspect is the method for bulk selection check block, and identified check block is recorded in the metadata of bulk Position.

Third according to a second aspect of the present application is the method for bulk selection check block, is provided according to the application second The 6th of aspect is the method for bulk selection check block, if the first logic unit is one or more physics that the first bulk provides Block is bad block, and the first bulk of label uses other one or more physical blocks that the first logic unit is that the first bulk provides.

First according to a second aspect of the present application to third is one of the method for bulk selection check block, provides basis The 7th of the application second aspect is the method for bulk selection check block, if the first logic unit is one that the first bulk provides Or bad block is not present in multiple physical blocks, then by the first logic unit be one or more physical blocks for providing of the first bulk at least One, it is labeled as bad block.

First according to a second aspect of the present application to third is one of the method for bulk selection check block, provides basis The 8th of the application second aspect is the method for bulk selection check block, if can be used as the first bulk in first passage physical block The quantity of the physical block of data block then will greater than the quantity of the physical block for the data block that can be used as the first bulk in second channel One or more physical blocks of the data block of the first bulk be can be used as in first passage physical block labeled as bad block.

The 8th according to a second aspect of the present application is the method for bulk selection check block, is provided according to the application second The 9th of aspect is the method for bulk selection check block, by marking bad block, so that can be used as first in first passage physical block The quantity of the physical block of the data block of bulk, no more than the number of the physical block for the data block that can be used as the first bulk in second channel Amount.

First according to a second aspect of the present application is the method for bulk selection check block, is provided according to the application second The tenth of aspect is the method for bulk selection check block, when data are written to bulk, data is not written to labeled bad block.

First according to a second aspect of the present application is the method for bulk selection check block, is provided according to the application second The 11st of aspect is that the method for bulk selection check block avoids labeled bad block when implementing error checking to bulk.

According to the third aspect of the application, providing according to the first of the application third aspect is bulk selection check block Method, comprising: obtaining the logic unit on each of one or more channels is the good number of blocks that the first bulk provides；If one Or the first logic unit on the first passage in multiple channels is equal to the first bulk for the good number of blocks that the first bulk provides and mentions The good number of blocks of maximum that each of all logic units for physical block can be provided for the first bulk, and the logic of first passage Element number is greater than the number of logic cells of the second channel in one or more channels；Select the first logic unit for the first bulk Check block is provided.

According to the first of the third aspect of the application be bulk selection check block method, provide according to the application third The second of aspect is the method for bulk selection check block, if the first logic unit be the good number of blocks that provides of bulk be less than it is described most Big good number of blocks, is selected differently from the logic unit in other channels of first passage as the first bulk and provides check block.

According to the second of the third aspect of the application be bulk selection check block method, provide according to the application third The third of aspect is the method for bulk selection check block, further includes: if first passage can be the good number of blocks that the first bulk provides It can be the good number of blocks that the first bulk provides greater than second channel, be one or more that the first bulk provides by first passage A good block is labeled as bad block.

It is the method for bulk selection check block according to the third of the third aspect of the application, provides according to the application third The 4th of aspect is the method for bulk selection check block, further includes: by first passage be provide one of the first bulk or Multiple good blocks are labeled as bad block, so that it no more than second channel is first big that first passage, which is the good number of blocks that provides of the first bulk, The good number of blocks that block provides.

According to the first to fourth of the third aspect of the application be bulk selection check block one of method, provide basis The 5th of the application third aspect is the method for bulk selection check block, and logic unit is the good number of blocks that bulk provides, and is relied on It is the quantity of good block in physical block that specified bulk provides in each plane of logic unit.

According to the first to the 5th of the third aspect of the application be bulk selection check block one of method, provide basis The 6th of the application third aspect is the method for bulk selection check block, and logic unit has identical for the physical block that bulk provides Block address.

According to the fourth aspect of the application, providing according to the first of the application fourth aspect is bulk selection check block Method, including first to the 11st according to a second aspect of the present application for one of method of bulk selection check block, according to this Apply for that the first to the 6th of the third aspect is one of the method for bulk selection check block.

According to the 5th of the application aspect, provide a kind of program including program code, when be loaded into storage equipment and In storage equipment when executing, said program code make the storage equipment execution according to the application second aspect, the third aspect or Fourth aspect is one of the method for bulk selection check block.

Detailed description of the invention

In order to illustrate the technical solutions in the embodiments of the present application or in the prior art more clearly, to embodiment or will show below There is attached drawing needed in technical description to be briefly described, it should be apparent that, the accompanying drawings in the following description is only this The some embodiments recorded in application can also be obtained according to these attached drawings other for those of ordinary skill in the art Attached drawing.

Fig. 1 is the block diagram of solid storage device in the related technology；

Fig. 2 is the schematic diagram of bulk in the related technology；

Fig. 3 is the block diagram according to the solid storage device of the embodiment of the present application；

Fig. 4 illustrates the data organization according to the embodiment of the present application；

Fig. 5 is the flow chart according to the embodiment of the present application for bulk selection check block；

Fig. 6 A is the block diagram according to the solid storage device of the another embodiment of the application；

Fig. 6 B is the block diagram according to the solid storage device of another embodiment of the application；

Fig. 6 C is the block diagram according to the solid storage device of the application another embodiment；

Fig. 6 D is the block diagram according to the application still solid storage device of another embodiment；

Fig. 6 E is the block diagram according to the application still solid storage device of another embodiment；

Fig. 6 F is the block diagram according to the application still solid storage device of another embodiment；

Fig. 7 illustrates the schematic diagram of the bulk according to the another embodiment of the application；

Fig. 8 A illustrates the bulk according to the another embodiment of the application；

Fig. 8 B illustrates the bulk according to the application still another embodiment；And

Fig. 9 is the flow chart according to the another embodiment of the application for bulk selection check block.

Specific embodiment

Below with reference to the attached drawing in the embodiment of the present application, technical solutions in the embodiments of the present application carries out clear, complete Ground description, it is clear that described embodiment is some embodiments of the present application, instead of all the embodiments.Based on the application In embodiment, those skilled in the art's every other embodiment obtained without making creative work, all Belong to the range of the application protection.

Fig. 3 is the block diagram according to the solid storage device of the embodiment of the present application.The control unit of solid storage device (is also joined See Fig. 1, control unit 104) it is coupled to NVM chip (NVM) by one or more channels.In Fig. 3, by " CH " and then Appended drawing reference indicates channel.Each channel can couple one or two NVM chips.In Fig. 3, appended drawing reference " QDP " and its then Serial number instruction one of NVM chip." QDP " implys that indicated NVM chip includes 4 tube cores.Appended drawing reference " DDP " and its Subsequent serial number also indicates that one of NVM chip." DDP " implys that indicated NVM chip includes 2 tube cores.And as act Example, according in the embodiment of Fig. 3, each tube core provides a LUN.

In the embodiment of Fig. 3,8 channels are illustrated, wherein each of 0~CH of CH 6, is provided with one comprising 4 The NVM chip (being denoted as 0~QDP of QDP 6 respectively) of tube core.And channel C H 7 is provided with 2 NVM chips, wherein a NVM Chip includes 4 tube cores (being denoted as QPD 7), and another NVM chip includes 2 tube cores (being denoted as DDP 8).

In the embodiment of Fig. 3, bulk is constructed.The tube core of NVM chip is divided into two groups, what multiple tube cores in every group provided LUN is for constructing with a bulk of.Belong to a bulk of multiple physical blocks, from same group of LUN.NVM chip (QDP 0~ QDP 7) each of tube core 0 and the tube core 0 of tube core 1 and NVM chip (DDP 8) be used as one group, for constructing bulk.NVM The tube core 2 and tube core 3 of each of chip (0~QDP of QDP 7) and the tube core 1 of NVM chip (DDP 8) are used as another group, use In construction bulk.

In the embodiment of Fig. 3, the configuration of the NVM chip having the same of 0~CH of channel C H 6, and the NVM chip of channel C H7 Configuration, it is different from channel C H 0~CH 6.

Solid storage device has specified memory capacity.Memory capacity determines the solid storage device NVM to be arranged (SDP, DDP, QDP or ODP include 1 tube core, 2 tube cores, 4 in one chip to the quantity and/or type of chip respectively Tube core or 8 tube cores).For example, it is desired to arrange 52 tube cores in solid storage device, 12 QDP chips and 4 SDP can be used Chip.20 tube cores are set in solid storage device, 10 DDP chips can be used.

The control unit of solid storage device has specified number of channels.It is difficult to confined channel quantity and NVM chip-count Relationship between amount.It is shown to produce the embodiment of such as Fig. 3, there is different NVM chips to configure in each channel Situation.

Due on same channel each NVM chip sharing channel provide segment signal line (such as data line), thus, The NVM chip in channel configures, and influences the performance in channel.By taking Fig. 3 as an example, if the maximum data transfer bandwidth in channel is BW, then In 0~CH of channel C H 6, maximum bandwidth workable for each tube core is BW/4 (because there are 4 tube cores in each channel), and channel In CH 7, maximum bandwidth workable for each tube core is BW/6 (because channel C H 7 has 6 tube cores).So as to cause channel C H 7 The performance of each tube core be not fully utilized.According to an embodiment of the present application, it attempts at least to solve the problems, such as this.

According to an embodiment of the present application, by providing the position of the check block of storage verification data in careful selection bulk It sets, makes the user data of bulk storage in the more favorable distribution in multiple channels of solid storage device, to promote solid-state storage The performance of equipment.

Fig. 4 illustrates the data organization according to the embodiment of the present application.

In conjunction with Fig. 3 and Fig. 4, according to an embodiment of the present application in, 34 tube cores of solid storage device provide 34 LUN, Using every 17 LUN as one group, for constructing bulk.In Fig. 4, LUN 0-LUN 16 is successively by each of 0~QDP's of QDP 7 The tube core 0 of tube core 0 and tube core 1 and DDP 8 provides, and wherein LUN 14 is provided by the tube core 0 of QDP 7, and LUN 15 is by QDP 7 Tube core 1 provide, and LUN 16 is provided by the tube core 0 of DDP 8.LUN 0 to LUN 16 is for constructing bulk 0 to bulk n.And LUN 17-LUN 33 is successively provided by the tube core 1 of the tube core 1 of each of 0~QDP of QDP 7 and tube core 2 and DDP 8.

According to the embodiment of Fig. 4, bulk n, the LUN provided as far as possible by the tube core positioned at channel C H 7 are arrived for bulk 0 (14~LUN of LUN 16) provides check block.For example, the check block B0 of the storage verification data of bulk 0 is located at LUN 16, greatly The check block B1 of block 1 is located at LUN 15.According to the embodiment of Fig. 4, in some cases, led to by other in addition to channel C H 7 The LUN in road provides check block for bulk, for example, the check block Bn of bulk n is located at LUN 1.

The some physical blocks of NVM chip are bad blocks.For example, the physical block BB1 from LUN 14 of bulk 1.Bad block is labeled, To be not used for storing data.For bulk n, since check block Bn is located at LUN 1 rather than positioned at the LUN 14 of channel C H 7 One of~LUN 16 so that channel C H 7 is possible to provide the physical block for storing user data for bulk n, and causes to connect Resume studies take this 3 physical blocks store data when, since the bandwidth of channel C H 7 is occupied full, be unable to give full play LUN 14~ The respective performance of LUN 16.To solve this problem, although 14~LUN of LUN 16 is that the physical block that bulk n is provided is all available (non- Bad block), still 14~LUN of label L UN 16 be the physical block that bulk n is provided at least one be bad block (in Fig. 4, by LUN 16 are labeled as bad block for the physical block that bulk n is provided, and are denoted as MB).

It is what bulk C was provided by 14~LUN of LUN 16 of channel C H 7 for any bulk C according to the embodiment of Fig. 4 In multiple physical blocks, perhaps having a physical block to be used to store verification data or have at least one physical block is bad block (oneself The bad block so generated, or good block is artificially labeled as bad block), ensure that 14~LUN of LUN 16 by channel C H 7 In the multiple physical blocks provided for bulk C, the physical block for storing user data is no more than 2.So that from bulk C When reading data, the data read from channel C H 7, which come from, is no more than 2 physical blocks, so that the maximum bandwidth of channel C H 7 will not As the performance bottleneck of 14~LUN of LUN 16 or the maximum bandwidth in channel 7 to the overall performance shadow of 14~LUN of LUN 16 Sound is small as far as possible.

It should be understood that according to an embodiment of the present application, the LUN quantity for constituting bulk is not limited to 17, and can be other Quantity.Fault-tolerant configuration used by bulk (RAID configuration) is also not necessarily limited to 16+1 (16 parts of user data and 1 part of verification data), also It can be 15+2 or 30+1 etc..NVM chip used in channel is also not necessarily limited to QDP, DDP, and can encapsulate in NVM chip The tube core of other quantity.

Fig. 5 is the flow chart according to the embodiment of the present application for bulk selection check block.

Implement the process of the embodiment according to Fig. 5, for each bulk to determine the position of the check block for bulk.It is optional The position for being used for the check block of bulk is also recorded in the metadata of bulk by ground, thus data are written to bulk or need When using check block, the position of check block would know that from metadata.

For bulk C, for the position for determining its check block, obtain solid storage device compared with other channels, set The channel (referring to Fig. 3, channel C H 7) of more die is set.And then the tube core of Acquisition channel CH 7 is one that bulk C is provided Or multiple LUN and one or more LUN are the physical block (510) that bulk C is provided.If one of one or more LUN (being denoted as LUN x) is that the physical block that bulk C is provided can be used as check block (520) (for example, physical block is available), then in channel C H 7 Tube core in for bulk C determine check block success, record by LUN x provides check block for bulk C.

If one or more LUN is that the physical block that bulk C is provided is not suitable as check block (for example, these physics Block is all bad block and is not available), then the selection check block in the LUN that the tube core in other channels of solid storage device provides (530), the position of check block determined by and in the metadata of bulk C recording.It and also in the tube core of channel C H 7 is big In the physical block that block C is provided, the physical block that label belongs to one of LUN of channel C H 7 is bad block (540), to reduce channel C H 7 be the quantity of the LUN for the storage user data that bulk C is provided.For example, each of three LUN of channel C H 7 provide for bulk C Physical block.It need not be again the available of these three physical blocks if at least one of these three physical blocks is spontaneous bad block Physical block handmarking is bad block；If spontaneous bad block, these three objects of handmarking are not present in these three physical blocks At least one of block is managed as bad block.

When data are written to bulk C, labeled bad block is avoided.When implementing error checking to bulk C, also avoid being labeled Bad block.

Fig. 6 A is the block diagram according to the solid storage device of the another embodiment of the application.The control unit of solid storage device (referring also to Fig. 1, control unit 104) is coupled to NVM chip (NVM) by one or more channels.As an example, according to Fig. 6 A Embodiment in, each tube core provides a LUN.

In the embodiment of Fig. 6 A, 8 channels are illustrated, wherein each of 0~CH of CH 6, is provided with one comprising 4 The NVM chip (being denoted as 0~QDP of QDP 6 respectively) of tube core.And channel C H 7 is provided with 2 NVM chips comprising 4 tube cores (being denoted as 7~QDP of QDP 8 respectively).To which solid storage device uses the NVM chip (including 4 tube cores) of single model, with The complexity of Parts Purchasing and management is reduced, also reduces solid storage device research and development, manufacturing process because of NVM chip model multiplicity Property and introduce mistake probability.

In the embodiment of Fig. 6 A, bulk is constructed.For example, the tube core of NVM chip is divided into two groups, multiple tube cores in every group The LUN of offer is for constructing with a bulk of.Belong to a bulk of multiple physical blocks, from same group of LUN.NVM chip The tube core 0 and tube core 1 of each of (0~QDP of QDP 7) and the tube core 0 of NVM chip (QDP 8) are used as one group, for constructing Bulk.The tube core 2 and tube core 3 of each of NVM chip (0~QDP of QDP 7) and 1 conduct of tube core of NVM chip (QDP 8) Another group, for constructing bulk.And all physical blocks of the tube core 2 of NVM chip (QDP 8) and tube core 3 artificially marks be Bad block.So that it is guaranteed that when access bulk, not will use as by bulk provided by the tube core 2 of NVM chip (QDP 8) and tube core 3.

It is applied to be set according to the solid-state storage of the embodiment of Fig. 6 A according to the embodiment that Fig. 5 is bulk selection check block It is standby.To select (to have excluded the tube core 2 and tube core of NVM chip QDP 8 in the tube core of channel C H 7 as far as possible for each bulk 3) physical block in LUN provided by is as check block.And when the tube core of channel C H 7 is not suitable for providing check block, from it Selection check block in the tube core in his channel, and (NVM chip has been excluded in the physical block that the tube core of channel C H 7 provides for bulk The tube core 2 of QDP 8 and the physical block of tube core 3), label belongs to one of LUN of channel C H 7 and (has excluded the pipe of NVM chip QDP 8 The LUN of core 2 and tube core 3) physical block be bad block (540), so that reducing channel C H 7 is the storage user data that provides of bulk C LUN quantity.

Fig. 6 B is the block diagram according to the solid storage device of another embodiment of the application.

In the embodiment of Fig. 6 B, 8 channels are illustrated, wherein each of 0~CH of channel C H 6, is provided with a packet NVM chip (being denoted as 0~DDP of DDP 6 respectively) containing 2 tube cores.And it includes 2 tube cores that channel C H 7, which is provided with 2, NVM chip (is denoted as 7~DDP of DDP 8) respectively.To which solid storage device (includes 2 pipes using the NVM chip of single model Core) one LUN of each tube core offer.

In the embodiment of Fig. 6 B, the tube core 0 and tube core 1 and NVM chip of each of NVM chip (0~DDP of DDP 7) The tube core 0 of (DDP 8) is used as one group, for constructing bulk.And by all physical block people of the tube core 1 of NVM chip (DDP 8) For labeled as bad block.So that it is guaranteed that when access bulk, not will use as will provided by the tube core 1 of NVM chip (DDP 8) it is big Block.

And pass through the position for bulk selection check block, it is ensured that for any bulk, three tube cores of channel C H 7 In (tube core 0 and tube core 1 of NVM chip DDP 6 and the tube core 0 of NVM chip DDP 7), be up to 2 provide number for bulk According to block.Three tube cores of channel C H 7 are at least one physical block that bulk provides, or be used to store the check number of bulk According to, or it is marked as bad block (either natural bad block or the bad block of handmarking).

Fig. 6 C is the block diagram according to the solid storage device of the application another embodiment.

In the embodiment of Fig. 6 C, 8 channels are illustrated, wherein each of 0~CH of channel C H 6, being provided with 2 includes The NVM chip (being denoted as 0~DDP of DDP 13 respectively) of 2 tube cores.And channel C H 7 is provided with 1 NVM comprising 2 tube cores Chip (being denoted as DDP 14) and 1 NVM chip (being denoted as QDP 0) comprising 4 tube cores.

In the embodiment of Fig. 6 C, the tube core 0 and NVM chip (QDP 0) of each of NVM chip (0~DDP of DDP 14) Tube core 0 and tube core 1 be used as one group, for constructing bulk.The tube core 1 of each of NVM chip (0~DDP of DDP 14), and The tube core 2 and tube core 3 of NVM chip (QDP 0) are used as another group, for constructing bulk.

And pass through the position for bulk selection check block, it is ensured that for any bulk, channel C H 7 provides for the bulk 3 tube cores (tube core 0 of NVM chip DDP 14 and the tube core 0 of NVM chip QDP 0 and tube core 1 or NVM core of physical block The tube core 1 of piece DDP 14 and the tube core 2 of NVM chip QDP 0 and tube core 3) in, be up to 2 provide data block for the bulk. Three tube cores for certain a bulk of channel C H 7 for providing physical block are at least one physical block that the bulk provides, or by with In the verification data of storage bulk, or it is marked as bad block (either natural bad block or the bad block of handmarking).

Fig. 6 D is the block diagram according to the application still solid storage device of another embodiment.

In the embodiment of Fig. 6 D, 8 channels are illustrated, wherein each of 0~CH of channel C H 5, being provided with 1 includes The NVM chip (being denoted as 0~DDP of DDP 5 respectively) of 2 tube cores.And each of channel C H 6 and CH 7 are provided with 2 and include 2 The NVM chip (being denoted as 6~DDP of DDP 9) of a tube core.

In the embodiment of Fig. 6 D, the tube core 0 and tube core 1 of each of NVM chip (DDP 0, DDP 2, DDP4 and DDP 6), And the tube core 0 of NVM chip (DDP 9) is used as one group, for constructing bulk.NVM chip (DDP 1, DDP 3, DDP5 and DDP Each of 7) tube core 0 of tube core 0 and tube core 1 and NVM chip (DDP 8) is used as another group, for constructing bulk.NVM core The tube core 1 of piece DDP 9 and DDP 8 is marked as bad block, is not involved in bulk construction.

Pass through the position for bulk selection check block, it is ensured that for any bulk, channel C H 6 provides physics for the bulk In 3 tube cores (tube core 0 and tube core 1 of NVM chip DDP 6 and the tube core 0 of NVM chip DDP 9) of block, be up to 2 are The bulk provides data block.Three tube cores for certain a bulk of channel C H 6 for providing physical block are at least one that the bulk provides A physical block, perhaps be used to store the verification data of bulk or be marked as bad block (either natural bad block, still The bad block of handmarking).And ensure that, for any bulk, channel C H 7 provides 3 tube core (NVM of physical block for the bulk The tube core 0 and tube core 1 of chip DDP 7 and the tube core 0 of NVM chip DDP 8) in, be up to 2 provide data for the bulk Block.

Fig. 6 E is the block diagram according to the application still solid storage device of another embodiment.

In the embodiment of Fig. 6 E, 8 channels are illustrated, wherein each of 0~CH of channel C H 3, being provided with 2 includes The NVM chip (being denoted as 0~QDP of QDP 7 respectively) of 4 tube cores.And each of 4~CH of channel C H 7 is provided with 1 and includes 4 The NVM chip (being denoted as 8~QDP of QDP 11) of a tube core (is denoted as 0~SDP of SDP with 1 NVM chip comprising 1 tube core 3)。

In the embodiment of Fig. 6 E, all tube cores of NVM chip (QDP 0, QDP 2 and QDP 8) and owning for SDP 0 Tube core is one group, for constructing bulk；All tube cores of NVM chip (QDP 1, QDP 3 and QDP 9) and owning for SDP 1 Tube core is one group, for constructing bulk；All tube cores of NVM chip (QDP 4, QDP 6 and QDP 10) and the institute of SDP 2 Having tube core is one group, for constructing bulk；All tube cores of NVM chip (QDP 5, QDP 7 and QDP 11) and SDP's 3 All tube cores are one group, for constructing bulk.

As an example, pass through the position for bulk selection check block, it is ensured that for any bulk, by the tube core of SDP chip Check block is provided for bulk.Or for any bulk, it is used to deposit for what bulk provided by the NVM chip of 4~CH of channel C H 7 The tube core of storage user data is no more than 4 (for example, it is bulk that check block, which is arranged in by the NVM chip of 4~CH of channel C H 7, In the physical block of offer, or by check block be arranged in by 4~CH of channel C H 7 NVM chip be bulk provide at least one A physical block is labeled as bad block).

Fig. 6 F is the block diagram according to the application still solid storage device of another embodiment.

In the embodiment of Fig. 6 F, 12 channels are illustrated, each channel is provided with 1 NVM chip comprising 8 tube cores (being denoted as 0~ODP of ODP 11 respectively)；Each channel be also provided with 1 comprising 2 tube cores NVM chip (be denoted as DDP 0~ DDP 11)。

In the embodiment of Fig. 6 F, as an example, the tube core 0 of the tube core 0-3 and DDP 0 of ODP 0, ODP 1 and OPD 6 For one group (be denoted as group 0), for constructing bulk；And the tube core 0 of the tube core 0-3 and DDP 2 of ODP 2, ODP 3 and OPD 7 are One group (being denoted as group 1), for constructing bulk；The tube core 1 of the tube core 4-7 and DDP 0 of ODP 0, ODP 1 and OPD 6 are one group (being denoted as group 2), for constructing bulk.

As an example, pass through the position for bulk selection check block, it is ensured that for any bulk, by DDP (DDP 0) chip Tube core provide check block for bulk.Or for the bulk in group 0, the channel C H 0 containing DDP chip provides for bulk Check block, or will be that the one or more of physical block that bulk provides mark as block in channel C H 0.Similarly, for group Bulk in 1, the channel C H 2 containing DDP chip (DDP 2) provide check block for bulk, or will be big in channel C H 2 The one or more labels for the physical block that block provides are block.

Fig. 7 illustrates the schematic diagram of the bulk according to the another embodiment of the application.

According to the embodiment of Fig. 7, bulk is constructed by 17 LUN.Each logic unit (LUN) includes multiple planes (Plane).It include 4 planes (plane 0, plane 1, plane 2 and plane 3) in LUN 2 by taking LUN 2 as an example.It is each in LUN A plane can be written and read simultaneously, to improve the concurrency of operation.

In the example of fig. 7, low 2 of physical block address are used to address plane.As an example, the physical block in LUN There are 12 bits in address, wherein minimum 2 bit is used to address one of 4 planes in LUN, and high 10 bit is used for addressable physical Block.For the needs of clear expression, high 10 bit of the address of physical block is known as " block address ", and low 2 bit is known as " plane earth Location ".To which the physical block in each logic unit with identical " block address " constitutes " bulk ".It should be pointed out that sometimes Also " block address " will be known as together with 12 bit address of " flat address ".At this point, the object that the block address in each LUN is 0,1,2,3 Reason block belongs to same piece of band.

Referring to Fig. 7, the physical block B0 that address is 0 in each plane of LUN 0-LUN 16 constitutes bulk 0, wherein LUN Physical block B0 in 0 to LUN 15 each plane is for storing user data, and the physical block B0 of 4 planes of LUN 16 is used In the verification data that storage is calculated according to the user data in block band.

Similarly, in Fig. 7, the physical block B2 that block address is 2 in LUN 0-LUN 16 constitutes bulk 2.

There is bad block in NVM chip sometimes, and each LUN for constituting bulk is caused to be the number for the physical block that bulk provides Amount is different.

Fig. 8 A illustrates the bulk according to the another embodiment of the application.Bulk is constructed on LUN 0 to LUN 4.LUN 0 is arrived Each of LUN 4 includes 4 planes, is individually identified as P0, P1, P2 and P3.Each square in Fig. 8 A represents a physical block, And physical block address having the same, all squares of Fig. 8 A constitute bulk 800.It is bad block by the physical block of hatching designation, Data cannot be written into.

According to embodiment shown in Fig. 8 A, LUN 4 is selected to provide check block for bulk 800.All planes of LUN 4 provide Check block to the physical block of bulk 800, all as bulk 800.Select LUN 4 to provide check block for bulk 800, be because In LUN 0-LUN 4, provide each plane of physical block the available block most with quantity in LUN 4 for bulk 800.In other words It says, selection constitutes the LUN of good block at most (or bad block is minimum) in multiple LUN of bulk 400 to provide check block.

Fig. 8 B illustrates the bulk according to the application still another embodiment.All squares of Fig. 8 B constitute bulk 810. It is bad block by the physical block of hatching designation, data cannot be written into.LUN 0, LUN 1 and LUN 4 provide 3 for bulk 810 A good block may be selected any one of LUN 0, LUN 1 and LUN 4 and be used to provide check block for bulk 810.As an example, LUN 0 is selected to provide check block for bulk 810.

Fig. 9 is the flow chart according to the another embodiment of the application for bulk selection check block.

Referring also to Fig. 7, Fig. 8 A and Fig. 8 B, according to the embodiment of Fig. 9, the LUN of the NVM chip of solid storage device includes more A plane.Implement the process of the embodiment according to Fig. 9, for each bulk to determine the position of the check block for bulk.

According to the embodiment of Fig. 9, the control unit of solid storage device couples multiple NVM chips by multiple channels.Respectively The quantity for the NVM chip that a channel is coupled is different, or the tube core coupled /LUN quantity is different.Some channels (are denoted as logical Road CH n) NVM chip/die/LUN quantity for being coupled is greater than other channel.Preferentially from (one or more) channel Check block is provided for bulk in NVM chip/die/LUN that CH n is coupled, so that the NVM chip coupled in channel C H n/ The verification data of bulk are stored in tube core/LUN, and less is that bulk stores user data, when being accessed with mitigating bulk, to be passed Defeated data volume.

Referring to Fig. 9, the NVM chip/die/LUN quantity coupled by identifying each channel of solid storage device is obtained To preferentially providing (one or more) channel (being denoted as channel C Hn) of check block.For example, NVM chip/pipe that selection is coupled The most one or more channels (CH n) of core/LUN quantity.For specifying bulk C, one or more channels (CH n) are obtained Each of on LUN be the good number of blocks (910) that can provide of bulk C.If the LUN on one of one or more channels (CH n) (being denoted as Ln) is equal to bulk C for the good number of blocks that bulk C can be provided and provides what each of all LUN of physical block can be provided Maximum good number of blocks (920), then select LUN (Ln) to provide check block (950) for bulk C, and mark in the metadata of bulk The position of check block physical block provided by the LUN (Ln) of channel (CH n).

LUN is the good number of blocks that bulk provides, and is the good number of blocks for multiple physical blocks that bulk provides dependent on LUN.Example It such as, be the physical block that specified bulk provides for the LUN (referring to Fig. 7) including 4 planes, in each plane has been block or bad Block.Alternatively, the physical block with identical block address from multiple planes each has been the quantity of block, determine that LUN is bulk The good number of blocks of the multiple physical blocks provided.Referring to Fig. 8 A, in the multiple LUN for constituting bulk 800, LUN 4 is that bulk 800 provides Good number of blocks it is most；In the multiple LUN for constituting bulk 810, LUN 0, LUN 1 and the good block number that LUN 4 is that bulk 810 provides Amount is most.

Referring back to Fig. 9, step 920, if any LUN in the one or more channel (CH n) is what bulk C can be provided Good number of blocks is both less than the good number of blocks of maximum that can be provided for bulk C each of all LUN for providing physical block, then from this one It is selected as bulk C in the LUN of the tube core on other channels except a or multiple channels (CH n), the LUN (note of check block is provided For LUN x) (930), which can be the good number of blocks that bulk C is provided, and be equal to bulk C and provide all LUN of physical block Each of the good number of blocks of maximum that can be provided.And also provide the LUN in the one or more channel (CH n) for bulk C One or more physical blocks are labeled as bad block (either natural bad block or the bad block of handmarking) (940).So that it is guaranteed that For any bulk, which provides in the LUN of physical block for the bulk, provides data for the bulk The quantity of the LUN of block is less than the quantity of the LUN on channel (CH n).

According to an embodiment of the present application, data are continuously written to bulk, so that being continuously written into solid storage device Data are continuously distributed in bulk.When in response to random reading to data, the data being read are randomly dispersed in solid-state In the NVM chip for storing equipment.When in response to random reading to data, NVM chip/die/LUN can be given full play to Concurrency.When in response to continuous reading to data, the data distribution that is read out bulk multiple physical blocks, and even if from Multiple or all physical blocks of bulk read simultaneously data, will not make due to being provided with verification data on channel (CH n) Performance bottleneck will not be become because being read out overabundance of data by obtaining channel (CH n).

A kind of solid storage device is additionally provided according to an embodiment of the present application, which includes that controller is deposited with non-volatile Memory chip, wherein controller executes any one processing method provided by the embodiments of the present application.

A kind of program being stored on readable medium is additionally provided according to an embodiment of the present application, when by solid storage device Controller operation when so that solid storage device execute according to any one processing method provided by the embodiments of the present application.

Although the preferred embodiment of the application has been described, it is created once a person skilled in the art knows basic Property concept, then additional changes and modifications may be made to these embodiments.So it includes excellent that the following claims are intended to be interpreted as It selects embodiment and falls into all change and modification of the application range.Obviously, those skilled in the art can be to the application Various modification and variations are carried out without departing from spirit and scope.If in this way, these modifications and variations of the application Belong within the scope of the claim of this application and its equivalent technologies, then the application is also intended to encompass these modification and variations and exists It is interior.

Claims (10)

1. a kind of solid storage device, which is characterized in that including control unit, control unit is coupled to NVM by multiple channels Chip；Each channel couples one or more NVM chip, and NVM chip includes one or more logic units, multiple logic units Each of provide physical block for bulk, the quantity for the logic unit that the NVM chip of one or more first passages couplings provides is big In the quantity for the logic unit that the NVM chip of one or more second channels coupling provides.

2. solid storage device as described in claim 1, which is characterized in that the check block of bulk is by first passage to coupling NVM chip provides.

3. solid storage device as claimed in claim 1 or 2, which is characterized in that the check block of the first bulk is by second channel NVM chip to coupling provides and first passage is that one or more physical blocks that the first bulk provides are not used.

4. solid storage device as described in any one of claims 1 to 3, which is characterized in that the one of the NVM chip of first passage A or multiple physical blocks meet the condition of the first bulk of construction, but are not used for constructing the first bulk.

5. such as the described in any item solid storage devices of Claims 1-4, which is characterized in that logic unit includes multiple planes, It is provided in multiple logic units of physical block for the first bulk, the first most logic list of the physical block provided for the first bulk Member is selected as the first bulk and provides check block.

6. solid storage device as claimed in claim 5, which is characterized in that if the first logic unit is not belonging to first passage, First passage is that the physical block that the first bulk provides is arranged to bad block.

7. solid storage device as described in claim 1, which is characterized in that

The check block of first bulk is provided by the NVM chip of first passage to coupling；

The check block of second bulk is provided by the NVM chip of second channel to coupling；And

The NVM chip of first passage is that one or more physical blocks that the second bulk provides are not used.

8. a kind of method for bulk selection check block characterized by comprising

The first passage that most logic units are provided from multiple channels is selected as the first of the first bulk offer check block and patrols Volume unit, and check block of the physical block as the first bulk for selecting the first logic unit to provide for the first bulk.

9. method according to claim 8, which is characterized in that

If the first logic unit is unsatisfactory for the condition as check block for the physical block that the first bulk provides, it is selected differently from first The logic unit in other channels in channel is check block of the physical block that provides of bulk as the first bulk.

10. a kind of method for bulk selection check block characterized by comprising

Obtaining the logic unit on each of one or more channels is the good number of blocks that the first bulk provides；

If the first logic unit on the first passage in one or more channels is that the good number of blocks that the first bulk provides is equal to First bulk provides the good number of blocks of maximum that each of all logic units of physical block can be provided for the first bulk, and first The number of logic cells in channel is greater than the number of logic cells of the second channel in one or more channels；

The first logic unit is selected to provide check block for the first bulk.