CN109782661B - System and method for realizing reconfigurable and multi-output real-time processing based on FPGA - Google Patents

System and method for realizing reconfigurable and multi-output real-time processing based on FPGA Download PDF

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CN109782661B
CN109782661B CN201910007523.1A CN201910007523A CN109782661B CN 109782661 B CN109782661 B CN 109782661B CN 201910007523 A CN201910007523 A CN 201910007523A CN 109782661 B CN109782661 B CN 109782661B
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correlation
real
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sample
parallel
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CN109782661A (en
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洪峰
冯海泓
黄敏燕
陈�峰
李钉云
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Shanghai Acoustics Laboratory Chinese Academy Of Sciences
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Shanghai Acoustics Laboratory Chinese Academy Of Sciences
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Priority to PCT/CN2019/086533 priority patent/WO2020140362A1/en
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    • GPHYSICS
    • G01MEASURING; TESTING
    • G01SRADIO DIRECTION-FINDING; RADIO NAVIGATION; DETERMINING DISTANCE OR VELOCITY BY USE OF RADIO WAVES; LOCATING OR PRESENCE-DETECTING BY USE OF THE REFLECTION OR RERADIATION OF RADIO WAVES; ANALOGOUS ARRANGEMENTS USING OTHER WAVES
    • G01S1/00Beacons or beacon systems transmitting signals having a characteristic or characteristics capable of being detected by non-directional receivers and defining directions, positions, or position lines fixed relatively to the beacon transmitters; Receivers co-operating therewith
    • G01S1/72Beacons or beacon systems transmitting signals having a characteristic or characteristics capable of being detected by non-directional receivers and defining directions, positions, or position lines fixed relatively to the beacon transmitters; Receivers co-operating therewith using ultrasonic, sonic or infrasonic waves
    • G01S1/76Systems for determining direction or position line
    • GPHYSICS
    • G01MEASURING; TESTING
    • G01SRADIO DIRECTION-FINDING; RADIO NAVIGATION; DETERMINING DISTANCE OR VELOCITY BY USE OF RADIO WAVES; LOCATING OR PRESENCE-DETECTING BY USE OF THE REFLECTION OR RERADIATION OF RADIO WAVES; ANALOGOUS ARRANGEMENTS USING OTHER WAVES
    • G01S3/00Direction-finders for determining the direction from which infrasonic, sonic, ultrasonic, or electromagnetic waves, or particle emission, not having a directional significance, are being received
    • G01S3/80Direction-finders for determining the direction from which infrasonic, sonic, ultrasonic, or electromagnetic waves, or particle emission, not having a directional significance, are being received using ultrasonic, sonic or infrasonic waves
    • G01S3/86Direction-finders for determining the direction from which infrasonic, sonic, ultrasonic, or electromagnetic waves, or particle emission, not having a directional significance, are being received using ultrasonic, sonic or infrasonic waves with means for eliminating undesired waves, e.g. disturbing noises
    • GPHYSICS
    • G01MEASURING; TESTING
    • G01SRADIO DIRECTION-FINDING; RADIO NAVIGATION; DETERMINING DISTANCE OR VELOCITY BY USE OF RADIO WAVES; LOCATING OR PRESENCE-DETECTING BY USE OF THE REFLECTION OR RERADIATION OF RADIO WAVES; ANALOGOUS ARRANGEMENTS USING OTHER WAVES
    • G01S15/00Systems using the reflection or reradiation of acoustic waves, e.g. sonar systems
    • G01S15/006Theoretical aspects
    • GPHYSICS
    • G01MEASURING; TESTING
    • G01SRADIO DIRECTION-FINDING; RADIO NAVIGATION; DETERMINING DISTANCE OR VELOCITY BY USE OF RADIO WAVES; LOCATING OR PRESENCE-DETECTING BY USE OF THE REFLECTION OR RERADIATION OF RADIO WAVES; ANALOGOUS ARRANGEMENTS USING OTHER WAVES
    • G01S15/00Systems using the reflection or reradiation of acoustic waves, e.g. sonar systems
    • G01S15/02Systems using the reflection or reradiation of acoustic waves, e.g. sonar systems using reflection of acoustic waves
    • G01S15/06Systems determining the position data of a target
    • G01S15/46Indirect determination of position data
    • GPHYSICS
    • G01MEASURING; TESTING
    • G01SRADIO DIRECTION-FINDING; RADIO NAVIGATION; DETERMINING DISTANCE OR VELOCITY BY USE OF RADIO WAVES; LOCATING OR PRESENCE-DETECTING BY USE OF THE REFLECTION OR RERADIATION OF RADIO WAVES; ANALOGOUS ARRANGEMENTS USING OTHER WAVES
    • G01S15/00Systems using the reflection or reradiation of acoustic waves, e.g. sonar systems
    • G01S15/88Sonar systems specially adapted for specific applications
    • GPHYSICS
    • G05CONTROLLING; REGULATING
    • G05BCONTROL OR REGULATING SYSTEMS IN GENERAL; FUNCTIONAL ELEMENTS OF SUCH SYSTEMS; MONITORING OR TESTING ARRANGEMENTS FOR SUCH SYSTEMS OR ELEMENTS
    • G05B19/00Programme-control systems
    • G05B19/02Programme-control systems electric
    • G05B19/04Programme control other than numerical control, i.e. in sequence controllers or logic controllers
    • G05B19/05Programmable logic controllers, e.g. simulating logic interconnections of signals according to ladder diagrams or function charts
    • GPHYSICS
    • G05CONTROLLING; REGULATING
    • G05BCONTROL OR REGULATING SYSTEMS IN GENERAL; FUNCTIONAL ELEMENTS OF SUCH SYSTEMS; MONITORING OR TESTING ARRANGEMENTS FOR SUCH SYSTEMS OR ELEMENTS
    • G05B2219/00Program-control systems
    • G05B2219/20Pc systems
    • G05B2219/21Pc I-O input output
    • G05B2219/21109Field programmable gate array, fpga as I-O module

Abstract

The invention relates to a real-time processing system for realizing reconfigurable and multi-output based on FPGA (field programmable gate array) applied to underwater acoustic positioning, which comprises a multi-interface control and command analysis module, a data processing module and a data processing module, wherein the multi-interface control and command analysis module is used for automatically completing transmission and command analysis of sample information; the sample management finite state machine is used for calculating related data and completing the splitting, turning and writing of the sample; a parallel correlation processor group for completing high-performance processing work for a plurality of targets in parallel; and the multi-output data former is used for simultaneously realizing data formation of multi-output results and outputting the flag bit signals outwards. The invention also relates to a reconfigurable and multi-output real-time processing control method applied to underwater sound positioning based on the FPGA. By adopting the system and the method, the high-speed parallel correlation processing is realized under a plurality of array elements and a plurality of targets in the whole realization process, the problems in the aspects of real-time performance, universality and noise resistance are solved, and the high-performance correlation is effectively realized.

Description

System and method for realizing reconfigurable and multi-output real-time processing based on FPGA
Technical Field
The invention relates to the field of underwater acoustic signal processing, in particular to the field of underwater acoustic positioning navigation real-time processing, and specifically relates to a reconfigurable and multi-output real-time processing system and method applied to underwater acoustic positioning based on an FPGA.
Background
The real-time correlation processing technology is a very common technology in underwater sound positioning navigation and has very important application value. In the application related to underwater sound real-time signal processing, especially in the application of underwater sound positioning navigation and the like, signals of different frequency bands and different systems are often required to realize multi-channel and multi-target detection, so that it is necessary to design a correlator to have the automatic sample reconfigurable performance. In addition, considering that the detection signal form and the variability of the signal length can make the common correlator unable to complete the calculation under different situations, it is necessary to research the design of scalable general-purpose correlator with parallel high performance based on field programmable logic Array (FPGA). Finally, because the underwater physical environment is complex, the situations of multipath phenomenon, transmission attenuation and absorption attenuation exist, and in order to ensure better detection performance, multiple results including correlation results, time gain compensation correlation results, normalization correlation results and the like are simultaneously output and data formation is completed, so that the cooperative processing is realized, and the method also has important significance.
At present, in the existing common real-time related processing method for the underwater sound positioning navigation based on the FPGA, the information of a sample is determined, cannot be automatically transmitted and configured through multiple interfaces, and lacks universality; in addition, the method is difficult to realize the general parallel computation during the processing, and is greatly influenced by the change of the number of channels and the target number, so that the logic design needs to be frequently modified; finally, in the subsequent processing, the related multiple outputs are not formed into data output, and a cooperative processing mechanism cannot be formed. Therefore, the general FPGA-based real-time correlation processing method is not good enough in performance from the viewpoint of general purpose, real-time performance, or noise immunity of the real-time correlation processing.
Disclosure of Invention
The invention aims to overcome the defects of the prior art and provides a reconfigurable and multi-output real-time processing system and a reconfigurable and multi-output real-time processing method based on FPGA application to underwater sound positioning, which meet the requirements of real-time performance, universality and noise resistance of a navigation process.
In order to achieve the above purpose, the present invention provides a reconfigurable and multi-output real-time processing system based on FPGA for underwater acoustic positioning and a method thereof, wherein the system comprises:
the FPGA-based real-time processing system for realizing reconfigurable and multi-output in underwater acoustic positioning is mainly characterized by comprising the following components:
the multi-interface control and command analysis module is used for automatically completing the transmission and command analysis of the sample information;
the sample management finite state machine is connected with the multi-interface control and command analysis module and is used for calculating related data and completing the splitting, turning and writing of the sample;
the parallel correlation processor group is connected with the sample management finite state machine and is used for completing high-performance processing work aiming at a plurality of targets in parallel;
and the multi-output data former is connected with the parallel related processor group and is used for simultaneously realizing the data formation of multi-output results and outputting flag bit signals outwards.
Preferably, the multi-interface control and command parsing module includes:
the controller group is used for receiving commands and sample information of each interface;
and the multi-interface command configuration analyzer is connected with the controller group and used for analyzing and processing commands and sample information and simultaneously transmitting the processing commands and the sample information to the sample management finite state machine, and the sample information triggered by the commands is processed and then mutually covered.
Preferably, the multi-interface control and command parsing module writes the sample information into the flash memory, so as to realize automatic reading and automatic configuration under the operation of restarting or command parsing.
Preferably, the sample management finite state machine comprises:
the configuration control finite state machine is connected with the multi-interface command configuration analyzer and is used for calculating the expected number of relevant points, the number of required parallel channels and the number of zero padding of the sub-relevant calculating units;
and the sample storage RAM unit comprises a real part RAM subunit and an imaginary part RAM subunit, which are connected with the parallel related processor group and are used for splitting and turning the sample information and respectively writing the sample information into the real part RAM subunit and the imaginary part RAM subunit, wherein the real part RAM subunit is used for storing real part data, and the imaginary part RAM subunit is used for storing imaginary part data.
Preferably, the parallel correlation processor group includes:
the delay controller is connected with the sample storage RAM unit and is used for respectively controlling the delay of the multipath signals;
the multi-path correlation calculation subunit group is connected with the delay controller and is used for completing the real part and imaginary part calculation of data in parallel;
and the related signal synthesis unit is connected with the multi-path related calculation subunit group and is used for respectively accumulating and calculating the real part and the imaginary part and carrying out comprehensive operation on the related subsignals.
Preferably, the multiple output data former comprises:
the calculation output unit is connected with the parallel correlation processor group and is used for calculating and outputting a correlation energy result, a correlation energy result after time gain compensation, a normalized correlation coefficient result, a correlation time delay result and a correlation phase result;
and the data forming unit is connected with the calculation output unit and used for storing each output result into a data forming memory and outputting a flag bit signal outwards.
The reconfigurable and multi-output real-time processing control method based on the FPGA and applied to underwater sound positioning is mainly characterized by comprising the following steps:
(1) the multi-interface control and command analysis module completes the reconfiguration of real-time related processing samples;
(2) the sample management finite state machine calculates the expected number of related points, the number of required parallel channels and the number of zero padding of the sub-related calculating units to finish the splitting, overturning and writing of the sample;
(3) the parallel correlation processor group completes high-performance correlation processing aiming at a plurality of targets of a plurality of array elements in parallel;
(4) the multi-output data former completes multi-output data results through the correlation energy results, the normalized correlation coefficient results, the correlation time delay results and the correlation phase results after time gain compensation.
Preferably, the sample management finite state machine includes a configuration control finite state machine and a sample storage RAM unit, the sample storage RAM unit includes a real RAM subunit group and an imaginary RAM subunit group, and the step (2) specifically includes the following steps:
(2.1) the configuration control finite state machine completes command analysis and obtains commands and data;
(2.2) the configuration control finite state machine calculates the expected number of correlation points, the number of required parallel channels and the number of zero padding of the sub-correlation calculation units;
and (2.3) splitting, overturning and writing the samples into the real part RAM subunit group and the imaginary part RAM subunit group by the sample storage RAM unit.
Preferably, the step (3) specifically includes the following steps:
(3.1) the delay controller completes signal delay control;
(3.2) the multi-path correlation calculation subunit group completes the real part and imaginary part calculation of the data in parallel;
and (3.3) the correlation signal synthesis unit carries out synthesis operation on the correlation subsignals.
By adopting the reconfigurable and multi-output real-time processing system and method based on FPGA for underwater acoustic positioning, high-speed parallel related processing is realized under multiple array elements and multiple targets in the whole realization process, the problems of instantaneity, universality and noise resistance are solved, and high-performance correlation is effectively realized. The system can automatically transmit and configure through multiple interfaces, and has universality; the method realizes general parallel computation during processing, is not influenced by the change of the number of channels and the number of targets, forms data output by related multiple outputs, forms a cooperative processing mechanism, and has obvious innovation and improvement on the general type, real-time property and noise immunity of real-time related processing.
Drawings
Fig. 1 is a schematic structural diagram of a real-time processing system for realizing reconfigurability and multi-output based on an FPGA applied to underwater acoustic positioning.
Fig. 2 is a schematic structural diagram of a multi-interface control and command analysis module of the real-time processing system for implementing reconfigurable and multi-output based on FPGA applied to underwater acoustic positioning.
Fig. 3 is a schematic structural diagram of a sample management finite state machine applied to a real-time processing system for realizing reconfigurable and multi-output based on an FPGA for underwater acoustic positioning according to the present invention.
Fig. 4 is a schematic structural diagram of the related computation in the related computation subunit group of the real-time processing system for implementing reconfigurable and multi-output based on FPGA applied to underwater acoustic positioning.
Fig. 5 is a schematic structural diagram of the basic computation of the related computation subunits in the related computation subunit group of the real-time processing system for implementing reconfigurable and multi-output based on FPGA applied to underwater acoustic positioning.
Fig. 6 is a schematic structural diagram of a multi-output computing and data former of the present invention, which is applied to an underwater acoustic positioning system to realize reconfigurable and multi-output real-time processing system based on an FPGA.
Fig. 7 is a schematic diagram of an energy-distance attenuation curve of the real-time processing system for realizing reconfigurable and multi-output based on the FPGA applied to the underwater sound positioning.
Fig. 8 is a schematic diagram of a time gain compensation-distance attenuation curve of the FPGA-based real-time processing system for implementing reconfigurable and multi-output for underwater acoustic positioning.
Fig. 9 is a flow chart illustrating a method for implementing the FPGA-based reconfigurable multi-output real-time processing control for underwater acoustic positioning according to the present invention.
Detailed Description
In order to more clearly describe the technical contents of the present invention, the following further description is given in conjunction with specific embodiments.
The invention discloses a reconfigurable and multi-output real-time processing system based on FPGA (field programmable gate array) applied to underwater acoustic positioning, wherein the system comprises:
the multi-interface control and command analysis module is used for automatically completing the transmission and command analysis of the sample information;
the sample management finite state machine is connected with the multi-interface control and command analysis module and is used for calculating related data and completing the splitting, turning and writing of the sample;
the parallel correlation processor group is connected with the sample management finite state machine and is used for completing high-performance processing work aiming at a plurality of targets in parallel;
and the multi-output data former is connected with the parallel related processor group and is used for simultaneously realizing the data formation of multi-output results and outputting flag bit signals outwards.
As a preferred embodiment of the present invention, the multi-interface control and command parsing module includes:
the controller group is used for receiving commands and sample information of each interface;
and the multi-interface command configuration analyzer is connected with the controller group and used for analyzing and processing commands and sample information and simultaneously transmitting the processing commands and the sample information to the sample management finite state machine, and the sample information triggered by the commands is processed and then mutually covered.
As a preferred embodiment of the present invention, the multi-interface control and command parsing module writes the sample information into the flash memory, and realizes automatic reading and automatic configuration under the operation of restarting or command parsing.
As a preferred embodiment of the present invention, the sample management finite state machine includes:
the configuration control finite state machine is connected with the multi-interface command configuration analyzer and is used for calculating the expected number of relevant points, the number of required parallel channels and the number of zero padding of the sub-relevant calculating units;
and the sample storage RAM unit comprises a real part RAM subunit and an imaginary part RAM subunit, which are connected with the parallel related processor group and are used for splitting and turning the sample information and respectively writing the sample information into the real part RAM subunit and the imaginary part RAM subunit, wherein the real part RAM subunit is used for storing real part data, and the imaginary part RAM subunit is used for storing imaginary part data.
As a preferred embodiment of the present invention, the parallel correlation processor group includes:
the delay controller is connected with the sample storage RAM unit and is used for respectively controlling the delay of the multipath signals;
the multi-path correlation calculation subunit group is connected with the delay controller and is used for completing the real part and imaginary part calculation of data in parallel;
and the related signal synthesis unit is connected with the multi-path related calculation subunit group and is used for respectively accumulating and calculating the real part and the imaginary part and carrying out comprehensive operation on the related subsignals.
As a preferred embodiment of the present invention, the multiple output data former includes:
the calculation output unit is connected with the parallel correlation processor group and is used for calculating and outputting a correlation energy result, a correlation energy result after time gain compensation, a normalized correlation coefficient result, a correlation time delay result and a correlation phase result;
and the data forming unit is connected with the calculation output unit and used for storing each output result into a data forming memory and outputting a flag bit signal outwards.
The reconfigurable and multi-output real-time processing control method based on the FPGA and applied to underwater sound positioning is realized based on the system, and comprises the following steps:
(1) the multi-interface control and command analysis module completes the reconfiguration of real-time related processing samples;
(2) the sample management finite state machine calculates the expected number of related points, the number of required parallel channels and the number of zero padding of the sub-related calculating units to finish the splitting, overturning and writing of the sample;
(2.1) the configuration control finite state machine completes command analysis and obtains commands and data;
(2.2) the configuration control finite state machine calculates the expected number of correlation points, the number of required parallel channels and the number of zero padding of the sub-correlation calculation units;
(2.3) the sample storage RAM unit splits, turns over and writes the samples into the real part RAM subunit group and the imaginary part RAM subunit group;
(3) the parallel correlation processor group completes high-performance correlation processing aiming at a plurality of targets of a plurality of array elements in parallel;
(3.1) the delay controller completes signal delay control;
(3.2) the multi-path correlation calculation subunit group completes the real part and imaginary part calculation of the data in parallel;
(3.3) the correlation signal synthesis unit carries out synthesis operation on the correlation subsignals;
(4) the multi-output data former completes multi-output data results through the correlation energy results, the normalized correlation coefficient results, the correlation time delay results and the correlation phase results after time gain compensation.
In a specific implementation mode of the invention, the invention discloses a high-performance multi-output reconfigurable real-time correlation processing method applied to underwater sound positioning based on an FPGA, which comprises the following steps: the reconfiguration of real-time related processing samples is completed by utilizing multi-interface control; calculating expected related point number, required parallel channel number and zero filling number of the sub-related calculating units by using a sample management finite state machine to finish sample splitting, overturning and writing; high-performance related processing aiming at a plurality of targets of a plurality of array elements is completed in parallel by utilizing a parallel related processor group with high resource saving; and forming a multi-output data result by using the correlation energy result, the normalized correlation coefficient result and the correlation time delay-phase result after the time gain compensation. The invention also discloses a reconfigurable and multi-output real-time related processing device based on the FPGA and applied to the underwater sound positioning.
The device comprises:
the multi-interface control and command analysis unit is used for automatically completing the transmission and command analysis of the sample information to the multi-interface control and command analysis unit;
the sample management finite state machine is used for calculating the expected number of related points, the required number of parallel channels and the number of zero padding of the sub-related calculating units to finish the splitting, overturning and writing of the sample;
the parallel relevant processor group with high resource saving is used for completing high-performance relevant processing aiming at a plurality of targets of a plurality of array elements in parallel;
and the multi-output data former is used for completing the simultaneous output of the calculation of forming the multi-output data result based on the correlation energy result, the normalized correlation coefficient result and the correlation time delay-phase result after the time gain compensation.
The multi-interface control and command analysis unit is used for directly using the analyzed command and sample information for subsequent units at the same time, and simultaneously writing the data into the FLASH when receiving the sample information; and each restart or command analysis can be automatically read from the FLASH and realize automatic configuration. The command parsing units can all process simultaneously, and the sample information of each interface processor can be mutually covered through OR processing after the command is triggered.
The finite state machine for sample management is specifically used for calculating the expected number of relevant points, the number of required parallel channels and the number of zero padding of a sub-relevant calculating unit, and completing sample splitting, overturning and writing, and comprises the following steps: automatically calculating expected related point number, required parallel channel number and zero filling number of the sub-related calculating units according to rules; automatically splitting, overturning and writing the samples into a real part RAM subunit group and an imaginary part RAM subunit group;
a parallel correlation processor group with high resource saving is used for completing high-performance correlation processing aiming at a plurality of targets of a multi-array element in parallel, and comprises the following components: respectively controlling the delay of the multi-path signals; the calculation of the parallel correlation processor group is completed by using highly saved resources, namely, the calculation of a real part is completed by using logic resources including 1 First Input First Output (FIFO), 1 buffer RAM, 1 sample storage RAM, one multiply-accumulate basic unit and a correlation processing controller, and the calculation of an imaginary part is completed by using equivalent resources; the resources are saved by using a pipeline structure, and after multi-stage flow calculation, the real part and the imaginary part are respectively obtained and accumulated, namely, the relevant sub-signals are subjected to comprehensive operation.
The multiple output data former is characterized in that a multiple output data result is formed by using a correlation energy result after time gain compensation, a normalized correlation coefficient result and a correlation time delay-phase result, and the multiple output data former comprises the following steps: summing the square of the real part and the square of the imaginary part to obtain a correlation energy result; calculating an energy-distance attenuation curve and a time gain compensation-distance attenuation curve based on spherical wave attenuation or plane wave attenuation and absorption attenuation of corresponding frequency by combining with relevant system parameters such as sound source level, transducer sensitivity and receiver gain; calculating correlation energy and signal intrinsic energy, and calculating a normalized correlation coefficient result; obtaining by combining a time delay result with sampling frequency and point number; the correlation phase result can adopt a CORDIC algorithm to obtain a calculation correlation time delay result and a correlation phase result; and the RAM and the control state machine are utilized to realize the data formation of the multi-output result and output the flag bit signals outwards.
The method comprises the following steps:
the reconfiguration of real-time related processing samples is completed by utilizing multi-interface control;
calculating expected related point number, required parallel channel number and zero filling number of the sub-related calculating units by using a sample management finite state machine to finish sample splitting, overturning and writing;
high-performance related processing aiming at a plurality of targets of a plurality of array elements is completed in parallel by utilizing a parallel related processor group with high resource saving;
and forming a multi-output data result by using the correlation energy result, the normalized correlation coefficient result and the correlation time delay-phase result after the time gain compensation and outputting the multi-output data result at the same time.
The reconfiguration of real-time related processing samples is completed by utilizing multi-interface control, and comprises the following steps: the analyzed command and the sample information are directly used by the subsequent units at the same time, and the data are written into the FLASH at the same time when the sample information is received; and each restart or command analysis can be automatically read from the FLASH and realize automatic configuration.
Utilizing a sample management finite state machine to calculate expected related point number, required parallel channel number and sub-related calculating unit zero filling number, and completing sample splitting, overturning and writing, wherein the method comprises the following steps: automatically calculating expected related point number, required parallel channel number and zero filling number of the sub-related calculating units according to rules; automatically splitting, overturning and writing the samples into a real part RAM subunit group and an imaginary part RAM subunit group;
the high-performance related processing aiming at a plurality of targets of a plurality of array elements is completed in parallel by utilizing a parallel related processor group with high resource saving, and the method comprises the following steps: respectively controlling the delay of the multi-path signals; the calculation of the parallel correlation processor group is completed by using highly saved resources, namely, the calculation of a real part is completed by using logic resources including 1 First Input First Output (FIFO), 1 cache Random Access Memory (RAM), 1 sample storage RAM, a multiply-accumulate basic unit and a correlation processing controller, and the calculation of an imaginary part is completed by using equivalent resources; the resources are saved by using a pipeline structure, and after multi-stage flow calculation, the respective accumulation results of the real part and the imaginary part are obtained, namely, the correlation sub-signals are subjected to comprehensive operation;
forming a multi-output data result by using the correlation energy result, the normalized correlation coefficient result and the correlation time delay-phase result after the time gain compensation, wherein the method comprises the following steps: summing the square of the real part and the square of the imaginary part to obtain a correlation energy result; calculating an energy-distance attenuation curve and a time gain compensation-distance attenuation curve based on spherical wave attenuation or plane wave attenuation and absorption attenuation of corresponding frequency by combining with relevant system parameters such as sound source level, transducer sensitivity and receiver gain; calculating correlation energy and signal intrinsic energy, and calculating a normalized correlation coefficient result; obtaining by combining a time delay result with sampling frequency and point number; the correlation phase result can adopt a Coordinate Rotation digital computer (CORDIC) algorithm to obtain a correlation time delay calculation result and a correlation phase result; and the RAM and the control state machine are utilized to realize the data formation of the multi-output result and output the flag bit signals outwards.
The embodiment of the invention provides a high-performance multi-output reconfigurable real-time related processing method applied to underwater sound positioning based on an FPGA (field programmable gate array), which comprises the following steps of:
the transmission and the command analysis of the sample information are automatically completed by utilizing a multi-interface control and command analysis unit:
in the above solution, the multi-interface controller mainly includes a serial port controller, an ethernet controller, a Synchronous serial port (chord) controller of a Digital Signal Processor (DSP), a Flash Memory (Flash) sample writing and reading controller, and other interface controllers;
in the above scheme, the command parsing units may be performed simultaneously, and sample information of each interface processor may be mutually covered after being triggered by a command;
on one hand, the analyzed command and the sample information are directly used by the subsequent units at the same time;
on the other hand, when the sample information is received, the data can be written into Flash, and can be automatically read from the Flash every time the Flash is restarted or analyzed through a command, so that automatic configuration can be realized.
The sample management finite state machine is responsible for managing commands and data obtained by the multi-interface control and command analysis unit:
in the above scheme, after receiving the command, the sample management finite state machine temporarily stores 2N groups of sample information of the N targets, including N groups of signal real parts and N groups of sample imaginary parts, in a sample RAM storage unit;
in the above scheme, the sample management finite state machine further automatically splits N groups of sample information in sequence by the configuration control finite state machine, and each group of sample information is split into NcAnd (4) turning over the group sub-sample information, and writing the real part and the imaginary part into the real part RAM subunit group and the imaginary part RAM subunit group respectively.
The parallel correlation processor group simultaneously completes M array elements (namely M paths of AD signals) and N targets (namely MN paths of high-performance correlation processing):
in the above scheme, the single-path high-performance correlation processing includes a signal delay controller, a multi-path correlation calculation subunit group, and a correlation signal synthesis unit.
The result output simultaneously comprises the output of a correlation energy result, a correlation energy result after time gain compensation, a normalized correlation coefficient result, a correlation time delay result and a correlation phase result; and the data former splices the output results according to the format and stores the output results into a data forming memory to generate a mark signal after the completion.
According to the high-performance multi-output reconfigurable real-time related processing method and device based on the FPGA, which are applied to underwater sound positioning, firstly, a multi-interface control and command analysis unit is used for acquiring commands and analyzing a plurality of groups of sample information, and on one hand, the analyzed commands and sample information are directly used by subsequent units; on the other hand, when the sample information is received, the data can be written into Flash, and can be automatically read from the Flash every time the Flash is restarted or analyzed through a command, so that automatic configuration can be realized; the sample management finite state machine is responsible for managing commands and data obtained by the multi-interface control and command analysis unit, automatically and sequentially splitting multi-path sample information, and writing a real part and an imaginary part into a real part RAM subunit group and an imaginary part RAM subunit group respectively; then, a related processor group is paralleled, a signal delay controller, a multi-path related calculation subunit group and a related signal comprehensive unit are operated at the same time, and high-performance related processing aiming at M array elements (namely M paths of AD signals) and N targets (namely MN paths of high-performance related processing) is completed in parallel; and finally, the output correlation energy result, the correlation energy result after time gain compensation, the normalized correlation coefficient result, the correlation time delay result and the correlation phase result are used as multiple output results, the output results are spliced according to formats through a data former and stored in a data forming memory, and a mark signal is generated after the completion. Therefore, high-speed parallel correlation processing can be realized under multiple array elements and multiple targets in the whole realization process, the problems of real-time performance, universality and noise resistance are solved, and high-performance correlation is effectively realized.
Fig. 9 is a schematic flow chart illustrating an implementation of a high-performance multi-output reconfigurable real-time correlation processing method applied to underwater acoustic positioning based on an FPGA according to an embodiment of the present invention, and as shown in fig. 9, the present embodiment provides a high-performance multi-output reconfigurable real-time correlation processing method applied to underwater acoustic positioning based on an FPGA, where the method includes:
step 101, firstly, a multi-interface control and command analysis unit is used for acquiring commands and analyzing a plurality of groups of sample information;
specifically, the method comprises the following steps: the analyzed command and the sample information are directly used by the subsequent units at the same time; when sample information is received, data can be written into Flash, and can be automatically read from the Flash every time the Flash is restarted or analyzed through a command, and automatic configuration can be realized.
102, the sample management finite state machine is responsible for managing commands and data obtained by the multi-interface control and command analysis unit;
specifically, the method comprises the following steps: completing command analysis and obtaining commands and data; calculating the expected number of correlation points, the number of required parallel channels and the zero filling number of the sub-correlation calculation units; and splitting, overturning and writing the samples into the real part RAM subunit group and the imaginary part RAM subunit group.
Step A1: completing command analysis and obtaining commands and data;
the multi-interface commands are processed by taking OR as a logical relation and data acquisition is triggered. At power-on, i.e. t ═ t0In the meantime, the command and data automatically read by FLASH are always used as initialization command and data, namely CMDFLASHDriving is carried out; subsequently, i.e. t > t0Then based on the subsequent command, such as serial command CMDUARTEthernet command CMDETHDSP command CMDSPORTAnd other commands CMDOTHERAnd (6) covering.
Simply, the system commands can be combined as:
Figure GDA0002467219610000101
wherein, | | represents an arithmetic or calculation.
Step A2: calculating the expected number of correlation points, the number of required parallel channels and the zero filling number of the sub-correlation calculation units;
suppose AD has a maximum sampling frequency of fsThe pulse width of the signal to be detected is set to TdThen the total expected correlation point number is
Ntotal=fsTd……(2)
Suppose the fast clock of the FPGA is fclkThe number of single maximum calculation correlation points is
Figure GDA0002467219610000102
The number of parallel channels required is then:
Figure GDA0002467219610000103
wherein the content of the first and second substances,
Figure GDA0002467219610000104
represents upwardsRounding off, NCh-maxThe calculation resource ratio is determined by dividing 60% of the total resource number of the FPGA by the single correlation in the autocorrelation calculation unit.
Therefore, the effective correlation point number of the single calculation of the sub-correlation calculation unit is:
Figure GDA0002467219610000105
the actual correlation point number of the single calculation is as follows:
Nd≤Nmax……(6)
the zero filling number of the sub-correlation calculation unit is as follows:
Npd=Nmux·Nd-Ntotal……(7)
step A3: splitting, overturning and writing the samples into a real part RAM subunit group and an imaginary part RAM subunit group;
and automatically and sequentially splitting the multi-path sample information, and respectively writing the real part and the imaginary part into the real part RAM subunit group and the imaginary part RAM subunit group.
Here, the real part and imaginary part of the whole sample corresponding to the object C are respectively denoted as rC(n) and iC(n), splitting the samples required by each parallel computing subunit into
Figure GDA0002467219610000111
… and
Figure GDA0002467219610000112
and
Figure GDA0002467219610000113
… and
Figure GDA0002467219610000114
then turn it over and mark it as
Figure GDA0002467219610000115
… and
Figure GDA0002467219610000116
and
Figure GDA0002467219610000117
… and
Figure GDA0002467219610000118
the samples are then zero-padded, and recorded as
Figure GDA0002467219610000119
… and
Figure GDA00024672196100001110
and
Figure GDA00024672196100001111
… and
Figure GDA00024672196100001112
and finally, automatically writing the split, turned and zero-filled samples into the real part RAM unit and the imaginary part RAM unit in sequence.
And 103, realizing the calculation of the parallel correlation processor group, and completing the high-performance correlation processing aiming at M array elements (namely M paths of AD signals) and N targets (namely MN paths) in parallel.
Specifically, the method comprises the following steps: completing signal delay control; calculating a related calculation subunit group; the correlated sub-signals are combined.
Step B1: completing signal delay control;
dividing signal s (N) into NMUXAnd the paths are respectively delayed and input to the related subunit groups. Wherein, the first input is original signal s (n), and the first output is s1(n)=s(n-Nd) (ii) a The second input being the output of the first, i.e. s1(n) the second output is s1(n)=s(n-2Nd) (ii) a Recursion is carried out in sequence; the last path is input as
Figure GDA00024672196100001113
The last path is output as
Figure GDA00024672196100001114
Step B2: completing the calculation of the related calculation subunit group;
assuming that the criteria for the signal energy are calculated as:
Figure GDA00024672196100001115
the correlation process is calculated in parallel as:
Figure GDA0002467219610000121
here, the first and second liquid crystal display panels are,
Figure GDA0002467219610000122
Figure GDA0002467219610000123
step B2 mainly completes the calculation of sub-units (10) and (11), and the calculation structure adopts the structure shown in FIG. 5
The sub-unit real-imaginary part calculation respectively comprises 1 First-out queue (FIFO), 1 buffer RAM, 1 sample storage RAM, a multiply-accumulate basic unit and a correlation processing controller. The structure greatly saves resources and provides guarantee for large-scale parallelization.
Step B3: completing the synthesis of the related sub-signals;
the square operation in (9) is completed, and the assembly line structure is utilized to save resources, and the process is carried out
Figure GDA0002467219610000124
And after the stage pipeline calculation, obtaining real part and imaginary part results.
And step 104, completing calculation of the correlation energy result, the correlation energy result after time gain compensation, the normalized correlation coefficient result, the correlation time delay result and the correlation phase result as multiple output results, splicing the output results according to formats by a data former and storing the output results into a data forming memory, generating a mark signal after completion, and outputting the mark signal.
Specifically, the method comprises the following steps: calculating a correlation energy result; calculating a correlation energy result after time gain compensation; calculating a normalized correlation coefficient result; calculating a correlation time delay result and a correlation phase result; and forming and outputting data.
Step C1: calculating a correlation energy result;
and (9) summing the square of the real part and the square of the imaginary part to obtain a correlation energy result.
Step C2: calculating a correlation energy result after time gain compensation;
according to the absorption attenuation based on spherical wave attenuation or plane wave attenuation and corresponding frequency, and the combination of the sound source level, the sensitivity of the transducer, the gain of the receiver and other related system parameters, an energy-distance attenuation curve is calculated as shown in fig. 7, and a time gain compensation-distance attenuation curve is calculated as shown in fig. 8.
Step C3: calculating a normalized correlation coefficient result;
obtaining the result of normalized correlation coefficient according to (12)
Figure GDA0002467219610000125
Wherein ρ (x) ranges from
Figure GDA0002467219610000131
Step C4: calculating a correlation time delay result and a correlation phase result;
the time delay result is obtained by combining the sampling frequency and the point number; the correlation phase result may be obtained using the CORDIC algorithm.
Step C5: and forming and outputting data.
And realizing data formation of a multi-output result and outputting a flag bit signal outwards.
By adopting the reconfigurable and multi-output real-time processing system and method based on FPGA for underwater acoustic positioning, high-speed parallel related processing is realized under multiple array elements and multiple targets in the whole realization process, the problems of instantaneity, universality and noise resistance are solved, and high-performance correlation is effectively realized. The system can automatically transmit and configure through multiple interfaces, and has universality; the method realizes general parallel computation during processing, is not influenced by the change of the number of channels and the number of targets, forms data output by related multiple outputs, forms a cooperative processing mechanism, and has obvious innovation and improvement on the general type, real-time property and noise immunity of real-time related processing.
In this specification, the invention has been described with reference to specific embodiments thereof. It will, however, be evident that various modifications and changes may be made thereto without departing from the broader spirit and scope of the invention. The specification and drawings are, accordingly, to be regarded in an illustrative rather than a restrictive sense.

Claims (8)

1. A real-time processing system for implementing reconfigurability and multiple outputs based on FPGA application to underwater acoustic positioning, the system comprising:
the multi-interface control and command analysis module is used for automatically completing the transmission and command analysis of the sample information; the multi-interface control and command analysis module writes the sample information into the flash memory, and realizes automatic reading and automatic configuration under the operation of restarting or command analysis;
the sample management finite state machine is connected with the multi-interface control and command analysis module and is used for calculating related data and completing the splitting, turning, zero padding and writing of the sample; the related data is the expected number of related points, the number of required parallel channels and the number of zero padding of the sub-related computing units; the splitting of the sample refers to automatically and sequentially splitting the multi-path sample information into a real part and an imaginary part; the writing-in means that the split, overturned and zero-filled samples are automatically written into the real part RAM unit and the imaginary part RAM unit in sequence;
the parallel correlation processor group is connected with the sample management finite state machine and is used for completing high-performance processing work aiming at a plurality of targets in parallel; the parallel correlation processor group is used for respectively delaying and controlling the multi-path signals and parallelly finishing the real part and imaginary part calculation of data; respectively accumulating and calculating the real part and the imaginary part and carrying out comprehensive operation on the related sub-signals;
the multi-output data former is connected with the parallel related processor group and is used for simultaneously realizing the data formation of multi-output results and outputting flag bit signals outwards; the multi-output data former is used for calculating a multi-output correlation energy result, a correlation energy result after time gain compensation, a normalized correlation coefficient result, a correlation time delay result and a correlation phase result.
2. The FPGA-based real-time processing system for reconfigurable and multi-output for underwater acoustic positioning applications as claimed in claim 1, wherein said multi-interface control and command parsing module comprises:
the controller group is used for receiving commands and sample information of each interface;
and the multi-interface command configuration analyzer is connected with the controller group and used for analyzing and processing commands and sample information and simultaneously transmitting the processing commands and the sample information to the sample management finite state machine, and the sample information triggered by the commands is processed and then mutually covered.
3. The FPGA-based real-time processing system for implementing reconfigurable and multi-output for underwater acoustic positioning as claimed in claim 2, wherein said sample management finite state machine comprises:
the configuration control finite state machine is connected with the multi-interface command configuration analyzer and is used for calculating the expected number of relevant points, the number of required parallel channels and the number of zero padding of the sub-relevant calculating units;
and the sample storage RAM unit comprises a real part RAM subunit and an imaginary part RAM subunit, which are connected with the parallel related processor group and are used for splitting and turning the sample information and respectively writing the sample information into the real part RAM subunit and the imaginary part RAM subunit, wherein the real part RAM subunit is used for storing real part data, and the imaginary part RAM subunit is used for storing imaginary part data.
4. The FPGA-based real-time processing system for implementing reconfigurable and multi-output for underwater acoustic positioning as claimed in claim 3, wherein said set of parallel correlation processors comprises:
the delay controller is connected with the sample storage RAM unit and is used for respectively controlling the delay of the multipath signals;
the multi-path correlation calculation subunit group is connected with the delay controller and is used for completing the real part and imaginary part calculation of data in parallel;
and the related signal synthesis unit is connected with the multi-path related calculation subunit group and is used for respectively accumulating and calculating the real part and the imaginary part and carrying out comprehensive operation on the related subsignals.
5. The FPGA-based real-time processing system for reconfigurable and multi-output for underwater acoustic positioning applications as claimed in claim 1, wherein said multi-output data former comprises:
the calculation output unit is connected with the parallel correlation processor group and is used for calculating and outputting a correlation energy result, a correlation energy result after time gain compensation, a normalized correlation coefficient result, a correlation time delay result and a correlation phase result;
and the data forming unit is connected with the calculation output unit and used for storing each output result into a data forming memory and outputting a flag bit signal outwards.
6. An FPGA-based reconfigurable multi-output real-time processing control method for underwater acoustic positioning, using the system of claim 1, said method comprising the steps of:
(1) the multi-interface control and command analysis module completes the reconfiguration of real-time related processing samples;
(2) the sample management finite state machine calculates the expected number of related points, the number of required parallel channels and the number of zero padding of the sub-related calculating units to finish the splitting, overturning and writing of the sample;
(3) the parallel correlation processor group completes high-performance correlation processing aiming at a plurality of targets of a plurality of array elements in parallel;
(4) the multi-output data former completes multi-output data results through the correlation energy results, the normalized correlation coefficient results, the correlation time delay results and the correlation phase results after time gain compensation.
7. The method of claim 6, wherein said sample management finite state machine comprises a configuration control finite state machine and sample storage RAM units, said sample storage RAM units comprising a real RAM subunit group and an imaginary RAM subunit group, said step (2) comprising the steps of:
(2.1) the configuration control finite state machine completes command analysis and obtains commands and data;
(2.2) the configuration control finite state machine calculates the expected number of correlation points, the number of required parallel channels and the number of zero padding of the sub-correlation calculation units;
and (2.3) splitting, overturning and writing the samples into the real part RAM subunit group and the imaginary part RAM subunit group by the sample storage RAM unit.
8. The method according to claim 7, wherein the parallel correlator bank comprises a delay controller, a plurality of correlator computing subunit groups and a correlation signal synthesis unit, and the step (3) comprises the following steps:
(3.1) the delay controller completes signal delay control;
(3.2) the multi-path correlation calculation subunit group completes the real part and imaginary part calculation of the data in parallel;
and (3.3) the correlation signal synthesis unit carries out synthesis operation on the correlation subsignals.
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Publication number Priority date Publication date Assignee Title
US3660808A (en) * 1962-08-24 1972-05-02 Du Pont Assembly for recognizing underwater acoustic signals
WO2006043511A1 (en) * 2004-10-18 2006-04-27 Nsk Ltd. Abnormality diagnosis system for machinery
US7613858B1 (en) * 2005-01-24 2009-11-03 Altera Corporation Implementing signal processing cores as application specific processors
CN100594491C (en) * 2006-07-14 2010-03-17 中国电子科技集团公司第三十八研究所 Reconstructable digital signal processor
US8358809B2 (en) * 2006-07-25 2013-01-22 Hintz Kenneth J Syntactic signal recognizer and pattern recognizer
US10168414B2 (en) * 2014-07-17 2019-01-01 Origin Wireless, Inc. Wireless signals and techniques for determining locations of objects in multi-path environments
CN102096064B (en) * 2010-11-12 2013-10-30 嘉兴中科声学科技有限公司 Method and system used for accurately measuring time delay difference in short base line underwater acoustic positioning system
CN102945224A (en) * 2012-09-18 2013-02-27 西安电子科技大学 High-speed variable point FFT (Fast Fourier Transform) processor based on FPGA (Field-Programmable Gate Array) and processing method of high-speed variable point FFT processor
WO2014105717A1 (en) * 2012-12-28 2014-07-03 Volcano Corporation Synthetic aperture image reconstruction system in a patient interface module (pim)
CN104049246B (en) * 2013-03-12 2016-09-28 中国科学院声学研究所 A kind of time delay estimation method that frequency is unknown
US9229688B2 (en) * 2013-03-14 2016-01-05 Massively Parallel Technologies, Inc. Automated latency management and cross-communication exchange conversion
US10624612B2 (en) * 2014-06-05 2020-04-21 Chikayoshi Sumi Beamforming method, measurement and imaging instruments, and communication instruments
CN104181505B (en) * 2014-08-18 2017-09-01 吉林大学 A kind of multi-target underwater acoustic positioning method and system based on near-field sources localization algorithm
CN104570846B (en) * 2014-12-04 2017-10-24 中国航空工业集团公司第六三一研究所 FPGA reconfiguration control methods
CN105718423A (en) * 2016-01-19 2016-06-29 清华大学 Single precision floating point FFT/IFFT coprocessor with reconfigurable pipeline
US9711851B1 (en) * 2016-02-04 2017-07-18 Proxy Technologies, Inc. Unmanned vehicle, system and method for transmitting signals
CN106502147B (en) * 2016-09-29 2019-03-05 哈尔滨工程大学 The device of pure-tone pulse detection and parameter Estimation in a kind of underwater acoustic channel based on FPGA
US10890660B2 (en) * 2016-10-12 2021-01-12 Garmin Switzerland Gmbh Frequency steered sonar array orientation
CN106569177A (en) * 2016-11-09 2017-04-19 哈尔滨工程大学 Genetic-algorithm-based quadrature phase coding waveform design method

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