CN109755309B - Power transistor - Google Patents
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- CN109755309B CN109755309B CN201711058065.1A CN201711058065A CN109755309B CN 109755309 B CN109755309 B CN 109755309B CN 201711058065 A CN201711058065 A CN 201711058065A CN 109755309 B CN109755309 B CN 109755309B
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Abstract
The invention provides a power transistor which comprises a source electrode, a drain electrode, a first grid electrode, a second grid electrode, a body diode and a body contact diode, wherein the body diode is connected with the body contact diode in series, the first grid electrode is a control grid electrode and controls the opening and closing of a first current channel controlled by the first grid electrode through grid voltage, and the second grid electrode is connected with the source electrode and controls the opening and closing of a second current channel controlled by the second grid electrode through source voltage. When the power transistor is turned off, the reverse current flowing through the body diode can be greatly reduced, so that minority carrier in the body diode can be greatly reduced, and the power transistor can realize a quick reverse recovery function.
Description
Technical Field
The invention belongs to the technical field of semiconductor power devices, and particularly relates to a power transistor with a rapid reverse recovery function.
Background
Fig. 1 is a schematic cross-sectional structure diagram of a power transistor in the prior art, and as shown in fig. 1, the power transistor in the prior art includes an n-type drain region 31 and an n-type drift region 30 located above the n-type drain region 31, a p-type body region 33 is provided in the n-type drift region 30, and a parasitic body diode structure in the power transistor is formed between the p-type body region 33 and the n-type drift region 30. Within the p-type body region 33 are provided a p-type body region contact region 38 and an n-type source region 34, the doping concentration of the p-type body region contact region 38 being generally greater than the maximum peak of the doping concentration of the p-type body region 33, such that the p-type body region contact region 38 and the source metal contact layer 47 form an ohmic contact structure. Gate dielectric layer 35 and gate electrode 36 are located over the current channel of the device, which is not shown in fig. 1, which is the accumulation and inversion layers formed on the semiconductor surface when a gate voltage is applied in the power transistor structure. The n-source region 34 and the p-type body region contact region 38 are connected to a source voltage through a source metal contact layer 47. The source metal contact layer 47 is separated from the other conductive layers by an interlayer insulating layer 50.
Fig. 2 is an equivalent circuit schematic of the power transistor shown in fig. 1. As shown in fig. 2, the related art power transistor includes a drain 101, a source 102, a gate 103, and a body diode 104, wherein the body diode 104 is an intrinsic parasitic structure in the power transistor. The working mechanism of the prior art power transistor is: 1) when the gate-source voltage Vgs is smaller than the threshold voltage Vth (namely the starting voltage of a current channel) of the power transistor and the drain-source voltage Vds is larger than 0V, the power transistor is in a closed state; 2) when the gate-source voltage Vgs is larger than the threshold voltage Vth of the power transistor and the drain-source voltage Vds is larger than 0V, the power transistor is turned on in the forward direction, and current flows from the drain to the source through the current channel. When the power transistor in the prior art is turned off, when the drain-source voltage Vds is less than 0V, the body diode is in a forward bias state, reverse current flows from the source to the drain through the body diode, and at this time, the current of the body diode has a phenomenon of injecting minority carrier, and the minority carrier carries out reverse recovery when the power transistor is turned on again, so that larger reverse recovery current is caused, and the reverse recovery time is long.
Disclosure of Invention
In view of the above, an object of the present invention is to provide a power transistor with a fast reverse recovery function, so as to solve the technical problem of a power transistor in the prior art that a reverse recovery time is long due to a problem of injection of minority carriers.
An embodiment of the present invention provides a power transistor, including:
the n-type drift region is provided with a p-type body region, a p-type body region contact region, a first n-type source region and a second n-type source region, and the p-type body region contact region is generally arranged between the first n-type source region and the second n-type source region;
the conducting layer is positioned on the p-type body area contact area and forms a body area contact diode structure with the p-type body area contact area, wherein the conducting layer is a cathode of the body area contact diode structure, and the p-type body area contact area is an anode of the body area contact diode structure;
a first current channel located in the p-type body region and between the first n-type source region and the n-type drift region, a gate dielectric layer covering the first current channel, and a first gate, the first gate controlling the first current channel to be turned on and off by a gate voltage;
the second current channel is positioned in the p-type body region and between the second n-type source region and the n-type drift region, the gate dielectric layer and the second gate cover the second current channel, the second gate, the first n-type source region, the second n-type source region and the conducting layer are electrically connected and are all connected with source voltage, and the second gate controls the opening and closing of the second current channel through the source voltage.
Optionally, the turn-on voltage of the first current channel is greater than the turn-on voltage of the second current channel.
Optionally, the conductive layer is a source metal contact layer located above the p-type body region, a doping concentration of the p-type body region contact layer is lower than a maximum peak value of the doping concentration of the p-type body region, the p-type body region contact layer and the source metal contact layer form a schottky barrier diode structure, wherein the source metal contact layer is a cathode, and the p-type body region contact layer is an anode.
Optionally, the second gate is connected to the first n-type source region and the second n-type source region through the source metal contact layer, and the source metal contact layer is externally connected to a source voltage.
Optionally, the conductive layer is an n-type polysilicon layer located above the p-type body region, and the n-type polysilicon layer and the p-type body region contact region form a silicon-based body region contact diode structure, where the n-type polysilicon layer is a cathode and the p-type body region contact region is an anode.
Optionally, the n-type polycrystalline silicon layer is directly connected to the second gate, the first n-type source region, and the second n-type source region, and the n-type polycrystalline silicon layer is connected to a source voltage through a source metal contact layer.
Optionally, the n-type polysilicon layer is directly connected to the first n-type source region and the second n-type source region, the second gate is connected to the n-type polysilicon layer through a source metal contact layer, and the source metal contact layer is connected to a source voltage.
Optionally, the conductive layer is an n-type doped region located in the p-type body region, the n-type doped region is located between the first n-type source region and the second n-type source region, and the n-type doped region and the p-type body region contact region form a silicon-based body region contact diode structure, where the n-type doped region is a cathode and the p-type body region contact region is an anode.
Optionally, the second gate, the first n-type source region, the second n-type source region, and the n-type doped region are connected through a source metal contact layer, and the source metal contact layer is connected to a source voltage.
When the power transistor provided by the embodiment of the invention is turned off, and when the source voltage is greater than the drain voltage, the body contact diode is in a negative bias state, so that the reverse current flowing through the body diode can be greatly reduced, minority carriers in the body diode can be greatly reduced, the reverse recovery charge and the reverse recovery time of the power transistor can be further reduced, and the power transistor can realize a rapid reverse recovery function; meanwhile, when the source-drain voltage reaches the turn-on voltage of the second current channel, the second current channel controlled by the second gate is turned on, and at the moment, the reverse current flows from the source to the drain through the second current channel controlled by the second gate.
Drawings
In order to more clearly illustrate the technical solutions of the exemplary embodiments of the present invention, a brief description is given below of the drawings used in describing the embodiments. It should be clear that the described figures are only views of some of the embodiments of the invention to be described, not all, and that for a person skilled in the art, other figures can be derived from these figures without inventive effort.
FIG. 1 is a schematic cross-sectional view of a prior art power transistor;
FIG. 2 is a schematic diagram of an equivalent circuit of one of the power transistors shown in FIG. 1;
fig. 3 is a schematic cross-sectional structure diagram of a first embodiment of a power transistor provided in the present invention;
FIG. 4 is a schematic diagram of an equivalent circuit of one embodiment of a power transistor provided in the present invention;
fig. 5 is a schematic top view of a power transistor according to a second embodiment of the present invention;
FIG. 6 is a schematic diagram of a cross-sectional view along direction AA of a power transistor shown in FIG. 5;
fig. 7 is a schematic cross-sectional structure diagram of a power transistor according to a third embodiment of the present invention;
fig. 8 is a schematic cross-sectional structure diagram of a power transistor according to a fourth embodiment of the present invention.
Detailed Description
In order to make the objects, technical solutions and advantages of the present invention clearer, the technical solutions of the present invention will be fully described by the detailed description with reference to the accompanying drawings in the embodiments of the present invention. It is obvious that the described embodiments are a part of the embodiments of the present invention, not all embodiments, and all other embodiments obtained by those of ordinary skill in the art based on the embodiments of the present invention without inventive efforts fall within the scope of the present invention.
It is to be understood that the terms "having," "including," and "comprising," as used herein, do not preclude the presence or addition of one or more other elements or groups thereof. Meanwhile, in order to clearly illustrate the embodiments of the present invention, the schematic diagrams listed in the drawings of the specification enlarge the thicknesses of the layers and regions of the present invention, and the sizes of the listed figures do not represent actual sizes; the drawings described herein are for illustration purposes only and are not intended to limit the scope of the present disclosure. The examples listed in the specification should not be limited to the specific shapes of the regions shown in the drawings of the specification, but include the resulting shapes such as deviations due to production and the like.
It will be understood by those skilled in the art that the power transistor includes a cell region for obtaining a low on-resistance and a terminal region for improving a withstand voltage of the outermost cells in the cell region. The terminal region is a general structure in the power transistor, and has different design structures according to requirements of different products, and specific structures of the terminal region of the power transistor are not shown and described in the embodiment of the invention. The power transistor described in the embodiments of the present invention refers to a structure of a cell region in a power transistor.
Fig. 3 is a schematic cross-sectional structure diagram of a first embodiment of a power transistor of the present invention, and as shown in fig. 3, the power transistor of the present invention includes an n-type drain region 31 and an n-type drift region 30 located above the n-type drain region 31, a p-type body region 33 is formed in the n-type drift region 30, the number of the p-type body regions 33 is set according to the requirements of a specific product, and the structure of two p-type body regions 33 is shown in fig. 3 by way of example only. A p-type body region contact region 38, a first n-type source region 34a and a second n-type source region 34b are formed within each p-type body region 33, respectively, the p-type body region contact region 38 being generally disposed between the first n-type source region 34a and the second n-type source region 34 b.
A conductive layer 37 overlying p-type body region contact region 38, conductive layer 37 and p-type body region contact region 38 forming a body contact diode structure, wherein conductive layer 37 is the cathode of the body contact diode structure and p-type body region contact region 38 is the anode of the body contact diode structure. Alternatively, the conductive layer 37 may be an n-type polysilicon layer or a metal layer, so that the body contact diode may be a silicon-based body contact diode or a schottky barrier diode.
A parasitic body diode structure in the power transistor is formed between the p-type body region 33 and the n-type drift region 30, wherein the p-type body region 33 is an anode of the body diode, and the n-type drift region 30 is a cathode of the body diode, so that the anode of the body contact diode is connected with the anode of the body diode.
A first current channel in the p-type body region 33 between the first n-type source region 34a and the n-type drift region 30, a gate dielectric layer 35 covering the first current channel, and a first gate 36a, the first gate 36a being a control gate and controlling the turn-on and turn-off of the first current channel by a gate voltage.
A second current channel within the p-type body region 33 and between the second n-type source region 34b and the n-type drift region 30, a gate dielectric layer 35 overlying the second current channel and a second gate electrode 36 b. The second gate 36b, the first n-type source region 34a, the second n-type source region 34b and the conductive layer 37 are electrically connected and all connected to a source voltage, and the second gate 36b controls the on and off of the second current channel by the source voltage.
Preferably, the turn-on voltage of the second current channel is less than the turn-on voltage of the first current channel.
The current channel is an accumulation layer and an inversion layer formed on a semiconductor surface when a gate voltage is applied in the power transistor, and in the drawings of the embodiments of the present invention, the first current channel and the second current channel in the power transistor are not shown. Meanwhile, in the embodiment of the power transistor shown in fig. 3, the conductive layer 37 is directly connected to the first n-type source region 34a and the second n-type source region 34b, so that the conductive layer 37 only needs to be electrically connected to the second gate electrode 36 b.
Fig. 4 is a schematic diagram of an equivalent circuit of an embodiment of a power transistor provided in the present invention. As shown in fig. 4, the power transistor according to the present invention includes a drain 301, a source 302, a first gate 303a, a second gate 303b, a body diode 304, and a body contact diode 305, wherein the second gate 303b is connected to the source 302, the body contact diode 305 may be a silicon-based diode or a schottky barrier diode, a cathode of the body diode 304 is connected to the drain 301, an anode of the body contact diode 305 is connected to an anode of the body diode 304, and a cathode of the body contact diode 305 is connected to the source 302. The first gate 303a is a control gate, and the first gate 303a controls the on and off of a first current channel controlled by the first gate 303a by a gate voltage, wherein the first current channel is a current channel of a first MOSFET structure formed by the drain 301, the source 302 and the first gate 303 a. The second gate 303b is connected to the source 302, so that the second gate 303b controls the on and off of a second current channel controlled by the second gate through the source voltage, wherein the second current channel is a current channel of a second MOSFET structure formed by the drain 301, the source 302 and the second gate 303 b. The threshold voltage Vth1 (i.e., the turn-on voltage of the first current channel) of the first MOSFET structure is preferably greater than the threshold voltage Vth2 (i.e., the turn-on voltage of the second current channel) of the second MOSFET structure.
The operation mechanism of a power transistor of the present invention shown in fig. 4 is: 1) when the gate-source voltage Vgs is less than the threshold voltage Vth1 of the first MOSFET structure and the drain-source voltage Vds is greater than 0V, the power transistor is in an off state; 2) when the gate-source voltage Vgs is greater than the threshold voltage Vth1 of the first MOSFET structure and the drain-source voltage Vds is greater than 0V, the power transistor is turned on in the forward direction, where the first current channel controlled by the first gate 303a is turned on, current flows from the drain 301 to the source 302 through the first current channel, and the second current channel controlled by the second gate 303b is in an off state without current flowing. A power transistor of the present invention, when turned off: when the source-drain voltage Vsd is greater than 0V, the body contact diode 305 is in a negative bias state, which can greatly reduce the reverse current flowing through the body diode 304, thereby greatly reducing minority carriers in the body diode 304, further greatly reducing the reverse recovery charge and the reverse recovery time of the power transistor, and enabling the power transistor to realize a rapid reverse recovery function; meanwhile, when the source-drain voltage Vsd reaches the threshold voltage Vth2 of the second MOSFET structure, the second current channel controlled by the second gate 303b is in an on state, so that a reverse current flows from the source 302 to the drain 301 through the second current channel.
Fig. 5 is a schematic top view of a power transistor according to a second embodiment of the present invention, where it should be noted that fig. 5 is not a top view, and fig. 5 only shows a positional relationship of a part of the structure of the power transistor according to the present invention from a top view. Fig. 6 is a schematic diagram of a cross-sectional structure along the AA direction of a power transistor shown in fig. 5, and fig. 6 only shows two p-type body regions 33 as an example. Fig. 5 and 6 show a power transistor according to an embodiment of the present invention, in which a body contact diode is formed using a schottky barrier diode structure according to the embodiment of the power transistor shown in fig. 3. As shown in fig. 5 and 6, a source metal contact layer 47 is formed on the p-type body region 33, the source metal contact layer 47 is a conductive layer on the p-type body region contact region 38, at this time, the doping concentration of the p-type body region contact region 38 needs to be lower than the maximum peak value of the doping concentration of the p-type body region 33, so that the p-type body region contact region 38 and the source metal contact layer 47 form a schottky barrier diode structure, wherein the source metal contact layer 47 is the cathode of the body region contact diode, and the p-type body region contact region 38 is the anode of the body region contact diode. The location of the source metal contact layer in the source metal contact hole is shown only by way of example in fig. 5. The source metal contact layer 47 is connected to the second gate 36b, the first n-type source region 34a, and the second n-type source region 34b, and the source metal contact layer 47 is externally connected to a source voltage, so that the second gate 36b controls the on and off of the second current channel controlled by the second gate 36b through the source voltage. The first gate 36a is connected to a gate voltage through the gate metal contact layer 74, so that the first gate 36a controls the turn-on and turn-off of a first current channel controlled by the first gate 36a through the gate voltage. The source metal contact 47 and the gate metal contact are separated by an interlayer insulating layer 50, and the interlayer insulating layer 50 is usually made of silicon glass, borophosphosilicate glass, or phosphosilicate glass.
Fig. 7 is a schematic cross-sectional structure diagram of a third embodiment of a power transistor according to the present invention, and fig. 7 is a schematic cross-sectional structure diagram of a power transistor according to the present invention, in which on the basis of the embodiment of the power transistor according to the present invention shown in fig. 3, an embodiment of a silicon-based diode is used as a body contact diode. As shown in fig. 7, an n-type polysilicon layer 57 is formed over p-type body region 33, where n-type polysilicon layer 57 is a conductive layer over p-type body region contact region 38, and p-type body region contact region 38 and n-type polysilicon layer 57 form a silicon-based body contact diode structure, where n-type polysilicon layer 57 is the cathode of the body contact diode and p-type body region contact region 38 is the anode of the body contact diode. The n-type polysilicon layer 57 may be directly connected to the second gate electrode 36b, the first n-type source region 34a, and the second n-type source region 34b, and then the n-type polysilicon layer 57 is externally connected to a source voltage through the source metal contact layer 47, as shown in fig. 7; alternatively, the n-type polysilicon layer 57 may be directly connected to the first n-type source region 34a and the second n-type source region 34b, the second gate 36b may be connected to the n-type polysilicon layer 57 through the source metal contact layer 47, and then the source metal contact layer 47 is externally connected to the source voltage. In this embodiment, the n-type polysilicon layer 57 is directly connected to the second gate 36b, the first n-type source region 34a and the second n-type source region 34b, and then the n-type polysilicon layer 57 is externally connected to a source voltage through the source metal contact layer 47, so that the second gate 36b controls the turn-on and turn-off of the second current channel controlled by the second gate 36b through the source voltage. The first gate 36a is externally connected to a gate voltage through a gate metal contact layer (based on the position of the cross section, the gate metal contact layer is not shown in fig. 7), so that the first gate 36a controls the opening and closing of a first current channel controlled by the first gate 36a through the gate voltage. The source metal contact 47 and the gate metal contact are separated by an interlayer insulating layer 50, and the interlayer insulating layer 50 is usually made of silicon glass, borophosphosilicate glass, or phosphosilicate glass.
Fig. 8 is a schematic cross-sectional structure diagram of a power transistor according to a fourth embodiment of the present invention. As shown in fig. 8, a power transistor of the present invention includes an n-type drain region 31 and an n-type drift region 30 located above the n-type drain region 31, a p-type body region 33 is formed in the n-type drift region 30, the number of the p-type body regions 33 is set according to the requirements of a specific product, and only two p-type body region 33 structures are exemplarily shown in fig. 8.
A p-type body region contact region 38, an n-type doped region 39, a first n-type source region 34a and a second n-type source region 34b within the p-type body region 33, the p-type body region contact region 38 and the n-type doped region 39 disposed between the first n-type source region 34a and the second n-type source region 34b, the n-type doped region 39 located above the p-type body region contact region 38, the n-type doped region 39 being a conductive layer located above the p-type body region contact region 38. Thus, the n-type doped region 39 and the p-type body region contact region 39 form a silicon-based body contact diode structure, wherein the n-type doped region 39 is a cathode of the body contact diode structure, and the p-type body region contact region 38 is an anode of the body contact diode structure.
A first current channel located in the p-type body region 33 and between the first n-type source region 34a and the n-type drift region 30, a gate dielectric layer 35 and a first gate 36a covering the first current channel, wherein the first gate 36a is a control gate and is externally connected with a gate voltage through a gate metal contact layer (based on the position relationship of the cross section, the gate metal contact layer is not shown in fig. 8), and therefore the second gate 36a controls the opening and closing of the first current channel controlled by the first gate 36b through the gate voltage.
A second current channel within the p-type body region 33 and between the second n-type source region 34b and the n-type drift region 30, a gate dielectric layer 35 overlying the second current channel and a second gate electrode 36 b. The second gate 36b, the first n-type source region 34a, the second n-type source region 34b and the n-type doped region 39 are connected by a source metal contact layer 47, the source metal contact layer 47 is externally connected with a source voltage, and thus the second gate 36b controls the on and off of a second current channel controlled by the second gate 36b through the source voltage.
Preferably, the turn-on voltage of the first current channel is greater than the turn-on voltage of the second current channel.
The source metal contact 47 and the gate metal contact are separated by an interlayer insulating layer 50, and the interlayer insulating layer 50 is usually made of silicon glass, borophosphosilicate glass, or phosphosilicate glass.
The above embodiments and examples are specific supports for the technical idea of the power transistor, and the protection scope of the present invention is not limited thereby, and any equivalent changes or equivalent modifications made on the basis of the technical scheme according to the technical idea of the present invention still belong to the protection scope of the technical scheme of the present invention.
While embodiments of the invention have been described above, it is not limited to the applications set forth in the description and the embodiments, which are fully applicable in various fields of endeavor to which the invention pertains, and further modifications may readily be made by those skilled in the art, it being understood that the invention is not limited to the details shown and described herein without departing from the general concept defined by the appended claims and their equivalents.
Claims (9)
1. A power transistor, comprising:
the transistor comprises an n-type drain region and an n-type drift region positioned above the n-type drain region, wherein a p-type body region is arranged in the n-type drift region, and a p-type body region contact region, a first n-type source region and a second n-type source region are arranged in the p-type body region;
the conducting layer is positioned on the p-type body region contact region, and the conducting layer and the p-type body region contact region form a body region contact diode structure, wherein the conducting layer is a cathode of the body region contact diode, and the p-type body region contact region is an anode of the body region contact diode;
a first current channel located in the p-type body region and between the first n-type source region and the n-type drift region, a gate dielectric layer covering the first current channel, and a first gate, the first gate controlling the first current channel to be turned on and off by a gate voltage;
the second current channel is positioned in the p-type body region and between the second n-type source region and the n-type drift region, the gate dielectric layer and the second gate cover the second current channel, the second gate, the first n-type source region, the second n-type source region and the conducting layer are electrically connected and are all connected with source voltage, and the second gate controls the opening and closing of the second current channel through the source voltage.
2. A power transistor according to claim 1, wherein the turn-on voltage of said first current channel is greater than the turn-on voltage of said second current channel.
3. The power transistor of claim 1, wherein said conductive layer is a source metal contact layer over said p-type body region, said p-type body region contact region having a doping concentration less than a maximum peak value of a doping concentration of said p-type body region, said p-type body region contact region and said source metal contact layer forming a schottky barrier diode structure.
4. A power transistor according to claim 3, wherein said second gate is connected to said first n-type source region and said second n-type source region through said source metal contact layer, said source metal contact layer being external to a source voltage.
5. The power transistor of claim 1, wherein said conductive layer is an n-type polysilicon layer over said p-type body region, said n-type polysilicon layer and said p-type body region contact region forming a silicon-based body contact diode structure.
6. The power transistor of claim 5, wherein said n-type polysilicon layer is directly connected to said second gate, said first n-type source region, and said second n-type source region, said n-type polysilicon layer being external to said source voltage through said source metal contact layer.
7. The power transistor of claim 5, wherein said n-type polysilicon layer is directly connected to said first n-type source region and said second n-type source region, said second gate is connected to said n-type polysilicon layer through a source metal contact layer, said source metal contact layer is external to a source voltage.
8. The power transistor of claim 1, wherein said conductive layer is an n-type doped region within said p-type body region, said n-type doped region and said p-type body region contact region forming a silicon-based body contact diode structure.
9. The power transistor of claim 8, wherein said second gate, said first n-type source region, said second n-type source region, and said n-type doped region are connected by a source metal contact layer, said source metal contact layer being external to a source voltage.
Priority Applications (5)
| Application Number | Priority Date | Filing Date | Title |
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| CN201711058065.1A CN109755309B (en) | 2017-11-01 | 2017-11-01 | Power transistor |
| PCT/CN2018/110570 WO2019085752A1 (en) | 2017-11-01 | 2018-10-17 | Power mosfet device |
| JP2020510097A JP6995187B2 (en) | 2017-11-01 | 2018-10-17 | Power MOSFET device |
| KR1020197037283A KR102288862B1 (en) | 2017-11-01 | 2018-10-17 | Power MOSFET Devices |
| US16/644,998 US11296216B2 (en) | 2017-11-01 | 2018-10-17 | Power MOSFET device |
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| CN201711058065.1A CN109755309B (en) | 2017-11-01 | 2017-11-01 | Power transistor |
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| CN109755309B true CN109755309B (en) | 2020-12-18 |
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| US7608513B2 (en) * | 2007-01-25 | 2009-10-27 | Freescale Semiconductor, Inc. | Dual gate LDMOS device fabrication methods |
| US7943994B2 (en) * | 2009-05-22 | 2011-05-17 | Richtek Technology Corporation, R.O.C. | Integrated PMOS transistor and Schottky diode |
| CN104157685B (en) * | 2010-07-27 | 2018-01-16 | 株式会社电装 | Semiconductor device and its control method with switch element and fly-wheel diode |
| JP2016174030A (en) * | 2015-03-16 | 2016-09-29 | 株式会社東芝 | Semiconductor device |
| US9799763B2 (en) * | 2015-08-31 | 2017-10-24 | Intersil Americas LLC | Method and structure for reducing switching power losses |
| US10530360B2 (en) * | 2016-02-29 | 2020-01-07 | Infineon Technologies Austria Ag | Double gate transistor device and method of operating |
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