CN109753705A - IC initial value evaluation method in a kind of IC design - Google Patents

IC initial value evaluation method in a kind of IC design Download PDF

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Publication number
CN109753705A
CN109753705A CN201811579804.6A CN201811579804A CN109753705A CN 109753705 A CN109753705 A CN 109753705A CN 201811579804 A CN201811579804 A CN 201811579804A CN 109753705 A CN109753705 A CN 109753705A
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China
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initial value
voltage source
estimating
evaluation method
voltage
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CN201811579804.6A
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CN109753705B (en
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刘琳
程明厚
周振亚
吴大可
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Beijing Empyrean Technology Co Ltd
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Beijing CEC Huada Electronic Design Co Ltd
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Abstract

IC initial value evaluation method in a kind of IC design, comprising the following steps: begun stepping through from the voltage source device of ground connection, set current voltage source voltage value for the IC initial value of estimating of the voltage source device other end;Continue to traverse device, the IC initial value of estimating of the setting device other end estimates IC initial value or summing device voltage value for present node;After traversal, obtained node estimates the IC initial value that IC initial value is equation group to be solved in circuit simulation.The present invention is the estimation in integrated circuit automated production to solving at the beginning of circuit equation group, in particular for the available good IC initial value of the more circuit of digital module, guarantee emulation it is efficient with it is accurate, realize user friendly.

Description

IC initial value evaluation method in a kind of IC design
Technical field
The present invention relates to integrated circuit automated production design fields, more particularly at the beginning of IC in a kind of IC design It is worth evaluation method.
Background technique
Solution of equations is to restrict a key of integrated circuit automated production design success or not in electronic circuit Factor.Currently, most of electronic product on the market all can in advance simulate product, to reduce the error of circuit design, The correctness for guaranteeing product design, to reach good market and economic effect.Most circuit simulation is subjected to respectively The restriction of kind factor, wherein just including the initial-value problem of equation group.As technique is constantly in progress towards nanoscale, circuit scale It sharply expands, the scale of Solve problems is initially estimated if accurate reliable IC cannot be made also in rapid growth, will lead to circuit The consuming substantial increase of emulation over time and space, restricts design scale and the design cycle of electronic circuit.The present invention The problem of the problem of solved is that good IC initial value how is obtained when to breadboardin.
Accurate reliable IC is carried out to electronic circuit initially to estimate, it can reduction while obtaining relatively reliable just solution Circuit solves the number of iterations, guarantees that breadboardin can find the problem in time and solves the problems, such as, reduces the risk of failure, greatly accelerate Period of electronic circuit product design.In current integrated circuit automatic field, most products have various each The IC initial value evaluation method of sample.How breadboardin solution link obtain reliable and stable IC initial value be influence artificial product A key factor.
Summary of the invention
In order to solve the shortcomings of the prior art, the purpose of the present invention is to provide at the beginning of IC in a kind of IC design It is worth evaluation method, aiming at the problem that estimating in current integrated circuit automated production for initial value, passes through the conducting property of device To estimate node voltage initial value.
To achieve the above object, IC initial value evaluation method in IC design provided by the invention, comprising the following steps:
1) it is begun stepping through from the voltage source device of ground connection, sets current voltage for the IC initial value of estimating of the voltage source device other end Source voltage value;
2) continue to traverse device, the IC initial value of estimating of the setting device other end estimates IC initial value or summing device for present node Voltage value;
3) after traversing, obtained node estimates the IC initial value that IC initial value is equation group to be solved in circuit simulation.
Further, it is begun stepping through described in step 1) from the voltage source device of ground connection, is since grounding point according to section Device in the connection relationship traversal circuit of point.
Further, the step 2 further comprises: if break-over of device, the device other end is arranged estimates IC initial value IC initial value is estimated for present node.
Further, the step 2 further comprises: if conduction device is voltage source device, the other end is estimated IC initial value is that the IC initial value of estimating of present node adds voltage source voltage value.
To achieve the above object, the present invention also provides a kind of computer readable storage mediums, are stored thereon with computer journey The step of sequence, which realizes IC initial value evaluation method in above-mentioned IC design when being executed by processor.
The present invention proposes IC initial value evaluation method in a kind of IC design, it can very be arrived in breadboardin IC initial value, ensure that emulation it is accurate with it is efficient.Further the present invention can be subtracted by special IC initial value evaluation method The number of iterations of few equation group, and ideal solution of equations is obtained, the reliability of circuit simulation is substantially increased, to contract The design cycle of short electronic circuit has adapted to the sharp increase of circuit scale.
The present invention is the estimation in integrated circuit automated production to solving at the beginning of circuit equation group, in particular for digital mould The available good IC initial value of the more circuit of block, guarantee emulation it is efficient with it is accurate, realize user friendly.
Other features and advantages of the present invention will be illustrated in the following description, also, partly becomes from specification It obtains it is clear that understand through the implementation of the invention.
Detailed description of the invention
Attached drawing is used to provide further understanding of the present invention, and constitutes part of specification, and with it is of the invention Embodiment together, is used to explain the present invention, and is not construed as limiting the invention.In the accompanying drawings:
Fig. 1 is the flow chart of IC initial value evaluation method in IC design according to the present invention;
Fig. 2 is to estimate schematic diagram according to the IC initial value of the resistance device of embodiments of the present invention;
Fig. 3 is to estimate schematic diagram according to the IC initial value of the voltage source device of embodiments of the present invention.
Specific embodiment
Hereinafter, preferred embodiments of the present invention will be described with reference to the accompanying drawings, it should be understood that preferred reality described herein Apply example only for the purpose of illustrating and explaining the present invention and is not intended to limit the present invention.
Fig. 1 is the flow chart of IC initial value evaluation method in IC design according to the present invention, below with reference to Fig. 1, IC initial value evaluation method in IC design of the invention is described in detail.
Firstly, starting to carry out circuit simulation in step 101.
It in step 102, is begun stepping through from the voltage source device of ground connection, label can estimate the nodal information of IC initial value.
In this step, circuit is traversed according to the connection relationship of device nodes, is begun stepping through from ground voltage.By power device The IC initial value of estimating of the part other end is set as current voltage source voltage value.
In step 103, continues to traverse device, judge whether device is connected.All device informations in discriminator circuit, if device Part turns off, then return step 102;If break-over of device, and IC initial value is estimated in one end, and the IC initial value of estimating of one end is passed to separately One end;If conduction device is a voltage source device: its other end estimates IC initial value and to add up.
The state of some devices is set as conducting, such as the lesser linear resistance of resistance value, the other end according to circuit characteristic IC initial value of estimating be that present node estimates IC initial value.
If current device is on state, the IC initial value of estimating that the other end is arranged estimates IC initial value for present node;If Current device is voltage source device, then the IC initial value of estimating that IC initial value is present node of estimating of the other end adds voltage source voltage Value.
In step 104, judge whether device traversal terminates.If not traversing terminates, return step 102;If traversal terminates, Then IC initial value estimates end.
After estimating, the IC initial value of estimating of obtained all nodes is equation group to be solved in circuit simulation IC initial value.
Fig. 2 is to estimate schematic diagram according to the IC initial value of the resistance device of embodiments of the present invention.
According to step 101,102, starts to carry out circuit simulation and be begun stepping through from the voltage source device of ground connection.Work as voltage source When V=10, the IC voltage of node 21 is estimated as 10V.
According to step 103, continues to traverse device and judge that resistance device is conducting.By the IC voltage of resistance device node 22 Estimate the IC voltage for node 21, as 10V.
According to step 104, device traversal terminates, then IC initial value estimates end.
Fig. 3 is to estimate schematic diagram according to the IC initial value of the voltage source device of embodiments of the present invention.
According to step 101,102, starts to carry out circuit simulation and be begun stepping through from the voltage source device of ground connection.Work as voltage source When V=10, the IC voltage of node 31 is estimated as 10V.
According to step 103, continues to traverse device and judge that resistance device is conducting.By the IC voltage of resistance device node 32 Estimate the IC voltage for node 31, as 10V.
It repeats to continue to traverse device and judge current device for voltage source device according to step 103.By resistance device node 32 IC voltage estimates the IC voltage for node 31 plus voltage source voltage value.As voltage source V=10, the IC voltage of node 32 It estimates as 20V.
According to step 104, device traversal terminates, then IC initial value estimates end.
A kind of computer readable storage medium, is stored thereon with computer program, realization when which is executed by processor In above-mentioned IC design the step of IC initial value evaluation method.
As can be seen from the above description the invention has the following advantages that
1) accelerate circuit simulation speed: traditional circuit simulation is typically all that setting IC initial value is 0 to carry out solving equations, should The number of iterations that method needs is more, this factor restricts the simulation velocity of circuit.The present invention is for artificial product equation group IC initial value is estimated, the number of iterations solved is reduced while improving computational convergence, judgment criteria is simple, is easy to control System, is greatly improved optimization measure.
2) it improves the reliability of simulation result: if estimating without IC initial value, will lead to the fluctuation of waveform state, if circuit There are more solution problems to result even in the solution that equation group converges to mistake.Device state information in present invention reference circuit, according to The on state of voltage source and device reasonably estimates one group of IC initial value, improves the reliability of breadboardin.The algorithm Efficiently easy-to-use, compatibility is strong.
Those of ordinary skill in the art will appreciate that: the foregoing is only a preferred embodiment of the present invention, and does not have to In the limitation present invention, although the present invention is described in detail referring to the foregoing embodiments, for those skilled in the art For, still can to foregoing embodiments record technical solution modify, or to part of technical characteristic into Row equivalent replacement.All within the spirits and principles of the present invention, any modification, equivalent replacement, improvement and so on should all include Within protection scope of the present invention.

Claims (5)

1. IC initial value evaluation method in a kind of IC design, comprising the following steps:
1) it is begun stepping through from the voltage source device of ground connection, sets current voltage for the IC initial value of estimating of the voltage source device other end Source voltage value;
2) continue to traverse device, the IC initial value of estimating of the setting device other end estimates IC initial value or summing device for present node Voltage value;
3) after traversing, obtained node estimates the IC initial value that IC initial value is equation group to be solved in circuit simulation.
2. IC initial value evaluation method in IC design according to claim 1, which is characterized in that described in step 1) Begun stepping through from the voltage source device of ground connection, be since grounding point according to the connection relationship of node traverse circuit in device.
3. IC initial value evaluation method in IC design according to claim 1, which is characterized in that the step 2 into If a step includes: break-over of device, the IC initial value of estimating that the device other end is arranged estimates IC initial value for present node.
4. IC initial value evaluation method in IC design according to claim 1, which is characterized in that the step 2 into If a step includes: that conduction device is voltage source device, the IC initial value of estimating that IC initial value is present node of estimating of the other end adds Upper voltage source voltage value.
5. a kind of computer readable storage medium, is stored thereon with computer program, which is characterized in that the program is held by processor The step of IC initial value evaluation method in IC design of any of claims 1-4 is realized when row.
CN201811579804.6A 2018-12-24 2018-12-24 IC initial value estimation method in integrated circuit design Active CN109753705B (en)

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN112560368A (en) * 2020-12-29 2021-03-26 海光信息技术股份有限公司 Circuit simulation method, circuit simulation device, electronic equipment and computer-readable storage medium

Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101923596A (en) * 2010-09-08 2010-12-22 北京大学 Method for estimating radiation effect of integrated circuit
CN102314522A (en) * 2010-06-30 2012-01-11 中国科学院微电子研究所 Optimizing method of analogue integrated circuit design
CN102508977A (en) * 2011-11-15 2012-06-20 中国科学院微电子研究所 Circuit optimization method for artificial circuit transplant and circuit optimization device for artificial circuit transplant
US20130275926A1 (en) * 2012-04-17 2013-10-17 Taiwan Semiconductor Manufacturing Company, Ltd. Novel methodology of optical proximity correction optimization
CN104462824A (en) * 2014-12-12 2015-03-25 广西科技大学 Single-cell EKF (extended Kalman filter) and UKF (unscented Kalman filter) estimation comparing method
CN107977533A (en) * 2017-12-21 2018-05-01 北京华大九天软件有限公司 A kind of method that equation group computation complexity is reduced in IC design
CN108535572A (en) * 2018-05-10 2018-09-14 长沙理工大学 Metering system secondary circuit monitoring method and device based on fundamental wave zero sequence feature

Patent Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN102314522A (en) * 2010-06-30 2012-01-11 中国科学院微电子研究所 Optimizing method of analogue integrated circuit design
CN101923596A (en) * 2010-09-08 2010-12-22 北京大学 Method for estimating radiation effect of integrated circuit
CN102508977A (en) * 2011-11-15 2012-06-20 中国科学院微电子研究所 Circuit optimization method for artificial circuit transplant and circuit optimization device for artificial circuit transplant
US20130275926A1 (en) * 2012-04-17 2013-10-17 Taiwan Semiconductor Manufacturing Company, Ltd. Novel methodology of optical proximity correction optimization
CN104462824A (en) * 2014-12-12 2015-03-25 广西科技大学 Single-cell EKF (extended Kalman filter) and UKF (unscented Kalman filter) estimation comparing method
CN107977533A (en) * 2017-12-21 2018-05-01 北京华大九天软件有限公司 A kind of method that equation group computation complexity is reduced in IC design
CN108535572A (en) * 2018-05-10 2018-09-14 长沙理工大学 Metering system secondary circuit monitoring method and device based on fundamental wave zero sequence feature

Non-Patent Citations (2)

* Cited by examiner, † Cited by third party
Title
刘琳: "一种模拟电路故障诊断方法研究", 《现代电子技术》 *
刘琳: "集成电路宏模型的研究与构建", 《中国优秀硕士学位论文全文数据库 信息科技辑》 *

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN112560368A (en) * 2020-12-29 2021-03-26 海光信息技术股份有限公司 Circuit simulation method, circuit simulation device, electronic equipment and computer-readable storage medium
CN112560368B (en) * 2020-12-29 2023-07-21 海光信息技术股份有限公司 Circuit simulation method, circuit simulation device, electronic equipment and computer readable storage medium

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Address after: 100102 floor 2, block a, No.2, lizezhong 2nd Road, Chaoyang District, Beijing

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