CN109728783B - Doherty power amplification circuit, power amplifier, terminal and base station - Google Patents
Doherty power amplification circuit, power amplifier, terminal and base station Download PDFInfo
- Publication number
- CN109728783B CN109728783B CN201711040971.9A CN201711040971A CN109728783B CN 109728783 B CN109728783 B CN 109728783B CN 201711040971 A CN201711040971 A CN 201711040971A CN 109728783 B CN109728783 B CN 109728783B
- Authority
- CN
- China
- Prior art keywords
- capacitor
- signal
- inductor
- doherty power
- load modulation
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
Images
Landscapes
- Amplifiers (AREA)
Abstract
The embodiment of the application discloses doherty power amplifying circuit, power amplifier, terminal and base station, doherty power amplifying circuit includes: the input network is used for decomposing the input signal into a first signal and a second signal and then outputting the first signal and the second signal; the main circuit transistor is used for receiving the first signal and amplifying the first signal to generate a first amplified signal; a peak transistor for receiving the second signal and amplifying to generate a second amplified signal; the broadband load modulation network is connected with the output end of the main circuit transistor and the output end of the peak transistor and is used for synthesizing the first amplified signal and the second amplified signal and outputting the synthesized signal; the relative bandwidth of the broadband load modulation network is greater than a preset threshold value; and the output matching network is used for receiving and outputting the synthesized signal and converting the output impedance of the broadband load modulation network into preset impedance matched with a post-stage circuit. By adopting the embodiment of the application, the Doherty power amplifying circuit can support a broadband application scene.
Description
Technical Field
The present application relates to the field of circuit technologies, and in particular, to a doherty power amplifier circuit, a power amplifier, a terminal, and a base station.
Background
The radio frequency power amplifier, i.e. the power amplifier, is one of the key components in the modern wireless communication system, and is located at the last stage of the link of the whole system and is usually the largest energy-consuming component in the system, so that the performance of the radio frequency power amplifier, i.e. the power amplifier, greatly affects various indexes of the whole system, such as the operating bandwidth, linearity and efficiency. With the rapid development of modern wireless communication technology, more and more communication standards and working frequency bands are adopted, and this current situation has prompted a strong demand for broadband wireless communication systems. Power amplifiers are also facing this need as a key component in wireless communication systems. In recent years, research on broadband power amplifiers has received much attention both in the industry and academia.
In order to improve the spectrum utilization rate and improve the signal transmission efficiency, the modern wireless communication system usually needs to adopt amplitude modulation, which results in the transmission signal having a high peak-to-average ratio characteristic, i.e. the envelope of the signal varies with time, resulting in a large difference between the instantaneous maximum power and the average power of the signal. In order to realize signal transmission, the power amplifier needs to operate at an average power level and guarantee that the instantaneous maximum power can be output, which means that the power amplifier operates in a back-off region of the maximum output power. The efficiency of a power amplifier designed by a single power tube in a conventional communication system is low in a back-off region, and fig. 1 shows a curve of the efficiency of a power amplifying device designed by a single power tube varying with output power, wherein the efficiency is 68% at the maximum output power, and the efficiency is reduced to 25% assuming that the average output power is 8dB back-off of the maximum output power, i.e. 32dBm in fig. 1. In order to improve system efficiency, a power amplifier in a modern wireless communication system generally adopts a back-off efficiency improvement technique. The backspacing efficiency improving technology of the power amplifier can be divided into a power supply modulation class and a load modulation class according to the working mode, wherein the power supply modulation class needs to be added with an additional power supply modulator, and the power amplifier is adjusted in real time to supply power according to the characteristics of transmission signal characteristics; accordingly, the load modulation class needs to adjust the load of the power amplifier.
The Doherty power amplifier technology is a load modulation type backoff efficiency improving technology, and is widely applied to base stations and terminal equipment due to the advantages of simple structure, high reliability, no need of changing a system architecture and the like. However, the conventional doherty power amplifier structure has some bandwidth limiting factors, so that it cannot be directly applied to a broadband application scenario.
Disclosure of Invention
The technical problem to be solved by the embodiments of the present application is to provide a doherty power amplifying circuit, a power amplifier, a terminal and a base station, so as to realize that the doherty power amplifying circuit supports a broadband application scenario.
In a first aspect, an embodiment of the present application provides a doherty power amplifying circuit, which may include:
the input network is used for decomposing the input signal into a first signal and a second signal and then outputting the first signal and the second signal;
the main circuit transistor is used for receiving the first signal and amplifying the first signal to generate a first amplified signal;
a peak transistor for receiving the second signal and amplifying to generate a second amplified signal;
the broadband load modulation network is connected with the output end of the main circuit transistor and the output end of the peak transistor and is used for synthesizing the first amplified signal and the second amplified signal and outputting the synthesized signal; the relative bandwidth of the broadband load modulation network is greater than a preset threshold value;
and the output matching network is used for receiving and outputting the synthesized signal and converting the output impedance of the broadband load modulation network into preset impedance matched with a post-stage circuit.
The wide-band load modulation network with higher relative wide band is configured in the Doherty power amplifying circuit, so that the Doherty power amplifier can support wider working bandwidth, further the Doherty power amplifier can keep the Doherty working characteristic in the wider working bandwidth, and an output network architecture with an output matching network positioned behind the wide-band load modulation network is adopted, so that the bandwidth limitation of the output matching network in the existing Doherty power amplifying circuit when the load modulation effect occurs can be avoided, and the whole Doherty power amplifying circuit can realize the Doherty characteristic in the wider working bandwidth. Compared with the existing Doherty power amplifying circuit, the Doherty power amplifying circuit has wider working bandwidth and can be widely applied to broadband and multi-band wireless communication systems.
In one possible implementation, the wideband load modulation network includes a first transmission line, a second transmission line, and a third transmission line;
the input end of the first transmission line is connected with the output end of the main circuit transistor, and the impedance of the first transmission line is 2 delta RLThe electrical length of the first transmission line is 90 degrees at the center frequency of the operating bandwidth of the doherty power amplifying circuit;
the input end of the second transmission line is connected with the output end of the peak transistor, and the impedance of the second transmission line is 2 delta RLAn electrical length of the second transmission line is 180 degrees at a center frequency of an operating bandwidth of the Doherty power amplifying circuit;
of the output of the first transmission line and of the second transmission lineThe common node is connected to the input of the third transmission line having an impedance of
The electrical length of the third transmission line is 90 degrees at the center frequency of the operating bandwidth of the doherty power amplifying circuit;
wherein δ is an impedance ratio parameter for adjusting the operating bandwidth, R, of the wideband load modulation networkLMatching impedance, R, required for said wideband load modulation networkLMatching the power levels of the main and peak transistors.
By configuring the three transmission lines, the broadband load modulation network can have broadband characteristics and can support wider working bandwidth.
In one possible implementation, δ is greater than or equal to 0.25 and less than or equal to 1.
By adjusting the impedance proportion parameter, the working bandwidth of the Doherty power amplifying circuit can be flexibly adjusted, so that different requirements of various communication systems are met.
In one possible implementation, the wideband load modulation network includes a first lumped circuit, a second lumped circuit, and a third lumped circuit;
the first lumped circuit comprises a first inductor, a first capacitor and a second capacitor, wherein a first end of the first inductor is connected with an output end of the main circuit transistor, one end of the first capacitor is connected with a first end of the first inductor, the other end of the first capacitor is grounded, one end of the second capacitor is connected with a second end of the first inductor, and the other end of the second capacitor is grounded;
the second lumped circuit comprises a second inductor, a third capacitor, a fourth capacitor and a fifth capacitor, wherein the first end of the second inductor is connected with the output end of the peak transistor, the second end of the second inductor is connected with the first end of the third inductor, one end of the third capacitor is connected with the first end of the second inductor, the other end of the third capacitor is grounded, one end of the fourth capacitor is connected with the second end of the second inductor, the other end of the fourth capacitor is grounded, one end of the fifth capacitor is connected with the second end of the third inductor, and the other end of the fifth capacitor is grounded;
the third lumped circuit comprises a fourth inductor, a sixth capacitor and a seventh capacitor, a common node of an output end of the first inductor and an output end of the third inductor is connected with a first end of the fourth inductor, a second end of the fourth inductor is connected with the output matching network, one end of the sixth capacitor is connected with a first end of the fourth inductor, the other end of the sixth capacitor is grounded, one end of the seventh capacitor is connected with a second end of the fourth inductor, and the other end of the seventh capacitor is grounded.
Through the design mode of the lumped circuit, the Doherty power amplifying circuit can be easily realized when the working frequency is lower, and can also be easily realized in an integrated circuit. And because of using lumped parameter element, so the Doherty power amplifying circuit can have smaller size, facilitate integrating in the portable terminal installation.
In one possible implementation, the output matching network comprises a power supply network for supplying power to the broadband load modulation network and the output matching network.
By integrating the power supply network in the output matching network, the broadband load modulation network can be supplied with power. Therefore, a power supply network does not need to be designed in the broadband load modulation network independently, the influence of the power supply network on the bandwidth characteristic of the broadband load modulation network can be avoided, and the characteristics of the broadband load modulation network are guaranteed.
In one possible implementation, the relative bandwidth is equal to a ratio of an operating bandwidth of the doherty power amplifying circuit to a center frequency of the doherty power amplifying circuit.
In one possible implementation, the preset threshold is greater than or equal to 10%.
In a second aspect, embodiments of the present application provide a doherty power amplifier that may include:
a doherty power amplifying circuit as described in the first aspect or any implementation form of the first aspect.
In a third aspect, an embodiment of the present application provides a terminal, which may include:
a radio frequency front end module comprising a doherty power amplifier according to any implementation of the second aspect or the second aspect.
In a fourth aspect, an embodiment of the present application provides a base station, which may include:
a radio frequency front end module comprising a doherty power amplifier according to any implementation of the second aspect or the second aspect.
Drawings
In order to more clearly illustrate the technical solutions in the embodiments or the background art of the present application, the drawings required to be used in the embodiments or the background art of the present application will be described below.
Fig. 1 is a graph illustrating the efficiency and output power variation of a conventional power amplifier with a single power transistor design;
fig. 2 is a schematic diagram of a conventional doherty power amplifier circuit;
fig. 3 is a schematic diagram illustrating a doherty power amplifier circuit according to an embodiment of the present disclosure;
fig. 4 is a schematic diagram illustrating another doherty power amplifying circuit according to an embodiment of the present invention;
FIG. 5 is a schematic diagram comparing impedance characteristics of the load modulation network of FIG. 2 with the broadband load modulation network of FIG. 4;
fig. 6 is a graph illustrating the efficiency characteristics of the doherty power amplifying circuit shown in fig. 4;
FIG. 7 is a schematic diagram of impedance characteristics comparison between the load modulation network shown in FIG. 2 and the broadband load modulation network shown in FIG. 4 under different impedance ratio parameters;
fig. 8 is a schematic diagram illustrating a doherty power amplifier circuit according to an embodiment of the present disclosure.
Detailed Description
Embodiments of the present application are described below with reference to the drawings in the embodiments of the present application.
The terms "including" and "having," and any variations thereof, in the description and claims of this application and the drawings described above, are intended to cover non-exclusive inclusions. For example, a process, method, system, article, or apparatus that comprises a list of steps or elements is not limited to only those steps or elements listed, but may alternatively include other steps or elements not listed, or inherent to such process, method, article, or apparatus.
Referring to fig. 1, fig. 1 is a graph illustrating the efficiency and output power variation of a power amplifier with a single power transistor design in the prior art; wherein the abscissa is output power and the ordinate is efficiency. The curve of the triangle series is the curve of the efficiency and the output power change. As shown in fig. 1, the efficiency of the power amplifier with the single power tube design is 68% at the maximum output power, and assuming that the average output power is at the 8dB back-off of the maximum output power (i.e. at 32dBm in fig. 1), the efficiency is reduced to 25%. It is seen that the rollback zone is less efficient.
Referring to fig. 2, fig. 2 is a schematic diagram illustrating a conventional doherty power amplifier circuit; it includes an input network 201, a main circuit transistor 202, a peak transistor 203, a main circuit output matching network 204, a peak output network 205, and a load modulation network 206.
The input signal is distributed to a main pass transistor 202 and a peak transistor 203 via an input network 201. The main transistor 202 is normally biased in the class AB state and the peak transistor 203 is biased in the class C state. When the power of the input signal is small, the peak transistor 203 is not turned on, and only the main transistor 202 works; as the power of the input signal increases, the peak transistor 203 gradually turns on and eventually reaches the same saturated output power level as the main pass transistor 202. In terms of output matching networks, the main path output matching network 204 and the peak output matching network 205 match the main path transistor 202 and the peak transistor 203, respectively, to commonly used standard loads such as 50 ohm loads. By properly designing the load modulation network, the load presented by the main path port is twice as high as the saturation state (the main path transistor 202 and the peak transistor 203 output equal current) in the low power state (at this time, the peak transistor 203 is not turned on), which means that the main path transistor 202 can reach the equivalent saturation state at the 3dB back-off of its own saturated output power, and has high efficiency characteristics. In addition, the traditional doherty power amplifier is of a symmetrical structure, and extra equivalent output power is provided by considering the peak power amplifier, so that the traditional doherty power amplifier has a high-efficiency working interval of 6dB, namely the traditional doherty power amplifier has two peak efficiency points at two power points of integral saturation and 6dB back-off output. This process described above is known as the load modulation effect of the doherty power amplifier.
The doherty power amplifier circuit shown in fig. 2, although capable of providing an operating region with high back-off efficiency, has some inherent bandwidth limiting factors that limit the application of the doherty power amplifier circuit in wideband and multimode multi-band systems. The bandwidth limiting factor of the doherty power amplifying circuit shown in fig. 2 is mainly embodied in two aspects, one is the narrowband characteristic of the load modulation network, and the other is the narrowband characteristic of the output matching networks of the main path and the peak path when the load modulation effect occurs. Both of these features will limit the operating bandwidth of the doherty power amplifying circuit shown in fig. 2. The load modulation network of the conventional doherty power amplifier circuit shown in fig. 2 is usually implemented at a quarter wavelength, and since the quarter wavelength line itself is a frequency dependent device, its own characteristics (the value of the port impedance presented) will change with the frequency change, so it will limit the bandwidth of the conventional doherty power amplifier. Usually only the resistance and reactance values at a normalized frequency of 1 are required for a practical doherty power amplifying circuit. At operating frequencies other than 1, the resistance and reactance characteristics change with it, which also means that the load modulation effect of the doherty power amplifying circuit cannot be fully realized, limiting the operating bandwidth of the doherty power amplifying circuit shown in fig. 2. On the other hand, the idea of designing the output matching network and then the load modulation network is adopted in the main path and the peak path in the doherty power amplifying circuit shown in fig. 2, and the default output matching network does not affect the load modulation effect, which is not true. When the load modulation effect occurs, the impedance value at the input port of the load modulation network changes, and the impedance of the impedance change trend transformed by the output matching network changes along with the frequency change, which also limits the working bandwidth of the traditional Doherty power amplifier.
The embodiment of the application realizes the support of the Doherty power amplifying circuit to a broadband application scene by improving the load modulation network and the output matching network. This is explained in detail below with reference to fig. 3-8.
Referring to fig. 3, fig. 3 is a schematic diagram illustrating a doherty power amplifier circuit according to an embodiment of the present disclosure; may include, but is not limited to:
an input network 301, configured to decompose an input signal into a first signal and a second signal and output the first signal and the second signal;
alternatively, the input network 301 shown may be used to: the input signal is decomposed into two paths which are respectively sent to a main circuit transistor 302 and a peak value transistor 303; matching of the main circuit transistor 302 and the peak circuit transistor 303 with an input load is completed, so that power energy can be smoothly transmitted; and compensates for the phase difference produced by the output network of main transistor 302 and peak transistor 303.
A main circuit transistor 302 for receiving the first signal and amplifying to generate a first amplified signal;
a peak transistor 303 for receiving the second signal and amplifying to generate a second amplified signal;
it should be noted that the main circuit transistor 302 and the peak transistor 303 may have various implementations, and the implementations may be applied to amplify signals, and any element or circuit structure that is suitable for a doherty amplifier circuit and can implement a function of amplifying signals may be used as the main circuit transistor 302 and the peak transistor 303 in the embodiments of the present application, and the embodiments of the present application are not limited in any way.
A wideband load modulation network 304, connected to the output end of the main circuit transistor 302 and the output end of the peak transistor 303, for synthesizing the first amplified signal and the second amplified signal and outputting the synthesized signal; the relative bandwidth of the broadband load modulation network is greater than a preset threshold value;
wherein the relative bandwidth is equal to a ratio of an operating bandwidth of the Doherty power amplifying circuit to a center frequency of the Doherty power amplifying circuit. The operating bandwidth of the doherty power amplifying circuit can also be regarded as the operating bandwidth of the wideband load modulation network.
Optionally, the preset threshold is greater than or equal to 10%. Generally, the existing doherty power amplifying circuit shown in fig. 2 cannot support a broadband application scenario, the relative bandwidth of the load modulation network is usually about 10%, and the broadband load modulation network in the embodiment of the present application has a broadband characteristic, which can make the relative bandwidth greater than 10%, and reach 50% or even higher.
And an output matching network 305, configured to receive and output the synthesized signal, and transform an impedance of the wideband load modulation network into a preset impedance matched with a subsequent circuit.
Optionally, the preset impedance of the later stage circuit is usually 50 ohms, so the output matching network 305 may transform the impedance of the wideband load modulation network into 50 ohms, and when the preset impedance is another parameter, the output matching network 305 may also adaptively transform the impedance of the wideband load modulation network into the corresponding preset impedance. Ensuring smooth transmission of power energy.
Optionally, the output matching network further comprises a power supply network operable to supply power to the broadband load modulation network and the output matching network. Such as providing VDThe operating voltage of (c). Therefore, a power supply network does not need to be designed in the broadband load modulation network independently, the influence of the power supply network on the bandwidth characteristic of the broadband load modulation network can be avoided, and the characteristics of the broadband load modulation network are guaranteed.
The wide-band load modulation network with higher relative wide band is configured in the Doherty power amplifying circuit, so that the Doherty power amplifier can support wider working bandwidth, further the Doherty power amplifier can keep the Doherty working characteristic in the wider working bandwidth, and an output network architecture with an output matching network positioned behind the wide-band load modulation network is adopted, so that the bandwidth limitation of the output matching network in the existing Doherty power amplifying circuit when the load modulation effect occurs can be avoided, and the whole Doherty power amplifying circuit can realize the Doherty characteristic in the wider working bandwidth. Compared with the existing Doherty power amplifying circuit, the Doherty power amplifying circuit has wider working bandwidth and can be widely applied to broadband and multi-band wireless communication systems.
Referring to fig. 4, fig. 4 is a schematic diagram illustrating another doherty power amplifying circuit according to an embodiment of the present disclosure; as shown, it includes:
an input network 301, configured to decompose an input signal into a first signal and a second signal and output the first signal and the second signal;
a main circuit transistor 302 for receiving the first signal and amplifying to generate a first amplified signal;
a peak transistor 303 for receiving the second signal and amplifying to generate a second amplified signal;
a wideband load modulation network 304, connected to the output end of the main circuit transistor 302 and the output end of the peak transistor 303, for synthesizing the first amplified signal and the second amplified signal and outputting the synthesized signal; the relative bandwidth of the broadband load modulation network is greater than a preset threshold value;
and an output matching network 305, configured to receive and output the synthesized signal, and transform an impedance of the wideband load modulation network into a preset impedance matched with a subsequent circuit.
Optionally, the wideband load modulation network 304 includes a first transmission line 3041, a second transmission line 3042, and a third transmission line 3043;
a transmission line is a device that transports a linear structure of electromagnetic energy. It is an important component of telecommunication systems for transporting information-carrying electromagnetic waves from one point to another along a route defined by a transmission line.
Wherein an input end of the first transmission line 3041 is connected to an output end of the main circuit transistor 302, and an impedance of the first transmission line 3041 is 2 δ RLThe electrical length of the first transmission line 3041 is within the doherty power amplifier circuitThe center frequency of the bandwidth is 90 degrees;
an input end of the second transmission line 3042 is connected to an output end of the peak transistor, and an impedance of the second transmission line 3042 is 2 δ RLThe electrical length of the second transmission line 3042 is 180 degrees at the center frequency of the doherty power amplifying circuit operating bandwidth;
a common node between the output end of the first transmission line 3041 and the output end of the second transmission line 3042 is connected to the input end of the third transmission line 3043, and the impedance of the third transmission line 3043 is
The electrical length of the third transmission line 3043 is 90 degrees at the center frequency of the doherty power amplifying circuit operating bandwidth;
where δ is an impedance ratio parameter used to adjust the operating bandwidth, R, of the wideband load modulation network 304LMatching impedance, R, required for said wideband load modulation networkLMatching the power levels of the main transistor 302 and the peak transistor 303.
The electrical length is the ratio of the physical length of the microstrip transmission line to the wavelength of the transmitted electromagnetic wave.
By configuring the three transmission lines, the broadband load modulation network can have broadband characteristics and can support wider working bandwidth.
Referring to fig. 5, fig. 5 is a schematic diagram comparing impedance characteristics of the load modulation network shown in fig. 2 and the broadband load modulation network shown in fig. 4; the abscissa is the working frequency, the ordinate is the impedance characteristic, the abscissa is the target of load modulation, the triangular line series curve is the impedance characteristic variation curve of the wideband load modulation network of the present application, and the square frame series curve is the impedance characteristic variation curve of the load modulation network shown in fig. 2. The operating frequency range in the figure is an octave. Fig. 5 shows the result when the impedance ratio parameter δ is 0.5. As can be seen from fig. 5, the wideband load modulation network in the embodiment of the present application obviously has a wider operating bandwidth (with a smaller gap from the target value).
Referring to fig. 6, fig. 6 is a graph illustrating the efficiency characteristic of the doherty power amplifying circuit shown in fig. 4; fig. 5 shows the result when the impedance ratio parameter δ is 0.5.
Where the abscissa is the operating frequency and the left ordinate represents the efficiency, which may be the transistor drain efficiency, here also equivalent to the efficiency of a doherty power amplifier circuit. The right ordinate represents the output power. The dashed curves of the squares in series represent the efficiency of the doherty power amplifying circuit in a saturation state (corresponding to the maximum output power), the solid curves of the regular triangles in series represent the efficiency of the doherty power amplifying circuit in a back-off region, the dashed curves of the circles in series represent the output power of the doherty power amplifying circuit in the saturation state, and the solid curves of the inverted triangles in series represent the output power of the doherty power amplifying circuit in the back-off region, as shown in fig. 6, in combination with the solid curves of the regular triangles in series, the doherty power amplifying circuit provided by the embodiment of the present application achieves the back-off efficiency of 38% to 49% within a bandwidth of one octave (1.9 GHz to 3.8GHz) under the condition of 6dB to 7dB output power back-off, so as to realize the ultra-wideband doherty characteristic.
Referring to fig. 7, fig. 7 is a schematic diagram illustrating impedance characteristic comparison of the load modulation network shown in fig. 2 and the broadband load modulation network shown in fig. 4 under different impedance ratio parameters; the abscissa is the operating frequency, the ordinate is the impedance characteristic, the dashed curve of the series connection of the blocks is the impedance characteristic variation curve of the load modulation network shown in fig. 2, and the broadband load modulation network can adopt different impedance proportion parameter settings, that is, δ is set to different values. Optionally, δ is greater than or equal to 0.25 and less than or equal to 1. As shown in fig. 7, the solid curve of the triangular series connection is the result of the broadband load modulation network shown in fig. 4 when the impedance ratio parameter δ is 0.25; the solid curve of the series connection of circles is the result of the broadband load modulation network shown in fig. 4 when the impedance proportion parameter delta is 0.5; the solid curve of the block series is the result of the broadband load modulation network shown in fig. 4 when the impedance proportion parameter δ is 1; the comparison of fig. 7 shows the impedance characteristics for different sets of delta values in comparison with the load modulation network shown in fig. 2. It can be seen that the situation of the impedance characteristics corresponding to different δ values meeting the target is different, but all the load modulation networks corresponding to δ values, i.e. the corresponding improved doherty power amplifier structures, are within the protection scope of the present invention.
Referring to fig. 8, fig. 8 is a schematic diagram illustrating a doherty power amplifier circuit according to an embodiment of the present application; which comprises the following steps:
an input network 801 for decomposing an input signal into a first signal and a second signal and outputting the first signal and the second signal;
a main circuit transistor 802 for receiving the first signal and amplifying to generate a first amplified signal;
a peak transistor 803 for receiving the second signal and amplifying to generate a second amplified signal;
a wideband load modulation network 804, connected to the output end of the main circuit transistor 802 and the output end of the peak transistor 803, for synthesizing the first amplified signal and the second amplified signal and outputting the synthesized signal; the relative bandwidth of the broadband load modulation network is greater than a preset threshold value;
and an output matching network 805, configured to receive and output the synthesized signal, and convert an impedance of the wideband load modulation network into a preset impedance matched with a subsequent circuit.
Compared with the embodiment shown in fig. 4, in the present embodiment, a lumped circuit is adopted instead of the three transmission lines in fig. 4.
Optionally, the wideband load modulation network 804 includes a first lumped circuit 8041, a second lumped circuit 8042, and a third lumped circuit 8043;
the first lumped circuit 8041 includes a first electric L1 inductor, a first capacitor C1, and a second capacitor C2, a first end of the first inductor L1 is connected to the output terminal of the main circuit transistor 802, one end of the first capacitor C1 is connected to a first end of the first inductor L1, the other end of the first capacitor C1 is grounded, one end of the second capacitor C2 is connected to a second end of the first inductor L1, and the other end of the second capacitor C2 is grounded;
the second lumped circuit 8042 includes a second inductor L2, a third inductor L3, a third capacitor C3, a fourth capacitor C4, and a fifth capacitor C5, a first end of the second inductor L2 is connected to the output end of the peak transistor 803, a second end of the second inductor L2 is connected to the first end of the third inductor L3, one end of the third capacitor C3 is connected to the first end of the second inductor L2, the other end of the third capacitor C3 is grounded, one end of the fourth capacitor C4 is connected to the second end of the second inductor L2, the other end of the fourth capacitor C4 is grounded, one end of the fifth capacitor C5 is connected to the second end of the third inductor L3, and the other end of the fifth capacitor C5 is grounded;
the third lumped circuit 8043 includes a fourth inductor L4, a sixth capacitor C6, and a seventh capacitor C7, a common node between an output terminal of the first inductor L1 and an output terminal of the third inductor L3 is connected to a first end of the fourth inductor L4, a second end of the fourth inductor L4 is connected to the output matching network 805, one end of the sixth capacitor C6 is connected to the first end of the fourth inductor L4, the other end of the sixth capacitor C6 is grounded, one end of the seventh capacitor C7 is connected to the second end of the fourth inductor L4, and the other end of the seventh capacitor C7 is grounded.
It should be noted that, in the embodiment of the present application, a lumped circuit setting method for a wideband load modulation network is provided, which is easier to implement when the operating frequency is lower and is also easier to implement in an integrated circuit. And because of using lumped parameter element, so the Doherty power amplifying circuit can have smaller size, facilitate integrating in the portable terminal installation. Of course, the present application only shows an exemplary circuit structure of a combination of capacitance and inductance, and any other lumped circuit design that can realize the effect of the transmission line in the embodiment shown in fig. 4 is also within the protection scope of the present application, and the embodiments of the present application are not limited in any way.
According to the doherty power amplifier provided by the embodiments, the embodiments of the present application further provide a doherty power amplifier.
The doherty operational amplifier circuit described in fig. 3 to 8 above can be constructed as a hardware circuit module or an integrated chip and applied to various radio frequency transceiving equipment such as various base stations and terminals having a radio frequency communication function.
Accordingly, the present embodiment further provides a terminal, which includes a radio frequency front end module, where the radio frequency front end module includes a doherty power amplifier formed by the doherty power amplifying circuits in the embodiments shown in fig. 3 to 8;
accordingly, the present embodiment also provides a base station, which includes a radio frequency front end module, where the radio frequency front end module includes a doherty power amplifier formed by the doherty power amplifying circuits in the embodiments shown in fig. 3 to 8.
It should be understood that the reference herein to first, second, third, fourth, and various numerical designations is merely for ease of description and distinction and is not intended to limit the scope of the embodiments of the present application.
Those of ordinary skill in the art will appreciate that the various illustrative logical blocks and steps (step) described in connection with the embodiments disclosed herein may be implemented as electronic hardware or combinations of computer software and electronic hardware. Whether such functionality is implemented as hardware or software depends upon the particular application and design constraints imposed on the implementation. Skilled artisans may implement the described functionality in varying ways for each particular application, but such implementation decisions should not be interpreted as causing a departure from the scope of the present application.
In the above embodiments, the implementation may be wholly or partially realized by software, hardware, firmware, or any combination thereof. When implemented in software, may be implemented in whole or in part in the form of a computer program product. The computer program product includes one or more computer instructions. When loaded and executed on a computer, cause the processes or functions described in accordance with the embodiments of the application to occur, in whole or in part. The computer may be a general purpose computer, a special purpose computer, a network of computers, or other programmable device. The computer instructions may be stored in a computer readable storage medium or transmitted from one computer readable storage medium to another, for example, from one website site, computer, server, or data center to another website site, computer, server, or data center via wired (e.g., coaxial cable, fiber optic, Digital Subscriber Line (DSL)) or wireless (e.g., infrared, wireless, microwave, etc.). The computer-readable storage medium can be any available medium that can be accessed by a computer or a data storage device, such as a server, a data center, etc., that incorporates one or more of the available media. The usable medium may be a magnetic medium (e.g., floppy Disk, hard Disk, magnetic tape), an optical medium (e.g., DVD), or a semiconductor medium (e.g., Solid State Disk (SSD)), among others.
The above description is only for the specific embodiments of the present application, but the scope of the present application is not limited thereto, and any person skilled in the art can easily conceive of the changes or substitutions within the technical scope of the present application, and shall be covered by the scope of the present application. Therefore, the protection scope of the present application shall be subject to the protection scope of the claims.
Claims (8)
1. A doherty power amplifying circuit comprising:
the input network is used for decomposing the input signal into a first signal and a second signal and then outputting the first signal and the second signal;
the main circuit transistor is used for receiving the first signal and amplifying the first signal to generate a first amplified signal;
a peak transistor for receiving the second signal and amplifying to generate a second amplified signal;
the broadband load modulation network is connected with the output end of the main circuit transistor and the output end of the peak transistor and is used for synthesizing the first amplified signal and the second amplified signal and outputting the synthesized signal; the relative bandwidth of the broadband load modulation network is greater than a preset threshold value;
the output matching network is used for receiving and outputting the synthesized signal and converting the output impedance of the broadband load modulation network into preset impedance matched with a post-stage circuit;
the wideband load modulation network comprises a first transmission line, a second transmission line and a third transmission line; the input end of the first transmission line is connected with the output end of the main circuit transistor, and the impedance of the first transmission line is 2 delta RLThe electrical length of the first transmission line is 90 degrees at the center frequency of the operating bandwidth of the doherty power amplifying circuit; the input end of the second transmission line is connected with the output end of the peak transistor, and the impedance of the second transmission line is 2 delta RLAn electrical length of the second transmission line is 180 degrees at a center frequency of an operating bandwidth of the Doherty power amplifying circuit; a common node of the output end of the first transmission line and the output end of the second transmission line is connected with the input end of the third transmission line, and the impedance of the third transmission line is
The electrical length of the third transmission line is 90 degrees at the center frequency of the operating bandwidth of the doherty power amplifying circuit; wherein δ is an impedance ratio parameter for adjusting the operating bandwidth, R, of the wideband load modulation networkLMatching impedance, R, required for said wideband load modulation networkLMatching the power levels of the main and peak transistors;
or, the wideband load modulation network comprises a first lumped circuit, a second lumped circuit and a third lumped circuit; the first lumped circuit comprises a first inductor, a first capacitor and a second capacitor, wherein a first end of the first inductor is connected with an output end of the main circuit transistor, one end of the first capacitor is connected with a first end of the first inductor, the other end of the first capacitor is grounded, one end of the second capacitor is connected with a second end of the first inductor, and the other end of the second capacitor is grounded; the second lumped circuit comprises a second inductor, a third capacitor, a fourth capacitor and a fifth capacitor, wherein the first end of the second inductor is connected with the output end of the peak transistor, the second end of the second inductor is connected with the first end of the third inductor, one end of the third capacitor is connected with the first end of the second inductor, the other end of the third capacitor is grounded, one end of the fourth capacitor is connected with the second end of the second inductor, the other end of the fourth capacitor is grounded, one end of the fifth capacitor is connected with the second end of the third inductor, and the other end of the fifth capacitor is grounded; the third lumped circuit comprises a fourth inductor, a sixth capacitor and a seventh capacitor, a common node of an output end of the first inductor and an output end of the third inductor is connected with a first end of the fourth inductor, a second end of the fourth inductor is connected with the output matching network, one end of the sixth capacitor is connected with a first end of the fourth inductor, the other end of the sixth capacitor is grounded, one end of the seventh capacitor is connected with a second end of the fourth inductor, and the other end of the seventh capacitor is grounded.
2. The doherty power amplifying circuit according to claim 1, wherein δ is 0.25 or more and 1 or less.
3. A doherty power amplifying circuit according to claim 1 and wherein said output matching network comprises a supply network for powering said wideband load modulation network and said output matching network.
4. A doherty power amplifying circuit according to claim 1 and wherein said relative bandwidth is equal to the ratio of the operating bandwidth of said doherty power amplifying circuit to the center frequency of said doherty power amplifying circuit.
5. A Doherty power amplifying circuit according to claim 4 and wherein said preset threshold value is greater than or equal to 10%.
6. A doherty power amplifier comprising:
a Doherty power amplifying circuit as claimed in any one of claims 1-5.
7. A terminal, comprising:
a radio frequency front end module comprising the doherty power amplifier of claim 6.
8. A base station, comprising:
a radio frequency front end module comprising the doherty power amplifier of claim 6.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201711040971.9A CN109728783B (en) | 2017-10-30 | 2017-10-30 | Doherty power amplification circuit, power amplifier, terminal and base station |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201711040971.9A CN109728783B (en) | 2017-10-30 | 2017-10-30 | Doherty power amplification circuit, power amplifier, terminal and base station |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN109728783A CN109728783A (en) | 2019-05-07 |
| CN109728783B true CN109728783B (en) | 2021-09-21 |
Family
ID=66293065
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201711040971.9A Active CN109728783B (en) | 2017-10-30 | 2017-10-30 | Doherty power amplification circuit, power amplifier, terminal and base station |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN109728783B (en) |
Families Citing this family (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN113437942A (en) * | 2021-07-27 | 2021-09-24 | 中国科学院微电子研究所 | Broadband power divider and broadband power amplifier |
| CN114070210B (en) * | 2022-01-18 | 2022-09-20 | 唯捷创芯(天津)电子技术股份有限公司 | High-bandwidth load modulation power amplifier and corresponding radio frequency front-end module |
| CN114785306A (en) * | 2022-04-26 | 2022-07-22 | 深圳清华大学研究院 | Signal transmission circuit, amplifier and transceiver |
| WO2024087212A1 (en) * | 2022-10-28 | 2024-05-02 | 海能达通信股份有限公司 | Adjustment method for power amplifier apparatus and power amplifier apparatus |
| CN117546412A (en) * | 2022-11-01 | 2024-02-09 | 苏州华太电子技术股份有限公司 | Doherty amplifier, output network thereof, and design method of doherty amplifier |
| CN118104130A (en) * | 2022-11-01 | 2024-05-28 | 苏州华太电子技术股份有限公司 | Doherty amplifier, output network thereof, and design method of doherty amplifier |
| CN115955203A (en) * | 2022-12-30 | 2023-04-11 | 尚睿微电子（上海）有限公司 | Power amplifying circuit |
| CN117792307A (en) * | 2023-12-27 | 2024-03-29 | 尚睿微电子（上海）有限公司 | Radio frequency power amplifier and electronic equipment |
Family Cites Families (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US8749306B2 (en) * | 2011-03-16 | 2014-06-10 | Cree, Inc. | Enhanced Doherty amplifier |
| WO2011127868A2 (en) * | 2011-05-30 | 2011-10-20 | 华为技术有限公司 | Doherty power amplifier and signal processing method |
-
2017
- 2017-10-30 CN CN201711040971.9A patent/CN109728783B/en active Active
Also Published As
| Publication number | Publication date |
|---|---|
| CN109728783A (en) | 2019-05-07 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN109728783B (en) | Doherty power amplification circuit, power amplifier, terminal and base station | |
| US9083284B2 (en) | Wide-band multi stage Doherty power amplifier | |
| US10033335B1 (en) | Doherty power amplifier | |
| KR101983632B1 (en) | Communication module | |
| CN110784185B (en) | Power amplifier, output matching circuit and radio frequency module | |
| CN107517039B (en) | Millimeter wave GaN power amplifier radio frequency predistortion linearizer | |
| US10069461B2 (en) | Doherty amplifier | |
| CN108011599B (en) | Matching circuit structure and method for inhibiting low-frequency clutter of mobile phone power amplifier | |
| US10666207B1 (en) | Broadband harmonic matching network using low-pass type broadband matching | |
| CN113938102A (en) | Broadband high-efficiency power amplifier and implementation method | |
| JP2010021719A (en) | Doherty amplifier | |
| US20140266443A1 (en) | High-frequency, broadband amplifier circuit | |
| JP6471804B2 (en) | Broadband radio frequency power amplifier | |
| Piazzon et al. | A method for designing broadband Doherty power amplifiers | |
| CN109560830A (en) | A kind of centre frequency and the adjustable negative group delay circuitry of Self Matching of group delay | |
| US9484864B2 (en) | Doherty amplifier | |
| WO2010142463A1 (en) | Class e amplifier | |
| JP2006005848A (en) | Power amplifier and high frequency communication device | |
| CN104734647B (en) | A kind of amplifier system and communication equipment | |
| JP4718175B2 (en) | Power amplification circuit | |
| CN114139483B (en) | Design method of broadband radio frequency power amplifier and broadband radio frequency power amplifier | |
| CN116131778A (en) | Broadband distributed power amplifier and integrated circuit | |
| US20120086511A1 (en) | Distributed power amplifier with active matching | |
| JP2018088638A (en) | High frequency power amplifier and radio communication equipment | |
| WO2019127412A1 (en) | Harmonic control circuit apparatus and method for manufacturing the same |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PB01 | Publication | ||
| PB01 | Publication | ||
| SE01 | Entry into force of request for substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| GR01 | Patent grant | ||
| GR01 | Patent grant |