CN109728741B - Voltage balance control method and device applied to three-phase DC-AC converter - Google Patents

Voltage balance control method and device applied to three-phase DC-AC converter Download PDF

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CN109728741B
CN109728741B CN201811251446.6A CN201811251446A CN109728741B CN 109728741 B CN109728741 B CN 109728741B CN 201811251446 A CN201811251446 A CN 201811251446A CN 109728741 B CN109728741 B CN 109728741B
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voltage
phase
value
reference value
amplitude
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CN109728741A (en
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林孟谊
小西义弘
杨宗振
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Industrial Technology Research Institute ITRI
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    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M7/00—Conversion of ac power input into dc power output; Conversion of dc power input into ac power output
    • H02M7/02—Conversion of ac power input into dc power output without possibility of reversal
    • H02M7/04—Conversion of ac power input into dc power output without possibility of reversal by static converters
    • H02M7/12—Conversion of ac power input into dc power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
    • H02M7/21—Conversion of ac power input into dc power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal
    • H02M7/217—Conversion of ac power input into dc power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only
    • H02M7/219—Conversion of ac power input into dc power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only in a bridge configuration
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M7/00—Conversion of ac power input into dc power output; Conversion of dc power input into ac power output
    • H02M7/42—Conversion of dc power input into ac power output without possibility of reversal
    • H02M7/44—Conversion of dc power input into ac power output without possibility of reversal by static converters
    • H02M7/48—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
    • H02M7/53—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal
    • H02M7/537—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only, e.g. single switched pulse inverters
    • H02M7/5387—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only, e.g. single switched pulse inverters in a bridge configuration
    • H02M7/53871—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only, e.g. single switched pulse inverters in a bridge configuration with automatic control of output voltage or current
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M7/00—Conversion of ac power input into dc power output; Conversion of dc power input into ac power output
    • H02M7/42—Conversion of dc power input into ac power output without possibility of reversal
    • H02M7/44—Conversion of dc power input into ac power output without possibility of reversal by static converters
    • H02M7/48—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
    • H02M7/53—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal
    • H02M7/537—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only, e.g. single switched pulse inverters
    • H02M7/5387—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only, e.g. single switched pulse inverters in a bridge configuration
    • H02M7/53871—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only, e.g. single switched pulse inverters in a bridge configuration with automatic control of output voltage or current
    • H02M7/53875—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only, e.g. single switched pulse inverters in a bridge configuration with automatic control of output voltage or current with analogue control of three-phase output
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M1/00—Details of apparatus for conversion
    • H02M1/12—Arrangements for reducing harmonics from ac input or output

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  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Inverter Devices (AREA)
  • Dc-Dc Converters (AREA)

Abstract

The present disclosure provides a voltage balance control method applied to a three-phase dc-ac converter, including: multiplying the actual value of the line capacitance voltage by a sine function through a first multiplier to generate a first voltage; extracting a direct current part of the first voltage through a first filter to generate an error direct current component; subtracting the error DC component from the target voltage amplitude by a first subtracter to generate a second voltage; adjusting the second voltage through a first proportional-integral controller to generate an amplitude error compensation value; and adding the amplitude error compensation value and the target voltage amplitude through an adder to generate an amplitude reference value. In addition, the present disclosure also provides a voltage balance control apparatus applied to a three-phase dc-ac converter.

Description

Voltage balance control method and device applied to three-phase DC-AC converter
Technical Field
The present disclosure relates to a voltage balance control method and device, and more particularly, to a voltage balance control method and device applied to a three-phase dc-ac converter.
Background
Nowadays, a power system can be divided into a three-phase power supply and a single-phase power supply, and if the specifications are met, a single-phase load can be connected to the three-phase power supply, so as to save the manufacturing cost of the single-phase power supply, but unbalance between phases of the three-phase power supply can be caused. The three-phase dc-ac converter is usually applied to a renewable energy independent system or an uninterruptible power supply system, and the output voltage of the three-phase dc-ac converter needs to have high quality characteristics, but the quality of the output voltage is affected by unbalanced load, for example, the output impedance mismatch caused by the manufacturing error of the inductance of the output end is considered when the three-phase load is converted into a single-phase load or when the load of the three-phase dc-ac converter is changed.
In addition, in the prior art, a direct-axis (d-axis) quadrature-axis (q-axis) positive-negative zero phase sequence conversion control method is used, and the control method has poor dynamic response because no current feedback is used to control the output voltage. In addition, a Proportional Resonant Controller (Proportional Resonant Controller) is proposed to achieve the voltage balance control, however, this control method needs to add a sensor element at the output end to obtain the load current, so the balance effect cannot be optimized.
Therefore, how to effectively improve the above-mentioned problems of the prior art, and effectively reduce the output voltage and the control error during the load balancing, so as to improve the performance of the whole system has become a major issue for those skilled in the art.
BRIEF SUMMARY OF THE PRESENT DISCLOSURE
The present disclosure provides a voltage balance control method and apparatus applied to a three-phase dc-ac converter.
The voltage balance control method applied to the three-phase DC-AC converter comprises the following steps: multiplying the actual value of a line capacitor voltage by a sine function through a first multiplier to generate a first voltage; extracting a DC part of the first voltage through a first filter to generate an error DC component; subtracting the error DC component from a target voltage amplitude by a first subtracter to generate a second voltage; adjusting the second voltage through a first proportional integral controller to generate an amplitude error compensation value; and adding the amplitude error compensation value and the target voltage amplitude through an adder to generate an amplitude reference value.
The disclosed voltage balance control device applied to a three-phase DC-AC converter is a chip or has a chip, and includes: a reference value adjuster for outputting a new reference value, wherein a feedback value is input to the reference value adjuster; a subtraction device connected to the output end of the reference value regulator and subtracting the new reference value from the feedback value; and a voltage regulator connected to the subtracting device.
According to the voltage balance control apparatus of the present disclosure, the reference value adjuster includes: a first multiplier for outputting a first voltage, wherein the feedback value and a sine function are input to the first multiplier; a first filter connected to the first multiplier for extracting the DC part of the first voltage and outputting an error DC component; a first subtracter connected to the first filter for outputting a second voltage and subtracting a target voltage amplitude from the error DC component; a first proportional integral controller connected to the first subtractor for outputting an amplitude error compensation value and adjusting the second voltage; and an adder connected to the first proportional-integral controller for outputting an amplitude reference value and adding the amplitude error compensation value to the target voltage amplitude.
According to the voltage balance control apparatus of the present disclosure, the reference value adjuster further includes: a second multiplier for outputting a third voltage, wherein the feedback value and a cosine function are input to the second multiplier; a second filter connected to the second multiplier for extracting the phase portion of the third voltage and outputting a phase error component; a second proportional-integral controller connected to the second filter for outputting a phase error compensation value and adjusting the phase error component; a second subtracter connected to the second proportional-integral controller for outputting a phase reference value and subtracting a target voltage phase from the phase error compensation value; and a sine wave generator connected to the second subtracter for outputting a sine wave value, wherein the phase reference value is input to the sine wave generator.
According to the voltage balance control apparatus of the present disclosure, the reference value adjuster further includes: a third multiplier for outputting the new reference value, wherein the amplitude reference value and the sine wave value are input to the third multiplier.
In order to make the aforementioned and other features and advantages of the disclosure more comprehensible, embodiments accompanied with figures are described in detail below. Additional features and advantages of the disclosure will be set forth in part in the description which follows, and in part will be obvious from the description, or may be learned by practice of the disclosure. The features and advantages of the disclosure are realized and attained by means of the elements and combinations particularly pointed out in the appended claims. It is to be understood that both the foregoing general description and the following detailed description are exemplary and explanatory only and are not restrictive of the scope of the disclosure, as claimed.
Drawings
Fig. 1 is a schematic diagram of a circuit architecture of a voltage balance control apparatus according to the present disclosure;
FIG. 2 is a flow chart of a voltage balance control method of the present disclosure;
FIG. 3 is a block diagram of an amplitude reference unit of the voltage balance control apparatus according to the present disclosure;
FIG. 4 is a block diagram of a phase reference unit of the voltage balance control apparatus according to the present disclosure;
FIGS. 5A and 5B are block diagrams of the amplitude and phase reference values of the ab and bc phases of the voltage balance control apparatus of the present disclosure and the voltage regulator and PWM generator;
FIG. 6 shows a block diagram of a voltage balance control apparatus of the present disclosure;
FIG. 7A is a simulation result without using the amplitude control of the present disclosure;
FIG. 7B shows simulation results of amplitude control according to an embodiment of the present disclosure;
FIG. 8A is a simulation result without using the phase control of the present disclosure;
FIG. 8B shows simulation results of phase control according to an embodiment of the disclosure;
FIG. 9A is a simulation result without using the amplitude control and phase control of the present disclosure; and
fig. 9B shows simulation results of amplitude control and phase control according to an embodiment of the disclosure.
[ description of main reference numerals in the drawings ] of the embodiments of the present disclosure
1a DC-AC converter;
3-1, 3-2 and 8 voltage balance control devices;
5 amplitude reference value unit;
5aab phase amplitude reference value unit;
5b bc phase amplitude reference value unit;
7 phase reference value unit;
7 ab phase reference value unit;
7b bc phase reference value unit;
10 a first multiplier;
11 a first filter;
12 a first subtractor;
13 a first proportional integral controller;
14 an adder;
20 a second multiplier;
21 a second filter;
22 a second proportional-integral controller;
23 a second subtractor;
24a,24b sine wave generators;
30. 30a, 30b reference value adjuster;
a 31a ab phase third multiplier;
31b bc phase third multiplier;
32,32a,32b subtracting means;
33,33a,33b voltage regulators;
34 a pulse width modulation generator;
Cdca DC link capacitor;
Cfa,Cfb,Cfca filter capacitor;
Eda DC link voltage;
Lfa,Lfb,Lfca filter inductor;
q1, Q2, Q3, Q4, Q5, Q6 switching elements;
s10 to S20.
Detailed Description
The embodiments of the present disclosure are described below by way of specific examples, and those skilled in the art can easily understand the advantages and effects of the present disclosure from the disclosure of the present disclosure, and can also implement or apply the embodiments in different forms.
The present disclosure provides a voltage balance control method and device, which perform effective amplitude and phase analysis and compensation on an output voltage, so that the output voltage can be balanced when the output load is unbalanced.
The voltage balance control method and apparatus proposed in the present disclosure can be applied to a dc-to-ac converter 1, and fig. 1 shows a circuit architecture of a three-phase dc-to-ac converter 1, where the dc-to-ac converter 1 includes a dc link capacitor CdcSix switching elements Q1～Q6Three filter inductors Lfa、Lfb、LfcAnd three filter capacitors Cfa、Cfb、CfcBuilt-up filter circuits in which each two switching elements constitute an independent phase, e.g. switching element Q1～Q2Constituting a phase, switching element Q3～Q4Forming a b-phase, switching element Q5～Q6Constituting the c phase. In addition, EdIs a DC link voltage, vIaIs an a-phase alternating voltage of a DC-AC converter, iIaIs an a-phase alternating current of a DC-AC converter, vCaAc filter capacitor voltage of phase a, iCaAc filter capacitor current of a phase iLaThe load current of the phase a, the parameters of the other phases b and c and the like; v. ofCabIs the actual value of the ab-line capacitance voltage (i.e. the ab two-phase capacitance voltage v)Cab)，vCbcIs the actual value of the bc line capacitance voltage (namely bc two-phase capacitance voltage v)Cbc)。
The present disclosure provides a voltage balance control method applied to a three-phase dc-ac converter, as shown in fig. 2 to 5A and 5B, the method includes the following steps S10 to S20.
In step S10 of fig. 2, the actual value v of the line capacitor voltage is converted by a first multiplier 10 of fig. 3CabMultiplying the first voltage by a sine function sin theta to generate a first voltage A1_ab。
In step S11 of fig. 2, the first voltage a is extracted by a first filter 11 of fig. 31_abTo generate an error DC component A2_ab。
In step S12 of fig. 2, a target voltage amplitude V is adjusted by a first subtractor 12 of fig. 3L rmsAnd error DC component A2_abSubtracting to generate a second voltage A3_abA second voltage A3_abAnd may be considered as an amplitude error component. In fact, because of the coefficient relationship of the operation, as shown in the following equation (4),
Figure BDA0001841797120000051
so that the target voltage amplitude VL rmsNeed to be divided by
Figure BDA0001841797120000052
Then, the error DC component A is added2_abAre subtracted.
In step S13 of fig. 2, the second voltage a is adjusted by a first proportional-integral controller 13 of fig. 33_abTo generate an amplitude error compensation value DeltavCab。
In step S14 of fig. 2, the amplitude error compensation value Δ v is added by an adder 14 of fig. 3CabAnd target voltage amplitude
Figure BDA0001841797120000053
Adding to generate an Amplitude reference value Amplitude _ ab. In practice, to obtain the target voltage amplitude VL rmsWill thus be multiplied by
Figure BDA0001841797120000054
Then, the amplitude error compensation value is compared with the amplitude error compensation value delta vCabThe sum is shown in the following equation (6).
In step S15 of fig. 2, the actual line capacitance voltage value v is applied by a second multiplier 20 of fig. 4CabMultiplying the first voltage by a cosine function cos theta to generate a third voltage P1_ab。
In step S16 of fig. 2, the third voltage P is extracted by a second filter 21 of fig. 41_abTo generate a phase error component P2_ab。
In step S17 of fig. 2, the phase error component P is adjusted by a second proportional-integral controller 22 of fig. 42_abTo generate a phase error compensation value Δ Φab。
In step S18 of fig. 2, a target voltage phase θ and the phase error compensation value Δ Φ are adjusted by a second subtractor 23 of fig. 4abThe difference is calculated to generate a phase reference value phase _ ab.
In step S19 of fig. 2, the phase reference value phase _ ab is received by a sine wave generator 24a of fig. 5A to generate a sine wave value sin (θ - Δ Φ)ab)。
In step S20 of fig. 2, the one-ab-phase third multiplication method of fig. 5AA unit 31a for comparing the Amplitude reference value Amplified _ ab with the sine wave value sin (theta-delta phi)ab) Multiplying to generate a control voltage reference value vCabControl voltage reference value vCabIs a control command value (control command).
Fig. 3 shows a block diagram of the amplitude reference value unit 5 (ab phase as an example) of the voltage balance control apparatus of the present disclosure, and the control of the amplitude reference value is explained as follows.
The output line voltage of the ab-phase capacitor of the ideal three-phase DC-AC converter is a sine wave function, and is shown in formula (1):
Figure BDA0001841797120000061
wherein E ismIs the reference value of the peak value of the voltage,
Figure BDA0001841797120000062
is an effective value of the reference line voltage, v* Cab_idealIs an ideal control voltage reference value.
However, the output voltage reference of the actual three-phase dc-ac converter has errors in amplitude and phase, and it is assumed that the following formula (2) shows:
Figure BDA0001841797120000063
wherein v isCabIs the actual value of the line capacitance voltage,
Figure BDA0001841797120000064
is the voltage peak reference value of the ab phase, theta is the phase, phiabIs the phase difference.
The actual value v of the line capacitance voltage is converted by a first multiplier 10CabMultiplied by a sine function sin theta to generate a first voltage A1_abAs shown in equation (3):
Figure BDA0001841797120000065
wherein,theta is the phase, vCabAs the actual value of the line capacitance voltage, phiabIn order to be the phase difference,
Figure BDA0001841797120000066
the voltage peak reference for the ab phase.
As can be seen from equation (3), the first voltage A1_abComprising a DC component and a 2 times angular frequency component, a first voltage A1_abPasses through a first filter (filter)11, for example a Moving average filter (Moving average filter) or a device that can extract current values, and assumes a phase difference ΦabVery little time, an error can be generated in the DC component A2_abAs shown in equation (4):
Figure BDA0001841797120000067
wherein,
Figure BDA0001841797120000071
reference value of voltage peak for ab phase, phiabIn order to be the phase difference,
Figure BDA0001841797120000072
is ab line voltage effective value.
Then, the first subtracter 12 is used to obtain the target voltage amplitude VL rms(because of the coefficient relationship of the operation, so will divide by
Figure BDA0001841797120000073
) And error DC component A2_abSubtracting to obtain a second voltage A3_abAs shown in equation (5):
Figure BDA0001841797120000074
wherein,
Figure BDA0001841797120000075
in order to achieve the target voltage amplitude,
Figure BDA0001841797120000076
reference value of voltage peak for ab phase, phiabFor phase difference, the second voltage A3_abAnd may be considered as an amplitude error component.
The error DC component A2_abThe amplitude error compensation value Δ v can be obtained by calculation through a first proportional-integral controller (PI controller)13CabThe target voltage amplitude V is added by the adder 14L rms(to obtain the target voltage amplitude VL rmsWill thus be multiplied by
Figure BDA00018417971200000711
) Plus amplitude error compensation value DeltavCabThen, the Amplitude reference value Amplitude _ ab can be obtained, as shown in formula (6):
Figure BDA0001841797120000077
having described the amplitude reference control of the voltage balance control apparatus of the present disclosure in detail, the voltage balance control apparatus of the present disclosure also includes the phase reference control, fig. 4 shows a block diagram of the phase reference unit 7 (ab phase as an example) of the voltage balance control apparatus of the present disclosure, and the control of the phase reference is described in detail as follows.
Assuming that the reference value of the output voltage of the three-phase dc-ac converter is as shown in equation (2), the actual value v of the line capacitance voltage is multiplied by the second multiplier 20CabMultiplying the third voltage P by a cosine function cos θ1_abAs shown in equation (7):
Figure BDA0001841797120000078
wherein, theta is the phase,
Figure BDA0001841797120000079
reference value of voltage peak for ab phase, phiabIs the phase difference.
Is given by the formula (7)It can be seen that the third voltage P1_abContaining DC component and 2 times angular frequency component, a third voltage P1_abPasses through a second filter 21 (e.g. a moving average filter) and assumes a phase difference ΦabVery little time, the phase error component P can be obtained2_abAs shown in equation (8):
Figure BDA00018417971200000710
wherein,
Figure BDA0001841797120000081
reference value of voltage peak for ab phase, phiabIs the phase difference.
The phase error component P2_abAfter passing through the second proportional-integral controller 22, a phase error compensation value Δ Φ can be generatedabThe target voltage phase theta and the phase error compensation value delta phi are calculated by a second subtractor 23abSubtracting to obtain a Phase reference value Phase_ab, as shown in formula (9):
Phase_ab＝θ-ΔΦab(9)
next, a sine wave value sin (theta-delta phi) is obtained by a sine wave generator 24a receiving the phase reference value phase _ abab)。
Thereafter, the Amplitude reference value Amplitude _ ab is multiplied by the sine wave value sin (θ - Δ Φ) using the ab-phase third multiplier 31aab) Multiplying, i.e. obtaining a control voltage reference value
Figure BDA0001841797120000082
As shown in equation (10).
Figure BDA0001841797120000083
Similarly, the control voltage reference value of bc phase can also be obtained
Figure BDA0001841797120000084
As shown in equation (11).
Figure BDA0001841797120000085
Referring to fig. 5A and 5B, the voltage balance control devices 3-1 (first half) and 3-2 (second half) of the present disclosure are shown, the voltage balance control device 3-1 includes reference value adjusters 30a and 30B; referring to fig. 5B, the voltage balance control device 3-2 includes subtracting devices 32a,32B, voltage regulators (voltage regulators) 33a,33B, and a Pulse Width Modulation (PWM) generator 34. As shown in fig. 5A, the reference value adjustor 30a includes an ab-phase Amplitude reference value unit 5A (the Amplitude reference value unit 5 shown in fig. 3), an ab-phase reference value unit 7a (the phase reference value unit 7 shown in fig. 4), a sine wave generator 24a and an ab-phase third multiplier 31a, wherein the ab-phase Amplitude reference value unit 5A outputs the Amplitude reference value Amplitude_ab-to-ab-Phase third multiplier 31a, ab-Phase reference value unit 7a outputs Phase reference value Phase_The ab-to-sine wave generator 24a, the ab-phase third multiplier 31a outputs the control voltage reference value of the ab-phase
Figure BDA0001841797120000086
The reference regulator 30b includes a bc-phase amplitude reference unit 5b (similar to the amplitude reference unit 5 shown in fig. 3, except that the input is the actual value v of the bc-line capacitor voltageCbc) Bc-phase reference value unit 7b (similar to phase reference value unit 7 shown in fig. 4, except that the input is the actual value v of the bc-line capacitance voltageCbc) A sine wave generator 24b and a bc-phase third multiplier 31b, wherein the bc-phase Amplitude reference value unit 5b outputs an Amplitude reference value Amplitude_bc-to-bc Phase third multiplier 31b, bc-Phase reference value unit 7b outputs Phase reference value Phase_bc-phase to sine wave generator 24b, bc-phase third multiplier 31b outputs bc-phase control voltage reference value v* Cbc. As shown in fig. 5B, the ab-phase control voltage reference value v is obtained by the subtracting means 32aCab *And the actual value v of ab line capacitance voltageCabSubtracting and entering the voltage regulator 33a and the pwm generator 34; by subtracting means 32b, the control voltage reference value of the bc phasev* CbcAnd the actual value v of the bc line capacitance voltageCbcSubtracted from each other, and enters the voltage regulator 33b and the pwm generator 34. As shown in fig. 5A and 5B, the control voltage reference value v is obtained by controlling the ab phase and the bc phaseCab *、
Figure BDA0001841797120000091
Can be applied to various controllers, and the modulation factor (modulation) of the switching signal is obtained through the voltage regulators 33a and 33b, so as to control the switching element Q1～Q6The output voltage of the three-phase DC-AC converter is balanced by the switching signal.
Fig. 6 shows a block diagram of the voltage balance control device 8 of the present disclosure. The voltage balance control device 8 may be a chip or have a chip, and includes a reference value regulator 30, a subtraction device 32 and a voltage regulator 33. The reference value adjuster 30 of fig. 6 is equivalent to the reference value adjusters 30a, 30b of fig. 5A. The subtracting means 32 of figure 6 is equivalent to the subtracting means 32a,32B of figure 5B. The voltage regulator 33 of fig. 6 is equivalent to the voltage regulators (voltage regulators) 33a,33B of fig. 5B. The reference regulator 30 is used to output a new reference, wherein a feedback value is input to the reference regulator 30 and the subtracting device 32. The subtracting device 32 is connected to the output terminal of the reference regulator 30, and subtracts the new reference value from the feedback value, which is the actual measurement value, such as the actual value v of ab-line capacitance voltageCabOr the actual value v of the bc line capacitance voltageCbc. The reference value is a known waveform, for example, a sine function sin θ or a cosine function cos θ. The voltage regulator 33 is connected to the subtracting means 32. New reference value (new reference) for the control voltage reference values v of the ab and bc phasesCab *、
Figure BDA0001841797120000092
The reference value adjustor 30 of fig. 6 may include a first multiplier 10, a first filter 11, a first subtracter 12, a first proportional-integral controller 13 and an adder 14 of the amplitude reference value unit 5 of fig. 3, that is, the amplitude reference value unit 5 of fig. 3 is a reference valueA part of the reference regulator 30. The first multiplier 10 is used for outputting a first voltage A1_abWherein the actual value v of the line capacitance voltageCabAnd a sine function sin theta are input to the first multiplier 10. The first filter 11 is connected to the first multiplier 10 for extracting the first voltage A1_abAnd outputs an error DC component A2_ab. The first subtractor 12 is connected to the first filter 11 for outputting a second voltage A3_ab(amplitude error component) and a target voltage amplitude VL rms(because of the coefficient relationship of the operation, so will divide by
Figure BDA0001841797120000093
) And error DC component A2_abAre subtracted. The first proportional integral controller 13 is connected to the first subtractor 10 for outputting an amplitude error compensation value Δ vCabAnd adjusting the second voltage A3_abA second voltage A3_abAnd may be considered as an amplitude error component. The adder 14 is connected to the first proportional-integral controller 13 for outputting an Amplitude reference value Amplitude _ ab and compensating the Amplitude error
Figure BDA0001841797120000101
With a target voltage amplitude VL rms(to obtain the target voltage amplitude VL rmsWill thus be multiplied by
Figure BDA0001841797120000102
) And (4) adding.
The reference value adjustor 30 of fig. 6 further includes a second multiplier 20, a second filter 21, a second proportional-integral controller 22, and a second subtractor 23 of the phase reference value unit 7 of fig. 4, i.e., the phase reference value unit 7 of fig. 4 is a part of the reference value adjustor 30 of fig. 6. The second multiplier 20 of FIG. 4 is used for outputting a third voltage P1_abWherein the actual value v of the line capacitance voltageCabAnd a cosine function cos θ to the second multiplier 20. A second filter 21 connected to the second multiplier 20 for extracting the third voltage P1_abAnd outputs the phase part ofA phase error component P2_ab. The second proportional-integral controller 22 is connected to the second filter 21 for outputting a phase error compensation value Δ ΦabAnd adjusting the phase error component P2_ab. The second subtractor 23 is connected to the second proportional-integral controller 22 for outputting a Phase reference value Phase _ ab (Phase _ ab ═ θ - Δ Φ)ab) And a target voltage phase theta and a phase error compensation value delta phiabAre subtracted. In one embodiment, the reference value adjustor 30 may also include the phase reference value unit 7a shown in FIG. 5A, and the sine wave generator 24a is connected to the ab phase reference value unit 7a for outputting a sine wave value sin (θ - Δ Φ)ab) Wherein the phase reference value phase _ ab is input to the sine wave generator 24 a. The ab-phase third multiplier 31a outputs a control voltage reference value vCabWherein the Amplitude reference value Amplitude _ ab and the sine wave value sin (theta-delta phi)ab) Input to the ab-phase third multiplier 31 a; the bc-phase third multiplier 31b outputs a control voltage reference value vCbcAmplitude reference value Amplitude _ bc and sine wave value
Figure BDA0001841797120000103
Is input to the bc-phase third multiplier 31 b.
Fig. 7A is a simulation result of the amplitude control without using the present disclosure, and fig. 7B is a simulation result of the amplitude control using the present disclosure, and it can be seen from fig. 7A and 7B that the control voltage reference value v isCabIs the output voltage reference value of sample and hold (sample and hold), and thus a sawtooth wave, and the present disclosure compensates (compensate) and fine tunes (modulate) the original control command such that the compensated control voltage reference value v × (v ×)CabCan more accurately track the actual value v of the line capacitance voltageCab. The bottom graph of FIG. 7A represents the state without voltage amplitude compensation, amplitude error compensation value (Δ v)Cab) Having an amplitude error compensation value of 0, in which case (see figure) the amplitude error component A3_abWith an amplitude error of about 4V, the control voltage reference value V (see above figure) is nowCabDeviation from the actual value v of the line capacitance voltageCab. The bottom graph of FIG. 7B represents the state where voltage amplitude compensation has been performed, the amplitude error compensation value (Δ v)Cab) Having an amplitude error compensation value of about11V, amplitude error component A at this time (see middle diagram)3_abThe amplitude error is 0V, the original amplitude error is eliminated, and the control voltage reference value V (see the figure) is obtainedCabActual value v of line-proximate capacitance voltageCab. Therefore, the simulation result without using the amplitude control of the present disclosure has an amplitude error of about 4V, while the amplitude error using the amplitude reference value unit 5 of fig. 3 of the present disclosure is 0V, and the proportional-integral controller (the first proportional-integral controller 13) of the present disclosure generates the amplitude error compensation value Δ νCabAbout 11V, the output voltage amplitude is balanced.
Fig. 8A is a simulation result of phase control without using the present disclosure, and fig. 8B is a simulation result of phase control using the present disclosure, that is, the present disclosure performs phase compensation on an original control voltage reference value to generate a compensated control voltage reference value vCabThereby achieving the output result approaching the actual line capacitance voltage value vCabAs can be seen from fig. 8A and 8B, the bottom graph of fig. 8A represents the state of no phase compensation, the phase error compensation value (Δ Φ)ab) Having a phase error compensation value of 0rad, in which case (see middle diagram) the phase error component P2_abWith a phase error of about 0.14rad, in which case (see above) the control voltage reference vCabDeviation from the actual value v of the line capacitance voltageCab. The bottom graph of FIG. 8B represents the phase error compensation value (Δ Φ) for the phase compensated stateab) Has a phase error compensation value of about 0.14rad, where (see middle diagram) the phase error component P2_abHas a phase error of 0rad, eliminates the original phase error, and controls the voltage reference value v (see the figure above) at the momentCabActual value v of line-proximate capacitance voltageCab. The simulation result without the phase control of the present disclosure has a phase error of about 0.14rad, while the phase error of the phase reference unit 7 of fig. 4 using the present disclosure is 0rad, and the proportional-integral controller (the second proportional-integral controller 22) of the present disclosure also generates a phase error compensation value of about 0.14rad, so that the output voltage phase is balanced. After the amplitude compensation of the amplitude reference value unit 5 in fig. 3 and the phase compensation of the phase reference value unit 7 in fig. 4 of the present disclosure, the control voltage reference value v is obtainedCabVery approaching lineActual value v of capacitor voltageCab。
FIG. 9A is a simulation result without using the amplitude control and phase control of the present disclosure, and with a switching frequency of 6.48kHz, the output voltage reference thereof
Figure BDA0001841797120000111
And
Figure BDA0001841797120000112
can be expressed as shown in equation (12) and equation (13):
Figure BDA0001841797120000113
Figure BDA0001841797120000114
FIG. 9B shows the simulation results of the amplitude control and phase control using the present disclosure, where the switching frequency is also 6.48kHz, and the control voltage reference values of the ab phase and bc phase thereof
Figure BDA0001841797120000115
And
Figure BDA0001841797120000116
can be expressed as shown in equation (14) and equation (15), respectively:
Figure BDA0001841797120000121
Figure BDA0001841797120000122
the simulation results shown in fig. 9A and 9B include comparison results of three-phase output voltages, currents, and voltage effective values, where vCabActual value of ab line capacitance voltage, vCbcIs the actual value of the capacitance voltage of the bc line, vCcaIs the actual value of the ca line capacitance voltage, iLaIs a load current of phase a, iLbLoad of phase bCurrent, iLcLoad current v of phase cCab_rmsIs the effective value of ab line capacitance voltage, vCbcIs the effective value of the bc line capacitance voltage, vCcaThe simulation of FIG. 9A is an unbalanced condition when the load of phase a is not connected and the disclosed amplitude and phase control mechanism is not used, when the output load current of phase a is 0A and the output voltage of three phases exceeds the target value 440V, where V is the effective value of the ca line capacitor voltageCab_rmsIs 440.3V, vCbc_rmsIs 447.7V, vCca_rms432.1V, the voltage unbalance of the output three phases is 1.8%, and the condition that the effective value of the output voltage of each phase has the voltage unbalance is about 8V; the simulation of FIG. 9B is an unbalanced condition when the load of phase a is not connected and the output voltages of the three phases are controlled to a target value of 440V using the disclosed amplitude and phase control mechanismCab_rms、vCbc_rms、vCca_rmsThe output voltage is 439.6V, the output three-phase voltage is unbalanced by 0.09%, and the effective value of the output voltage of each phase is balanced, so that the condition of the output voltage imbalance caused by the unbalanced load impedance matching is obviously improved by using the voltage balance control method and the voltage balance control device.
In summary, under the condition of considering the output load imbalance (for example, the output impedance mismatch is caused by the inductor manufacturing error of the output ac filter, the output voltage imbalance is caused by the output voltage drop difference, or the output impedance mismatch is caused when the single-phase load is converted into the three-phase load), the present disclosure provides the voltage balance control method and the device thereof applied to the three-phase dc-ac converter, that is, the reference value v for the output control voltageCabPerforming amplitude and phase compensation to obtain output result approaching the actual line capacitance voltage value vCabIn other words, the reference value adjuster of the present disclosure directly adjusts the original control command (reference value reference) and compares the original control command with the feedback value (feedback) to obtain a new control command (new reference value new reference), so as to adjust the controller, thereby achieving the voltage balance control of the output three phases not only when the output impedances are mismatched, but also improving the parameter adjustment error of the controller when the load is balanced, and further improving the performance of the controllerThe accuracy, the voltage balance control method and the voltage balance control device provided by the disclosure can be applied to various controllers, and the application range is quite wide.
The above-described embodiments are merely illustrative of the principles, features and effects of the present disclosure, and are not intended to limit the scope of the disclosure, which may be implemented, and modifications and variations can be made by one skilled in the art without departing from the spirit and scope of the present disclosure. Any equivalent changes and modifications made by the disclosure of the present disclosure should be covered by the claims. Therefore, the protection scope of the present disclosure should be as set forth in the claims.

Claims (12)

1. A voltage balance control method applied to a three-phase DC-AC converter is characterized by comprising the following steps:
multiplying the actual value of a line capacitor voltage by a sine function through a first multiplier to generate a first voltage;
extracting the DC part of the first voltage through a first filter to generate an error DC component;
subtracting the error DC component from a target voltage amplitude by a first subtracter to generate a second voltage;
adjusting the second voltage through a first proportional integral controller to generate an amplitude error compensation value; and
the amplitude error compensation value is added to the target voltage amplitude by an adder to generate an amplitude reference value.
2. The method of claim 1, wherein the first voltage comprises the error dc component and a 2-times angular frequency component.
3. The voltage balance control method of claim 1, further comprising:
the actual value of the line capacitance voltage is multiplied by a cosine function through a second multiplier to generate a third voltage.
4. The voltage balance control method according to claim 3, characterized by further comprising:
the phase part of the third voltage is extracted through a second filter to generate a phase error component.
5. The voltage balance control method according to claim 4, characterized by further comprising:
the phase error component is adjusted by a second proportional-integral controller to generate a phase error compensation value.
6. The voltage balance control method of claim 5, further comprising:
a phase error compensation value is calculated by subtracting a target voltage phase from the phase error compensation value through a second subtracter to generate a phase reference value.
7. The voltage balance control method of claim 6, further comprising:
the phase reference value is received by a sine wave generator to generate a sine wave value.
8. The voltage balance control method of claim 7, further comprising:
the amplitude reference value is multiplied by the sine wave value by a third multiplier to generate a control voltage reference value.
9. A voltage balance control device applied to a three-phase DC-AC converter is a chip or is provided with the chip, and is characterized by comprising:
a reference value adjuster for outputting a new reference value, wherein a feedback value is input to the reference value adjuster;
a subtraction device connected to the output end of the reference value regulator and subtracting the new reference value from the feedback value; and
a voltage regulator connected to the subtracting device,
wherein the reference value adjuster includes:
a first multiplier;
a first filter connected to the first multiplier;
a first subtractor connected to the first filter;
a first proportional integral controller connected to the first subtractor; and
an adder is connected to the first proportional integral controller.
10. The voltage balance control apparatus according to claim 9,
the first multiplier is used for outputting a first voltage, wherein the feedback value and a sine function are input into the first multiplier;
the first filter is used for extracting the direct current part of the first voltage and outputting an error direct current component;
the first subtracter is used for outputting a second voltage and subtracting a target voltage amplitude from the error direct current component;
the first proportional integral controller is used for outputting an amplitude error compensation value and adjusting the second voltage; and
the adder is used for outputting an amplitude reference value and adding the amplitude error compensation value and the target voltage amplitude.
11. The voltage balance control device of claim 10, wherein the reference value adjuster further comprises:
a second multiplier for outputting a third voltage, wherein the feedback value and a cosine function are input to the second multiplier;
a second filter connected to the second multiplier for extracting the phase portion of the third voltage and outputting a phase error component;
a second proportional-integral controller connected to the second filter for outputting a phase error compensation value and adjusting the phase error component;
a second subtracter connected to the second proportional-integral controller for outputting a phase reference value and subtracting a target voltage phase from the phase error compensation value; and
a sine wave generator connected to the second subtracter for outputting a sine wave value, wherein the phase reference value is inputted to the sine wave generator.
12. The voltage balance control device of claim 11, wherein the reference value adjuster further comprises:
a third multiplier for outputting the new reference value, wherein the amplitude reference value and the sine wave value are input to the third multiplier.
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