CN109712995B - Display panel and display device - Google Patents
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- CN109712995B CN109712995B CN201910094003.9A CN201910094003A CN109712995B CN 109712995 B CN109712995 B CN 109712995B CN 201910094003 A CN201910094003 A CN 201910094003A CN 109712995 B CN109712995 B CN 109712995B
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Abstract
The invention discloses a display panel and a display device, which relate to the technical field of display and comprise: the display device comprises a first display area, a second display area and a first non-display area, wherein the first non-display area is adjacent to the first display area along a first direction, the first display area and the second display area are arranged along a second direction, the first direction is intersected with the second direction, and the number of pixel units in a row in the first display area is less than that of pixel units in a row in the second display area along the first direction; the gate line is located on the first metal layer, the data line is located on the second metal layer, and the gate line and the data line are overlapped with each other, wherein a first capacitor is formed in an overlapped area between the gate line and the data line in the first display area, a second capacitor is formed in an overlapped area between the gate line and the data line in the second display area, and the capacitance value of the first capacitor is larger than that of the second capacitor. Therefore, the load difference between the first display area and the second display area is reduced, and the display brightness is more uniform.
Description
Technical Field
The present invention relates to the field of display technologies, and in particular, to a display panel and a display device.
Background
With the development of science and technology, the display device with the display panel has more and more extensive applications, so that the requirements of people on the display panel are more and more diversified, the requirements are not only met with the conventional performance indexes of the display panel, such as large size, high definition and the like, but also more diversified requirements are met on the appearance of the display panel, and the special-shaped display panel is formed.
The display panel breaks through the limitation of a single rectangular structure of the display panel, so that not only the display effect is more diversified, but also the application way of the display panel is more and more extensive, and the display panel is successfully applied to wearable electronic designs such as watches, glasses or intelligent bracelets. Compared with a conventional display screen, the special-shaped display screen is mainly different in that the display area of the special-shaped display screen is in a non-rectangular special shape. Generally, a plurality of sub-pixel units are arranged on the display panel, and when the display panel is in an irregular shape, for example, when the display panel includes an irregular edge, the number of the sub-pixel units corresponding to the irregular edge is different from the number of the sub-pixel units corresponding to the non-irregular edge, so that the load value of the irregular edge area is different from that of the non-irregular edge area, and the display panel has a non-uniform brightness phenomenon.
Disclosure of Invention
In view of this, the present invention provides a display panel and a display device, in which a capacitance value between a gate line and a data line in a first display region is increased to reduce a load difference between the first display region and a second display region, so as to reduce a luminance difference between the first display region and the second display region, and further improve luminance uniformity between the display panel and the display device.
In a first aspect, the present application provides a display panel comprising:
the display device comprises a first display area, a second display area and a first non-display area, wherein the first non-display area is adjacent to the first display area along a first direction, the first display area and the second display area are arranged along a second direction, the first direction is intersected with the second direction, and the number of pixel units in a row in the first display area is less than that of pixel units in a row in the second display area along the first direction;
a gate line on the first metal layer, and a data line on the second metal layer, the gate line and the data line overlapping each other,
in the first display area, a first capacitor is formed in an overlapped area between the gate line and the data line, in the second display area, a second capacitor is formed in an overlapped area between the gate line and the data line, and the capacitance value of the first capacitor is larger than that of the second capacitor.
In a second aspect, the present application further provides a display device, including a display panel, where the display panel is the display panel provided in the present application.
Compared with the prior art, the display panel and the display device provided by the invention at least realize the following beneficial effects:
in the display panel and the display device provided by the application, because the number of a row of pixel units in the first display area is less than that of a row of pixel units in the second display area, in order to reduce the load difference between the first display area and the second display area, the application designs the capacitance value of a first capacitor formed between a gate line and a data line in the first display area to be greater than the capacitance value of a second capacitor formed between the gate line and the data line in the second display area, so as to compensate the capacitance of the first display area, and reduce the load difference between the first display area and the second display area, thereby being beneficial to reducing the brightness difference between the first display area and the second display area, and further being beneficial to improving the display brightness uniformity of the display panel and the display device.
Of course, it is not necessary for any product in which the present invention is practiced to achieve all of the above-described technical effects simultaneously.
Other features of the present invention and advantages thereof will become apparent from the following detailed description of exemplary embodiments thereof, which proceeds with reference to the accompanying drawings.
Drawings
The accompanying drawings, which are incorporated in and constitute a part of this specification, illustrate embodiments of the invention and together with the description, serve to explain the principles of the invention.
FIG. 1 is a top view of a prior art display panel;
fig. 2 is a top view of a display panel according to an embodiment of the present disclosure;
FIG. 3 is an AA' cross-sectional view of the display panel of FIG. 2;
fig. 4 is a top view of another display panel provided in the embodiment of the present application;
FIG. 5 is a BB' cross-sectional view of the display panel provided in the embodiment of FIG. 2;
FIG. 6 is a cross-sectional view of another BB' of the display panel of the embodiment of FIG. 2;
fig. 7 is a top view of another display panel provided in the embodiment of the present application;
fig. 8 is a top view of another display panel provided in the embodiment of the present application;
fig. 9 is a top view of another display panel provided in the embodiment of the present application;
FIG. 10 is a cross-sectional view of a display panel of the embodiment of FIG. 9, taken along a line CC' thereof;
fig. 11 is a top view of another display panel provided in an embodiment of the present application;
fig. 12 is a top view of another display panel provided in the embodiment of the present application;
fig. 13 is a structural diagram of a display device according to an embodiment of the present application.
Detailed Description
Various exemplary embodiments of the present invention will now be described in detail with reference to the accompanying drawings. It should be noted that: the relative arrangement of the components and steps, the numerical expressions and numerical values set forth in these embodiments do not limit the scope of the present invention unless specifically stated otherwise.
The following description of at least one exemplary embodiment is merely illustrative in nature and is in no way intended to limit the invention, its application, or uses.
Techniques, methods, and apparatus known to those of ordinary skill in the relevant art may not be discussed in detail but are intended to be part of the specification where appropriate.
In all examples shown and discussed herein, any particular value should be construed as merely illustrative, and not limiting. Thus, other examples of the exemplary embodiments may have different values.
It should be noted that: like reference numbers and letters refer to like items in the following figures, and thus, once an item is defined in one figure, further discussion thereof is not required in subsequent figures.
Fig. 1 is a top view of a display panel 300 in the prior art, in which a display area 101 includes a recessed section 102 recessed toward the inside of the display area, a non-display area corresponding to the recessed section 102 forms a recessed frame area 103, the display area adjacent to the recessed frame area 103 along a first direction is a first display area 104, the number of pixel units in a row in the first display area 104 is less than that of pixel units in a row in a second display area 105, and a data line 107 corresponding to the pixel units in the area adjacent to the recessed frame area 103 along a second direction in the second display area 105 is led out from a control chip 106 and then wound to the corresponding area through the recessed frame area 103. The line segment of the data line 107 in the recessed frame region 103 is not overlapped with the gate line 108, so that the overlapping area between the gate line 108 and the data line 107 in the first display region 104 is reduced, and the formed capacitance value is smaller than the capacitance value formed between the gate line 108 and the data line 107 in the second display region 105, which causes a load difference between the first display region 104 and the second display region 105, and further causes a display brightness non-uniformity phenomenon between the first display region 104 and the second display region 105, thereby affecting the display effect of the display panel 300.
In view of this, the present invention provides a display panel and a display device, in which a capacitance value between a gate line and a data line in a first display region is increased to reduce a load difference between the first display region and a second display region, so as to reduce a luminance difference between the first display region and the second display region, and further improve luminance uniformity between the display panel and the display device.
The following detailed description is to be read in connection with the drawings and the detailed description.
Fig. 2 is a top view of a display panel provided in an embodiment of the present application, and fig. 3 is an AA' cross-sectional view of the display panel provided in the embodiment of fig. 2, please refer to fig. 2 and fig. 3, a display panel 100 provided in the present application includes:
the display device comprises a first display area 11, a second display area 12 and a first non-display area 21, wherein the first non-display area 21 is adjacent to the first display area 11 along a first direction, the first display area 11 and the second display area 12 are arranged along a second direction, the first direction is intersected with the second direction, and in the first direction, the number of pixel units 20 in one row in the first display area 11 is less than that of the pixel units 20 in one row in the second display area 12;
a gate line 31 and a data line 32, the gate line 31 being located in the first metal layer 41, the data line 32 being located in the second metal layer 42, the gate line 31 and the data line 32 overlapping each other, wherein,
in the first display area 11, a first capacitor is formed in an overlapping area between the gate line 31 and the data line 32, and a second capacitor is formed in an overlapping area between the gate line 31 and the data line 32 in the second display area 12, wherein a capacitance value of the first capacitor is greater than a capacitance value of the second capacitor.
It should be noted that fig. 2 only shows that the display panel 100 includes one first non-display area 21, and also only shows one shape of the first non-display area 21, in some other embodiments of the present application, two or more first non-display areas 21 may also be included, and the first non-display area 21 may also be embodied in other shapes, which is not specifically limited in this application. In addition, fig. 2 also only schematically illustrates the position of the first non-display area 21, which does not represent an actual size, and the first non-display area 21 may also be located at other positions of the display panel 100, for example, please refer to fig. 4, where fig. 4 shows another top view of the display panel 100 provided in the embodiment of the present application, and in the viewing angle shown in fig. 4, the first non-display area 21 is located at the lower left corner of the display panel 100. It should be noted that the pixel units 20, the gate lines 31 and the data lines 32 in the drawings of the present application are also only schematic illustrations and do not represent actual sizes or numbers.
Specifically, with reference to fig. 2, a plurality of gate lines 31 extending along a first direction and arranged along a second direction, and a plurality of data lines 32 extending along the second direction and arranged along the first direction are distributed in the first display area 11 and the second display area 12; referring to fig. 3, since the gate line 31 and the data line 32 are disposed on different film layers and overlap with each other, a first capacitor is formed in an overlapping area between the gate line 31 and the data line 32 in the first display area 11, and a second capacitor is formed in an overlapping area between the gate line 31 and the data line 32 in the second display area 12. In order to reduce the load difference between the first display area 11 and the second display area 12, the capacitance value of the first capacitor formed between the gate line 31 and the data line 32 in the first display area 11 is designed to be larger than the capacitance value of the second capacitor formed between the gate line 31 and the data line 32 in the second display area 12, so that the capacitance of the first display area 11 is compensated, the load difference between the first display area 11 and the second display area 12 is reduced, the brightness difference between the first display area 11 and the second display area 12 is favorably reduced, and the display brightness uniformity of the display panel 100 is favorably improved.
Optionally, referring to fig. 3, in the first display region 11, a first inorganic layer 51 is included between the gate line 31 and the data line 32; referring to fig. 5, in the second display area 12, a second inorganic layer 52 is included between the gate line 31 and the data line 32, wherein fig. 5 is a BB' cross-sectional view of the display panel 100 provided in the embodiment of fig. 2. In the display process, the gate line 31 is used for transmitting a scan signal to the pixel unit 20, and the data line 32 is used for transmitting a data signal to the pixel unit 20, and in order to avoid signal interference, the gate line 31 and the data line 32 are usually disposed on different film layers, i.e., disposed on the first metal layer 41 and the second metal layer 42, respectively, and are separated by an inorganic layer.
Optionally, the thickness D1 of the first inorganic layer 51 is less than the thickness D2 of the second inorganic layer 52. Specifically, referring to fig. 2, 3 and 5, in the first display area 11, the thickness D1 of the first inorganic layer 51 between the gate line 31 and the data line 32 is smaller than the thickness D2 of the second inorganic layer 52 between the gate line 31 and the data line 32 in the second display area 12, so that, in a direction perpendicular to the plane of the first inorganic layer 51, the distance between the gate line 31 and the data line 32 in the first display area 11 is smaller, and considering that C ∈ S/4 π kd, ∈ is a dielectric constant, and k represents an electrostatic force constant, when the widths of the gate line 31 and the data line 32 in the first display area 11 and the second display area 12 are kept constant, the smaller the vertical distance between the gate line 31 and the data line 32 is, and the larger the capacitance value formed by the overlapping area of the gate line 31 and the data line 32 is. Therefore, when the thickness D1 of the first inorganic layer 51 is designed to be smaller than the thickness D2 of the second inorganic layer 52, such that the vertical distance between the gate line 31 and the data line 32 in the first display region 11 is smaller than the vertical distance between the gate line 31 and the data line 32 in the second display region 12, and such that the first capacitance formed by the region where the gate line 31 and the data line 32 overlap in the first display region 11 is larger than the second capacitance formed by the region where the gate line 31 and the data line 32 overlap in the second display region 12, the embodiment compensates the capacitance of the first display region 11 by adjusting the thickness of the inorganic layer between the gate line 31 and the data line 32 to reduce the luminance difference between the first display region 11 and the second display region 12, and has a simple manufacturing process and strong feasibility.
Alternatively, referring to fig. 3, the first inorganic layer 51 includes an inorganic layer; referring to fig. 6, the second inorganic layer 52 includes two inorganic layers sequentially disposed from the first metal layer 41 toward the second metal layer 42, and the first inorganic layer 51 and the inorganic layer of the second inorganic layer 52 adjacent to the first metal layer 41 are disposed at the same layer, wherein fig. 6 is another BB' cross-sectional view of the display panel 100 provided in the embodiment of fig. 2.
Specifically, referring to fig. 3 and fig. 6, in the second display area 12, two inorganic layers are disposed between the first metal layer 41 and the second metal layer 42, including a second inorganic layer 521 disposed adjacent to the first metal layer 41 and a second inorganic layer 522 disposed adjacent to the second metal layer 42; the first inorganic layer 51 in the first display region 11 is disposed in the same layer as the second inorganic layer 521. In this way, in the manufacturing process of the display panel 100, after the first metal layer 41 is manufactured, an inorganic layer may be formed on the side of the first metal layer 41 facing the second metal layer 42, where the inorganic layer is located in the first display area 11 as the first inorganic layer 51, and located in the second display area 12 as the second inorganic layer 521, and then a second inorganic layer 522 is formed in the second display area 12; in this way, only one inorganic layer is disposed in the first display area 11, and two inorganic layers are disposed in the second display area 12, so that the thickness of the first inorganic layer 51 in the first display area 11 is smaller than the thickness of the second inorganic layer 52 in the second display area 12, and thus a first capacitance formed in a region where the gate line 31 and the data line 32 overlap in the first display area 11 is greater than a second capacitance formed in a region where the gate line 31 and the data line 32 overlap in the second display area 12, which is beneficial to reducing a load difference between the first display area 11 and the second display area 12 and improving uniformity of display brightness of the display panel 100. In addition, in this embodiment, when the first inorganic layer 51 and the second inorganic layer 521 are located on the same film layer, the two layers can be manufactured in the same process, which is beneficial to saving the production flow and improving the production efficiency of the display panel 100.
Optionally, with continued reference to fig. 6, the dielectric constant of the inorganic layer far away from the first metal layer 41 in the second inorganic layer 52 is smaller than the dielectric constant of the inorganic layer near the first metal layer 41. That is, in the embodiment shown in fig. 6, the dielectric constant of the second inorganic layer 521 is greater than that of the second inorganic layer 522, and since the first inorganic layer 51 and the second inorganic layer 521 are disposed in the same layer, when the dielectric constant of the second inorganic layer 521 is greater than that of the second inorganic layer 522, the dielectric constant of the first inorganic layer 51 is also greater, so that when the dielectric constant of the first inorganic layer 51 is increased while the thickness of the first inorganic layer 51 is designed to be smaller than that of the second inorganic layer 52, the capacitance of the overlapping region between the gate line 31 and the data line 32 in the first display region 11 is further increased, which is beneficial to further compensate for the load of the first display region 11, thereby further reducing the display luminance difference between the first display region 11 and the second display region 12, and improving the display uniformity of the display panel 100.
Alternatively, referring to fig. 3 and 5, the first inorganic layer 51 and the second inorganic layer 52 are made of the same material. Specifically, when the base-free layer between the first metal layer 41 and the second metal layer 42 of the first display area 11 and between the first metal layer 41 and the second metal layer 42 of the second display area 12 include only one layer, the first inorganic layer 51 and the second inorganic layer 52 may be made of the same material, and in the actual manufacturing process, an inorganic layer may be manufactured on the side of the first metal layer 41 facing the second metal layer 42 to cover the first display area 11 and the second display area 12, and then the inorganic layer in the first display area 11 is etched to form the first inorganic layer 51, so that the thickness of the first inorganic layer 51 is smaller than the thickness of the second inorganic layer 52 in the second display area 12. In this way, only one inorganic layer needs to be formed between the first metal layer 41 and the second metal layer 42, which is beneficial to saving production processes and improving the production efficiency of the display panel 100.
Alternatively, in the display panel 100 provided in the embodiment of the present application, in addition to designing the thickness of the first inorganic layer 51 to be smaller than that of the second inorganic layer 52, the dielectric constant may be used to increase the load of the first display region 11, for example, the dielectric constant of the first inorganic layer 51 is designed to be larger than that of the second inorganic layer 52.
Considering that C ═ S/4 π kd, when the vertical distance between the first metal layer 41 and the second metal layer 42 in the first display region 11 is less than or equal to the vertical distance between the first metal layer 41 and the second metal layer 42 in the second display region 12, and the dielectric constant of the first inorganic layer 51 is designed to be greater than the dielectric constant of the second inorganic layer 52, it is beneficial to increase the value of the first voltage at the overlapping region of the gate line 31 and the data line 32 in the first display region 11 to be greater than the value of the second voltage at the overlapping region of the gate line 31 and the data line 32 in the second display region 12, thereby being beneficial to reduce the load difference between the first display region 11 and the second display region 12 and further being beneficial to improve the display luminance uniformity of the display panel 100.
Alternatively, fig. 7 is a top view of the display panel 100 provided in the embodiment of the present application, in which the gate line 31 has a width in the first display area 11 that is greater than a width in the second display area 12, and the data line 32 has a width in the first display area 11 that is greater than a width in the second display area 12.
Specifically, referring to fig. 7, the width of the gate line 31 in the first display region 11 is greater than the width of the gate line 31 in the second display region 12, and the width of the data line 32 in the first display region 11 is greater than the width of the data line in the second display region 12, so that the overlapping area of the gate line 31 and the data line 32 in the first display region 11 is increased by increasing the widths of the gate line 31 and the data line 32 in the first display region 11, and is greater than the overlapping area between the gate line 31 and the data line 32 in the second display region 12, so that the first capacitance value formed by the overlapping area between the gate line 31 and the data line 32 in the first display region 11 is greater than the second capacitance value formed by the overlapping area between the gate line 31 and the data line 32 in the second display region 12, thereby compensating the capacitance of the first display region 11, so as to reduce the load difference between the first display area 11 and the second display area 12, and further reduce the display brightness difference between the first display area 11 and the second display area 12, thereby being beneficial to improving the display brightness uniformity of the display panel 100 and also being beneficial to improving the display effect of the display panel 100.
Optionally, fig. 8 is a top view of the display panel 100 provided in this embodiment of the application, a width of a region of the gate line 31 overlapping with the data line 32 in the first display area 11 is greater than widths of other regions, and a width of a region of the data line 32 overlapping with the gate line 31 in the first display area 11 is greater than widths of other regions.
Specifically, with reference to fig. 8, in the first display area 11, the width of the portion of the gate line 31 overlapping the data line 32 is increased, and the width of the portion of the data line 32 overlapping the gate line 31 is increased, and since the voltage value can be generated in the overlapping area, the present application can increase the value of the first capacitor formed in the overlapping area of the gate line 31 and the data line 32 in the first display area 11 only by increasing the widths of the gate line 31 and the data line 32 in the overlapping area, and is also beneficial to saving the production materials of the gate line 31 and the data line 32 and reducing the production cost.
Alternatively, fig. 9 is another top view of the display panel 100 provided in the embodiment of the present application, fig. 10 is a cross-sectional view of a CC' of the display panel 100 provided in the embodiment of fig. 9, a compensation line 33 is further included between the gate line 31 and the data line 32, the compensation line 33 is located on the third metal layer 43 between the first metal layer 41 and the second metal layer 42, a fixed potential is applied to the compensation line 33, and the compensation line 33 overlaps the gate line 31 or the data line 32 in a direction perpendicular to the surface of the display panel 100.
Specifically, in order to embody the position of the compensation line 33, the compensation line 33 is introduced in fig. 9, and actually when the compensation line 33 overlaps the gate line 31, only the gate line 31 can be seen and the compensation line 33 cannot be seen in the viewing angle shown in fig. 9, so fig. 9 is only a schematic illustration. Referring to fig. 10, in the present application, a third metal layer 43 is introduced between a first metal layer 41 and a second metal layer 42, and a compensation line 33 is disposed on the third metal layer 43, the compensation line 33 overlaps with a gate line 31 in a direction perpendicular to the surface of the display panel 100, and since the compensation line 33 receives a fixed potential, a capacitance value is formed between the compensation line 33 and the gate line 31, which is equivalent to a capacitance value of a first capacitor formed in an overlapping area of the gate line 31 and the data line 32 of the first display region 11, and a new capacitor is connected in parallel, so that the capacitance value of the first capacitor formed between the gate line 31 and the data line 32 of the first display region 11 is greater than the capacitance value of a second capacitor formed between the gate line 31 and the data line 32 of the second display region 12, thereby compensating the capacitance of the first display region 11, and reducing a load difference between the first display region 11 and the second display region 12, the brightness difference between the first display area 11 and the second display area 12 is reduced, which is favorable for improving the display brightness uniformity of the display panel 100.
It should be noted that, in the embodiments shown in fig. 9 and 10, the compensation line 33 and the gate line 31 are overlapped in a direction perpendicular to the surface of the display panel 100, and a capacitor is formed therebetween, in some other embodiments of the present application, the compensation line 33 may also be overlapped with the data line 32 in a direction perpendicular to the surface of the display panel 100, and a capacitor is formed therebetween, which can also compensate the load of the first display area 11, and is not described herein again.
Optionally, referring to fig. 9, in the above embodiments provided in the present application, the gate line 31 extends along a first direction, and the data line 32 extends along a second direction.
Optionally, in some other embodiments of the present application, for example, referring to fig. 9, the gate line 31 extends along the second direction, and the data line 32 extends along the first direction, which is not particularly limited in this application, where fig. 11 is another top view of the display panel 100 provided in the embodiments of the present application.
Alternatively, fig. 12 is another top view of the display panel 100 provided in the embodiment of the present application, please refer to fig. 12, in which the display panel 100 includes a reference signal line 91 and a power signal line 92, the reference signal line 91 is parallel to the gate line 31, and the power signal line 92 is parallel to the data line 32;
the capacitance value of the area overlapped between the gate line 31 and the power signal line 92 in the first display area 11 is larger than that in the second display area 12; and/or the presence of a gas in the gas,
the area of overlap between the reference signal line 91 and the data line 32 has a larger capacitance value in the first display area 11 than in the second display area 12.
Specifically, referring to fig. 12, the display panel 100 provided by the present application further includes a reference signal line 91 parallel to the gate line 31 and a power signal line 92 parallel to the data line 32, wherein the power signal line 92 overlaps the gate line 31, and an overlapping area of the two forms a capacitance; the reference signal line 91 overlaps the data line 32, and the overlapping area forms a capacitance value. In the present application, when the capacitance value of the overlapping area between the gate line 31 and the power signal line 92 in the first display area 11 is designed to be larger than that in the second display area 12, or the capacitance value of the overlapping area between the reference signal line 91 and the data line 32 in the first display area 11 is designed to be larger than that in the second display area 12, the load of the first display area 11 can be further increased, and the load difference between the first display area 11 and the second display area 12 is reduced, so that the uniformity of the display brightness of the display panel 100 is also improved.
It should be noted that fig. 12 schematically shows only a few reference signal lines and power supply signal lines, and does not represent an actual number.
Based on the same inventive concept, the present application further provides a display device, please refer to fig. 13, fig. 13 is a structural diagram of the display device according to the embodiment of the present application, and the display device 200 includes a display panel 100, which is the display panel 100 according to any of the embodiments of the present application. It should be noted that, for the embodiments of the display device 200 provided in the embodiments of the present application, reference may be made to the embodiments of the display panel described above, and repeated descriptions are omitted. The display device provided by the application can be: any product or component with a display function, such as a mobile phone, a tablet computer, a television, a display, a notebook computer, a digital photo frame, a navigator and the like.
Optionally, referring to fig. 13, a camera, a face recognition device 201 or an iris recognition device is disposed in an area corresponding to the first non-display area 21. The invention reserves the area for installing the device 201 of camera, face recognition or iris recognition in the display device 200, meets the requirement of consumers on the display device 200 in social development, and is also beneficial to improving the practicability of the display device 200. In addition, set up the depressed area that corresponds at first non-display area 201 with camera, face identification or iris discernment's device 201, still be favorable to realizing the display effect of full screen, be favorable to display device 200's high integration.
As can be seen from the above embodiments, the display panel and the display device provided by the present invention at least achieve the following advantages:
in the display panel and the display device provided by the application, because the number of a row of pixel units in the first display area is less than that of a row of pixel units in the second display area, in order to reduce the load difference between the first display area and the second display area, the application designs the capacitance value of a first capacitor formed between a gate line and a data line in the first display area to be greater than the capacitance value of a second capacitor formed between the gate line and the data line in the second display area, so as to compensate the capacitance of the first display area, and reduce the load difference between the first display area and the second display area, thereby being beneficial to reducing the brightness difference between the first display area and the second display area, and further being beneficial to improving the display brightness uniformity of the display panel and the display device.
Although some specific embodiments of the present invention have been described in detail by way of examples, it should be understood by those skilled in the art that the above examples are for illustrative purposes only and are not intended to limit the scope of the present invention. It will be appreciated by those skilled in the art that modifications may be made to the above embodiments without departing from the scope and spirit of the invention. The scope of the invention is defined by the appended claims.
Claims (12)
1. A display panel, comprising:
the display device comprises a first display area, a second display area and a first non-display area, wherein the first non-display area is adjacent to the first display area along a first direction, the first display area and the second display area are arranged along a second direction, the first direction is intersected with the second direction, and the number of pixel units in a row in the first display area is less than that of pixel units in a row in the second display area along the first direction;
a gate line on the first metal layer, and a data line on the second metal layer, the gate line and the data line overlapping each other,
in the first display area, a first capacitor is formed in an overlapped area between the gate line and the data line, and in the second display area, a second capacitor is formed in an overlapped area between the gate line and the data line, and the capacitance value of the first capacitor is larger than that of the second capacitor;
a first inorganic layer is arranged between the gate line and the data line in the first display area, a second inorganic layer is arranged between the gate line and the data line in the second display area, and the thickness of the first inorganic layer is smaller than that of the second inorganic layer; the first inorganic layer comprises an inorganic layer, the second inorganic layer comprises two inorganic layers which are sequentially arranged from the first metal layer to the second metal layer, and the inorganic layer close to the first metal layer in the first inorganic layer and the second inorganic layer is arranged on the same layer.
2. The display panel according to claim 1, wherein a dielectric constant of an inorganic layer of the second inorganic layers which is farther from the first metal layer is smaller than a dielectric constant of an inorganic layer which is closer to the first metal layer.
3. The display panel according to claim 1, wherein the first inorganic layer and the second inorganic layer are made of the same material.
4. The display panel according to claim 1, wherein a dielectric constant of the first inorganic layer is larger than a dielectric constant of the second inorganic layer.
5. The display panel according to claim 1, wherein the gate lines have a width in the first display region larger than a width in the second display region, and the data lines have a width in the first display region larger than a width in the second display region.
6. The display panel according to claim 1, wherein a width of a region of the gate line overlapping the data line in the first display region is greater than widths of other regions, and wherein a width of a region of the data line overlapping the gate line in the first display region is greater than widths of other regions.
7. The display panel of claim 1, further comprising a compensation line between the gate line and the data line, the compensation line being located in a third metal layer between the first metal layer and the second metal layer, the compensation line having a fixed potential applied thereto, and the compensation line overlapping the gate line or the data line in a direction perpendicular to the surface of the display panel.
8. The display panel according to claim 1, wherein the gate lines extend in the first direction, and the data lines extend in a second direction.
9. The display panel according to claim 1, wherein the gate lines extend in the second direction, and the data lines extend in the first direction.
10. The display panel according to claim 1, wherein the display panel includes a reference signal line parallel to the gate line and a power supply signal line parallel to the data line;
a capacitance value of an area overlapped between the gate line and the power supply signal line in the first display area is larger than that in the second display area; and/or the presence of a gas in the gas,
the capacitance value of the area overlapped between the reference signal line and the data line in the first display area is larger than that in the second display area.
11. A display device characterized by comprising the display panel according to any one of claims 1 to 10.
12. The display device according to claim 11, wherein the area corresponding to the first non-display area is provided with a camera, a face recognition device or an iris recognition device.
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| CN109698226A (en) * | 2019-02-28 | 2019-04-30 | 上海天马有机发光显示技术有限公司 | A kind of display panel and display device |
| CN110827673A (en) * | 2019-11-26 | 2020-02-21 | 京东方科技集团股份有限公司 | Display substrate and display device |
| KR20210085377A (en) * | 2019-12-30 | 2021-07-08 | 엘지디스플레이 주식회사 | Display device |
| CN111477672B (en) * | 2020-05-20 | 2022-12-09 | 京东方科技集团股份有限公司 | Display substrate, preparation method thereof, display panel and display device |
| CN113096550B (en) * | 2021-04-08 | 2023-01-03 | Oppo广东移动通信有限公司 | Display module assembly and display device |
| CN115171550B (en) * | 2022-06-30 | 2023-11-21 | 厦门天马微电子有限公司 | Display panel and display device |
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