CN109672507A - The detection method and system of the bit error rate in a kind of network - Google Patents
The detection method and system of the bit error rate in a kind of network Download PDFInfo
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- CN109672507A CN109672507A CN201910009450.XA CN201910009450A CN109672507A CN 109672507 A CN109672507 A CN 109672507A CN 201910009450 A CN201910009450 A CN 201910009450A CN 109672507 A CN109672507 A CN 109672507A
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- bit error
- error rate
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L1/00—Arrangements for detecting or preventing errors in the information received
- H04L1/20—Arrangements for detecting or preventing errors in the information received using signal quality detector
- H04L1/203—Details of error rate determination, e.g. BER, FER or WER
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L1/00—Arrangements for detecting or preventing errors in the information received
- H04L1/0001—Systems modifying transmission characteristics according to link quality, e.g. power backoff
- H04L1/0009—Systems modifying transmission characteristics according to link quality, e.g. power backoff by adapting the channel coding
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L1/00—Arrangements for detecting or preventing errors in the information received
- H04L1/004—Arrangements for detecting or preventing errors in the information received by using forward error control
- H04L1/0056—Systems characterized by the type of code used
- H04L1/0061—Error detection codes
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L43/00—Arrangements for monitoring or testing data switching networks
- H04L43/08—Monitoring or testing based on specific metrics, e.g. QoS, energy consumption or environmental parameters
- H04L43/0823—Errors, e.g. transmission errors
Abstract
The detection method and system of the bit error rate in a kind of network, it is related to bit error rate detection field, system includes encoding decision unit, the first counter, the second counter and CPU, the receiving direction of interface circuit in the line, the physical layer coded data block number of encoding decision unit detection mistake, it is counted by the first counter, in conjunction with the physical layer coded data block sum that receives of interface circuit of the second counters count, the bit error rate is calculated by CPU.There are data transmission or free time that can detect the bit error rate in the present invention either route, and greatly shortens the detection time under low flow state, and improve the detection accuracy of the bit error rate.
Description
Technical field
The detection method of the bit error rate and it is the present invention relates to bit error rate detection field, in particular to a kind of network
System.
Background technique
With the development of mobile internet, the network size of operator is increasingly come, requirement of the user to network reliability
Also higher and higher.The long-time service of communication equipment and optical cable, will necessarily gradually aging, mentioned so as to cause the bit error rate in network
It is high.The bit error rate in route is accurately measured therefore, it is necessary to adopt an effective measure, is not yet interrupted in signal but
Triggering alarm or pretection switch when deteriorating, and then take further measures, guarantee the stability of network.
In common PTN ((Packet Transport Network, Packet Transport Network), IPRAN (IP Radio
Access Network, wireless access network IPization) in network, generally assessed in network by the way of packet loss rate measurement
The data packet received is recalculated CRC (Cyclic Redundancy Check, cyclic redundancy check) by the bit error rate
Value, and compared with cyclic redundancy check code subsidiary behind data packet, think in data packet if verification does not pass through
There is error code, by counting for a long time, the bit error rate in route is calculated.But the bit error rate detection based on packet loss is wanted
Ask has biggish data traffic in itself in route, when data traffic is lower in route, detection accuracy is greatly lowered.
In traditional bit error rate detection method, the Ethernet coating local device that remote equipment is sent enters after receiving to be handed over
Chip is changed, exchange chip recalculates CRC value to the Ethernet packet received, and carries out with the subsidiary crc value of the Ethernet packet
Comparison determines that the Ethernet packet is wrong packet, wrong package counting facility adds if the crc value calculated is different from subsidiary crc value is wrapped
One, and record wrong packet length.Then the bit error rate (bit error rate, BER) is calculated according to the following formula:
BER=Bitcrc/Bittotal
Wherein, BitcrcIndicate the data bits of crc error, BittotalIndicate the total data digit received.BER index
It is related with the random noise of system and shake, generate the bit of mistake be it is random, may burst may also be random go out
It is existing, can not accurately it expect.Therefore the BER of accurate measuring system needs the time of endless.
In the limited time, measurement BER index in section can only be firmly believed in certain.The bit error rate is BER in a network
When, averagely needing to transmit 1/BER data just will appear 1 error code.For example, it is assumed that the bit error rate is 10 in network-12, then average
It needs to transmit 1012The data of bit will appear 1bit error code.In the case where network flow is 100Mbps, at least need to count
Duration 1012/100*1061 error code could occur in=10000s, obtain error rate data with this.But since error code occurs
Randomness, the accurate bit error rate could be obtained by needing to count on multiple error code in engineer application, it is therefore desirable to statistics when
There is the duration of 1bit error code in the case of being greater than the bit error rate in length.By taking the Ethernet interface of 1000M rate as an example, in different nets
The average time such as table 1 of 1bit are detected under network flow:
Table 1
By table 1, it is not difficult to find out that, the defect of existing method is in the lower situation of network flow, takes a long time
Measurement could obtain more accurately bit error rate precision.
Summary of the invention
In view of the deficiencies in the prior art, the present invention provides the detection method and system of the bit error rate in a kind of network,
The bit error rate is detected independent of network flow, and can be improved the detection accuracy of the bit error rate.
To achieve the above objectives, on the one hand, take a kind of detection method of the bit error rate in network, comprising: connect in the line
The receiving direction of mouth circuit, detects the physical layer coded data block number of mistake, the physical layer coding received in conjunction with interface circuit
Data block total number calculates the bit error rate.
Preferably, in the route, no matter whether network is idle, there is the transmission of physical layer encoded signal always.
Preferably, when physical layer coding meets the corresponding coding rule of interface rate in interface circuit, physical layer coding
Data block is detected as correctly.
Preferably, the Ethernet for being 10M and 100M for interface rate, physical layer use 4B/5B coding rule.
Preferably, the Ethernet for being 1000M for interface rate, physical layer use 8B/10B coding rule.
It preferably, is the Ethernet of 10G, 25G, 40G, 50 and 100G for interface rate, physical layer uses 64B/
66B coding rule.
Preferably, the 64B/66B coding rule includes the lead code of 2bit, when lead code is 00 or 11, illustrates object
Manage layer code error.
On the other hand, the detection system for taking the bit error rate in a kind of network, is set in local device, comprising:
Encoding decision unit is set to interface circuit, and the physical layer for detecting interface circuit data receiver direction is compiled
Whether code data block is correct；
First counter, is set to interface circuit, the physical layer for the mistake for being used to detect encoding decision unit
Coded data block count；
Second counter, is set to interface circuit, is used for the physical layer coded data block that interface circuit receives
It counts；
CPU is used for the counting according to the first counter and the second counter, calculates the bit error rate.
Preferably, the cpu cycle property extracts the data in the first counter and the second counter, and first meter
Number device and the second counter are not in counter overflow in one cycle.
Preferably, the encoding decision unit, the first counter and the second counter are set in exchange chip, described
Exchange chip further include:
Cyclic redundancy check module, for realizing the generation and verification of the cyclic redundancy check code of Ethernet data bag；
Package counting facility, for realizing different length, the counting respectively of different types of Ethernet data bag；
Data processing module is used to complete the parsing, encapsulation or forwarding of Ethernet data bag.
Any one technical solution in above-mentioned technical proposal all has following advantage or the utility model has the advantages that due to Ethernet
Either be in busy or idle state, there is physical layer encoded signal transmitting always in route, thus guarantee receiving end with
Transmitting terminal is always maintained at connected state.Therefore the receiving direction of interface circuit in the line encodes all physical layers received
The physical layer coded data block number of data block number and mistake counts respectively, and calculates the bit error rate with this, to realize not
The bit error rate dependent on network flow monitors, and either has data transmission or free time that can detect the bit error rate in route, and
And greatly shorten the detection time under low flow state.
The service traffics detection bit error rate is not depended on, the detection accuracy of the bit error rate can be increased substantially, can also subtracted
Detection and reaction time when small Signal Degrade, in the early detection failure of Signal Degrade, when optical cable is damaged or gradually old
When change, Signal Degrade can be reported to alert automatically by CPU, and can trigger protection switch, substantially increase the stalwartness of network
Property and maintainability.
Detailed description of the invention
Fig. 1 is the detection method flow chart of the bit error rate in first embodiment of the invention network；
Fig. 2 is the detecting system schematic diagram of the bit error rate in sixth embodiment of the invention network.
Appended drawing reference:
CPU 1, optical module 2, exchange chip 3, data processing module 31, cyclic redundancy check module 32, package counting facility
33, interface circuit 34, encoding decision unit 340, the first counter 341, the second counter 342.
Specific embodiment
Invention is further described in detail with reference to the accompanying drawings and embodiments.
First embodiment
The detection method of the bit error rate in the present embodiment network, for detecting in network, between local device and remote equipment
The bit error rate on route, as shown in Figure 1, specifically comprising the following steps:
S101. the receiving direction of interface circuit in the line, the physical layer coded data block number that interface circuit receives
It is counted；Meanwhile the physical layer coded data that each is received is detected, the physical layer coded data of misregistration
The number of block.
S102. according to the two of record groups of numbers, the bit error rate in route is calculated.
In above-mentioned steps, preferably Ethernet, no matter network be in busy or idle state, route always
There is physical layer encoded signal transmitting, to guarantee that receiving end and transmitting terminal are always maintained at connected state.
In step S101, the legitimacy of data is received by detection interface circuit to detect physical layer coded data block and be
No correct, when physical layer coding meets the corresponding coding rule of interface rate in interface circuit, physical layer code detection is positive
Really, that is, detect legal, corresponding physical layer coded data block is correct；Otherwise, it is considered as physical layer coded data block mistake,
There is error code.
In step 102, by periodical calculating, the bit error rate in each period is obtained, calculating cycle can be according to reality
Situation is configured.
Second embodiment
On the basis of first embodiment, in the present embodiment, the Ethernet for being 10M and 100M for interface rate, object
It manages layer and uses 4B/5B coding rule, 4B/5B coding schedule is as shown in table 2.
Table 2
| Hexadecimal number | 4 bits | 4B/5B coding |
| 0 | 0000 | 11110 |
| 1 | 0001 | 01001 |
| 2 | 0010 | 10100 |
| 3 | 0011 | 10101 |
| 4 | 0100 | 01010 |
| 5 | 0101 | 01011 |
| 6 | 0110 | 01110 |
| 7 | 0111 | 01111 |
| 8 | 1000 | 10010 |
| 9 | 1001 | 10011 |
| A | 1010 | 10110 |
| B | 1011 | 10111 |
| C | 1100 | 11010 |
| D | 1101 | 11011 |
| E | 1110 | 11100 |
| F | 1111 | 11101 |
It can find when the data that receiving end receives are 01110 according to 4B/5B coding schedule, then judge in table 2
For legal encodings.
When the data that receiving end receives be 00001 when, in table 2 search less than, illustrate the physical layer coding use not
It is 4B/5B coding rule, which is judged as error code, needs to count the physical layer coded data block of error code.
3rd embodiment
On the basis of first embodiment, in the present embodiment, the Ethernet for being 1000M for interface rate, physical layer
Using 8B/10B coding rule.
8B/10B coding is that one group of continuous 8 data is resolved into two groups of data, one group 3, one group 5, and by compiling
One group 4 codes and one group 6 codes are respectively become after code, so that the data of composition one group 10 are sent.Data
What value can be unified is expressed as DX.Y or KX.Y, and wherein D is expressed as data code, and K is expressed as special command code.X table
Show that low 5 EDCBA of the initial data of input, Y indicate high 3 HGF of the initial data of input.
For 8bit data, its position sequence in table is HGFEDCBA, i.e. H is highest order, and A is lowest order, such as 3 institute of table
Show, EDCBA is encoded to abcdei by 5B/6B；As shown in table 4, HGF is encoded to fghj by 3B/4B.Transmit 10bit coding
Sequence be abcdeifghj.
Table 3
Table 4
It is essentially identical with the judgment mode of second embodiment, if the data fit 8B/10B coding rule that receiving end receives
Then, then it is judged as legal encodings, physical layer coded data block is correct；That otherwise illustrate physical layer coding use is not 8B/
10B coding rule, the data are judged as error code, need to count the physical layer coded data block of error code.
Fourth embodiment
It is the Ethernet of 10G, 25G, 40G, 50 and 100G for interface rate in the present embodiment based on first embodiment
Network, physical layer use 64B/66B coding rule.
Compared with 8B/10B and 4B/5B, the judgement of 64B/66B coding rule difference.64b/66b coding is 10,000,000,000
The key component of Ethernet PCS (Physical Coding Sublayer, Physical Coding Sublayer).It is not really to compile
Code, but it is a kind of based on scrambling code mechanism code encoding/decoding mode.This coding mode is the standard code for the 10G communication that IEEE recommends
Mode.64B/66B coding transmits 64bit data or control information coding at 66bit block.2bit is leading before 66bit block
Code, the alignment of data for being mainly used for receiving end are synchronous with reception data bit stream.Lead code has two kinds of " 01 " and " 10 ", currently
When leading code is " 01 ", 64bit is entirely data after 66bit block；When lead code is " 10 ", 64bit is data after 66bit block
With control information mixing, next to middle lead code 8bit be information type, subsequent 56bit be control information or
The mixing of data or both.Therefore, when lead code is " 00 " or " 11 ", illustrate the lead code for having received mistake, Jin Erbiao
The physical layer code error of bright data needs to count the physical layer coded data block of error code.
5th embodiment
On the basis of the above embodiments, the detection system of the bit error rate in network is provided in the present embodiment, is set to local
In equipment, for detecting the bit error rate between local device and remote equipment on route.
As shown in Fig. 2, the system comprises encoding decision unit 340, the first counter 341,342 and of the second counter
CPU 1.Wherein, encoding decision unit 340, the first counter 341 and the second counter 342 are set to the interface of exchange chip 3
In circuit 34, encoding decision unit 340 be used for detect 34 receiving direction data of interface circuit physical layer coded data block whether
Correctly；First counter 341 is for counting the erroneous physical layer coded data block that encoding decision unit 340 detects；
The physical layer coded data block count that second counter, 342 interface circuit 34 receives often receives a physical layer coding
Data block just adds 1.CPU 1 is set to outside exchange chip 3, based on according to the first counter 341 and the second counter 342
Number calculates the bit error rate.
Preferably, encoding decision unit carry out physical layer coded data block detection when, for interface rate be 10M and
The Ethernet of 100M is detected according to 4B/5B coding rule；The Ethernet for being 1000M for interface rate, according to
8B/10B coding rule is detected；It is the Ethernet of 10G, 25G, 40G, 50 and 100G for interface rate, according to 64B/
66B coding rule.If it find that the coding rule and interface rate of physical layer coding mismatch, then it is assumed that the data are to miss
Code, corresponding physical layer coded data block mistake, the first counter 341 and the second counter 342 add 1 respectively.
The structure interface of 4B/5B or 8B/10B coding rule is used for physical layer:
The bit error rate=Bitcrc/Bittotal≈ (the counting of the first counter 341/(the counting * physics of the second counter 342
Layer coded data block size)) * 100%；
Wherein, physical layer coded data block size indicates the data bits of single physical layer coding.If interface uses
4B/5B coding, it is 5 that physical layer coded data block size, which corresponds to value,；If interface is encoded using 8B/10B, physical layer coding
It is 10 that data block size, which corresponds to value,.
The structure interface of 64B/66B coding rule is used for physical layer:
The bit error rate=Bitcrc/Bittotal≈ (counting of the first counter 341/(the counting * 2 of the second counter 342)) *
100%.
Preferably, the counting of CPU 1 periodically the first counter 341 and the second counter 342,341 He of the first counter
Second counter 342 has certain width, guarantees at least in a cycle of CPU 1, is not in counter overflow.
CPU 1 completes the calculating of the bit error rate, and the movement such as complete alarm report and pretection switch, in the interface communication of local device
It is disconnected that CPU will also complete the clearing of the first counter 341 and the second counter 342 when restoring again, in order to avoid there is the bit error rate
The case where virtual height.
Sixth embodiment
On the basis of five embodiments, as shown in Fig. 2, being the application schematic diagram of sixth embodiment.Local device includes
CPU 1, optical module 2 and exchange chip 3, after the optical module 2 for the Ethernet data coating local device that remote equipment is sent receives
It is converted into electric signal, into exchange chip 3.Exchange chip 3 include data processing module 31, cyclic redundancy check module 32,
Package counting facility 33 and interface circuit 34.
Interface circuit 34 is used to complete the encoding-decoding process of line coding.In sending direction, interface circuit 34 is completed
The physical layer of data encodes, physical layer coding rule, including 4B/5B, 8B/10B and 64B/66B of establishing criteria etc., such as GE
The coding of 8B to the 10B of interface Ethernet.Specifically, interface circuit 34 completes the decoding of payload user data in receiving direction,
Recover initial data, for example, GE interface Ethernet 10B to 8B decoding.
Cyclic redundancy check module 32, for realizing the generation and verification of the cyclic redundancy check code of Ethernet data bag,
It is also used to abandon the Ethernet data bag of check errors.Specifically, in sending direction, cyclic redundancy check module 32 according to
Too the content of network data packet generates cyclic redundancy check code, and is added to the designated position of Ethernet data bag.In recipient
To, it regenerates cyclic redundancy check code and is compared with the check code carried in Ethernet data bag, if it is different, then
It is judged as wrong packet.If being judged as wrong packet, which is directly abandoned, and the data processing module 21 of rear end is not
It is handled again.
Package counting facility 33 for realizing different length, the counting respectively of different types of Ethernet data bag, and reports
To network system interface, safeguarded convenient for operation maintenance personnel.
Data processing module 31 is used to complete the functions such as the parsing, encapsulation or forwarding of Ethernet data bag.
In the present embodiment, interface circuit 34 includes encoding decision unit 340, the first counter 341 and the second counter
342.Whether the physical layer coded data block that encoding decision unit 340 is used to detect 34 receiving direction data of interface circuit is correct；
First counter 341 is for counting the erroneous physical layer coded data block that encoding decision unit 340 detects；Second
The physical layer coded data block count that 342 interface circuit 34 of counter receives, the second counter 342 often receive an object
Reason layer coded data block count just adds 1.CPU 1 is set to outside exchange chip 3, based on according to the first counter 341 and second
The counting of number device 342 calculates the bit error rate.
Specifically, being carried out by the physical layer coded data block sum that 342 interface circuit 34 of the second counter receives
It counts, CPU 1 completes the calculating of the bit error rate, nothing according to the counting extracted from the first counter 341 and the second counter 342
By having data transmission or free time in route, it can all realize accurate bit error rate detection, improve detection accuracy.
The present invention is not limited to the above-described embodiments, for those skilled in the art, is not departing from
Under the premise of the principle of the invention, several improvements and modifications can also be made, these improvements and modifications are also considered as protection of the invention
Within the scope of.The content being not described in detail in this specification belongs to the prior art well known to professional and technical personnel in the field.
Claims (10)
1. the detection method of the bit error rate in a kind of network characterized by comprising
The receiving direction of interface circuit in the line detects the physical layer coded data block number of mistake, receives in conjunction with interface circuit
The physical layer coded data block sum arrived, calculates the bit error rate.
2. the detection method of the bit error rate in network as described in claim 1, it is characterised in that: in the route, no matter network
It is whether idle, there is the transmission of physical layer encoded signal always.
3. the detection method of the bit error rate in network as described in claim 1, it is characterised in that: when physical layer coding meets interface
In circuit when the corresponding coding rule of interface rate, physical layer coded data block is detected as correctly.
4. the detection method of the bit error rate in network as claimed in claim 3, it is characterised in that: for interface rate be 10M and
The Ethernet of 100M, physical layer use 4B/5B coding rule.
5. the detection method of the bit error rate in network as claimed in claim 3, it is characterised in that: be 1000M for interface rate
Ethernet, physical layer use 8B/10B coding rule.
6. the detection method of the bit error rate in network as claimed in claim 3, it is characterised in that: be 10G for interface rate,
The Ethernet of 25G, 40G, 50 and 100G, physical layer use 64B/66B coding rule.
7. the detection method of the bit error rate in network as claimed in claim 6, it is characterised in that: the 64B/66B coding rule
Lead code including 2bit illustrates physical layer code error when lead code is 00 or 11.
8. the detection system of the bit error rate, is set in local device in a kind of network characterized by comprising
Encoding decision unit is set to interface circuit, for detecting interface circuit data receiver direction physical layer coded data
Whether block is correct；
First counter, is set to interface circuit, the physical layer coding for the mistake for being used to detect encoding decision unit
Data block count；
Second counter, is set to interface circuit, is used for the physical layer coded data block count that interface circuit receives；
CPU is used for the counting according to the first counter and the second counter, calculates the bit error rate.
9. the detection system of the bit error rate in network as claimed in claim 8, it is characterised in that: the cpu cycle property extracts the
Data in one counter and the second counter, and first counter and the second counter are not in one cycle
Counter overflow.
10. the detection system of the bit error rate in network as claimed in claim 8, which is characterized in that the encoding decision unit,
One counter and the second counter are set in exchange chip, the exchange chip further include:
Cyclic redundancy check module, for realizing the generation and verification of the cyclic redundancy check code of Ethernet data bag；
Package counting facility, for realizing different length, the counting respectively of different types of Ethernet data bag；
Data processing module is used to complete the parsing, encapsulation or forwarding of Ethernet data bag.
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| US20070047592A1 (en) * | 2001-02-14 | 2007-03-01 | Forster Energy Llc | Method and apparatus for providing a gigabit ethernet circuit pack |
| CN101267210A (en) * | 2007-03-12 | 2008-09-17 | 华为技术有限公司 | Data decoding and coding and receiving/transmission method and device |
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