CN109659266A - A method of improving etch chamber current stability - Google Patents
A method of improving etch chamber current stability Download PDFInfo
- Publication number
- CN109659266A CN109659266A CN201811557608.9A CN201811557608A CN109659266A CN 109659266 A CN109659266 A CN 109659266A CN 201811557608 A CN201811557608 A CN 201811557608A CN 109659266 A CN109659266 A CN 109659266A
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- Prior art keywords
- etch chamber
- electrostatic chuck
- current
- resistance
- etching
- Prior art date
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Links
- 238000000034 method Methods 0.000 title claims abstract description 41
- 238000005530 etching Methods 0.000 claims abstract description 44
- 238000002161 passivation Methods 0.000 claims description 14
- NRTOMJZYCJJWKI-UHFFFAOYSA-N Titanium nitride Chemical group [Ti]#N NRTOMJZYCJJWKI-UHFFFAOYSA-N 0.000 claims description 11
- 230000008859 change Effects 0.000 claims description 8
- 239000003990 capacitor Substances 0.000 claims description 6
- 238000005070 sampling Methods 0.000 claims description 6
- 238000006243 chemical reaction Methods 0.000 claims description 3
- 239000000463 material Substances 0.000 claims description 3
- 238000006116 polymerization reaction Methods 0.000 abstract 1
- 239000004411 aluminium Substances 0.000 description 15
- 229910052782 aluminium Inorganic materials 0.000 description 15
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 15
- 238000010586 diagram Methods 0.000 description 13
- 230000008569 process Effects 0.000 description 7
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 4
- 229920005601 base polymer Polymers 0.000 description 3
- 239000013078 crystal Substances 0.000 description 3
- 230000004048 modification Effects 0.000 description 3
- 238000012986 modification Methods 0.000 description 3
- 229920000642 polymer Polymers 0.000 description 3
- 229910052581 Si3N4 Inorganic materials 0.000 description 2
- 230000005611 electricity Effects 0.000 description 2
- 238000005516 engineering process Methods 0.000 description 2
- 230000003628 erosive effect Effects 0.000 description 2
- 229920002120 photoresistant polymer Polymers 0.000 description 2
- 239000000377 silicon dioxide Substances 0.000 description 2
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 description 2
- RTAQQCXQSZGOHL-UHFFFAOYSA-N Titanium Chemical compound [Ti] RTAQQCXQSZGOHL-UHFFFAOYSA-N 0.000 description 1
- 238000010521 absorption reaction Methods 0.000 description 1
- 230000004075 alteration Effects 0.000 description 1
- 239000006227 byproduct Substances 0.000 description 1
- 238000004364 calculation method Methods 0.000 description 1
- 230000007812 deficiency Effects 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 238000005538 encapsulation Methods 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- 229910052751 metal Inorganic materials 0.000 description 1
- 239000002184 metal Substances 0.000 description 1
- 230000009467 reduction Effects 0.000 description 1
- 239000004065 semiconductor Substances 0.000 description 1
- 239000007787 solid Substances 0.000 description 1
- 239000010936 titanium Substances 0.000 description 1
- 229910052719 titanium Inorganic materials 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/683—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
- H01L21/6831—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using electrostatic chucks
- H01L21/6833—Details of electrostatic chucks
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/3105—After-treatment
- H01L21/311—Etching the insulating layers by chemical or physical means
- H01L21/31105—Etching inorganic layers
- H01L21/31111—Etching inorganic layers by chemical means
- H01L21/31116—Etching inorganic layers by chemical means by dry-etching
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Physics & Mathematics (AREA)
- Power Engineering (AREA)
- Chemical & Material Sciences (AREA)
- Chemical Kinetics & Catalysis (AREA)
- General Chemical & Material Sciences (AREA)
- Inorganic Chemistry (AREA)
- Drying Of Semiconductors (AREA)
- Container, Conveyance, Adherence, Positioning, Of Wafer (AREA)
Abstract
The present invention provides a kind of method for improving etch chamber current stability, and this method provides etch chamber, wafer and the control system with electrostatic chuck, and electrostatic chuck, which has, uses time number, is equipped with adjustable rheostat in the circuit system of electrostatic chuck；Electric current and use time number in electrostatic chuck circuit system is in a linear relationship, and control system acquisition electrostatic chuck uses the current value in time number counting circuit system using time number and according to this；One reference current value is provided, the current value being calculated is fed back to adjustable rheostat by control system, its internal resistance is adjusted in adjustable rheostat, and current value in circuit system is made to be equal to reference current value, multiple etching is carried out to wafer using etch chamber, etching repeats above step every time.This method maintains electrostatic chuck electric current in etching operation and stablizes, avoid the phenomenon that causing electric current increase that etch chamber operating environment is caused to drift about because of electrostatic chuck surface adsorpting polymerization object by the adjusting of variable resistance.
Description
Technical field
The present invention relates to a kind of methods of semiconductor fabrication process stability, etch cavity current more particularly to a kind of raising
The method of stability.
Background technique
Passivation layer etching technics is last one technique of the wafer in wafer foundry, is located at chip wafer outermost layer.
The main function of passivation layer is protection wafer, waterproof, anti-mechanical damage and anti-ray.So the requirement to technique is relatively high.Tool
Body requires to show themselves in that (1) aluminium surface is remained without titanium nitride.Pin cannot completely attach to when titanium nitride residual will lead to encapsulation, lead
Poor contact, or even open circuit are caused, therefore it is required that titanium nitride completely removes completely, to meet this requirement, usual over etching amount needs big
In 50%, metallic aluminium is significantly etched.(2) crystal column surface lack of polymeric residue.Due to needing to completely remove titanium nitride,
The over etching amount greater than 50% is needed in passivation layer etching process.During this, the etching of aluminium will necessarily be brought, titaniferous is formed and contains
The polymer of aluminium.Polymer of the titaniferous containing aluminium is formed, quality is loose, is attached to crystal column surface, after becoming chip, be easy to cause
Integrity problem.Polymer problem in view of titaniferous containing aluminium, the etched etch amount of the second passivation layer need to be controlled in aluminium surface nitrogen-free
Change between titanium residual and crystal column surface lack of polymeric residue；(3) good physical pattern is required, Sidewall angles are greater than 80 degree
Less than 90 degree.Specific passivation layer etching schematic diagram is as shown in Figure 1a, passivation layer before the wafer that Fig. 1 a is shown as the prior art etches
Structural schematic diagram.Titanium nitride 02, silica 03, silicon nitride 04 and photoresist 05 are arranged in sequence on aluminium 01.Fig. 1 b is shown as existing
The wafer of technology etches post passivation layer structural schematic diagram.In Fig. 1 b, the titanium nitride 02 and its above section are etched, and are left aluminium
01。
Lower metal aluminium quilt especially will lead to due to needing the over etching greater than 50% to the removing aspect of titanium nitride
It largely etches away and generates aluminium base by-product and be attached to electrostatic chuck surface, make the reduction of electrostatic chuck surface resistance, so as to cause
Loop resitance in etching operation process reduces, and is characterized by loop current increase, the loop of specific etching process
Circuit diagram is illustrated in fig. 2 shown below.
The loop current calculation formula of electrostatic chuck is as follows in etching process:
Iesc=VHV/Rg
Rg=Rp+Rw+Re
Wherein Rp indicates that plasma resistance, Rw indicate that wafer resistance, Re indicate electrostatic chuck resistance, in Rg indicates fixed
Resistance.Fig. 2 is shown as the etch chamber circuit system schematic diagram of the prior art.In Fig. 2, the resistance of plasma 06 is plasma
Resistance 006, the resistance of wafer 07 are wafer resistance 007, and the resistance of electrostatic chuck electrode 08 is electrostatic chuck resistance 008, is also wrapped
Include filter resistance 09, filter capacitor 10, high voltage power supply resistance 11, leakage current sampling resistor 12 and high voltage power supply 13.
Therefore, the problem of causing loop current to increase problem and etch chamber working environment is changed, is urgently to be resolved.
Summary of the invention
In view of the foregoing deficiencies of prior art, the purpose of the present invention is to provide a kind of raising etching cavity currents to stablize
Property method, for solve in the prior art because electrostatic chuck surface adsorb aluminium base polymer caused by electric current increase phenomenon make
At etching cavity operating environment drift the problem of.
In order to achieve the above objects and other related objects, a method of improving etch chamber current stability, this method is extremely
Less the following steps are included: Step 1: providing an etch chamber for being equipped with electrostatic chuck；The electrostatic chuck is equipped with circuit system, institute
It states and is equipped with adjustable rheostat in circuit system；Step 2: the loop current in the electrostatic chuck circuit system is with the etch chamber
Changed linearly using the time；A control system is provided, the control system acquires the number that the electrostatic chuck uses the time
It is worth, and the numerical value of the circuit system intermediate ring road electric current is calculated according to the numerical value using the time；Step 3: providing a benchmark
Current value, the control system, should by the numeric feedback for the loop current being calculated in step 2 to the adjustable rheostat
Its inside resistance value is adjusted in adjustable rheostat, makes the size of the circuit system intermediate ring road electric current and the reference current value
Size is close or identical；Step 4: providing at least wafer, the etch chamber is set to carry out multiple etching to the wafer, often
The primary circulation of etching executes step 2 to step 3.
Preferably, the control system in the step 2 is APC advanced control system.
Preferably, the etch chamber in the step 1 is plasma reaction etching cavity.
It preferably, include removing the main etching of main medium layer and going to the etching that the wafer carries out in the step 4
Fall to remain the over etching of medium.
Preferably, the dielectric layer is passivation layer, and the material of the passivation layer is titanium nitride.
Preferably, the circuit system in the step 1 includes fixed internal resistance.
Preferably, the fixed internal resistance includes plasma resistance, wafer resistance, electrostatic chuck resistance.
Preferably, the circuit system in the step 1 further includes high voltage power supply resistance, leakage current sampling resistor, filtered electrical
Resistance, filter capacitor.
Preferably, the linear relationship coefficient in linear change described in the step 2 is 0.045.
Preferably, the electrostatic chuck has initial current value, the initial electricity in the state that it is reset using time number
41.889 μ А of flow valuve.
Preferably, control system described in step 2 to the acquisition range using time number of the electrostatic chuck be 0~
3500 hours.
As described above, the method for raising etch chamber current stability of the invention, has the advantages that public affairs of the invention
The method for improving etching cavity stability is opened, this method increases variable resistance in the power supply system of electrostatic chuck, according to quarter
Erosion cavity electrostatic chuck using when number carry out orientation adjustment variable resistance size, with keep etching operation process in the plasma bodily form
Stablize at the electrostatic chuck electric current of current loop, avoids the occurrence of electric current caused by the aluminium base polymer adsorbed by electrostatic chuck surface
Increase the drift of etching cavity operating environment caused by phenomenon.
Detailed description of the invention
Passivation layer structure schematic diagram before the wafer that Fig. 1 a is shown as the prior art etches.
Fig. 1 b is shown as the wafer etching post passivation layer structural schematic diagram of the prior art.
Fig. 2 is shown as the etch chamber circuit system schematic diagram of the prior art.
Fig. 3 is shown as etch chamber circuit system schematic diagram of the invention.
Fig. 4 is shown as the linear relationship chart that electrostatic chuck uses time and loop current.
Fig. 5 is shown as the flow chart of raising etch chamber current stability method of the invention.
Fig. 6 is shown as the loop current curve synoptic diagram under main etching and over etching of the invention.
Component label instructions
01 aluminium
02 titanium nitride
03 silica
04 silicon nitride
05 photoresist
06 plasma
07 wafer
08 electrostatic chuck electrode
006 plasma resistance
007 wafer resistance
008 electrostatic chuck resistance
09 filter resistance
10 filter capacitors
11 high voltage power supply resistance
12 leakage current sampling resistors
13 high voltage power supplies
14 adjustable rheostats
S1 reference current curve
Current curve before s2 adjusting
Current curve after s3 adjusting
Specific embodiment
Illustrate embodiments of the present invention below by way of specific specific example, those skilled in the art can be by this specification
Other advantages and efficacy of the present invention can be easily understood for disclosed content.The present invention can also pass through in addition different specific realities
The mode of applying is embodied or practiced, the various details in this specification can also based on different viewpoints and application, without departing from
Various modifications or alterations are carried out under spirit of the invention.
Fig. 3 is please referred to Fig. 6.It should be noted that diagram provided in the present embodiment only illustrates this in a schematic way
The basic conception of invention, only shown in schema then with related component in the present invention rather than package count when according to actual implementation
Mesh, shape and size are drawn, when actual implementation kenel, quantity and the ratio of each component can arbitrarily change for one kind, and its
Assembly layout kenel may also be increasingly complex.
The method of raising etch chamber current stability of the invention, which is characterized in that this method at least includes the following steps:
As shown in figure 5, Fig. 5 is shown as the flow chart of raising etch chamber current stability method of the invention.
Step 1: providing an etch chamber for being equipped with electrostatic chuck；The electrostatic chuck is equipped with circuit system, the circuit system
Adjustable rheostat is equipped in system；As shown in figure 3, Fig. 3 is shown as etch chamber circuit system schematic diagram of the invention.The circuit system
In be equipped with plasma 06, resistance be plasma resistance 006, wafer 07, resistance be wafer resistance 007, electrostatic chuck
Electrode 08, resistance are electrostatic chuck resistance 008, further include filter resistance 09, filter capacitor 10, high voltage power supply resistance 11, leakage
Current sampling resistor 12 and high voltage power supply 13.Preferably, the circuit system in the step 1 includes fixed internal resistance, described solid
Determining internal resistance includes plasma resistance 006, wafer resistance 007, electrostatic chuck resistance 008.As shown in figure 3, of the invention is described
Adjustable rheostat 14 is additionally provided in circuit system.In the present invention, the circuit system in the step 1 further includes high voltage power supply electricity
Hinder 11, leakage current sampling resistor 12, filter resistance 09, filter capacitor 10.Preferably, the etch chamber in the step 1 be etc.
Ion reaction etching cavity.
Step 2: loop current linearly being become using the time with the etch chamber in the electrostatic chuck circuit system
Change；As shown in figure 4, Fig. 4 is shown as the linear relationship chart that electrostatic chuck uses time and loop current.Preferably, the step
Linear relationship coefficient in linear change described in two is 0.045.As shown in figure 4, the electrostatic chuck uses time number at it
In the state of clearing, there is initial current value, 41.889 μ А of the initial current value.The step also provides a control system, described
Control system is acquired the electrostatic chuck using the numerical value of time, and this is calculated using the numerical value of time according to this
The numerical value of circuit system intermediate ring road electric current, wherein the number after the electrostatic chuck uses once, with one using the time
Value, the control system is APC advanced control system in the present embodiment, is acquired, is adopted using the numerical value of time to this
The numerical value of the circuit system intermediate ring road electric current is calculated after collection according to the numerical value using the time, calculates the loop current
According to the linear relationship for using time and loop current for electrostatic chuck in Fig. 4.Preferably, control system described in the step 2
The acquisition range using time number to the electrostatic chuck is 0~3500 hour.
Step 3: providing a reference current value, the control system is by the number for the loop current being calculated in step 2
Value feeds back to the adjustable rheostat 14, this is adjustable, and its inside resistance value is adjusted in rheostat 14, makes in the circuit system
The size of loop current is close or identical with the reference current value size；As shown in fig. 6, Fig. 6 is shown as main quarter of the invention
Loop current curve synoptic diagram under erosion and over etching.Wherein, horizontal axis indicates that etch period, the longitudinal axis indicate loop current, main quarter
Lose in region, when in use between numerical value when be 2100 hours, the current curve s2 before adjustable rheostat is adjusted deviates from base
Quasi- current curve s1, and the current curve s2 before adjusting is significantly increased, while in over etching region, when in use between numerical value be
When 2100 hours, the current curve s2 before adjustable rheostat is adjusted similarly deviates from reference current curve s1, and adjusts
Preceding current curve s2 is significantly increased；In the step, the numerical value that the control system collects loop current is adjustable rheostat
The numerical value that current curve s2 before adjusting is indicated in the longitudinal axis, subsequent control system is by collected loop current numeric feedback to institute
Adjustable rheostat 14 is stated, its inside resistance value is adjusted in adjustable rheostat 14, makes the big of the circuit system intermediate ring road electric current
It is small close or identical with the reference current value size, from fig. 6, it can be seen that the current curve s3 and reference current after adjusting are bent
Line s1 is very close, thus greatly reduces the numerical value of the loop current.
Step 4: providing at least wafer, the etch chamber is made to carry out multiple etching to the wafer, every etching is primary
Circulation executes step 2 to step 3.It preferably, include removing main Jie to the etching that the wafer carries out in the step 4
The main etching of matter layer and the over etching for removing residual medium.And the dielectric layer is passivation layer, the material packet of the passivation layer
Include titanium nitride.
The invention discloses the method for improving etch chamber current stability, this method increases in the power supply system of electrostatic chuck
Add adjustable rheostat, according to etching cavity electrostatic chuck using time numerical value come the big of the adjustable rheostat inside resistance value of orientation adjustment
It is small, to keep the electrostatic chuck electric current for forming current loop in etching operation process with plasma to stablize, avoid the occurrence of because quiet
Electric current caused by the aluminium base polymer of electric chuck surface absorption increases the drift of etching cavity operating environment caused by phenomenon.
In conclusion the present invention effectively overcomes various shortcoming in the prior art and has high industrial utilization value.
The above-described embodiments merely illustrate the principles and effects of the present invention, and is not intended to limit the present invention.It is any ripe
The personage for knowing this technology all without departing from the spirit and scope of the present invention, carries out modifications and changes to above-described embodiment.Cause
This, institute is complete without departing from the spirit and technical ideas disclosed in the present invention by those of ordinary skill in the art such as
At all equivalent modifications or change, should be covered by the claims of the present invention.
Claims (11)
1. a kind of method for improving etch chamber current stability, which is characterized in that this method at least includes the following steps:
Step 1: providing an etch chamber for being equipped with electrostatic chuck；The electrostatic chuck is equipped with circuit system, in the circuit system
Equipped with adjustable rheostat；
Step 2: loop current being changed linearly using the time with the etch chamber in the electrostatic chuck circuit system；It mentions
For a control system, the control system acquires the numerical value that the electrostatic chuck uses the time, and the number of time is used according to this
The numerical value of the circuit system intermediate ring road electric current is calculated in value；
Step 3: providing a reference current value, the control system is anti-by the numerical value for the loop current being calculated in step 2
It is fed to the adjustable rheostat, this is adjustable, and its inside resistance value is adjusted in rheostat, makes the circuit system intermediate ring road electric current
Size and the reference current value size it is close or identical；
Step 4: providing at least wafer, the etch chamber is made to carry out multiple etching to the wafer, every etching is once followed
Ring executes step 2 to step 3.
2. the method according to claim 1 for improving etch chamber current stability, it is characterised in that: described in step 2
Control system is APC advanced control system.
3. the method according to claim 1 for improving etch chamber current stability, it is characterised in that: described in step 1
Etch chamber is plasma reaction etching cavity.
4. the method according to claim 1 for improving etch chamber current stability, it is characterised in that: to described in step 4
The etching that wafer carries out includes the over etching for removing the main etching of main medium layer and removing residual medium.
5. the method according to claim 4 for improving etch chamber current stability, it is characterised in that: the dielectric layer is blunt
Change layer, the material of the passivation layer is titanium nitride.
6. the method according to claim 1 for improving etch chamber current stability, it is characterised in that: in the step 1
Circuit system includes fixed internal resistance.
7. the method according to claim 6 for improving etch chamber current stability, it is characterised in that: the fixed internal resistance packet
Include plasma resistance, wafer resistance, electrostatic chuck resistance.
8. the method according to claim 7 for improving etch chamber current stability, it is characterised in that: in the step 1
Circuit system further includes high voltage power supply resistance, leakage current sampling resistor, filter resistance, filter capacitor.
9. the method according to claim 1 for improving etch chamber current stability, it is characterised in that: institute in the step 2
Stating the linear relationship coefficient in linear change is 0.045.
10. the method according to claim 9 for improving etch chamber current stability, it is characterised in that: the electrostatic chuck
In the state that it is reset using time number, there is initial current value, 41.889 μ А of the initial current value.
11. the method according to claim 1 for improving etch chamber current stability, it is characterised in that: described in step 2
Control system is 0~3500 hour to the acquisition range using time number of the electrostatic chuck.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201811557608.9A CN109659266B (en) | 2018-12-19 | 2018-12-19 | Method for improving current stability of etching cavity |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201811557608.9A CN109659266B (en) | 2018-12-19 | 2018-12-19 | Method for improving current stability of etching cavity |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN109659266A true CN109659266A (en) | 2019-04-19 |
| CN109659266B CN109659266B (en) | 2020-11-24 |
Family
ID=66115831
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201811557608.9A Active CN109659266B (en) | 2018-12-19 | 2018-12-19 | Method for improving current stability of etching cavity |
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| Country | Link |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2022104699A1 (en) * | 2020-11-20 | 2022-05-27 | Yangtze Memory Technologies Co., Ltd. | Feed-forward run-to-run wafer production control system based on real-time virtual metrology |
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| CN102201730A (en) * | 2010-03-25 | 2011-09-28 | 松下电器产业株式会社 | Semiconductor-device driving circuit, and semiconductor apparatus having the same |
| CN103811261A (en) * | 2012-11-13 | 2014-05-21 | 中微半导体设备(上海)有限公司 | Structure for reducing wafer leakage currents and plasma processing chamber with structure |
| CN102426421B (en) * | 2011-11-30 | 2014-08-13 | 上海华力微电子有限公司 | Advanced process control method for plasma etching |
-
2018
- 2018-12-19 CN CN201811557608.9A patent/CN109659266B/en active Active
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|---|---|---|---|---|
| US8021521B2 (en) * | 2005-10-20 | 2011-09-20 | Applied Materials, Inc. | Method for agile workpiece temperature control in a plasma reactor using a thermal model |
| TW200907731A (en) * | 2007-06-13 | 2009-02-16 | Tokyo Electron Co Ltd | Method and apparatus for creating a gate optimization evaluation library |
| US20110032654A1 (en) * | 2009-08-07 | 2011-02-10 | Mcann Peter | Electrostatic Clamp Optimizer |
| CN102201730A (en) * | 2010-03-25 | 2011-09-28 | 松下电器产业株式会社 | Semiconductor-device driving circuit, and semiconductor apparatus having the same |
| CN102426421B (en) * | 2011-11-30 | 2014-08-13 | 上海华力微电子有限公司 | Advanced process control method for plasma etching |
| CN103811261A (en) * | 2012-11-13 | 2014-05-21 | 中微半导体设备(上海)有限公司 | Structure for reducing wafer leakage currents and plasma processing chamber with structure |
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| Publication number | Priority date | Publication date | Assignee | Title |
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| WO2022104699A1 (en) * | 2020-11-20 | 2022-05-27 | Yangtze Memory Technologies Co., Ltd. | Feed-forward run-to-run wafer production control system based on real-time virtual metrology |
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| Publication number | Publication date |
|---|---|
| CN109659266B (en) | 2020-11-24 |
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