CN109656580B - Serial-port NAND FLASH data zero clearing processing method and system - Google Patents
Serial-port NAND FLASH data zero clearing processing method and system Download PDFInfo
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Abstract
The embodiment of the invention discloses a serial port type NAND FLASH data zero clearing processing method and a system, wherein the method comprises the following steps: when detecting that the system is started and is in a production mode, reading target sub-block data information in at least one storage area which is divided in advance; if the target byte information in the target sub-block data information is the same as the preset byte information, performing zero clearing processing on all blocks in the storage area where the target sub-block is located; wherein, the at least one storage area comprises at least one sub-block. The technical scheme of the embodiment of the invention solves the technical problems that in the prior art, the zero clearing of the memory is complicated because a corresponding production test tool needs to be introduced before the serial port type FLASH enters the production test, realizes the automatic detection of whether data is stored in each block of the memory, automatically performs the zero clearing processing if the data exists, improves the efficiency of the zero clearing processing, and further avoids the technical effect of software system breakdown.
Description
Technical Field
The embodiment of the invention relates to the technical field of memories, in particular to a serial port type NAND FLASH data zero clearing processing method, a system, equipment and a storage medium.
Background
The software burning process is actually a process of discharging the memory cells, and for the memory block without data, the memory cells do not operate, so the values of the partitions are also 1, that is, FF.
Such a design is inconvenient for software development, where 1 is a valid value for software, and we usually default to the initial value of the data structure to be 0, rather than 1. Especially, the new software just burned is used before the production test without resetting the data of these blocks, which not only causes data error of the data block, but also may cause serious problems such as data array boundary crossing, system crash, etc.! To avoid these problems, all burned memory flashes must first be cleared before they are used.
In the prior art, when a serial port NAND FLASH chip is burned and then produced, a zero clearing instruction provided by a scheme provider needs to be added, although the operation is feasible, for machines which do not have a standard production flow, such as a research and development prototype, the operation of ignoring data zero clearing is easy to occur, a software system is crashed and cannot be normally started, the software system can only be upgraded through a boot system, and for a whole machine and the prototype, the operation is troublesome and the appearance of the machine is possibly damaged; if the burnt memory is reset manually, operation negligence is easy to occur, and the software system is crashed.
Disclosure of Invention
The invention provides a serial NAND FLASH data zero clearing processing method, a system, equipment and a storage medium, which are used for automatically clearing data information in a block, thereby avoiding the technical effect of software system crash in the using process.
In a first aspect, an embodiment of the present invention provides a serial NAND FLASH data zero clearing processing method, where the method includes:
when detecting that the system is started and is in a production mode, reading target sub-block data information in at least one storage area which is divided in advance;
if the target byte information in the target sub-block data information is the same as the preset byte information, performing zero clearing processing on all blocks in the storage area where the target sub-block is located;
wherein, the at least one storage area comprises at least one sub-block.
In a second aspect, an embodiment of the present invention further provides a serial NAND FLASH data clearing processing system, where the system includes:
the monitoring module is used for reading target sub-block data information in at least one storage area which is divided in advance when the system is detected to be started and is in a production mode;
the zero clearing module is used for carrying out zero clearing processing on all blocks in the storage area where the target sub-block is located if the target byte information in the target sub-block data information is the same as preset byte information;
wherein, the at least one storage area comprises at least one sub-block.
In a third aspect, an embodiment of the present invention further provides an apparatus, where the apparatus includes:
one or more processors;
a storage device for storing one or more programs,
when the one or more programs are executed by the one or more processors, the one or more processors implement the serial NAND FLASH data clearing processing method according to any one of the embodiments of the present invention.
In a fourth aspect, an embodiment of the present invention further provides a storage medium containing computer executable instructions, where the computer executable instructions are used to execute the serial NAND FLASH data zero clearing processing method according to any one of the embodiments of the present invention when executed by a computer processor.
According to the technical scheme of the embodiment of the invention, when the system is detected to be started and in a production mode, the data information of the target sub-blocks in at least one pre-divided storage area is read, and if the target byte information in the data information of the target sub-blocks is the same as the preset byte information, all blocks in the storage area where the target sub-blocks are located are subjected to zero clearing processing, so that the technical problems that in the prior art, a corresponding production test tool needs to be introduced before a serial port type FLASH enters a production test, the memory is cleared, manual zero clearing operation cannot effectively avoid non-zero clearing of NAND FLASH data caused by negligence of manual operation during production, automatic recovery management of the system after failed upgrading is not facilitated, specific requirements are placed on production software, interfaces of the production test cannot be unified, and meanwhile, the consequences of sending a sample machine to a complete machine are serious, the dismounting and welding of serial port upgrading software or re-recording FLASH are troublesome, calibration data may be lost, the appearance of the machine is damaged, the technical problems of antenna life are solved, the automatic validity detection of the blocks is realized, and if data is stored in the block, the zero clearing processing is automatically performed, the data, the production data is simplified, the system production process, the system is prevented from being damaged, the technical problem that the risk of the system is reduced, and the burning risk of the system is avoided, and the burning is reduced, and the burning reliability of the system is avoided.
Drawings
In order to more clearly illustrate the technical solutions of the exemplary embodiments of the present invention, a brief description is given below of the drawings used in describing the embodiments. It should be clear that the described figures are only views of some of the embodiments of the invention to be described, not all, and that for a person skilled in the art, other figures can be derived from these figures without inventive effort.
Fig. 1 is a schematic flow chart of a serial NAND FLASH data clearing processing method according to a first embodiment of the present invention;
fig. 2 is a schematic flow chart of a serial NAND FLASH data zero clearing processing method according to a second embodiment of the present invention;
fig. 3 is a schematic structural diagram of a serial NAND FLASH data clearing processing system according to a third embodiment of the present invention;
fig. 4 is a schematic structural diagram of an apparatus according to a fourth embodiment of the present invention.
Detailed Description
The present invention will be described in further detail with reference to the accompanying drawings and examples. It is to be understood that the specific embodiments described herein are merely illustrative of the invention and are not limiting of the invention. It should be further noted that, for the convenience of description, only some of the structures related to the present invention are shown in the drawings, not all of the structures.
Example one
Fig. 1 is a schematic flow chart of a serial NAND FLASH data clear processing method according to an embodiment of the present invention, where the present embodiment is applicable to a situation where clear processing is performed on data in a block before a production test, and the method may be executed by a serial NAND FLASH data clear processing system, and the system may be implemented in a software and/or hardware manner, and may be applied to a device.
As shown in fig. 1, the method of this embodiment includes:
and S110, reading the data information of the target sub-block in at least one storage area which is divided in advance when the system is detected to be started and in a production mode.
It should be noted that, just before the burnt software is subjected to production test, the data in each block (block) in the flash memory is not reset and is used, which not only causes data errors of the data block by a user, but also may cause problems such as array boundary crossing and system crash. In order to avoid the above situation, the block needs to be cleared before the production test of the programmed memory FLASH, that is, the technical solution of the embodiment of the present invention may be applied to complete programming and clear the data in the memory before the production test.
It should be noted that, a set of production test commands is configured on the product software, and is used for writing serial numbers and writing production data such as MAC in cooperation with the production tool software during production test. When the system starts up, preset information is read from the memory through a production test command to produce and restore the configuration data.
In this embodiment, the data clearing method may be applied to a PON router, and may also be applied to a system that needs to perform clearing processing on data in a memory in advance. The user can apply the serial port type NAND FLASH data zero clearing processing method, namely the SPI NAND FLASH data zero clearing method to a system which needs to perform zero clearing processing on data in the memory according to actual conditions, and can understand that the technical scheme of the embodiment of the invention can be used if the data in the memory needs to be automatically subjected to zero clearing processing.
The device or the equipment may be provided with a monitoring module, and when the system is detected to be started and the current mode of the memory is a production mode, the data information of a target sub-block (block) in a preset memory block is read. And determining whether the zero clearing processing is required or not by detecting the data information in the target sub-block.
It should be noted that the principle of storing data in the memory is that when the space stored in one sub-block is used up, if there is data to be stored, the data can be stored in a second sub-block, and so on. Thus, the target sub-block can be understood as two cases, the first case target sub-block is the first sub-block. The second case is to take the read and reading blocks as the target sub-blocks, for example, if the first sub-block in the storage area is already read and the second sub-block is being read, the first and second sub-blocks are both taken as the target sub-blocks, and so on, the sub-block in each of the at least one storage area is read as the target sub-block, and the data information in each sub-block is read in turn.
For example, the memory may include at least one sub-block, optionally 2000 sub-blocks, and different sub-blocks may store data of the same data type, so that the 2000 sub-blocks may be divided into different storage areas according to different storage data. Illustratively, according to different storage data, 2000 sub-blocks are divided into 10 storage areas, and each storage area includes at least one sub-block. If the first storage area includes ten sub-blocks, the data information in each sub-block may be read, and the first read sub-block may be used as a target sub-block, or each read sub-block may be used as a target sub-block.
Optionally, at least one sub-block in the memory is classified according to a preset classification rule, and the sub-blocks storing the same data type are taken as a whole and are called a storage area.
The classification rule may be different according to the type of data stored in different sub-blocks, or may be different storage areas set by the system according to requirements.
On the basis of the above technical solution, there may also be a case that when the system is detected to be started, the current mode is determined, and if the current mode is not the production mode, optionally, the user mode, or is in a production test, it indicates that the storage area has been subjected to the zero clearing processing, and may enter the user mode or perform the production test without being subjected to the zero clearing processing.
And S120, if the target byte information in the target sub-block data information is the same as the preset byte information, performing zero clearing processing on all blocks in the storage area where the target sub-block is located.
The target byte may be the first 4 consecutive bytes in the target block, or certainly, may be more than the first 4 bytes, and the user may determine the target byte according to the actual situation. The number of bits of the preset byte may be the same as the number of bits of the target byte, except that the preset byte may be defined as 0XFF. The preset byte is set, so that the advantage that when the target byte information is the same as the preset byte information, the target block is indicated to store the data information, and further, the storage area is indicated to have no clear operation performed, so that clear processing needs to be performed on the storage area.
Illustratively, if each sub-block of the memory is divided into ten storage areas, before the production test, data information in a first target sub-block in the first storage area is read, and whether the zero clearing processing is required is determined by judging the read data information, specifically, whether the zero clearing processing is required is determined by comparing the first 4 consecutive bytes in the read target block with preset bytes. Optionally, if the first 4 consecutive bytes of the target block are 0XFF and the preset byte is also 0XFF, it indicates that the target byte is the same as the preset byte, that is, the target block stores data and the zero clearing operation has not been performed, and the zero clearing processing may be performed on the storage area where the target block is located, so that the storage area does not store data when a production test is performed, thereby avoiding a problem of system crash during the test.
If the first four continuous bytes, that is, the target byte is not 0XFF, the bytes are different from the preset bytes, it can be said that the storage area has been subjected to zero clearing processing, and the user mode can be entered without performing zero clearing processing again, or a test can be performed.
Specifically, if the target byte information in the target sub-block data information is different from the preset byte information, a production test is performed.
On the basis of the technical scheme, it needs to be explained that the serial port type NAND FLASH memory, namely the SPI NAND FLASH memory automatic zero clearing detection method can be applied to all relevant products using the memory, so that the production flow can be simplified, the risk of directly testing after the system is burned is reduced, and the stability and reliability of the system are improved.
According to the technical scheme of the embodiment of the invention, when the system is detected to be started and is in a production mode, the data information of the target sub-block in at least one pre-divided storage area is read, and if the target byte information in the data information of the target sub-block is the same as the preset byte information, the zero clearing treatment is carried out on all blocks in the storage area where the target sub-block is located, so that the technical problems that in the prior art, serial FLASH needs to be introduced into a corresponding production test tool before entering a production test, the memory is cleared, manual addition of the zero clearing operation cannot effectively avoid non-zero clearing of NAND FLASH data caused by manual operation during production, automatic recovery management of the system after the upgrading failure is not facilitated, special requirements on production software are met, the interfaces of the production test cannot be unified, and the consequences of the whole machine and a sample sending machine are serious, the dismounting and welding serial upgrading software or burning FLASH again are troublesome, calibration data may be lost, the appearance of the machine is damaged, the service life of the antenna is damaged, the validity of the blocks is automatically detected, and if data stored in the whole machine, the system is automatically executed data, the production process is simplified, the system production flow is reduced, the reliability and the safety of the system is improved, and the burning risk of the system is avoided, and the burning effect of the system is avoided.
Example two
As a preferred embodiment of the foregoing embodiment, fig. 2 is a schematic flow chart of a serial NAND FLASH data clearing processing method provided in a second embodiment of the present invention, and as described in fig. 2, the method in the embodiment of the present invention includes:
s201, starting a system.
The initiating application may be either an initiating detection system or an initiating device.
S202, judging whether the production mode is adopted; if yes, go to S203; if not, executing S204.
When an application program is started, or a detection system is started, or equipment is started, whether the current mode is a production mode can be judged, if the current mode is the production mode, namely the production test mode, each storage area in the memory needs to be checked, and whether zero clearing processing is performed or not is determined. If the mode is not the production mode, the production test can be directly entered, or the production test is finished, and the user mode can be directly entered.
S203, reading the partition data and acquiring key bytes in the partition data.
If the data is stored in the target sub-block, the data can be determined by judging the first few bytes, so that the first four continuous bytes in the target sub-block can be obtained first, and the first four continuous bytes are taken as key bytes.
And S204, starting a production test.
If the current mode is not the production mode, the production test mode can be directly entered, and if the current mode is the user mode, the user mode can also be directly entered. It should be noted that, in order to avoid repeated operations in the user mode, the zero clearing operation need not be executed, and only when the memory system is in the production mode after the burn is completed, it is necessary to determine whether zero clearing processing is required for each storage area in the memory.
S205, judging whether the key byte is the same as the preset byte or not, if so, executing S206; if not, go to step S204.
Whether the storage area needs to be cleared or not can be determined according to whether the target byte information in the target sub-block is the same as the preset byte or not. Alternatively, the target byte information may be first four consecutive byte information, the target byte information may be understood as key byte information, and the preset byte information may be 0XFF. If the target byte is detected to be the same as the preset byte, indicating that the target sub-block in the storage area stores data and needs to be cleared, namely executing S206; if the target byte is different from the preset byte, it can be said that the storage area where the target sub-block is located has been subjected to the zero clearing processing, and the production test can be directly performed without performing the operation of the zero clearing processing again, and S204 is performed.
And S206, executing a partition clearing instruction.
And clearing the storage area where the target sub-block is located.
And S207, entering a user mode.
User mode is entered, i.e. use is possible.
According to the technical scheme of the embodiment of the invention, when the system is detected to be started and in a production mode, the data information of the target sub-blocks in at least one pre-divided storage area is read, and if the target byte information in the data information of the target sub-blocks is the same as the preset byte information, all the blocks in the storage area where the target sub-blocks are located are subjected to zero clearing processing, so that the technical problems that in the prior art, a corresponding production test tool needs to be introduced before a serial port type FLASH enters a production test, the memory is cleared, manual zero clearing operation cannot effectively avoid non-zero clearing of NAND FLASH data caused by negligence of manual operation during production, automatic recovery management of the system after failed upgrading is not facilitated, specific requirements are placed on production software, interfaces of the production test cannot be unified, and meanwhile, the consequences of sending a sample machine to a complete machine are serious, the serial port upgrading software is difficult to dismount, calibration data may be lost, the appearance of the machine is damaged, the service life of the antenna is damaged, the automatic validity detection of the blocks is realized, and if the data stored in the block is stored, the zero clearing process is simple, the processing efficiency of the execution of the data is high, and the technical effect of the system breakdown of the system is avoided.
EXAMPLE III
Fig. 3 is a schematic structural diagram of a serial NAND FLASH data zero clearing processing system according to a third embodiment of the present invention, where the system includes: a monitoring module 310 and a zeroing module 320.
The monitoring module 310 is configured to, when it is detected that the system is started and in a production mode, read data information of a target sub-block in at least one pre-divided storage area; a clear module 320, configured to clear all blocks in the storage area where the target sub-block is located if target byte information in the target sub-block data information is the same as preset byte information; wherein, the at least one storage area comprises at least one sub-block.
On the basis of the above technical solutions, before the monitoring module is used for reading the target block data information in at least one pre-divided storage area, the monitoring module is further configured to:
and classifying at least one sub-block in the memory according to a preset classification rule, wherein the sub-blocks storing the same data type are taken as a whole and are called as a storage area.
On the basis of the above technical solutions, the system is further configured to:
and if the target byte information in the target sub-block data information is different from the preset byte information, performing production test.
On the basis of the above technical solutions, the monitoring module is further configured to:
when the system is started, judging the mode of the system;
and if the system is in the user mode, the data information of the target sub-block in at least one pre-divided storage area is not read, and the system enters the user mode.
According to the technical scheme of the embodiment of the invention, when the system is detected to be started and is in a production mode, the data information of the target sub-block in at least one pre-divided storage area is read, and if the target byte information in the data information of the target sub-block is the same as the preset byte information, the zero clearing treatment is carried out on all blocks in the storage area where the target sub-block is located, so that the technical problems that in the prior art, serial FLASH needs to be introduced into a corresponding production test tool before entering a production test, the memory is cleared, manual addition of the zero clearing operation cannot effectively avoid non-zero clearing of NAND FLASH data caused by manual operation during production, automatic recovery management of the system after the upgrading failure is not facilitated, special requirements on production software are met, the interfaces of the production test cannot be unified, and the consequences of the whole machine and a sample sending machine are serious, the dismounting and welding serial upgrading software or burning FLASH again are troublesome, calibration data may be lost, the appearance of the machine is damaged, the service life of the antenna is damaged, the validity of the blocks is automatically detected, and if data stored in the whole machine, the system is automatically executed data, the production process is simplified, the system production flow is reduced, the reliability and the safety of the system is improved, and the burning risk of the system is avoided, and the burning effect of the system is avoided.
The serial NAND FLASH data zero clearing processing system provided by the embodiment of the invention can execute the serial NAND FLASH data zero clearing processing method provided by any embodiment of the invention, and has corresponding functional modules and beneficial effects of the execution method.
It should be noted that, the units and modules included in the system are merely divided according to functional logic, but are not limited to the above division as long as the corresponding functions can be realized; in addition, specific names of the functional units are only for convenience of distinguishing from each other, and are not used for limiting the protection scope of the embodiment of the invention.
Example four
Fig. 4 is a schematic structural diagram of an apparatus according to a fourth embodiment of the present invention. FIG. 4 illustrates a block diagram of an exemplary device 40 suitable for use in implementing embodiments of the present invention. The device 40 shown in fig. 4 is only an example and should not bring any limitation to the function and scope of use of the embodiments of the present invention.
As shown in FIG. 4, device 40 is embodied in a general purpose computing device. The components of device 40 may include, but are not limited to: one or more processors or processing units 401, a system memory 402, and a bus 403 that couples the various system components (including the system memory 402 and the processing unit 401).
The system memory 402 may include computer system readable media in the form of volatile memory, such as Random Access Memory (RAM) 404 and/or cache memory 405. Device 40 may further include other removable/non-removable, volatile/nonvolatile computer system storage media. By way of example only, storage system 406 may be used to read from and write to non-removable, nonvolatile magnetic media (not shown in FIG. 4, and commonly referred to as a "hard drive"). Although not shown in FIG. 4, a magnetic disk drive for reading from and writing to a removable, nonvolatile magnetic disk (e.g., a "floppy disk") and an optical disk drive for reading from or writing to a removable, nonvolatile optical disk (e.g., a CD-ROM, DVD-ROM, or other optical media) may be provided. In these cases, each drive may be connected to the bus 403 by one or more data media interfaces. Memory 402 may include at least one program product having a set (e.g., at least one) of program modules that are configured to carry out the functions of embodiments of the invention.
A program/utility 408 having a set (at least one) of program modules 407 may be stored, for example, in memory 402, such program modules 407 including, but not limited to, an operating system, one or more application programs, other program modules, and program data, each of which examples or some combination thereof may comprise an implementation of a network environment. Program modules 407 generally perform the functions and/or methods of the described embodiments of the invention.
The processing unit 401 executes various functional applications and data processing by running the program stored in the system memory 402, for example, implementing the serial NAND FLASH data clearing processing method provided in the embodiment of the present invention.
EXAMPLE five
The fifth embodiment of the invention also provides a storage medium containing the computer executable instruction, and the computer executable instruction is used for executing the serial port type NAND FLASH data zero clearing processing method when being executed by the computer processor.
The method comprises the following steps: when detecting that the system is started and is in a production mode, reading target sub-block data information in at least one storage area which is divided in advance; if the target byte information in the target sub-block data information is the same as the preset byte information, performing zero clearing processing on all blocks in the storage area where the target sub-block is located; wherein, the at least one storage area comprises at least one sub-block.
Computer storage media for embodiments of the invention may employ any combination of one or more computer-readable media. The computer readable medium may be a computer readable signal medium or a computer readable storage medium. A computer readable storage medium may be, for example, but not limited to, an electronic, magnetic, optical, electromagnetic, infrared, or semiconductor system, apparatus, or device, or any combination of the foregoing. More specific examples (a non-exhaustive list) of the computer readable storage medium would include the following: an electrical connection having one or more wires, a portable computer diskette, a hard disk, a Random Access Memory (RAM), a read-only memory (ROM), an erasable programmable read-only memory (EPROM or flash memory), an optical fiber, a portable compact disc read-only memory (CD-ROM), an optical storage device, a magnetic storage device, or any suitable combination of the foregoing. In the context of this document, a computer readable storage medium may be any tangible medium that can contain, or store a program for use by or in connection with an instruction execution system, apparatus, or device.
A computer readable signal medium may include a propagated data signal with computer readable program code embodied therein, for example, in baseband or as part of a carrier wave. Such a propagated data signal may take many forms, including, but not limited to, electro-magnetic, optical, or any suitable combination thereof. A computer readable signal medium may also be any computer readable medium that is not a computer readable storage medium and that can communicate, propagate, or transport a program for use by or in connection with an instruction execution system, apparatus, or device.
Program code embodied on a computer readable medium may be transmitted using any appropriate medium, including but not limited to wireless, wireline, optical fiber cable, RF, etc., or any suitable combination of the foregoing.
Computer program code for carrying out operations for embodiments of the present invention may be written in any combination of one or more programming languages, including an object oriented programming language such as Java, smalltalk, C + + or the like and conventional procedural programming languages, such as the "C" programming language or similar programming languages. The program code may execute entirely on the user's computer, partly on the user's computer, as a stand-alone software package, partly on the user's computer and partly on a remote computer or entirely on the remote computer or server. In the case of a remote computer, the remote computer may be connected to the user's computer through any type of network, including a Local Area Network (LAN) or a Wide Area Network (WAN), or the connection may be made to an external computer (for example, through the Internet using an Internet service provider).
It is to be noted that the foregoing is only illustrative of the preferred embodiments of the present invention and the technical principles employed. It will be understood by those skilled in the art that the present invention is not limited to the particular embodiments described herein, but is capable of various obvious changes, rearrangements and substitutions as will now become apparent to those skilled in the art without departing from the scope of the invention. Therefore, although the present invention has been described in greater detail by the above embodiments, the present invention is not limited to the above embodiments, and may include other equivalent embodiments without departing from the spirit of the present invention, and the scope of the present invention is determined by the scope of the appended claims.
Claims (8)
1. A serial port type NAND FLASH data zero clearing processing method is characterized by comprising the following steps:
when the system is detected to be started and before production test after burning is finished, reading target sub-block data information in at least one storage area which is divided in advance;
if the target byte information in the target sub-block data information is the same as the preset byte information, performing zero clearing processing on all blocks in the storage area where the target sub-block is located;
wherein, the at least one storage area comprises at least one sub-block.
2. The method according to claim 1, further comprising, before said reading target block data information in at least one pre-partitioned storage area:
and classifying at least one sub-block in the memory according to a preset classification rule, and taking the sub-blocks storing the same data type as a whole to be called a storage area.
3. The method of claim 1, further comprising:
and if the target byte information in the target sub-block data information is different from the preset byte information, performing production test.
4. A serial port type NAND FLASH data zero clearing processing system is characterized by comprising:
the monitoring module is used for reading the data information of the target sub-block in at least one pre-divided storage area when the system is detected to be started and before the production test after the burning is finished;
a clearing module, configured to clear all blocks in a storage area where the target sub-block is located if target byte information in the target sub-block data information is the same as preset byte information;
wherein, the at least one storage area comprises at least one sub-block.
5. The system of claim 4, wherein the monitoring module, before being configured to read the target block data information in the at least one pre-partitioned storage area, is further configured to:
and classifying at least one sub-block in the memory according to a preset classification rule, wherein the sub-blocks storing the same data type are taken as a whole and are called as a storage area.
6. The system of claim 4, further comprising: and if the target byte information in the target sub-block data information is different from the preset byte information, performing production test.
7. A serial port type NAND FLASH data zero clearing processing device is characterized by comprising:
one or more processors;
a storage device for storing one or more programs,
when the one or more programs are executed by the one or more processors, the one or more processors implement the serial-type NAND FLASH data clearing processing method according to any one of claims 1 to 3.
8. A storage medium containing computer-executable instructions for performing the serial-type NAND FLASH data clearing processing method as set forth in any one of claims 1 to 3 when executed by a computer processor.
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Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH0619631A (en) * | 1992-07-01 | 1994-01-28 | Nec Corp | Initialization system for storage device |
JPH08161216A (en) * | 1994-12-09 | 1996-06-21 | Toshiba Corp | Information processor provided with high-speed memory clear function |
Family Cites Families (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3399394A (en) * | 1965-08-25 | 1968-08-27 | Ibm | Cyclical random access magnetic data storage system |
CN102147745B (en) * | 2011-05-24 | 2015-04-22 | 广州视源电子科技股份有限公司 | System data initialization method |
KR102564441B1 (en) * | 2016-04-11 | 2023-08-08 | 에스케이하이닉스 주식회사 | Data storage device and operating method thereof |
US10552643B2 (en) * | 2016-12-28 | 2020-02-04 | Intel Corporation | Fast boot up memory controller |
-
2018
- 2018-12-13 CN CN201811526184.XA patent/CN109656580B/en not_active Expired - Fee Related
Patent Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH0619631A (en) * | 1992-07-01 | 1994-01-28 | Nec Corp | Initialization system for storage device |
JPH08161216A (en) * | 1994-12-09 | 1996-06-21 | Toshiba Corp | Information processor provided with high-speed memory clear function |
Non-Patent Citations (2)
Title |
---|
Mapping structures for flash memories: techniques and open problems;E. Gal 等;《IEEE International Conference on Software - Science, Technology & Engineering (SwSTE"05)》;20050423;83-92 * |
基于NAND闪存管理架构的嵌入式设备烧片软件研究与设计;陈驰;《中国优秀博硕士学位论文全文数据库(硕士)信息科技辑》;20130715(第07期);I137-105 * |
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