CN109639379B

CN109639379B - Sensor assembly and sensor system

Info

Publication number: CN109639379B
Application number: CN201811562586.5A
Authority: CN
Inventors: 朱佳辉
Original assignee: Individual
Current assignee: Zhu Jiahui
Priority date: 2018-12-20
Filing date: 2018-12-20
Publication date: 2022-05-06
Anticipated expiration: 2038-12-20
Also published as: CN109639379A

Abstract

The invention discloses a sensor assembly and a sensor system, wherein the sensor assembly comprises a transmission end; and a plurality of sensors, wherein the plurality of sensors are connected to the transmission terminal via a common data line, and transmit respective data from the transmission terminal by time division multiplexing, the plurality of sensors respectively include chip selection terminals, and the chip selection terminals are connected to different chip selection voltages to be set to predetermined addresses. Each sensor transmits data in a predetermined time period according to its own predetermined address. When the time period of data transmission of the sensors needs to be switched, the chip selection voltage connected with the chip selection end of the corresponding sensor only needs to be switched, or the upper computer only needs to be set, so that the switching is quicker and more convenient than the switching in the prior art that the wiring of the sensors needs to be changed and the parameters of the upper computer need to be reset, and the flexible system application requirement is more easily met.

Description

Sensor assembly and sensor system

Technical Field

The invention belongs to the technical field of sensors, and particularly relates to a sensor assembly and a sensor system.

Background

Time Division Multiplexing (TDM) refers to dividing the Time for transmitting signals in a communication system between a sensor and an upper computer, dividing the whole transmission Time into a plurality of Time intervals, wherein each Time interval is occupied by one signal, different signals are transmitted in different Time intervals, and one circuit is used for transmitting multiple signals by transmitting a part of each signal in a Time cross mode.

Fig. 1 shows a sensor system of the prior art, in which a plurality of sensors 111 to 113 transmit DATA to an upper computer 120 in a TDM manner. The host computer 120 includes a clock output CLKo for providing a clock signal CLK, a frame output WS for providing a frame signal WS0, and a DATA input DATAi for receiving DATA. Each of the plurality of sensors 111 to 113 includes a clock input terminal CLKi connected to the clock output terminal CLKo of the upper computer 120, and a data output terminal DATAo connected to the data input terminal DATAi of the upper computer 120. Each of the plurality of sensors 111 to 113 further includes a frame input terminal WSi and a frame input terminal WSo, the frame input terminal WSi of the sensor 111 is connected to the frame output terminal WS of the host computer 120, the frame input terminals WSi of the other sensors are correspondingly connected to the frame output terminal WSo of the sensor immediately before, for example, the frame input terminal WSi of the sensor 112 is connected to the frame output terminal WSo of the sensor 111, and the frame input terminal WSi of the sensor 113 is connected to the frame output terminal WSo of the sensor 112.

In the above system, in the data transmission of each frame, the upper computer 120 provides a frame signal WS0 at its frame output end WS, the sensor 111 starts to transmit data D111 to the upper computer 120 under the driving of WS0, and provides a delayed frame signal from its frame input signal to its frame output signal, and after the transmission is completed, the sensor 111 outputs a frame signal WS1 through the frame output end WSo to drive the sensor 112 of its next bit to start transmission. The sensor 112 starts to transmit the data D112 to the upper computer 120 under the driving of the WS1, and provides a delayed frame signal from its frame input signal to its frame output signal, and after the transmission is completed, the sensor 112 outputs the frame signal WS2 through the frame output terminal WSo to drive the sensor 113 of its next bit to start transmitting the data D113. By analogy, in each frame, the multiple sensors 111 to 113 transmit data by using the same bus in respective corresponding time periods in turn, so that the data line resources are effectively utilized, and confusion is avoided.

However, in the above sensor system, once a certain sensor does not work, the sensors connected in series after the frame output end WSo cannot work, and when a time period in which a plurality of sensors transmit data needs to be switched, the connection mode between the plurality of sensors and the upper computer 120 needs to be changed, and parameters in the upper computer 120 need to be reset, so that the switching process is complicated.

Disclosure of Invention

In view of the above, an object of the present invention is to provide a sensor assembly and a sensor system, wherein a plurality of sensors connect their respective chip selection terminals to different chip selection voltages to be set to predetermined addresses, and each sensor can determine its own working time according to the predetermined addresses, so as to meet more flexible system application requirements.

According to an aspect of the present invention, there is provided a sensor assembly comprising: a transmission end; and a plurality of sensors, wherein the plurality of sensors are connected to the transmission terminal via a common data line, and transmit respective data from the transmission terminal by time division multiplexing, the plurality of sensors respectively include chip selection terminals, and the chip selection terminals are connected to different chip selection voltages to be set to predetermined addresses.

Preferably, the plurality of sensors further comprises: the plurality of sensors are respectively connected to a clock signal input end, a frame signal input end and a data output end of the transmission end, the plurality of sensors respectively receive a clock signal and a frame signal through the clock signal input end and the frame signal input end, and each of the plurality of sensors respectively occupies a common data line to transmit data to the transmission end through the data output end in a respective corresponding predetermined clock period.

Preferably, the predetermined clock cycle corresponding to each of the plurality of sensors is determined by the respective predetermined address.

Preferably, the plurality of sensors comprises one or more of a microphone, an accelerometer, a gyroscope, a pressure gauge, a temperature sensor, a humidity sensor.

Preferably, the chip select voltage is one of a power supply voltage, ground and a predetermined voltage.

Preferably, the predetermined voltage is adjusted by a voltage dividing resistor connected between the chip select terminal and ground.

Preferably, the predetermined voltage is adjusted by a voltage dividing resistor connected between the chip select terminal and a power supply voltage.

According to another aspect of the present invention, there is provided a sensor system comprising: an upper computer; and the sensor assembly of any one of the above, wherein the transmission end of the sensor assembly is connected to the upper computer for data transmission.

Preferably, the upper computer includes: a clock output for providing a clock signal, a frame signal output for providing a frame signal, and a data input for receiving data, the plurality of sensors further comprising: the plurality of sensors respectively receive clock signals and frame signals from the upper computer through the clock signal input end and the frame signal input end, and each of the plurality of sensors respectively occupies a common data line in a corresponding preset clock period through the data output end to transmit data to the upper computer.

According to the sensor assembly and the sensor system of the invention, the plurality of sensors respectively comprise chip selection terminals, the chip selection terminals are connected to different chip selection voltages to be set as the preset addresses, and each sensor transmits data in a preset time period according to the preset address of the sensor. When the time period of data transmission of the sensors needs to be switched, the chip selection voltage connected with the chip selection end of the corresponding sensor only needs to be switched, or the upper computer only needs to be set, so that the switching is quicker and more convenient than the switching in the prior art that the wiring of the sensors needs to be changed and the parameters of the upper computer need to be reset, and the flexible system application requirement is more easily met.

According to the sensor assembly and the sensor system, the plurality of sensors respectively comprise the chip selection terminal, the clock signal input terminal, the DATA output terminal and the frame signal input terminal, so in the connection mode, besides a power supply Voltage (VDD) line, a Ground (GND) line, a clock signal (CLK) line and a DATA transmission (DATA) line which are consistent with the prior art need to be provided, the invention realizes the time division multiplexing DATA transmission by using a frame signal (WS) line to replace the existing connection mode of separately arranging a frame signal input (WSi) line and a frame signal output (WSo) line, saves the cable cost and reduces the complexity of connecting the assembly and the system.

When a sensor in the sensor assembly is damaged or the sensor is not required to transmit data, the sensor system of the present invention can skip the sensor during data transmission by setting the upper computer, thereby avoiding the problem in the prior art that all the sensors connected in series after the frame output terminal WSo of a certain sensor does not work once the certain sensor does not work.

Drawings

The above and other objects, features and advantages of the present invention will become more apparent from the following description of the embodiments of the present invention with reference to the accompanying drawings.

FIG. 1 shows a schematic diagram of a sensor system according to the prior art;

FIG. 2 shows a schematic diagram of a sensor system according to an embodiment of the invention;

FIG. 3 illustrates a waveform diagram of operation of a sensor assembly according to an embodiment of the invention;

Detailed Description

The invention will be described in more detail below with reference to the accompanying drawings. Like elements in the various figures are denoted by like reference numerals. For purposes of clarity, the various features in the drawings are not necessarily drawn to scale. Moreover, certain well-known elements may not be shown in the figures.

In the following description, numerous specific details of the invention, such as structure, materials, dimensions, processing techniques and techniques of the devices are described in order to provide a more thorough understanding of the invention. However, as will be understood by those skilled in the art, the present invention may be practiced without these specific details.

FIG. 2 shows a schematic diagram of a sensor system according to an embodiment of the invention. The system comprises: the sensor comprises an upper computer 220 and a sensor assembly 210, wherein the sensor assembly 210 comprises a plurality of sensors and transmission ends, and the transmission ends of the sensor assembly 210 are connected to the upper computer 220 to transmit data.

For convenience of illustration, the multiple sensors are illustrated herein as including three

micro-electromechanical microphones

211, 212, 213, each having a different physical location, and each having a different location for collecting signals in the sound field. The plurality of sensors are not limited to only including a microphone, and may include one or more of a microphone, an accelerometer, a gyroscope, a pressure gauge, a temperature sensor, a humidity sensor, and the like, may be a plurality of the same type of sensors, or may be a combination of different types of sensors.

The upper computer 220 may include a clock output terminal CLKo for providing the clock signal CLK, a frame signal output terminal WSo for providing the frame signal WS, and a data input terminal DATAi for receiving data, which are respectively connected to the transmission terminals of the sensor assembly 210.

The plurality of microphones 211 to 213 are connected to the transmission terminal via a common data line to be connected to the upper computer 220, and the plurality of microphones 211 to 213 transmit respective data from the transmission terminal by time division multiplexing.

Specifically, the plurality of microphones 211 to 213 each include: the clock signal input terminal CLKi, the frame signal input terminal WSi, and the data output terminal DATAo are respectively and correspondingly connected to the clock output terminal CLKo, the frame signal output terminal WSo, and the data input terminal DATAi of the upper computer 220 through the transmission terminals. The plurality of microphones 211 to 213 receive the clock signal CLK and the frame signal WS from the upper computer 220 through the clock signal input terminal CLKi and the frame signal input terminal WSi, respectively. Each of the plurality of microphones 211 to 213 transmits data to the upper computer 220 through the data output terminal DATAo occupying a common data line in a respective corresponding predetermined clock cycle.

The plurality of microphones 211 to 213 each further include a chip select terminal CS, and the chip select terminal CS is connected to a different chip select voltage to be set to a predetermined address from which each microphone can determine its own time for data transmission.

The chip select voltages connected to the chip select terminals CS of the microphones 211 to 213 are different, and the chip select voltage may be one of a power supply voltage, a ground voltage, and a predetermined voltage. The predetermined voltage may be adjusted by a voltage dividing resistor connected between the chip select terminal CS and ground, or by a voltage dividing resistor connected between the chip select terminal CS and a power supply voltage. In this embodiment, the chip select terminal CS of the microphone 211 is grounded, the chip select terminal CS of the microphone 212 is connected to a power voltage, the chip select terminal CS of the microphone 213 is grounded, and a voltage dividing resistor is disposed between the chip select terminal CS of the microphone 213 and the ground to adjust the voltage of the chip select terminal CS, wherein the voltage dividing resistor may be 1K ohm, 10K ohm, 50K ohm, or the like. In other embodiments with more microphones or other sensors, the resistance values of the voltage dividing resistors may be different numbers, and the voltages of the chip selection terminals CS of different sensors are different, so that the predetermined addresses of the sensors are different, and the sensors perform data transmission in different time periods.

Compared with the prior art, in the connection mode, the sensor component 210 and the sensor system of the embodiment need to provide a power supply Voltage (VDD) line, a Ground (GND) line, a clock signal (CLK) line and a DATA transmission (DATA) line which are consistent with the prior art, and use a frame signal (WS) line to replace the existing connection mode of separately setting a frame signal input (WSi) line and a frame signal output (WSo) line to realize time division multiplexing DATA transmission, thereby saving the cost of cables and reducing the complexity of connecting components and systems.

Compared with the prior art, the sensor assembly 210 and the sensor system of the embodiment can be configured by the upper computer 220 when a certain sensor in the sensor assembly is damaged or the sensor is not required to transmit data, so that the sensor is skipped in the process of transmitting data, thereby avoiding the problem that once a certain sensor does not work, all sensors connected in series after the frame output terminal WSo do not work in the prior art.

Compared with the prior art, the sensor assembly 210 and the sensor system of the embodiment only need to switch the chip selection voltage connected with the chip selection end CS of the corresponding sensor or only need to set the upper computer 220 when the time period for transmitting data by the plurality of sensors is required to be switched, so that the switching is quicker and more convenient than the switching in the prior art that the wiring of the plurality of sensors is required to be changed and the parameters of the upper computer are required to be reset, and the flexible system application requirements are more easily met.

An identification circuit may be provided inside the plurality of microphones 211 to 213 to set a predetermined address according to the voltage of the chip select terminal CS. The identification circuit connects the chip select terminal CS to a fixed voltage, sets a voltage dividing resistor between the fixed voltage and the chip select terminal CS, and sets an address by identifying through the analog-to-digital conversion circuit. Since the number of bits of analog-to-digital conversion is usually 8 bits or more than 16 bits, the number of microphones to be identified can meet the requirements of practical application. It will therefore be appreciated that the plurality of microphones may be other numbers such as four, five, etc. In addition, in each frame of the frame signal WS, whether the check code is added to the head and the tail of the data transmitted by each microphone, which is allowed by the microphone at most, and the form of the check code may be determined by parameters of the upper computer and the microphones.

Fig. 3 illustrates an operational waveform diagram of the sensor assembly 210 according to an embodiment of the present invention. Wherein the clock signal CLK is divided into a plurality of clock signal segments corresponding to the plurality of microphones 211 to 213, respectively, in each frame (1F) of the frame signal WS: the first, second, and third clock signal segments TS1, TS2, and TS3, each of the plurality of microphones 211 to 213 transmits DATA to the upper computer 220 in a common bus within the corresponding clock signal segment in each frame. Specifically, in the first clock signal segment TS1 of each frame, the microphone 211 occupies the bus to transmit the data D211 to the upper computer 220, in the second clock signal segment TS2 of each frame, the microphone 212 occupies the bus to transmit the data D212 to the upper computer 220, and in the third clock signal segment TS3 of each frame, the microphone 213 occupies the bus to transmit the data D213 to the upper computer 220. In each frame, the plurality of microphones 211 to 213 transmit data by using the same bus in respective corresponding time periods in turn, thereby effectively utilizing the resources of the data lines and avoiding confusion.

It should be noted that the time lengths of the clock signal segments TS1 to TS3 corresponding to the microphones 211 to 213 may be the same, or at least two of the time lengths may be set to be different. The present embodiment takes one of the case examples, in which 12 cycles of the clock signal CLK are included in each frame 1F of the frame signal WS, wherein the corresponding clock signal segments into which the microphones 211 to 213 are divided: the first clock signal segment TS1, the second clock signal segment TS2, and the third clock signal segment TS3 all have the same duration, each including 4 clock signal CLK periods, so that the microphone 211 starts to transmit data D211 in the 1 st to 4 th clock signal CLK periods, the microphone 212 starts to transmit data D212 in the 5 th to 8 th clock signal CLK periods, and the microphone 213 starts to transmit data D213 in the 9 th to 12 th clock signal CLK periods.

The predetermined clock cycle corresponding to each of the plurality of microphones 211 to 213 is determined by a respective predetermined address. When the number of microphones included in the sensor component 210 is other, the principle may be similar to the above example, the microphones determine their positions in the plurality of microphones according to their respective predetermined addresses, and when the number of microphones is determined to be nth, the clock signal segment corresponding to each microphone may be set to include M clock signal CLK periods, and the nth microphone may transmit data to the outside by occupying a common bus line in the (N-1) × M +1 to nxm clock signal CLK periods in each frame.

In addition, in the present embodiment, the number of the plurality of clock signal segments into which the clock signal CLK is divided in each frame (1F) of the frame signal WS is the same as the number of the plurality of microphones, and in an alternative embodiment, the number of the plurality of clock signal segments into which the clock signal CLK is divided in each frame (1F) of the frame signal WS may also be greater than the number of the plurality of microphones, and the plurality of microphones perform data transmission corresponding to the plurality of clock signal segments therein. In addition, in this embodiment, the plurality of microphones 211 to 213 transmit data to the upper computer 220 in respective corresponding time periods in turn, and in an alternative embodiment, the plurality of sensors may receive data from the upper computer 220 in respective corresponding time periods in turn.

It should be noted that, in the above embodiment, the chip select terminal CS of the microphone 211 is directly grounded, the chip select terminal CS of the microphone 212 is directly connected to the power voltage, the chip select terminal CS of the microphone 213 is grounded, and a voltage dividing resistor is disposed between the chip select terminal CS of the microphone 213 and the ground to adjust the voltage of the chip select terminal CS. In other embodiments, the chip select terminals of the plurality of microphones may be connected to other forms of chip select voltages. In particular, when the chip select terminal CS of a certain microphone is connected to the frame signal input terminal WSi, the predetermined address thereof may be set to the leading address, that is, the microphone is located at the leading position in the arrangement of the plurality of microphones. When the chip select terminal CS of a certain microphone is floating, the predetermined address can be set as the last address, that is, the microphone is located at the last bit in the arrangement of the microphones. The arrangement mode can avoid the damage of the sensor assembly caused by wrong connection, thereby improving the reliability of the product. In another alternative embodiment, the chip select terminals of the plurality of sensors included in the sensor assembly may be connected to a power supply voltage or ground, and a voltage dividing resistor is provided between the chip select terminals and the power supply voltage or between the chip select terminals and ground, wherein the voltage dividing is a variable resistor. Furthermore, the variable resistors are in signal connection with an upper computer, and the upper computer can control the resistance values of the variable resistors. When the position of a signal collected or transmitted by the sensor needs to be changed, the voltage of the chip selection end is changed only by controlling the resistance value of the variable resistor corresponding to the corresponding sensor through the upper computer, the preset address of the sensor is reset by the voltage of the chip selection end after the change, the time period for transmitting data by each sensor is changed, the steps of changing a wiring mode and an internal algorithm of the upper computer during switching in the prior art are omitted, and the flexible system application requirements are met more easily. Still further, the chip select terminals of the plurality of sensors may complete address verification by outputting a pulse signal after data transmission is completed.

It is noted that, herein, relational terms such as first and second, and the like may be used solely to distinguish one entity or action from another entity or action without necessarily requiring or implying any actual such relationship or order between such entities or actions. Also, the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or apparatus. Without further limitation, an element defined by the phrase "comprising an … …" does not exclude the presence of other identical elements in a process, method, article, or apparatus that comprises the element.

While embodiments in accordance with the invention have been described above, these embodiments are not intended to be exhaustive or to limit the invention to the precise embodiments described. Obviously, many modifications and variations are possible in light of the above teaching. The embodiments were chosen and described in order to best explain the principles of the invention and the practical application, to thereby enable others skilled in the art to best utilize the invention and various embodiments with various modifications as are suited to the particular use contemplated. The invention is limited only by the claims and their full scope and equivalents.

Claims

1. A sensor assembly, comprising:

a transmission end; and

a plurality of sensors connected to the transmission terminal, each including a clock signal input terminal connected to the transmission terminal, a frame signal input terminal, and a data output terminal, receiving a clock signal, a frame signal, and data from the transmission terminal;

the sensors respectively comprise chip selection ends, and the connection mode of the chip selection ends corresponds to a preset address;

the data output terminals of the plurality of sensors are connected to the transmission terminal via a common data line and a common frame signal line, the plurality of sensors receive a frame signal via the common frame signal line, calculate respective clock signal segments in each frame of the frame signal according to respective corresponding predetermined addresses, and transmit data to the transmission terminal while occupying the common data line in the respective clock signal segments, thereby achieving time-division multiplexed data transmission via the common data line,

the plurality of sensors includes one or more of a microphone, an accelerometer, a gyroscope, a pressure gauge, a temperature sensor, a humidity sensor.

2. The sensor assembly of claim 1, wherein the plurality of sensors includes a leading sensor having its chip select terminal connected to its frame signal input terminal and the chip select terminals of the remaining sensors of the plurality of sensors connected to a chip select voltage.

3. The sensor assembly of claim 2, wherein the chip select voltage is one of a supply voltage, ground, a predetermined voltage.

4. The sensor assembly of claim 3, wherein the predetermined voltage is regulated by a voltage divider resistor connected between the chip select terminal and ground.

5. The sensor assembly of claim 4, wherein the predetermined voltage is regulated by a voltage divider resistor connected between the chip select terminal and a supply voltage.

6. A sensor system, comprising:

an upper computer; and

the sensor assembly of any one of claims 1 to 5,

and the transmission end of the sensor assembly is connected to the upper computer to transmit data.

7. The sensor system according to claim 6, wherein the upper computer includes: a clock output for providing a clock signal, a frame signal output for providing a frame signal, and a data input for receiving data.